1daeccac2SArend van Spriel // SPDX-License-Identifier: ISC 2a83369b6SFranky Lin /* 3cb7cf7beSArend van Spriel * Copyright (c) 2014 Broadcom Corporation 4a83369b6SFranky Lin */ 5cb7cf7beSArend van Spriel #ifndef BRCMF_CHIP_H 6cb7cf7beSArend van Spriel #define BRCMF_CHIP_H 7a83369b6SFranky Lin 8cb7cf7beSArend van Spriel #include <linux/types.h> 9a83369b6SFranky Lin 10a83369b6SFranky Lin #define CORE_CC_REG(base, field) \ 11a83369b6SFranky Lin (base + offsetof(struct chipcregs, field)) 12a83369b6SFranky Lin 13cb7cf7beSArend van Spriel /** 14cb7cf7beSArend van Spriel * struct brcmf_chip - chip level information. 15cb7cf7beSArend van Spriel * 16cb7cf7beSArend van Spriel * @chip: chip identifier. 17cb7cf7beSArend van Spriel * @chiprev: chip revision. 181ce050c1SArend van Spriel * @enum_base: base address of core enumeration space. 19cb7cf7beSArend van Spriel * @cc_caps: chipcommon core capabilities. 209befe919SRafał Miłecki * @cc_caps_ext: chipcommon core extended capabilities. 21cb7cf7beSArend van Spriel * @pmucaps: PMU capabilities. 22cb7cf7beSArend van Spriel * @pmurev: PMU revision. 23cb7cf7beSArend van Spriel * @rambase: RAM base address (only applicable for ARM CR4 chips). 240da32ba4SArend van Spriel * @ramsize: amount of RAM on chip including retention. 250da32ba4SArend van Spriel * @srsize: amount of retention RAM on chip. 26cb7cf7beSArend van Spriel * @name: string representation of the chip identifier. 27cb7cf7beSArend van Spriel */ 28cb7cf7beSArend van Spriel struct brcmf_chip { 29cb7cf7beSArend van Spriel u32 chip; 30cb7cf7beSArend van Spriel u32 chiprev; 311ce050c1SArend van Spriel u32 enum_base; 32cb7cf7beSArend van Spriel u32 cc_caps; 339befe919SRafał Miłecki u32 cc_caps_ext; 34cb7cf7beSArend van Spriel u32 pmucaps; 35cb7cf7beSArend van Spriel u32 pmurev; 36cb7cf7beSArend van Spriel u32 rambase; 37cb7cf7beSArend van Spriel u32 ramsize; 380da32ba4SArend van Spriel u32 srsize; 39756a2b39SArend Van Spriel char name[12]; 40cb7cf7beSArend van Spriel }; 41e63ac6b8SFranky Lin 42cb7cf7beSArend van Spriel /** 43cb7cf7beSArend van Spriel * struct brcmf_core - core related information. 44cb7cf7beSArend van Spriel * 45cb7cf7beSArend van Spriel * @id: core identifier. 46cb7cf7beSArend van Spriel * @rev: core revision. 47cb7cf7beSArend van Spriel * @base: base address of core register space. 48cb7cf7beSArend van Spriel */ 499cf218fcSArend van Spriel struct brcmf_core { 5099ba15cdSFranky Lin u16 id; 5199ba15cdSFranky Lin u16 rev; 5299ba15cdSFranky Lin u32 base; 5399ba15cdSFranky Lin }; 5499ba15cdSFranky Lin 55cb7cf7beSArend van Spriel /** 56cb7cf7beSArend van Spriel * struct brcmf_buscore_ops - buscore specific callbacks. 57cb7cf7beSArend van Spriel * 58cb7cf7beSArend van Spriel * @read32: read 32-bit value over bus. 59cb7cf7beSArend van Spriel * @write32: write 32-bit value over bus. 60cb7cf7beSArend van Spriel * @prepare: prepare bus for core configuration. 61cb7cf7beSArend van Spriel * @setup: bus-specific core setup. 62d380ebc9SArend van Spriel * @active: chip becomes active. 63cb7cf7beSArend van Spriel * The callback should use the provided @rstvec when non-zero. 64cb7cf7beSArend van Spriel */ 65cb7cf7beSArend van Spriel struct brcmf_buscore_ops { 66cb7cf7beSArend van Spriel u32 (*read32)(void *ctx, u32 addr); 67cb7cf7beSArend van Spriel void (*write32)(void *ctx, u32 addr, u32 value); 68cb7cf7beSArend van Spriel int (*prepare)(void *ctx); 6907fe2e38SHante Meuleman int (*reset)(void *ctx, struct brcmf_chip *chip); 70cb7cf7beSArend van Spriel int (*setup)(void *ctx, struct brcmf_chip *chip); 71d380ebc9SArend van Spriel void (*activate)(void *ctx, struct brcmf_chip *chip, u32 rstvec); 72a83369b6SFranky Lin }; 73a83369b6SFranky Lin 7482f93cf4SRafał Miłecki int brcmf_chip_get_raminfo(struct brcmf_chip *pub); 751ce050c1SArend van Spriel struct brcmf_chip *brcmf_chip_attach(void *ctx, u16 devid, 76cb7cf7beSArend van Spriel const struct brcmf_buscore_ops *ops); 77cb7cf7beSArend van Spriel void brcmf_chip_detach(struct brcmf_chip *chip); 78cb7cf7beSArend van Spriel struct brcmf_core *brcmf_chip_get_core(struct brcmf_chip *chip, u16 coreid); 791b8d2e0aSWright Feng struct brcmf_core *brcmf_chip_get_d11core(struct brcmf_chip *pub, u8 unit); 80cb7cf7beSArend van Spriel struct brcmf_core *brcmf_chip_get_chipcommon(struct brcmf_chip *chip); 81e2b397f1SRafał Miłecki struct brcmf_core *brcmf_chip_get_pmu(struct brcmf_chip *pub); 82cb7cf7beSArend van Spriel bool brcmf_chip_iscoreup(struct brcmf_core *core); 83cb7cf7beSArend van Spriel void brcmf_chip_coredisable(struct brcmf_core *core, u32 prereset, u32 reset); 84cb7cf7beSArend van Spriel void brcmf_chip_resetcore(struct brcmf_core *core, u32 prereset, u32 reset, 85cb7cf7beSArend van Spriel u32 postreset); 86d380ebc9SArend van Spriel void brcmf_chip_set_passive(struct brcmf_chip *ci); 87d380ebc9SArend van Spriel bool brcmf_chip_set_active(struct brcmf_chip *ci, u32 rstvec); 88cb7cf7beSArend van Spriel bool brcmf_chip_sr_capable(struct brcmf_chip *pub); 89756a2b39SArend Van Spriel char *brcmf_chip_name(u32 chipid, u32 chiprev, char *buf, uint len); 901ce050c1SArend van Spriel u32 brcmf_chip_enum_base(u16 devid); 91a83369b6SFranky Lin 92cb7cf7beSArend van Spriel #endif /* BRCMF_AXIDMP_H */ 93