1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH12K_WMI_H 8 #define ATH12K_WMI_H 9 10 #include <net/mac80211.h> 11 #include "htc.h" 12 13 /* Naming conventions for structures: 14 * 15 * _cmd means that this is a firmware command sent from host to firmware. 16 * 17 * _event means that this is a firmware event sent from firmware to host 18 * 19 * _params is a structure which is embedded either into _cmd or _event (or 20 * both), it is not sent individually. 21 * 22 * _arg is used inside the host, the firmware does not see that at all. 23 */ 24 25 struct ath12k_base; 26 struct ath12k; 27 struct ath12k_link_vif; 28 struct ath12k_fw_stats; 29 struct ath12k_reg_tpc_power_info; 30 31 /* There is no signed version of __le32, so for a temporary solution come 32 * up with our own version. The idea is from fs/ntfs/endian.h. 33 * 34 * Use a_ prefix so that it doesn't conflict if we get proper support to 35 * linux/types.h. 36 */ 37 typedef __s32 __bitwise a_sle32; 38 39 static inline a_sle32 a_cpu_to_sle32(s32 val) 40 { 41 return (__force a_sle32)cpu_to_le32(val); 42 } 43 44 static inline s32 a_sle32_to_cpu(a_sle32 val) 45 { 46 return le32_to_cpu((__force __le32)val); 47 } 48 49 /* defines to set Packet extension values which can be 0 us, 8 usec or 16 usec */ 50 #define MAX_HE_NSS 8 51 #define MAX_HE_MODULATION 8 52 #define MAX_HE_RU 4 53 #define HE_MODULATION_NONE 7 54 #define HE_PET_0_USEC 0 55 #define HE_PET_8_USEC 1 56 #define HE_PET_16_USEC 2 57 58 #define WMI_MAX_CHAINS 8 59 60 #define WMI_MAX_NUM_SS MAX_HE_NSS 61 #define WMI_MAX_NUM_RU MAX_HE_RU 62 63 #define WMI_TLV_CMD(grp_id) (((grp_id) << 12) | 0x1) 64 #define WMI_TLV_EV(grp_id) (((grp_id) << 12) | 0x1) 65 #define WMI_TLV_CMD_UNSUPPORTED 0 66 #define WMI_TLV_PDEV_PARAM_UNSUPPORTED 0 67 #define WMI_TLV_VDEV_PARAM_UNSUPPORTED 0 68 69 struct wmi_cmd_hdr { 70 __le32 cmd_id; 71 } __packed; 72 73 struct wmi_tlv { 74 __le32 header; 75 u8 value[]; 76 } __packed; 77 78 #define WMI_TLV_LEN GENMASK(15, 0) 79 #define WMI_TLV_TAG GENMASK(31, 16) 80 #define TLV_HDR_SIZE sizeof_field(struct wmi_tlv, header) 81 82 #define WMI_CMD_HDR_CMD_ID GENMASK(23, 0) 83 #define WMI_MAX_MEM_REQS 32 84 #define ATH12K_MAX_HW_LISTEN_INTERVAL 5 85 86 #define WMI_HOST_RC_DS_FLAG 0x01 87 #define WMI_HOST_RC_CW40_FLAG 0x02 88 #define WMI_HOST_RC_SGI_FLAG 0x04 89 #define WMI_HOST_RC_HT_FLAG 0x08 90 #define WMI_HOST_RC_RTSCTS_FLAG 0x10 91 #define WMI_HOST_RC_TX_STBC_FLAG 0x20 92 #define WMI_HOST_RC_RX_STBC_FLAG 0xC0 93 #define WMI_HOST_RC_RX_STBC_FLAG_S 6 94 #define WMI_HOST_RC_WEP_TKIP_FLAG 0x100 95 #define WMI_HOST_RC_TS_FLAG 0x200 96 #define WMI_HOST_RC_UAPSD_FLAG 0x400 97 98 #define WMI_HT_CAP_ENABLED 0x0001 99 #define WMI_HT_CAP_HT20_SGI 0x0002 100 #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 101 #define WMI_HT_CAP_TX_STBC 0x0008 102 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 103 #define WMI_HT_CAP_RX_STBC 0x0030 104 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 105 #define WMI_HT_CAP_LDPC 0x0040 106 #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 107 #define WMI_HT_CAP_MPDU_DENSITY 0x0700 108 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 109 #define WMI_HT_CAP_HT40_SGI 0x0800 110 #define WMI_HT_CAP_RX_LDPC 0x1000 111 #define WMI_HT_CAP_TX_LDPC 0x2000 112 #define WMI_HT_CAP_IBF_BFER 0x4000 113 114 /* These macros should be used when we wish to advertise STBC support for 115 * only 1SS or 2SS or 3SS. 116 */ 117 #define WMI_HT_CAP_RX_STBC_1SS 0x0010 118 #define WMI_HT_CAP_RX_STBC_2SS 0x0020 119 #define WMI_HT_CAP_RX_STBC_3SS 0x0030 120 121 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 122 WMI_HT_CAP_HT20_SGI | \ 123 WMI_HT_CAP_HT40_SGI | \ 124 WMI_HT_CAP_TX_STBC | \ 125 WMI_HT_CAP_RX_STBC | \ 126 WMI_HT_CAP_LDPC) 127 128 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 129 #define WMI_VHT_CAP_RX_LDPC 0x00000010 130 #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 131 #define WMI_VHT_CAP_SGI_160MHZ 0x00000040 132 #define WMI_VHT_CAP_TX_STBC 0x00000080 133 #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 134 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 135 #define WMI_VHT_CAP_SU_BFER 0x00000800 136 #define WMI_VHT_CAP_SU_BFEE 0x00001000 137 #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000 138 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13 139 #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000 140 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16 141 #define WMI_VHT_CAP_MU_BFER 0x00080000 142 #define WMI_VHT_CAP_MU_BFEE 0x00100000 143 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 144 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23 145 #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 146 #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 147 148 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 149 150 /* These macros should be used when we wish to advertise STBC support for 151 * only 1SS or 2SS or 3SS. 152 */ 153 #define WMI_VHT_CAP_RX_STBC_1SS 0x00000100 154 #define WMI_VHT_CAP_RX_STBC_2SS 0x00000200 155 #define WMI_VHT_CAP_RX_STBC_3SS 0x00000300 156 157 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 158 WMI_VHT_CAP_SGI_80MHZ | \ 159 WMI_VHT_CAP_TX_STBC | \ 160 WMI_VHT_CAP_RX_STBC_MASK | \ 161 WMI_VHT_CAP_RX_LDPC | \ 162 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 163 WMI_VHT_CAP_RX_FIXED_ANT | \ 164 WMI_VHT_CAP_TX_FIXED_ANT) 165 166 #define WLAN_SCAN_MAX_HINT_S_SSID 10 167 #define WLAN_SCAN_MAX_HINT_BSSID 10 168 #define MAX_RNR_BSS 5 169 170 #define WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG 1 171 172 #define WMI_BA_MODE_BUFFER_SIZE_256 3 173 174 /* HW mode config type replicated from FW header 175 * @WMI_HOST_HW_MODE_SINGLE: Only one PHY is active. 176 * @WMI_HOST_HW_MODE_DBS: Both PHYs are active in different bands, 177 * one in 2G and another in 5G. 178 * @WMI_HOST_HW_MODE_SBS_PASSIVE: Both PHYs are in passive mode (only rx) in 179 * same band; no tx allowed. 180 * @WMI_HOST_HW_MODE_SBS: Both PHYs are active in the same band. 181 * Support for both PHYs within one band is planned 182 * for 5G only(as indicated in WMI_MAC_PHY_CAPABILITIES), 183 * but could be extended to other bands in the future. 184 * The separation of the band between the two PHYs needs 185 * to be communicated separately. 186 * @WMI_HOST_HW_MODE_DBS_SBS: 3 PHYs, with 2 on the same band doing SBS 187 * as in WMI_HW_MODE_SBS, and 3rd on the other band 188 * @WMI_HOST_HW_MODE_DBS_OR_SBS: Two PHY with one PHY capabale of both 2G and 189 * 5G. It can support SBS (5G + 5G) OR DBS (5G + 2G). 190 * @WMI_HOST_HW_MODE_MAX: Max hw_mode_id. Used to indicate invalid mode. 191 */ 192 enum wmi_host_hw_mode_config_type { 193 WMI_HOST_HW_MODE_SINGLE = 0, 194 WMI_HOST_HW_MODE_DBS = 1, 195 WMI_HOST_HW_MODE_SBS_PASSIVE = 2, 196 WMI_HOST_HW_MODE_SBS = 3, 197 WMI_HOST_HW_MODE_DBS_SBS = 4, 198 WMI_HOST_HW_MODE_DBS_OR_SBS = 5, 199 200 /* keep last */ 201 WMI_HOST_HW_MODE_MAX 202 }; 203 204 /* HW mode priority values used to detect the preferred HW mode 205 * on the available modes. 206 */ 207 enum wmi_host_hw_mode_priority { 208 WMI_HOST_HW_MODE_DBS_SBS_PRI, 209 WMI_HOST_HW_MODE_DBS_PRI, 210 WMI_HOST_HW_MODE_DBS_OR_SBS_PRI, 211 WMI_HOST_HW_MODE_SBS_PRI, 212 WMI_HOST_HW_MODE_SBS_PASSIVE_PRI, 213 WMI_HOST_HW_MODE_SINGLE_PRI, 214 215 /* keep last the lowest priority */ 216 WMI_HOST_HW_MODE_MAX_PRI 217 }; 218 219 enum WMI_HOST_WLAN_BAND { 220 WMI_HOST_WLAN_2GHZ_CAP = 1, 221 WMI_HOST_WLAN_5GHZ_CAP = 2, 222 WMI_HOST_WLAN_2GHZ_5GHZ_CAP = 3, 223 }; 224 225 /* Parameters used for WMI_VDEV_PARAM_AUTORATE_MISC_CFG command. 226 * Used only for HE auto rate mode. 227 */ 228 enum { 229 /* HE LTF related configuration */ 230 WMI_HE_AUTORATE_LTF_1X = BIT(0), 231 WMI_HE_AUTORATE_LTF_2X = BIT(1), 232 WMI_HE_AUTORATE_LTF_4X = BIT(2), 233 234 /* HE GI related configuration */ 235 WMI_AUTORATE_400NS_GI = BIT(8), 236 WMI_AUTORATE_800NS_GI = BIT(9), 237 WMI_AUTORATE_1600NS_GI = BIT(10), 238 WMI_AUTORATE_3200NS_GI = BIT(11), 239 }; 240 241 enum wmi_cmd_group { 242 /* 0 to 2 are reserved */ 243 WMI_GRP_START = 0x3, 244 WMI_GRP_SCAN = WMI_GRP_START, 245 WMI_GRP_PDEV = 0x4, 246 WMI_GRP_VDEV = 0x5, 247 WMI_GRP_PEER = 0x6, 248 WMI_GRP_MGMT = 0x7, 249 WMI_GRP_BA_NEG = 0x8, 250 WMI_GRP_STA_PS = 0x9, 251 WMI_GRP_DFS = 0xa, 252 WMI_GRP_ROAM = 0xb, 253 WMI_GRP_OFL_SCAN = 0xc, 254 WMI_GRP_P2P = 0xd, 255 WMI_GRP_AP_PS = 0xe, 256 WMI_GRP_RATE_CTRL = 0xf, 257 WMI_GRP_PROFILE = 0x10, 258 WMI_GRP_SUSPEND = 0x11, 259 WMI_GRP_BCN_FILTER = 0x12, 260 WMI_GRP_WOW = 0x13, 261 WMI_GRP_RTT = 0x14, 262 WMI_GRP_SPECTRAL = 0x15, 263 WMI_GRP_STATS = 0x16, 264 WMI_GRP_ARP_NS_OFL = 0x17, 265 WMI_GRP_NLO_OFL = 0x18, 266 WMI_GRP_GTK_OFL = 0x19, 267 WMI_GRP_CSA_OFL = 0x1a, 268 WMI_GRP_CHATTER = 0x1b, 269 WMI_GRP_TID_ADDBA = 0x1c, 270 WMI_GRP_MISC = 0x1d, 271 WMI_GRP_GPIO = 0x1e, 272 WMI_GRP_FWTEST = 0x1f, 273 WMI_GRP_TDLS = 0x20, 274 WMI_GRP_RESMGR = 0x21, 275 WMI_GRP_STA_SMPS = 0x22, 276 WMI_GRP_WLAN_HB = 0x23, 277 WMI_GRP_RMC = 0x24, 278 WMI_GRP_MHF_OFL = 0x25, 279 WMI_GRP_LOCATION_SCAN = 0x26, 280 WMI_GRP_OEM = 0x27, 281 WMI_GRP_NAN = 0x28, 282 WMI_GRP_COEX = 0x29, 283 WMI_GRP_OBSS_OFL = 0x2a, 284 WMI_GRP_LPI = 0x2b, 285 WMI_GRP_EXTSCAN = 0x2c, 286 WMI_GRP_DHCP_OFL = 0x2d, 287 WMI_GRP_IPA = 0x2e, 288 WMI_GRP_MDNS_OFL = 0x2f, 289 WMI_GRP_SAP_OFL = 0x30, 290 WMI_GRP_OCB = 0x31, 291 WMI_GRP_SOC = 0x32, 292 WMI_GRP_PKT_FILTER = 0x33, 293 WMI_GRP_MAWC = 0x34, 294 WMI_GRP_PMF_OFFLOAD = 0x35, 295 WMI_GRP_BPF_OFFLOAD = 0x36, 296 WMI_GRP_NAN_DATA = 0x37, 297 WMI_GRP_PROTOTYPE = 0x38, 298 WMI_GRP_MONITOR = 0x39, 299 WMI_GRP_REGULATORY = 0x3a, 300 WMI_GRP_HW_DATA_FILTER = 0x3b, 301 WMI_GRP_WLM = 0x3c, 302 WMI_GRP_11K_OFFLOAD = 0x3d, 303 WMI_GRP_TWT = 0x3e, 304 WMI_GRP_MOTION_DET = 0x3f, 305 WMI_GRP_SPATIAL_REUSE = 0x40, 306 WMI_GRP_MLO = 0x48, 307 }; 308 309 #define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1) 310 #define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1) 311 312 enum wmi_tlv_cmd_id { 313 WMI_CMD_UNSUPPORTED = 0, 314 WMI_INIT_CMDID = 0x1, 315 WMI_START_SCAN_CMDID = WMI_TLV_CMD(WMI_GRP_SCAN), 316 WMI_STOP_SCAN_CMDID, 317 WMI_SCAN_CHAN_LIST_CMDID, 318 WMI_SCAN_SCH_PRIO_TBL_CMDID, 319 WMI_SCAN_UPDATE_REQUEST_CMDID, 320 WMI_SCAN_PROB_REQ_OUI_CMDID, 321 WMI_SCAN_ADAPTIVE_DWELL_CONFIG_CMDID, 322 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_TLV_CMD(WMI_GRP_PDEV), 323 WMI_PDEV_SET_CHANNEL_CMDID, 324 WMI_PDEV_SET_PARAM_CMDID, 325 WMI_PDEV_PKTLOG_ENABLE_CMDID, 326 WMI_PDEV_PKTLOG_DISABLE_CMDID, 327 WMI_PDEV_SET_WMM_PARAMS_CMDID, 328 WMI_PDEV_SET_HT_CAP_IE_CMDID, 329 WMI_PDEV_SET_VHT_CAP_IE_CMDID, 330 WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 331 WMI_PDEV_SET_QUIET_MODE_CMDID, 332 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 333 WMI_PDEV_GET_TPC_CONFIG_CMDID, 334 WMI_PDEV_SET_BASE_MACADDR_CMDID, 335 WMI_PDEV_DUMP_CMDID, 336 WMI_PDEV_SET_LED_CONFIG_CMDID, 337 WMI_PDEV_GET_TEMPERATURE_CMDID, 338 WMI_PDEV_SET_LED_FLASHING_CMDID, 339 WMI_PDEV_SMART_ANT_ENABLE_CMDID, 340 WMI_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID, 341 WMI_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID, 342 WMI_PDEV_SET_CTL_TABLE_CMDID, 343 WMI_PDEV_SET_MIMOGAIN_TABLE_CMDID, 344 WMI_PDEV_FIPS_CMDID, 345 WMI_PDEV_GET_ANI_CCK_CONFIG_CMDID, 346 WMI_PDEV_GET_ANI_OFDM_CONFIG_CMDID, 347 WMI_PDEV_GET_NFCAL_POWER_CMDID, 348 WMI_PDEV_GET_TPC_CMDID, 349 WMI_MIB_STATS_ENABLE_CMDID, 350 WMI_PDEV_SET_PCL_CMDID, 351 WMI_PDEV_SET_HW_MODE_CMDID, 352 WMI_PDEV_SET_MAC_CONFIG_CMDID, 353 WMI_PDEV_SET_ANTENNA_MODE_CMDID, 354 WMI_SET_PERIODIC_CHANNEL_STATS_CONFIG_CMDID, 355 WMI_PDEV_WAL_POWER_DEBUG_CMDID, 356 WMI_PDEV_SET_REORDER_TIMEOUT_VAL_CMDID, 357 WMI_PDEV_SET_WAKEUP_CONFIG_CMDID, 358 WMI_PDEV_GET_ANTDIV_STATUS_CMDID, 359 WMI_PDEV_GET_CHIP_POWER_STATS_CMDID, 360 WMI_PDEV_SET_STATS_THRESHOLD_CMDID, 361 WMI_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMDID, 362 WMI_PDEV_UPDATE_PKT_ROUTING_CMDID, 363 WMI_PDEV_CHECK_CAL_VERSION_CMDID, 364 WMI_PDEV_SET_DIVERSITY_GAIN_CMDID, 365 WMI_PDEV_DIV_GET_RSSI_ANTID_CMDID, 366 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID, 367 WMI_PDEV_UPDATE_PMK_CACHE_CMDID, 368 WMI_PDEV_UPDATE_FILS_HLP_PKT_CMDID, 369 WMI_PDEV_UPDATE_CTLTABLE_REQUEST_CMDID, 370 WMI_PDEV_CONFIG_VENDOR_OUI_ACTION_CMDID, 371 WMI_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMDID, 372 WMI_PDEV_SET_RX_FILTER_PROMISCUOUS_CMDID, 373 WMI_PDEV_DMA_RING_CFG_REQ_CMDID, 374 WMI_PDEV_HE_TB_ACTION_FRM_CMDID, 375 WMI_PDEV_PKTLOG_FILTER_CMDID, 376 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID = 0x4044, 377 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID = 0x4045, 378 WMI_PDEV_SET_BIOS_INTERFACE_CMDID = 0x404A, 379 WMI_VDEV_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_VDEV), 380 WMI_VDEV_DELETE_CMDID, 381 WMI_VDEV_START_REQUEST_CMDID, 382 WMI_VDEV_RESTART_REQUEST_CMDID, 383 WMI_VDEV_UP_CMDID, 384 WMI_VDEV_STOP_CMDID, 385 WMI_VDEV_DOWN_CMDID, 386 WMI_VDEV_SET_PARAM_CMDID, 387 WMI_VDEV_INSTALL_KEY_CMDID, 388 WMI_VDEV_WNM_SLEEPMODE_CMDID, 389 WMI_VDEV_WMM_ADDTS_CMDID, 390 WMI_VDEV_WMM_DELTS_CMDID, 391 WMI_VDEV_SET_WMM_PARAMS_CMDID, 392 WMI_VDEV_SET_GTX_PARAMS_CMDID, 393 WMI_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMDID, 394 WMI_VDEV_PLMREQ_START_CMDID, 395 WMI_VDEV_PLMREQ_STOP_CMDID, 396 WMI_VDEV_TSF_TSTAMP_ACTION_CMDID, 397 WMI_VDEV_SET_IE_CMDID, 398 WMI_VDEV_RATEMASK_CMDID, 399 WMI_VDEV_ATF_REQUEST_CMDID, 400 WMI_VDEV_SET_DSCP_TID_MAP_CMDID, 401 WMI_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID, 402 WMI_VDEV_SET_QUIET_MODE_CMDID, 403 WMI_VDEV_SET_CUSTOM_AGGR_SIZE_CMDID, 404 WMI_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMDID, 405 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMDID, 406 WMI_VDEV_SET_ARP_STAT_CMDID, 407 WMI_VDEV_GET_ARP_STAT_CMDID, 408 WMI_VDEV_GET_TX_POWER_CMDID, 409 WMI_VDEV_LIMIT_OFFCHAN_CMDID, 410 WMI_VDEV_SET_CUSTOM_SW_RETRY_TH_CMDID, 411 WMI_VDEV_CHAINMASK_CONFIG_CMDID, 412 WMI_VDEV_GET_BCN_RECEPTION_STATS_CMDID, 413 WMI_VDEV_GET_MWS_COEX_INFO_CMDID, 414 WMI_VDEV_DELETE_ALL_PEER_CMDID, 415 WMI_VDEV_BSS_MAX_IDLE_TIME_CMDID, 416 WMI_VDEV_AUDIO_SYNC_TRIGGER_CMDID, 417 WMI_VDEV_AUDIO_SYNC_QTIMER_CMDID, 418 WMI_VDEV_SET_PCL_CMDID, 419 WMI_VDEV_GET_BIG_DATA_CMDID, 420 WMI_VDEV_GET_BIG_DATA_P2_CMDID, 421 WMI_VDEV_SET_TPC_POWER_CMDID, 422 WMI_PEER_CREATE_CMDID = WMI_TLV_CMD(WMI_GRP_PEER), 423 WMI_PEER_DELETE_CMDID, 424 WMI_PEER_FLUSH_TIDS_CMDID, 425 WMI_PEER_SET_PARAM_CMDID, 426 WMI_PEER_ASSOC_CMDID, 427 WMI_PEER_ADD_WDS_ENTRY_CMDID, 428 WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 429 WMI_PEER_MCAST_GROUP_CMDID, 430 WMI_PEER_INFO_REQ_CMDID, 431 WMI_PEER_GET_ESTIMATED_LINKSPEED_CMDID, 432 WMI_PEER_SET_RATE_REPORT_CONDITION_CMDID, 433 WMI_PEER_UPDATE_WDS_ENTRY_CMDID, 434 WMI_PEER_ADD_PROXY_STA_ENTRY_CMDID, 435 WMI_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID, 436 WMI_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID, 437 WMI_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID, 438 WMI_PEER_ATF_REQUEST_CMDID, 439 WMI_PEER_BWF_REQUEST_CMDID, 440 WMI_PEER_REORDER_QUEUE_SETUP_CMDID, 441 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID, 442 WMI_PEER_SET_RX_BLOCKSIZE_CMDID, 443 WMI_PEER_ANTDIV_INFO_REQ_CMDID, 444 WMI_BCN_TX_CMDID = WMI_TLV_CMD(WMI_GRP_MGMT), 445 WMI_PDEV_SEND_BCN_CMDID, 446 WMI_BCN_TMPL_CMDID, 447 WMI_BCN_FILTER_RX_CMDID, 448 WMI_PRB_REQ_FILTER_RX_CMDID, 449 WMI_MGMT_TX_CMDID, 450 WMI_PRB_TMPL_CMDID, 451 WMI_MGMT_TX_SEND_CMDID, 452 WMI_OFFCHAN_DATA_TX_SEND_CMDID, 453 WMI_PDEV_SEND_FD_CMDID, 454 WMI_BCN_OFFLOAD_CTRL_CMDID, 455 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID, 456 WMI_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMDID, 457 WMI_FILS_DISCOVERY_TMPL_CMDID, 458 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 459 WMI_ADDBA_SEND_CMDID, 460 WMI_ADDBA_STATUS_CMDID, 461 WMI_DELBA_SEND_CMDID, 462 WMI_ADDBA_SET_RESP_CMDID, 463 WMI_SEND_SINGLEAMSDU_CMDID, 464 WMI_STA_POWERSAVE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_PS), 465 WMI_STA_POWERSAVE_PARAM_CMDID, 466 WMI_STA_MIMO_PS_MODE_CMDID, 467 WMI_PDEV_DFS_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_DFS), 468 WMI_PDEV_DFS_DISABLE_CMDID, 469 WMI_DFS_PHYERR_FILTER_ENA_CMDID, 470 WMI_DFS_PHYERR_FILTER_DIS_CMDID, 471 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID, 472 WMI_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMDID, 473 WMI_VDEV_ADFS_CH_CFG_CMDID, 474 WMI_VDEV_ADFS_OCAC_ABORT_CMDID, 475 WMI_ROAM_SCAN_MODE = WMI_TLV_CMD(WMI_GRP_ROAM), 476 WMI_ROAM_SCAN_RSSI_THRESHOLD, 477 WMI_ROAM_SCAN_PERIOD, 478 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 479 WMI_ROAM_AP_PROFILE, 480 WMI_ROAM_CHAN_LIST, 481 WMI_ROAM_SCAN_CMD, 482 WMI_ROAM_SYNCH_COMPLETE, 483 WMI_ROAM_SET_RIC_REQUEST_CMDID, 484 WMI_ROAM_INVOKE_CMDID, 485 WMI_ROAM_FILTER_CMDID, 486 WMI_ROAM_SUBNET_CHANGE_CONFIG_CMDID, 487 WMI_ROAM_CONFIGURE_MAWC_CMDID, 488 WMI_ROAM_SET_MBO_PARAM_CMDID, 489 WMI_ROAM_PER_CONFIG_CMDID, 490 WMI_ROAM_BTM_CONFIG_CMDID, 491 WMI_ENABLE_FILS_CMDID, 492 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_TLV_CMD(WMI_GRP_OFL_SCAN), 493 WMI_OFL_SCAN_REMOVE_AP_PROFILE, 494 WMI_OFL_SCAN_PERIOD, 495 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_TLV_CMD(WMI_GRP_P2P), 496 WMI_P2P_DEV_SET_DISCOVERABILITY, 497 WMI_P2P_GO_SET_BEACON_IE, 498 WMI_P2P_GO_SET_PROBE_RESP_IE, 499 WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 500 WMI_P2P_DISC_OFFLOAD_CONFIG_CMDID, 501 WMI_P2P_DISC_OFFLOAD_APPIE_CMDID, 502 WMI_P2P_DISC_OFFLOAD_PATTERN_CMDID, 503 WMI_P2P_SET_OPPPS_PARAM_CMDID, 504 WMI_P2P_LISTEN_OFFLOAD_START_CMDID, 505 WMI_P2P_LISTEN_OFFLOAD_STOP_CMDID, 506 WMI_AP_PS_PEER_PARAM_CMDID = WMI_TLV_CMD(WMI_GRP_AP_PS), 507 WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 508 WMI_AP_PS_EGAP_PARAM_CMDID, 509 WMI_PEER_RATE_RETRY_SCHED_CMDID = WMI_TLV_CMD(WMI_GRP_RATE_CTRL), 510 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_TLV_CMD(WMI_GRP_PROFILE), 511 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 512 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 513 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 514 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 515 WMI_PDEV_SUSPEND_CMDID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 516 WMI_PDEV_RESUME_CMDID, 517 WMI_ADD_BCN_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_BCN_FILTER), 518 WMI_RMV_BCN_FILTER_CMDID, 519 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_TLV_CMD(WMI_GRP_WOW), 520 WMI_WOW_DEL_WAKE_PATTERN_CMDID, 521 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 522 WMI_WOW_ENABLE_CMDID, 523 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 524 WMI_WOW_IOAC_ADD_KEEPALIVE_CMDID, 525 WMI_WOW_IOAC_DEL_KEEPALIVE_CMDID, 526 WMI_WOW_IOAC_ADD_WAKE_PATTERN_CMDID, 527 WMI_WOW_IOAC_DEL_WAKE_PATTERN_CMDID, 528 WMI_D0_WOW_ENABLE_DISABLE_CMDID, 529 WMI_EXTWOW_ENABLE_CMDID, 530 WMI_EXTWOW_SET_APP_TYPE1_PARAMS_CMDID, 531 WMI_EXTWOW_SET_APP_TYPE2_PARAMS_CMDID, 532 WMI_WOW_ENABLE_ICMPV6_NA_FLT_CMDID, 533 WMI_WOW_UDP_SVC_OFLD_CMDID, 534 WMI_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMDID, 535 WMI_WOW_SET_ACTION_WAKE_UP_CMDID, 536 WMI_RTT_MEASREQ_CMDID = WMI_TLV_CMD(WMI_GRP_RTT), 537 WMI_RTT_TSF_CMDID, 538 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_TLV_CMD(WMI_GRP_SPECTRAL), 539 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 540 WMI_REQUEST_STATS_CMDID = WMI_TLV_CMD(WMI_GRP_STATS), 541 WMI_MCC_SCHED_TRAFFIC_STATS_CMDID, 542 WMI_REQUEST_STATS_EXT_CMDID, 543 WMI_REQUEST_LINK_STATS_CMDID, 544 WMI_START_LINK_STATS_CMDID, 545 WMI_CLEAR_LINK_STATS_CMDID, 546 WMI_GET_FW_MEM_DUMP_CMDID, 547 WMI_DEBUG_MESG_FLUSH_CMDID, 548 WMI_DIAG_EVENT_LOG_CONFIG_CMDID, 549 WMI_REQUEST_WLAN_STATS_CMDID, 550 WMI_REQUEST_RCPI_CMDID, 551 WMI_REQUEST_PEER_STATS_INFO_CMDID, 552 WMI_REQUEST_RADIO_CHAN_STATS_CMDID, 553 WMI_REQUEST_WLM_STATS_CMDID, 554 WMI_REQUEST_CTRL_PATH_STATS_CMDID, 555 WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID = WMI_REQUEST_CTRL_PATH_STATS_CMDID + 3, 556 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_ARP_NS_OFL), 557 WMI_ADD_PROACTIVE_ARP_RSP_PATTERN_CMDID, 558 WMI_DEL_PROACTIVE_ARP_RSP_PATTERN_CMDID, 559 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 560 WMI_APFIND_CMDID, 561 WMI_PASSPOINT_LIST_CONFIG_CMDID, 562 WMI_NLO_CONFIGURE_MAWC_CMDID, 563 WMI_GTK_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 564 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 565 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 566 WMI_CHATTER_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_CHATTER), 567 WMI_CHATTER_ADD_COALESCING_FILTER_CMDID, 568 WMI_CHATTER_DELETE_COALESCING_FILTER_CMDID, 569 WMI_CHATTER_COALESCING_QUERY_CMDID, 570 WMI_PEER_TID_ADDBA_CMDID = WMI_TLV_CMD(WMI_GRP_TID_ADDBA), 571 WMI_PEER_TID_DELBA_CMDID, 572 WMI_STA_DTIM_PS_METHOD_CMDID, 573 WMI_STA_UAPSD_AUTO_TRIG_CMDID, 574 WMI_STA_KEEPALIVE_CMDID, 575 WMI_BA_REQ_SSN_CMDID, 576 WMI_ECHO_CMDID = WMI_TLV_CMD(WMI_GRP_MISC), 577 WMI_PDEV_UTF_CMDID, 578 WMI_DBGLOG_CFG_CMDID, 579 WMI_PDEV_QVIT_CMDID, 580 WMI_PDEV_FTM_INTG_CMDID, 581 WMI_VDEV_SET_KEEPALIVE_CMDID, 582 WMI_VDEV_GET_KEEPALIVE_CMDID, 583 WMI_FORCE_FW_HANG_CMDID, 584 WMI_SET_MCASTBCAST_FILTER_CMDID, 585 WMI_THERMAL_MGMT_CMDID, 586 WMI_HOST_AUTO_SHUTDOWN_CFG_CMDID, 587 WMI_TPC_CHAINMASK_CONFIG_CMDID, 588 WMI_SET_ANTENNA_DIVERSITY_CMDID, 589 WMI_OCB_SET_SCHED_CMDID, 590 WMI_RSSI_BREACH_MONITOR_CONFIG_CMDID, 591 WMI_LRO_CONFIG_CMDID, 592 WMI_TRANSFER_DATA_TO_FLASH_CMDID, 593 WMI_CONFIG_ENHANCED_MCAST_FILTER_CMDID, 594 WMI_VDEV_WISA_CMDID, 595 WMI_DBGLOG_TIME_STAMP_SYNC_CMDID, 596 WMI_SET_MULTIPLE_MCAST_FILTER_CMDID, 597 WMI_READ_DATA_FROM_FLASH_CMDID, 598 WMI_THERM_THROT_SET_CONF_CMDID, 599 WMI_RUNTIME_DPD_RECAL_CMDID, 600 WMI_GET_TPC_POWER_CMDID, 601 WMI_IDLE_TRIGGER_MONITOR_CMDID, 602 WMI_GPIO_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_GPIO), 603 WMI_GPIO_OUTPUT_CMDID, 604 WMI_TXBF_CMDID, 605 WMI_FWTEST_VDEV_MCC_SET_TBTT_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_FWTEST), 606 WMI_FWTEST_P2P_SET_NOA_PARAM_CMDID, 607 WMI_UNIT_TEST_CMDID, 608 WMI_FWTEST_CMDID, 609 WMI_QBOOST_CFG_CMDID, 610 WMI_TDLS_SET_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_TDLS), 611 WMI_TDLS_PEER_UPDATE_CMDID, 612 WMI_TDLS_SET_OFFCHAN_MODE_CMDID, 613 WMI_RESMGR_ADAPTIVE_OCS_EN_DIS_CMDID = WMI_TLV_CMD(WMI_GRP_RESMGR), 614 WMI_RESMGR_SET_CHAN_TIME_QUOTA_CMDID, 615 WMI_RESMGR_SET_CHAN_LATENCY_CMDID, 616 WMI_STA_SMPS_FORCE_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 617 WMI_STA_SMPS_PARAM_CMDID, 618 WMI_HB_SET_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_WLAN_HB), 619 WMI_HB_SET_TCP_PARAMS_CMDID, 620 WMI_HB_SET_TCP_PKT_FILTER_CMDID, 621 WMI_HB_SET_UDP_PARAMS_CMDID, 622 WMI_HB_SET_UDP_PKT_FILTER_CMDID, 623 WMI_RMC_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_RMC), 624 WMI_RMC_SET_ACTION_PERIOD_CMDID, 625 WMI_RMC_CONFIG_CMDID, 626 WMI_RMC_SET_MANUAL_LEADER_CMDID, 627 WMI_MHF_OFFLOAD_SET_MODE_CMDID = WMI_TLV_CMD(WMI_GRP_MHF_OFL), 628 WMI_MHF_OFFLOAD_PLUMB_ROUTING_TBL_CMDID, 629 WMI_BATCH_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 630 WMI_BATCH_SCAN_DISABLE_CMDID, 631 WMI_BATCH_SCAN_TRIGGER_RESULT_CMDID, 632 WMI_OEM_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_OEM), 633 WMI_OEM_REQUEST_CMDID, 634 WMI_LPI_OEM_REQ_CMDID, 635 WMI_NAN_CMDID = WMI_TLV_CMD(WMI_GRP_NAN), 636 WMI_MODEM_POWER_STATE_CMDID = WMI_TLV_CMD(WMI_GRP_COEX), 637 WMI_CHAN_AVOID_UPDATE_CMDID, 638 WMI_COEX_CONFIG_CMDID, 639 WMI_CHAN_AVOID_RPT_ALLOW_CMDID, 640 WMI_COEX_GET_ANTENNA_ISOLATION_CMDID, 641 WMI_SAR_LIMITS_CMDID, 642 WMI_OBSS_SCAN_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_OBSS_OFL), 643 WMI_OBSS_SCAN_DISABLE_CMDID, 644 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID, 645 WMI_LPI_MGMT_SNOOPING_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_LPI), 646 WMI_LPI_START_SCAN_CMDID, 647 WMI_LPI_STOP_SCAN_CMDID, 648 WMI_EXTSCAN_START_CMDID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 649 WMI_EXTSCAN_STOP_CMDID, 650 WMI_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMDID, 651 WMI_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMDID, 652 WMI_EXTSCAN_GET_CACHED_RESULTS_CMDID, 653 WMI_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMDID, 654 WMI_EXTSCAN_SET_CAPABILITIES_CMDID, 655 WMI_EXTSCAN_GET_CAPABILITIES_CMDID, 656 WMI_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMDID, 657 WMI_EXTSCAN_CONFIGURE_MAWC_CMDID, 658 WMI_SET_DHCP_SERVER_OFFLOAD_CMDID = WMI_TLV_CMD(WMI_GRP_DHCP_OFL), 659 WMI_IPA_OFFLOAD_ENABLE_DISABLE_CMDID = WMI_TLV_CMD(WMI_GRP_IPA), 660 WMI_MDNS_OFFLOAD_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 661 WMI_MDNS_SET_FQDN_CMDID, 662 WMI_MDNS_SET_RESPONSE_CMDID, 663 WMI_MDNS_GET_STATS_CMDID, 664 WMI_SAP_OFL_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 665 WMI_SAP_SET_BLACKLIST_PARAM_CMDID, 666 WMI_OCB_SET_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_OCB), 667 WMI_OCB_SET_UTC_TIME_CMDID, 668 WMI_OCB_START_TIMING_ADVERT_CMDID, 669 WMI_OCB_STOP_TIMING_ADVERT_CMDID, 670 WMI_OCB_GET_TSF_TIMER_CMDID, 671 WMI_DCC_GET_STATS_CMDID, 672 WMI_DCC_CLEAR_STATS_CMDID, 673 WMI_DCC_UPDATE_NDL_CMDID, 674 WMI_SOC_SET_PCL_CMDID = WMI_TLV_CMD(WMI_GRP_SOC), 675 WMI_SOC_SET_HW_MODE_CMDID, 676 WMI_SOC_SET_DUAL_MAC_CONFIG_CMDID, 677 WMI_SOC_SET_ANTENNA_MODE_CMDID, 678 WMI_PACKET_FILTER_CONFIG_CMDID = WMI_TLV_CMD(WMI_GRP_PKT_FILTER), 679 WMI_PACKET_FILTER_ENABLE_CMDID, 680 WMI_MAWC_SENSOR_REPORT_IND_CMDID = WMI_TLV_CMD(WMI_GRP_MAWC), 681 WMI_PMF_OFFLOAD_SET_SA_QUERY_CMDID = WMI_TLV_CMD(WMI_GRP_PMF_OFFLOAD), 682 WMI_BPF_GET_CAPABILITY_CMDID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 683 WMI_BPF_GET_VDEV_STATS_CMDID, 684 WMI_BPF_SET_VDEV_INSTRUCTIONS_CMDID, 685 WMI_BPF_DEL_VDEV_INSTRUCTIONS_CMDID, 686 WMI_BPF_SET_VDEV_ACTIVE_MODE_CMDID, 687 WMI_MNT_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_MONITOR), 688 WMI_SET_CURRENT_COUNTRY_CMDID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 689 WMI_11D_SCAN_START_CMDID, 690 WMI_11D_SCAN_STOP_CMDID, 691 WMI_SET_INIT_COUNTRY_CMDID, 692 WMI_NDI_GET_CAP_REQ_CMDID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 693 WMI_NDP_INITIATOR_REQ_CMDID, 694 WMI_NDP_RESPONDER_REQ_CMDID, 695 WMI_NDP_END_REQ_CMDID, 696 WMI_HW_DATA_FILTER_CMDID = WMI_TLV_CMD(WMI_GRP_HW_DATA_FILTER), 697 WMI_TWT_ENABLE_CMDID = WMI_TLV_CMD(WMI_GRP_TWT), 698 WMI_TWT_DISABLE_CMDID, 699 WMI_TWT_ADD_DIALOG_CMDID, 700 WMI_TWT_DEL_DIALOG_CMDID, 701 WMI_TWT_PAUSE_DIALOG_CMDID, 702 WMI_TWT_RESUME_DIALOG_CMDID, 703 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID = 704 WMI_TLV_CMD(WMI_GRP_SPATIAL_REUSE), 705 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMDID, 706 WMI_MLO_LINK_SET_ACTIVE_CMDID = WMI_TLV_CMD(WMI_GRP_MLO), 707 WMI_MLO_SETUP_CMDID, 708 WMI_MLO_READY_CMDID, 709 WMI_MLO_TEARDOWN_CMDID, 710 }; 711 712 enum wmi_tlv_event_id { 713 WMI_SERVICE_READY_EVENTID = 0x1, 714 WMI_READY_EVENTID, 715 WMI_SERVICE_AVAILABLE_EVENTID, 716 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN), 717 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_TLV_CMD(WMI_GRP_PDEV), 718 WMI_CHAN_INFO_EVENTID, 719 WMI_PHYERR_EVENTID, 720 WMI_PDEV_DUMP_EVENTID, 721 WMI_TX_PAUSE_EVENTID, 722 WMI_DFS_RADAR_EVENTID, 723 WMI_PDEV_L1SS_TRACK_EVENTID, 724 WMI_PDEV_TEMPERATURE_EVENTID, 725 WMI_SERVICE_READY_EXT_EVENTID, 726 WMI_PDEV_FIPS_EVENTID, 727 WMI_PDEV_CHANNEL_HOPPING_EVENTID, 728 WMI_PDEV_ANI_CCK_LEVEL_EVENTID, 729 WMI_PDEV_ANI_OFDM_LEVEL_EVENTID, 730 WMI_PDEV_TPC_EVENTID, 731 WMI_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENTID, 732 WMI_PDEV_SET_HW_MODE_RESP_EVENTID, 733 WMI_PDEV_HW_MODE_TRANSITION_EVENTID, 734 WMI_PDEV_SET_MAC_CONFIG_RESP_EVENTID, 735 WMI_PDEV_ANTDIV_STATUS_EVENTID, 736 WMI_PDEV_CHIP_POWER_STATS_EVENTID, 737 WMI_PDEV_CHIP_POWER_SAVE_FAILURE_DETECTED_EVENTID, 738 WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID, 739 WMI_PDEV_CHECK_CAL_VERSION_EVENTID, 740 WMI_PDEV_DIV_RSSI_ANTID_EVENTID, 741 WMI_PDEV_BSS_CHAN_INFO_EVENTID, 742 WMI_PDEV_UPDATE_CTLTABLE_EVENTID, 743 WMI_PDEV_DMA_RING_CFG_RSP_EVENTID, 744 WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID, 745 WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID, 746 WMI_PDEV_CSC_SWITCH_COUNT_STATUS_EVENTID, 747 WMI_PDEV_COLD_BOOT_CAL_DATA_EVENTID, 748 WMI_PDEV_RAP_INFO_EVENTID, 749 WMI_CHAN_RF_CHARACTERIZATION_INFO_EVENTID, 750 WMI_SERVICE_READY_EXT2_EVENTID, 751 WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID = 752 WMI_SERVICE_READY_EXT2_EVENTID + 4, 753 WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID = 754 WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID + 5, 755 WMI_VDEV_START_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_VDEV), 756 WMI_VDEV_STOPPED_EVENTID, 757 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID, 758 WMI_VDEV_MCC_BCN_INTERVAL_CHANGE_REQ_EVENTID, 759 WMI_VDEV_TSF_REPORT_EVENTID, 760 WMI_VDEV_DELETE_RESP_EVENTID, 761 WMI_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENTID, 762 WMI_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENTID, 763 WMI_PEER_STA_KICKOUT_EVENTID = WMI_TLV_CMD(WMI_GRP_PEER), 764 WMI_PEER_INFO_EVENTID, 765 WMI_PEER_TX_FAIL_CNT_THR_EVENTID, 766 WMI_PEER_ESTIMATED_LINKSPEED_EVENTID, 767 WMI_PEER_STATE_EVENTID, 768 WMI_PEER_ASSOC_CONF_EVENTID, 769 WMI_PEER_DELETE_RESP_EVENTID, 770 WMI_PEER_RATECODE_LIST_EVENTID, 771 WMI_WDS_PEER_EVENTID, 772 WMI_PEER_STA_PS_STATECHG_EVENTID, 773 WMI_PEER_ANTDIV_INFO_EVENTID, 774 WMI_PEER_RESERVED0_EVENTID, 775 WMI_PEER_RESERVED1_EVENTID, 776 WMI_PEER_RESERVED2_EVENTID, 777 WMI_PEER_RESERVED3_EVENTID, 778 WMI_PEER_RESERVED4_EVENTID, 779 WMI_PEER_RESERVED5_EVENTID, 780 WMI_PEER_RESERVED6_EVENTID, 781 WMI_PEER_RESERVED7_EVENTID, 782 WMI_PEER_RESERVED8_EVENTID, 783 WMI_PEER_RESERVED9_EVENTID, 784 WMI_PEER_RESERVED10_EVENTID, 785 WMI_PEER_OPER_MODE_CHANGE_EVENTID, 786 WMI_MGMT_RX_EVENTID = WMI_TLV_CMD(WMI_GRP_MGMT), 787 WMI_HOST_SWBA_EVENTID, 788 WMI_TBTTOFFSET_UPDATE_EVENTID, 789 WMI_OFFLOAD_BCN_TX_STATUS_EVENTID, 790 WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID, 791 WMI_MGMT_TX_COMPLETION_EVENTID, 792 WMI_MGMT_TX_BUNDLE_COMPLETION_EVENTID, 793 WMI_TBTTOFFSET_EXT_UPDATE_EVENTID, 794 WMI_OFFCHAN_DATA_TX_COMPLETION_EVENTID, 795 WMI_HOST_FILS_DISCOVERY_EVENTID, 796 WMI_MGMT_RX_FW_CONSUMED_EVENTID = WMI_HOST_FILS_DISCOVERY_EVENTID + 3, 797 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_TLV_CMD(WMI_GRP_BA_NEG), 798 WMI_TX_ADDBA_COMPLETE_EVENTID, 799 WMI_BA_RSP_SSN_EVENTID, 800 WMI_AGGR_STATE_TRIG_EVENTID, 801 WMI_ROAM_EVENTID = WMI_TLV_CMD(WMI_GRP_ROAM), 802 WMI_PROFILE_MATCH, 803 WMI_ROAM_SYNCH_EVENTID, 804 WMI_P2P_DISC_EVENTID = WMI_TLV_CMD(WMI_GRP_P2P), 805 WMI_P2P_NOA_EVENTID, 806 WMI_P2P_LISTEN_OFFLOAD_STOPPED_EVENTID, 807 WMI_AP_PS_EGAP_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_AP_PS), 808 WMI_PDEV_RESUME_EVENTID = WMI_TLV_CMD(WMI_GRP_SUSPEND), 809 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_TLV_CMD(WMI_GRP_WOW), 810 WMI_D0_WOW_DISABLE_ACK_EVENTID, 811 WMI_WOW_INITIAL_WAKEUP_EVENTID, 812 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_TLV_CMD(WMI_GRP_RTT), 813 WMI_TSF_MEASUREMENT_REPORT_EVENTID, 814 WMI_RTT_ERROR_REPORT_EVENTID, 815 WMI_STATS_EXT_EVENTID = WMI_TLV_CMD(WMI_GRP_STATS), 816 WMI_IFACE_LINK_STATS_EVENTID, 817 WMI_PEER_LINK_STATS_EVENTID, 818 WMI_RADIO_LINK_STATS_EVENTID, 819 WMI_UPDATE_FW_MEM_DUMP_EVENTID, 820 WMI_DIAG_EVENT_LOG_SUPPORTED_EVENTID, 821 WMI_INST_RSSI_STATS_EVENTID, 822 WMI_RADIO_TX_POWER_LEVEL_STATS_EVENTID, 823 WMI_REPORT_STATS_EVENTID, 824 WMI_UPDATE_RCPI_EVENTID, 825 WMI_PEER_STATS_INFO_EVENTID, 826 WMI_RADIO_CHAN_STATS_EVENTID, 827 WMI_WLM_STATS_EVENTID, 828 WMI_CTRL_PATH_STATS_EVENTID, 829 WMI_HALPHY_STATS_CTRL_PATH_EVENTID, 830 WMI_NLO_MATCH_EVENTID = WMI_TLV_CMD(WMI_GRP_NLO_OFL), 831 WMI_NLO_SCAN_COMPLETE_EVENTID, 832 WMI_APFIND_EVENTID, 833 WMI_PASSPOINT_MATCH_EVENTID, 834 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_TLV_CMD(WMI_GRP_GTK_OFL), 835 WMI_GTK_REKEY_FAIL_EVENTID, 836 WMI_CSA_HANDLING_EVENTID = WMI_TLV_CMD(WMI_GRP_CSA_OFL), 837 WMI_CHATTER_PC_QUERY_EVENTID = WMI_TLV_CMD(WMI_GRP_CHATTER), 838 WMI_PDEV_DFS_RADAR_DETECTION_EVENTID = WMI_TLV_CMD(WMI_GRP_DFS), 839 WMI_VDEV_DFS_CAC_COMPLETE_EVENTID, 840 WMI_VDEV_ADFS_OCAC_COMPLETE_EVENTID, 841 WMI_ECHO_EVENTID = WMI_TLV_CMD(WMI_GRP_MISC), 842 WMI_PDEV_UTF_EVENTID, 843 WMI_DEBUG_MESG_EVENTID, 844 WMI_UPDATE_STATS_EVENTID, 845 WMI_DEBUG_PRINT_EVENTID, 846 WMI_DCS_INTERFERENCE_EVENTID, 847 WMI_PDEV_QVIT_EVENTID, 848 WMI_WLAN_PROFILE_DATA_EVENTID, 849 WMI_PDEV_FTM_INTG_EVENTID, 850 WMI_WLAN_FREQ_AVOID_EVENTID, 851 WMI_VDEV_GET_KEEPALIVE_EVENTID, 852 WMI_THERMAL_MGMT_EVENTID, 853 WMI_DIAG_DATA_CONTAINER_EVENTID, 854 WMI_HOST_AUTO_SHUTDOWN_EVENTID, 855 WMI_UPDATE_WHAL_MIB_STATS_EVENTID, 856 WMI_UPDATE_VDEV_RATE_STATS_EVENTID, 857 WMI_DIAG_EVENTID, 858 WMI_OCB_SET_SCHED_EVENTID, 859 WMI_DEBUG_MESG_FLUSH_COMPLETE_EVENTID, 860 WMI_RSSI_BREACH_EVENTID, 861 WMI_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENTID, 862 WMI_PDEV_UTF_SCPC_EVENTID, 863 WMI_READ_DATA_FROM_FLASH_EVENTID, 864 WMI_REPORT_RX_AGGR_FAILURE_EVENTID, 865 WMI_PKGID_EVENTID, 866 WMI_GPIO_INPUT_EVENTID = WMI_TLV_CMD(WMI_GRP_GPIO), 867 WMI_UPLOADH_EVENTID, 868 WMI_CAPTUREH_EVENTID, 869 WMI_RFKILL_STATE_CHANGE_EVENTID, 870 WMI_TDLS_PEER_EVENTID = WMI_TLV_CMD(WMI_GRP_TDLS), 871 WMI_STA_SMPS_FORCE_MODE_COMPL_EVENTID = WMI_TLV_CMD(WMI_GRP_STA_SMPS), 872 WMI_BATCH_SCAN_ENABLED_EVENTID = WMI_TLV_CMD(WMI_GRP_LOCATION_SCAN), 873 WMI_BATCH_SCAN_RESULT_EVENTID, 874 WMI_OEM_CAPABILITY_EVENTID = WMI_TLV_CMD(WMI_GRP_OEM), 875 WMI_OEM_MEASUREMENT_REPORT_EVENTID, 876 WMI_OEM_ERROR_REPORT_EVENTID, 877 WMI_OEM_RESPONSE_EVENTID, 878 WMI_NAN_EVENTID = WMI_TLV_CMD(WMI_GRP_NAN), 879 WMI_NAN_DISC_IFACE_CREATED_EVENTID, 880 WMI_NAN_DISC_IFACE_DELETED_EVENTID, 881 WMI_NAN_STARTED_CLUSTER_EVENTID, 882 WMI_NAN_JOINED_CLUSTER_EVENTID, 883 WMI_COEX_REPORT_ANTENNA_ISOLATION_EVENTID = WMI_TLV_CMD(WMI_GRP_COEX), 884 WMI_LPI_RESULT_EVENTID = WMI_TLV_CMD(WMI_GRP_LPI), 885 WMI_LPI_STATUS_EVENTID, 886 WMI_LPI_HANDOFF_EVENTID, 887 WMI_EXTSCAN_START_STOP_EVENTID = WMI_TLV_CMD(WMI_GRP_EXTSCAN), 888 WMI_EXTSCAN_OPERATION_EVENTID, 889 WMI_EXTSCAN_TABLE_USAGE_EVENTID, 890 WMI_EXTSCAN_CACHED_RESULTS_EVENTID, 891 WMI_EXTSCAN_WLAN_CHANGE_RESULTS_EVENTID, 892 WMI_EXTSCAN_HOTLIST_MATCH_EVENTID, 893 WMI_EXTSCAN_CAPABILITIES_EVENTID, 894 WMI_EXTSCAN_HOTLIST_SSID_MATCH_EVENTID, 895 WMI_MDNS_STATS_EVENTID = WMI_TLV_CMD(WMI_GRP_MDNS_OFL), 896 WMI_SAP_OFL_ADD_STA_EVENTID = WMI_TLV_CMD(WMI_GRP_SAP_OFL), 897 WMI_SAP_OFL_DEL_STA_EVENTID, 898 WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID = 899 WMI_EVT_GRP_START_ID(WMI_GRP_OBSS_OFL), 900 WMI_OCB_SET_CONFIG_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_OCB), 901 WMI_OCB_GET_TSF_TIMER_RESP_EVENTID, 902 WMI_DCC_GET_STATS_RESP_EVENTID, 903 WMI_DCC_UPDATE_NDL_RESP_EVENTID, 904 WMI_DCC_STATS_EVENTID, 905 WMI_SOC_SET_HW_MODE_RESP_EVENTID = WMI_TLV_CMD(WMI_GRP_SOC), 906 WMI_SOC_HW_MODE_TRANSITION_EVENTID, 907 WMI_SOC_SET_DUAL_MAC_CONFIG_RESP_EVENTID, 908 WMI_MAWC_ENABLE_SENSOR_EVENTID = WMI_TLV_CMD(WMI_GRP_MAWC), 909 WMI_BPF_CAPABILIY_INFO_EVENTID = WMI_TLV_CMD(WMI_GRP_BPF_OFFLOAD), 910 WMI_BPF_VDEV_STATS_INFO_EVENTID, 911 WMI_RMC_NEW_LEADER_EVENTID = WMI_TLV_CMD(WMI_GRP_RMC), 912 WMI_REG_CHAN_LIST_CC_EVENTID = WMI_TLV_CMD(WMI_GRP_REGULATORY), 913 WMI_11D_NEW_COUNTRY_EVENTID, 914 WMI_REG_CHAN_LIST_CC_EXT_EVENTID, 915 WMI_NDI_CAP_RSP_EVENTID = WMI_TLV_CMD(WMI_GRP_PROTOTYPE), 916 WMI_NDP_INITIATOR_RSP_EVENTID, 917 WMI_NDP_RESPONDER_RSP_EVENTID, 918 WMI_NDP_END_RSP_EVENTID, 919 WMI_NDP_INDICATION_EVENTID, 920 WMI_NDP_CONFIRM_EVENTID, 921 WMI_NDP_END_INDICATION_EVENTID, 922 923 WMI_TWT_ENABLE_EVENTID = WMI_TLV_CMD(WMI_GRP_TWT), 924 WMI_TWT_DISABLE_EVENTID, 925 WMI_TWT_ADD_DIALOG_EVENTID, 926 WMI_TWT_DEL_DIALOG_EVENTID, 927 WMI_TWT_PAUSE_DIALOG_EVENTID, 928 WMI_TWT_RESUME_DIALOG_EVENTID, 929 WMI_MLO_LINK_SET_ACTIVE_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MLO), 930 WMI_MLO_SETUP_COMPLETE_EVENTID, 931 WMI_MLO_TEARDOWN_COMPLETE_EVENTID, 932 }; 933 934 enum wmi_tlv_pdev_param { 935 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1, 936 WMI_PDEV_PARAM_RX_CHAIN_MASK, 937 WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 938 WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 939 WMI_PDEV_PARAM_TXPOWER_SCALE, 940 WMI_PDEV_PARAM_BEACON_GEN_MODE, 941 WMI_PDEV_PARAM_BEACON_TX_MODE, 942 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 943 WMI_PDEV_PARAM_PROTECTION_MODE, 944 WMI_PDEV_PARAM_DYNAMIC_BW, 945 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 946 WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 947 WMI_PDEV_PARAM_STA_KICKOUT_TH, 948 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 949 WMI_PDEV_PARAM_LTR_ENABLE, 950 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 951 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 952 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 953 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 954 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 955 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 956 WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 957 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 958 WMI_PDEV_PARAM_L1SS_ENABLE, 959 WMI_PDEV_PARAM_DSLEEP_ENABLE, 960 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 961 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK, 962 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 963 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 964 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 965 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 966 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 967 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 968 WMI_PDEV_PARAM_PMF_QOS, 969 WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 970 WMI_PDEV_PARAM_DCS, 971 WMI_PDEV_PARAM_ANI_ENABLE, 972 WMI_PDEV_PARAM_ANI_POLL_PERIOD, 973 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 974 WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 975 WMI_PDEV_PARAM_ANI_CCK_LEVEL, 976 WMI_PDEV_PARAM_DYNTXCHAIN, 977 WMI_PDEV_PARAM_PROXY_STA, 978 WMI_PDEV_PARAM_IDLE_PS_CONFIG, 979 WMI_PDEV_PARAM_POWER_GATING_SLEEP, 980 WMI_PDEV_PARAM_RFKILL_ENABLE, 981 WMI_PDEV_PARAM_BURST_DUR, 982 WMI_PDEV_PARAM_BURST_ENABLE, 983 WMI_PDEV_PARAM_HW_RFKILL_CONFIG, 984 WMI_PDEV_PARAM_LOW_POWER_RF_ENABLE, 985 WMI_PDEV_PARAM_L1SS_TRACK, 986 WMI_PDEV_PARAM_HYST_EN, 987 WMI_PDEV_PARAM_POWER_COLLAPSE_ENABLE, 988 WMI_PDEV_PARAM_LED_SYS_STATE, 989 WMI_PDEV_PARAM_LED_ENABLE, 990 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_LATENCY, 991 WMI_PDEV_PARAM_AUDIO_OVER_WLAN_ENABLE, 992 WMI_PDEV_PARAM_WHAL_MIB_STATS_UPDATE_ENABLE, 993 WMI_PDEV_PARAM_VDEV_RATE_STATS_UPDATE_PERIOD, 994 WMI_PDEV_PARAM_CTS_CBW, 995 WMI_PDEV_PARAM_WNTS_CONFIG, 996 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_ENABLE, 997 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_MIN_SLEEP_SLOP, 998 WMI_PDEV_PARAM_ADAPTIVE_EARLY_RX_INC_DEC_STEP, 999 WMI_PDEV_PARAM_EARLY_RX_FIX_SLEEP_SLOP, 1000 WMI_PDEV_PARAM_BMISS_BASED_ADAPTIVE_BTO_ENABLE, 1001 WMI_PDEV_PARAM_BMISS_BTO_MIN_BCN_TIMEOUT, 1002 WMI_PDEV_PARAM_BMISS_BTO_INC_DEC_STEP, 1003 WMI_PDEV_PARAM_BTO_FIX_BCN_TIMEOUT, 1004 WMI_PDEV_PARAM_CE_BASED_ADAPTIVE_BTO_ENABLE, 1005 WMI_PDEV_PARAM_CE_BTO_COMBO_CE_VALUE, 1006 WMI_PDEV_PARAM_TX_CHAIN_MASK_2G, 1007 WMI_PDEV_PARAM_RX_CHAIN_MASK_2G, 1008 WMI_PDEV_PARAM_TX_CHAIN_MASK_5G, 1009 WMI_PDEV_PARAM_RX_CHAIN_MASK_5G, 1010 WMI_PDEV_PARAM_TX_CHAIN_MASK_CCK, 1011 WMI_PDEV_PARAM_TX_CHAIN_MASK_1SS, 1012 WMI_PDEV_PARAM_CTS2SELF_FOR_P2P_GO_CONFIG, 1013 WMI_PDEV_PARAM_TXPOWER_DECR_DB, 1014 WMI_PDEV_PARAM_AGGR_BURST, 1015 WMI_PDEV_PARAM_RX_DECAP_MODE, 1016 WMI_PDEV_PARAM_FAST_CHANNEL_RESET, 1017 WMI_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA, 1018 WMI_PDEV_PARAM_ANTENNA_GAIN, 1019 WMI_PDEV_PARAM_RX_FILTER, 1020 WMI_PDEV_SET_MCAST_TO_UCAST_TID, 1021 WMI_PDEV_PARAM_PROXY_STA_MODE, 1022 WMI_PDEV_PARAM_SET_MCAST2UCAST_MODE, 1023 WMI_PDEV_PARAM_SET_MCAST2UCAST_BUFFER, 1024 WMI_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER, 1025 WMI_PDEV_PEER_STA_PS_STATECHG_ENABLE, 1026 WMI_PDEV_PARAM_IGMPMLD_AC_OVERRIDE, 1027 WMI_PDEV_PARAM_BLOCK_INTERBSS, 1028 WMI_PDEV_PARAM_SET_DISABLE_RESET_CMDID, 1029 WMI_PDEV_PARAM_SET_MSDU_TTL_CMDID, 1030 WMI_PDEV_PARAM_SET_PPDU_DURATION_CMDID, 1031 WMI_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID, 1032 WMI_PDEV_PARAM_SET_PROMISC_MODE_CMDID, 1033 WMI_PDEV_PARAM_SET_BURST_MODE_CMDID, 1034 WMI_PDEV_PARAM_EN_STATS, 1035 WMI_PDEV_PARAM_MU_GROUP_POLICY, 1036 WMI_PDEV_PARAM_NOISE_DETECTION, 1037 WMI_PDEV_PARAM_NOISE_THRESHOLD, 1038 WMI_PDEV_PARAM_DPD_ENABLE, 1039 WMI_PDEV_PARAM_SET_MCAST_BCAST_ECHO, 1040 WMI_PDEV_PARAM_ATF_STRICT_SCH, 1041 WMI_PDEV_PARAM_ATF_SCHED_DURATION, 1042 WMI_PDEV_PARAM_ANT_PLZN, 1043 WMI_PDEV_PARAM_MGMT_RETRY_LIMIT, 1044 WMI_PDEV_PARAM_SENSITIVITY_LEVEL, 1045 WMI_PDEV_PARAM_SIGNED_TXPOWER_2G, 1046 WMI_PDEV_PARAM_SIGNED_TXPOWER_5G, 1047 WMI_PDEV_PARAM_ENABLE_PER_TID_AMSDU, 1048 WMI_PDEV_PARAM_ENABLE_PER_TID_AMPDU, 1049 WMI_PDEV_PARAM_CCA_THRESHOLD, 1050 WMI_PDEV_PARAM_RTS_FIXED_RATE, 1051 WMI_PDEV_PARAM_PDEV_RESET, 1052 WMI_PDEV_PARAM_WAPI_MBSSID_OFFSET, 1053 WMI_PDEV_PARAM_ARP_DBG_SRCADDR, 1054 WMI_PDEV_PARAM_ARP_DBG_DSTADDR, 1055 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCH, 1056 WMI_PDEV_PARAM_ATF_OBSS_NOISE_SCALING_FACTOR, 1057 WMI_PDEV_PARAM_CUST_TXPOWER_SCALE, 1058 WMI_PDEV_PARAM_ATF_DYNAMIC_ENABLE, 1059 WMI_PDEV_PARAM_CTRL_RETRY_LIMIT, 1060 WMI_PDEV_PARAM_PROPAGATION_DELAY, 1061 WMI_PDEV_PARAM_ENA_ANT_DIV, 1062 WMI_PDEV_PARAM_FORCE_CHAIN_ANT, 1063 WMI_PDEV_PARAM_ANT_DIV_SELFTEST, 1064 WMI_PDEV_PARAM_ANT_DIV_SELFTEST_INTVL, 1065 WMI_PDEV_PARAM_STATS_OBSERVATION_PERIOD, 1066 WMI_PDEV_PARAM_TX_PPDU_DELAY_BIN_SIZE_MS, 1067 WMI_PDEV_PARAM_TX_PPDU_DELAY_ARRAY_LEN, 1068 WMI_PDEV_PARAM_TX_MPDU_AGGR_ARRAY_LEN, 1069 WMI_PDEV_PARAM_RX_MPDU_AGGR_ARRAY_LEN, 1070 WMI_PDEV_PARAM_TX_SCH_DELAY, 1071 WMI_PDEV_PARAM_ENABLE_RTS_SIFS_BURSTING, 1072 WMI_PDEV_PARAM_MAX_MPDUS_IN_AMPDU, 1073 WMI_PDEV_PARAM_PEER_STATS_INFO_ENABLE, 1074 WMI_PDEV_PARAM_FAST_PWR_TRANSITION, 1075 WMI_PDEV_PARAM_RADIO_CHAN_STATS_ENABLE, 1076 WMI_PDEV_PARAM_RADIO_DIAGNOSIS_ENABLE, 1077 WMI_PDEV_PARAM_MESH_MCAST_ENABLE, 1078 }; 1079 1080 enum wmi_tlv_vdev_param { 1081 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1, 1082 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 1083 WMI_VDEV_PARAM_BEACON_INTERVAL, 1084 WMI_VDEV_PARAM_LISTEN_INTERVAL, 1085 WMI_VDEV_PARAM_MULTICAST_RATE, 1086 WMI_VDEV_PARAM_MGMT_TX_RATE, 1087 WMI_VDEV_PARAM_SLOT_TIME, 1088 WMI_VDEV_PARAM_PREAMBLE, 1089 WMI_VDEV_PARAM_SWBA_TIME, 1090 WMI_VDEV_STATS_UPDATE_PERIOD, 1091 WMI_VDEV_PWRSAVE_AGEOUT_TIME, 1092 WMI_VDEV_HOST_SWBA_INTERVAL, 1093 WMI_VDEV_PARAM_DTIM_PERIOD, 1094 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 1095 WMI_VDEV_PARAM_WDS, 1096 WMI_VDEV_PARAM_ATIM_WINDOW, 1097 WMI_VDEV_PARAM_BMISS_COUNT_MAX, 1098 WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 1099 WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 1100 WMI_VDEV_PARAM_FEATURE_WMM, 1101 WMI_VDEV_PARAM_CHWIDTH, 1102 WMI_VDEV_PARAM_CHEXTOFFSET, 1103 WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 1104 WMI_VDEV_PARAM_STA_QUICKKICKOUT, 1105 WMI_VDEV_PARAM_MGMT_RATE, 1106 WMI_VDEV_PARAM_PROTECTION_MODE, 1107 WMI_VDEV_PARAM_FIXED_RATE, 1108 WMI_VDEV_PARAM_SGI, 1109 WMI_VDEV_PARAM_LDPC, 1110 WMI_VDEV_PARAM_TX_STBC, 1111 WMI_VDEV_PARAM_RX_STBC, 1112 WMI_VDEV_PARAM_INTRA_BSS_FWD, 1113 WMI_VDEV_PARAM_DEF_KEYID, 1114 WMI_VDEV_PARAM_NSS, 1115 WMI_VDEV_PARAM_BCAST_DATA_RATE, 1116 WMI_VDEV_PARAM_MCAST_DATA_RATE, 1117 WMI_VDEV_PARAM_MCAST_INDICATE, 1118 WMI_VDEV_PARAM_DHCP_INDICATE, 1119 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 1120 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 1121 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 1122 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 1123 WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 1124 WMI_VDEV_PARAM_ENABLE_RTSCTS, 1125 WMI_VDEV_PARAM_TXBF, 1126 WMI_VDEV_PARAM_PACKET_POWERSAVE, 1127 WMI_VDEV_PARAM_DROP_UNENCRY, 1128 WMI_VDEV_PARAM_TX_ENCAP_TYPE, 1129 WMI_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 1130 WMI_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE, 1131 WMI_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM, 1132 WMI_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE, 1133 WMI_VDEV_PARAM_EARLY_RX_SLOP_STEP, 1134 WMI_VDEV_PARAM_EARLY_RX_INIT_SLOP, 1135 WMI_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE, 1136 WMI_VDEV_PARAM_TX_PWRLIMIT, 1137 WMI_VDEV_PARAM_SNR_NUM_FOR_CAL, 1138 WMI_VDEV_PARAM_ROAM_FW_OFFLOAD, 1139 WMI_VDEV_PARAM_ENABLE_RMC, 1140 WMI_VDEV_PARAM_IBSS_MAX_BCN_LOST_MS, 1141 WMI_VDEV_PARAM_MAX_RATE, 1142 WMI_VDEV_PARAM_EARLY_RX_DRIFT_SAMPLE, 1143 WMI_VDEV_PARAM_SET_IBSS_TX_FAIL_CNT_THR, 1144 WMI_VDEV_PARAM_EBT_RESYNC_TIMEOUT, 1145 WMI_VDEV_PARAM_AGGR_TRIG_EVENT_ENABLE, 1146 WMI_VDEV_PARAM_IS_IBSS_POWER_SAVE_ALLOWED, 1147 WMI_VDEV_PARAM_IS_POWER_COLLAPSE_ALLOWED, 1148 WMI_VDEV_PARAM_IS_AWAKE_ON_TXRX_ENABLED, 1149 WMI_VDEV_PARAM_INACTIVITY_CNT, 1150 WMI_VDEV_PARAM_TXSP_END_INACTIVITY_TIME_MS, 1151 WMI_VDEV_PARAM_DTIM_POLICY, 1152 WMI_VDEV_PARAM_IBSS_PS_WARMUP_TIME_SECS, 1153 WMI_VDEV_PARAM_IBSS_PS_1RX_CHAIN_IN_ATIM_WINDOW_ENABLE, 1154 WMI_VDEV_PARAM_RX_LEAK_WINDOW, 1155 WMI_VDEV_PARAM_STATS_AVG_FACTOR, 1156 WMI_VDEV_PARAM_DISCONNECT_TH, 1157 WMI_VDEV_PARAM_RTSCTS_RATE, 1158 WMI_VDEV_PARAM_MCC_RTSCTS_PROTECTION_ENABLE, 1159 WMI_VDEV_PARAM_MCC_BROADCAST_PROBE_ENABLE, 1160 WMI_VDEV_PARAM_TXPOWER_SCALE, 1161 WMI_VDEV_PARAM_TXPOWER_SCALE_DECR_DB, 1162 WMI_VDEV_PARAM_MCAST2UCAST_SET, 1163 WMI_VDEV_PARAM_RC_NUM_RETRIES, 1164 WMI_VDEV_PARAM_CABQ_MAXDUR, 1165 WMI_VDEV_PARAM_MFPTEST_SET, 1166 WMI_VDEV_PARAM_RTS_FIXED_RATE, 1167 WMI_VDEV_PARAM_VHT_SGIMASK, 1168 WMI_VDEV_PARAM_VHT80_RATEMASK, 1169 WMI_VDEV_PARAM_PROXY_STA, 1170 WMI_VDEV_PARAM_VIRTUAL_CELL_MODE, 1171 WMI_VDEV_PARAM_RX_DECAP_TYPE, 1172 WMI_VDEV_PARAM_BW_NSS_RATEMASK, 1173 WMI_VDEV_PARAM_SENSOR_AP, 1174 WMI_VDEV_PARAM_BEACON_RATE, 1175 WMI_VDEV_PARAM_DTIM_ENABLE_CTS, 1176 WMI_VDEV_PARAM_STA_KICKOUT, 1177 WMI_VDEV_PARAM_CAPABILITIES, 1178 WMI_VDEV_PARAM_TSF_INCREMENT, 1179 WMI_VDEV_PARAM_AMPDU_PER_AC, 1180 WMI_VDEV_PARAM_RX_FILTER, 1181 WMI_VDEV_PARAM_MGMT_TX_POWER, 1182 WMI_VDEV_PARAM_NON_AGG_SW_RETRY_TH, 1183 WMI_VDEV_PARAM_AGG_SW_RETRY_TH, 1184 WMI_VDEV_PARAM_DISABLE_DYN_BW_RTS, 1185 WMI_VDEV_PARAM_ATF_SSID_SCHED_POLICY, 1186 WMI_VDEV_PARAM_HE_DCM, 1187 WMI_VDEV_PARAM_HE_RANGE_EXT, 1188 WMI_VDEV_PARAM_ENABLE_BCAST_PROBE_RESPONSE, 1189 WMI_VDEV_PARAM_FILS_MAX_CHANNEL_GUARD_TIME, 1190 WMI_VDEV_PARAM_HE_LTF = 0x74, 1191 WMI_VDEV_PARAM_BA_MODE = 0x7e, 1192 WMI_VDEV_PARAM_AUTORATE_MISC_CFG = 0x80, 1193 WMI_VDEV_PARAM_SET_HE_SOUNDING_MODE = 0x87, 1194 WMI_VDEV_PARAM_6GHZ_PARAMS = 0x99, 1195 WMI_VDEV_PARAM_PROTOTYPE = 0x8000, 1196 WMI_VDEV_PARAM_BSS_COLOR, 1197 WMI_VDEV_PARAM_SET_HEMU_MODE, 1198 WMI_VDEV_PARAM_HEOPS_0_31 = 0x8003, 1199 WMI_VDEV_PARAM_SET_EHT_MU_MODE = 0x8005, 1200 }; 1201 1202 enum wmi_tlv_peer_flags { 1203 WMI_PEER_AUTH = 0x00000001, 1204 WMI_PEER_QOS = 0x00000002, 1205 WMI_PEER_NEED_PTK_4_WAY = 0x00000004, 1206 WMI_PEER_NEED_GTK_2_WAY = 0x00000010, 1207 WMI_PEER_HE = 0x00000400, 1208 WMI_PEER_APSD = 0x00000800, 1209 WMI_PEER_HT = 0x00001000, 1210 WMI_PEER_40MHZ = 0x00002000, 1211 WMI_PEER_STBC = 0x00008000, 1212 WMI_PEER_LDPC = 0x00010000, 1213 WMI_PEER_DYN_MIMOPS = 0x00020000, 1214 WMI_PEER_STATIC_MIMOPS = 0x00040000, 1215 WMI_PEER_SPATIAL_MUX = 0x00200000, 1216 WMI_PEER_TWT_REQ = 0x00400000, 1217 WMI_PEER_TWT_RESP = 0x00800000, 1218 WMI_PEER_VHT = 0x02000000, 1219 WMI_PEER_80MHZ = 0x04000000, 1220 WMI_PEER_PMF = 0x08000000, 1221 WMI_PEER_IS_P2P_CAPABLE = 0x20000000, 1222 WMI_PEER_160MHZ = 0x40000000, 1223 WMI_PEER_SAFEMODE_EN = 0x80000000, 1224 }; 1225 1226 enum wmi_tlv_peer_flags_ext { 1227 WMI_PEER_EXT_EHT = BIT(0), 1228 WMI_PEER_EXT_320MHZ = BIT(1), 1229 }; 1230 1231 /** Enum list of TLV Tags for each parameter structure type. */ 1232 enum wmi_tlv_tag { 1233 WMI_TAG_LAST_RESERVED = 15, 1234 WMI_TAG_FIRST_ARRAY_ENUM, 1235 WMI_TAG_ARRAY_UINT32 = WMI_TAG_FIRST_ARRAY_ENUM, 1236 WMI_TAG_ARRAY_BYTE, 1237 WMI_TAG_ARRAY_STRUCT, 1238 WMI_TAG_ARRAY_FIXED_STRUCT, 1239 WMI_TAG_ARRAY_INT16, 1240 WMI_TAG_LAST_ARRAY_ENUM = 31, 1241 WMI_TAG_SERVICE_READY_EVENT, 1242 WMI_TAG_HAL_REG_CAPABILITIES, 1243 WMI_TAG_WLAN_HOST_MEM_REQ, 1244 WMI_TAG_READY_EVENT, 1245 WMI_TAG_SCAN_EVENT, 1246 WMI_TAG_PDEV_TPC_CONFIG_EVENT, 1247 WMI_TAG_CHAN_INFO_EVENT, 1248 WMI_TAG_COMB_PHYERR_RX_HDR, 1249 WMI_TAG_VDEV_START_RESPONSE_EVENT, 1250 WMI_TAG_VDEV_STOPPED_EVENT, 1251 WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT, 1252 WMI_TAG_PEER_STA_KICKOUT_EVENT, 1253 WMI_TAG_MGMT_RX_HDR, 1254 WMI_TAG_TBTT_OFFSET_EVENT, 1255 WMI_TAG_TX_DELBA_COMPLETE_EVENT, 1256 WMI_TAG_TX_ADDBA_COMPLETE_EVENT, 1257 WMI_TAG_ROAM_EVENT, 1258 WMI_TAG_WOW_EVENT_INFO, 1259 WMI_TAG_WOW_EVENT_INFO_SECTION_BITMAP, 1260 WMI_TAG_RTT_EVENT_HEADER, 1261 WMI_TAG_RTT_ERROR_REPORT_EVENT, 1262 WMI_TAG_RTT_MEAS_EVENT, 1263 WMI_TAG_ECHO_EVENT, 1264 WMI_TAG_FTM_INTG_EVENT, 1265 WMI_TAG_VDEV_GET_KEEPALIVE_EVENT, 1266 WMI_TAG_GPIO_INPUT_EVENT, 1267 WMI_TAG_CSA_EVENT, 1268 WMI_TAG_GTK_OFFLOAD_STATUS_EVENT, 1269 WMI_TAG_IGTK_INFO, 1270 WMI_TAG_DCS_INTERFERENCE_EVENT, 1271 WMI_TAG_ATH_DCS_CW_INT, 1272 WMI_TAG_WLAN_DCS_CW_INT = /* ALIAS */ 1273 WMI_TAG_ATH_DCS_CW_INT, 1274 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1275 WMI_TAG_WLAN_DCS_IM_TGT_STATS_T = /* ALIAS */ 1276 WMI_TAG_ATH_DCS_WLAN_INT_STAT, 1277 WMI_TAG_WLAN_PROFILE_CTX_T, 1278 WMI_TAG_WLAN_PROFILE_T, 1279 WMI_TAG_PDEV_QVIT_EVENT, 1280 WMI_TAG_HOST_SWBA_EVENT, 1281 WMI_TAG_TIM_INFO, 1282 WMI_TAG_P2P_NOA_INFO, 1283 WMI_TAG_STATS_EVENT, 1284 WMI_TAG_AVOID_FREQ_RANGES_EVENT, 1285 WMI_TAG_AVOID_FREQ_RANGE_DESC, 1286 WMI_TAG_GTK_REKEY_FAIL_EVENT, 1287 WMI_TAG_INIT_CMD, 1288 WMI_TAG_RESOURCE_CONFIG, 1289 WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 1290 WMI_TAG_START_SCAN_CMD, 1291 WMI_TAG_STOP_SCAN_CMD, 1292 WMI_TAG_SCAN_CHAN_LIST_CMD, 1293 WMI_TAG_CHANNEL, 1294 WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1295 WMI_TAG_PDEV_SET_PARAM_CMD, 1296 WMI_TAG_PDEV_SET_WMM_PARAMS_CMD, 1297 WMI_TAG_WMM_PARAMS, 1298 WMI_TAG_PDEV_SET_QUIET_CMD, 1299 WMI_TAG_VDEV_CREATE_CMD, 1300 WMI_TAG_VDEV_DELETE_CMD, 1301 WMI_TAG_VDEV_START_REQUEST_CMD, 1302 WMI_TAG_P2P_NOA_DESCRIPTOR, 1303 WMI_TAG_P2P_GO_SET_BEACON_IE, 1304 WMI_TAG_GTK_OFFLOAD_CMD, 1305 WMI_TAG_VDEV_UP_CMD, 1306 WMI_TAG_VDEV_STOP_CMD, 1307 WMI_TAG_VDEV_DOWN_CMD, 1308 WMI_TAG_VDEV_SET_PARAM_CMD, 1309 WMI_TAG_VDEV_INSTALL_KEY_CMD, 1310 WMI_TAG_PEER_CREATE_CMD, 1311 WMI_TAG_PEER_DELETE_CMD, 1312 WMI_TAG_PEER_FLUSH_TIDS_CMD, 1313 WMI_TAG_PEER_SET_PARAM_CMD, 1314 WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 1315 WMI_TAG_VHT_RATE_SET, 1316 WMI_TAG_BCN_TMPL_CMD, 1317 WMI_TAG_PRB_TMPL_CMD, 1318 WMI_TAG_BCN_PRB_INFO, 1319 WMI_TAG_PEER_TID_ADDBA_CMD, 1320 WMI_TAG_PEER_TID_DELBA_CMD, 1321 WMI_TAG_STA_POWERSAVE_MODE_CMD, 1322 WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1323 WMI_TAG_STA_DTIM_PS_METHOD_CMD, 1324 WMI_TAG_ROAM_SCAN_MODE, 1325 WMI_TAG_ROAM_SCAN_RSSI_THRESHOLD, 1326 WMI_TAG_ROAM_SCAN_PERIOD, 1327 WMI_TAG_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 1328 WMI_TAG_PDEV_SUSPEND_CMD, 1329 WMI_TAG_PDEV_RESUME_CMD, 1330 WMI_TAG_ADD_BCN_FILTER_CMD, 1331 WMI_TAG_RMV_BCN_FILTER_CMD, 1332 WMI_TAG_WOW_ENABLE_CMD, 1333 WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 1334 WMI_TAG_STA_UAPSD_AUTO_TRIG_CMD, 1335 WMI_TAG_STA_UAPSD_AUTO_TRIG_PARAM, 1336 WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 1337 WMI_TAG_ARP_OFFLOAD_TUPLE, 1338 WMI_TAG_NS_OFFLOAD_TUPLE, 1339 WMI_TAG_FTM_INTG_CMD, 1340 WMI_TAG_STA_KEEPALIVE_CMD, 1341 WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 1342 WMI_TAG_P2P_SET_VENDOR_IE_DATA_CMD, 1343 WMI_TAG_AP_PS_PEER_CMD, 1344 WMI_TAG_PEER_RATE_RETRY_SCHED_CMD, 1345 WMI_TAG_WLAN_PROFILE_TRIGGER_CMD, 1346 WMI_TAG_WLAN_PROFILE_SET_HIST_INTVL_CMD, 1347 WMI_TAG_WLAN_PROFILE_GET_PROF_DATA_CMD, 1348 WMI_TAG_WLAN_PROFILE_ENABLE_PROFILE_ID_CMD, 1349 WMI_TAG_WOW_DEL_PATTERN_CMD, 1350 WMI_TAG_WOW_ADD_DEL_EVT_CMD, 1351 WMI_TAG_RTT_MEASREQ_HEAD, 1352 WMI_TAG_RTT_MEASREQ_BODY, 1353 WMI_TAG_RTT_TSF_CMD, 1354 WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 1355 WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 1356 WMI_TAG_REQUEST_STATS_CMD, 1357 WMI_TAG_NLO_CONFIG_CMD, 1358 WMI_TAG_NLO_CONFIGURED_PARAMETERS, 1359 WMI_TAG_CSA_OFFLOAD_ENABLE_CMD, 1360 WMI_TAG_CSA_OFFLOAD_CHANSWITCH_CMD, 1361 WMI_TAG_CHATTER_SET_MODE_CMD, 1362 WMI_TAG_ECHO_CMD, 1363 WMI_TAG_VDEV_SET_KEEPALIVE_CMD, 1364 WMI_TAG_VDEV_GET_KEEPALIVE_CMD, 1365 WMI_TAG_FORCE_FW_HANG_CMD, 1366 WMI_TAG_GPIO_CONFIG_CMD, 1367 WMI_TAG_GPIO_OUTPUT_CMD, 1368 WMI_TAG_PEER_ADD_WDS_ENTRY_CMD, 1369 WMI_TAG_PEER_REMOVE_WDS_ENTRY_CMD, 1370 WMI_TAG_BCN_TX_HDR, 1371 WMI_TAG_BCN_SEND_FROM_HOST_CMD, 1372 WMI_TAG_MGMT_TX_HDR, 1373 WMI_TAG_ADDBA_CLEAR_RESP_CMD, 1374 WMI_TAG_ADDBA_SEND_CMD, 1375 WMI_TAG_DELBA_SEND_CMD, 1376 WMI_TAG_ADDBA_SETRESPONSE_CMD, 1377 WMI_TAG_SEND_SINGLEAMSDU_CMD, 1378 WMI_TAG_PDEV_PKTLOG_ENABLE_CMD, 1379 WMI_TAG_PDEV_PKTLOG_DISABLE_CMD, 1380 WMI_TAG_PDEV_SET_HT_IE_CMD, 1381 WMI_TAG_PDEV_SET_VHT_IE_CMD, 1382 WMI_TAG_PDEV_SET_DSCP_TID_MAP_CMD, 1383 WMI_TAG_PDEV_GREEN_AP_PS_ENABLE_CMD, 1384 WMI_TAG_PDEV_GET_TPC_CONFIG_CMD, 1385 WMI_TAG_PDEV_SET_BASE_MACADDR_CMD, 1386 WMI_TAG_PEER_MCAST_GROUP_CMD, 1387 WMI_TAG_ROAM_AP_PROFILE, 1388 WMI_TAG_AP_PROFILE, 1389 WMI_TAG_SCAN_SCH_PRIORITY_TABLE_CMD, 1390 WMI_TAG_PDEV_DFS_ENABLE_CMD, 1391 WMI_TAG_PDEV_DFS_DISABLE_CMD, 1392 WMI_TAG_WOW_ADD_PATTERN_CMD, 1393 WMI_TAG_WOW_BITMAP_PATTERN_T, 1394 WMI_TAG_WOW_IPV4_SYNC_PATTERN_T, 1395 WMI_TAG_WOW_IPV6_SYNC_PATTERN_T, 1396 WMI_TAG_WOW_MAGIC_PATTERN_CMD, 1397 WMI_TAG_SCAN_UPDATE_REQUEST_CMD, 1398 WMI_TAG_CHATTER_PKT_COALESCING_FILTER, 1399 WMI_TAG_CHATTER_COALESCING_ADD_FILTER_CMD, 1400 WMI_TAG_CHATTER_COALESCING_DELETE_FILTER_CMD, 1401 WMI_TAG_CHATTER_COALESCING_QUERY_CMD, 1402 WMI_TAG_TXBF_CMD, 1403 WMI_TAG_DEBUG_LOG_CONFIG_CMD, 1404 WMI_TAG_NLO_EVENT, 1405 WMI_TAG_CHATTER_QUERY_REPLY_EVENT, 1406 WMI_TAG_UPLOAD_H_HDR, 1407 WMI_TAG_CAPTURE_H_EVENT_HDR, 1408 WMI_TAG_VDEV_WNM_SLEEPMODE_CMD, 1409 WMI_TAG_VDEV_IPSEC_NATKEEPALIVE_FILTER_CMD, 1410 WMI_TAG_VDEV_WMM_ADDTS_CMD, 1411 WMI_TAG_VDEV_WMM_DELTS_CMD, 1412 WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 1413 WMI_TAG_TDLS_SET_STATE_CMD, 1414 WMI_TAG_TDLS_PEER_UPDATE_CMD, 1415 WMI_TAG_TDLS_PEER_EVENT, 1416 WMI_TAG_TDLS_PEER_CAPABILITIES, 1417 WMI_TAG_VDEV_MCC_SET_TBTT_MODE_CMD, 1418 WMI_TAG_ROAM_CHAN_LIST, 1419 WMI_TAG_VDEV_MCC_BCN_INTVL_CHANGE_EVENT, 1420 WMI_TAG_RESMGR_ADAPTIVE_OCS_ENABLE_DISABLE_CMD, 1421 WMI_TAG_RESMGR_SET_CHAN_TIME_QUOTA_CMD, 1422 WMI_TAG_RESMGR_SET_CHAN_LATENCY_CMD, 1423 WMI_TAG_BA_REQ_SSN_CMD, 1424 WMI_TAG_BA_RSP_SSN_EVENT, 1425 WMI_TAG_STA_SMPS_FORCE_MODE_CMD, 1426 WMI_TAG_SET_MCASTBCAST_FILTER_CMD, 1427 WMI_TAG_P2P_SET_OPPPS_CMD, 1428 WMI_TAG_P2P_SET_NOA_CMD, 1429 WMI_TAG_BA_REQ_SSN_CMD_SUB_STRUCT_PARAM, 1430 WMI_TAG_BA_REQ_SSN_EVENT_SUB_STRUCT_PARAM, 1431 WMI_TAG_STA_SMPS_PARAM_CMD, 1432 WMI_TAG_VDEV_SET_GTX_PARAMS_CMD, 1433 WMI_TAG_MCC_SCHED_TRAFFIC_STATS_CMD, 1434 WMI_TAG_MCC_SCHED_STA_TRAFFIC_STATS, 1435 WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT, 1436 WMI_TAG_P2P_NOA_EVENT, 1437 WMI_TAG_HB_SET_ENABLE_CMD, 1438 WMI_TAG_HB_SET_TCP_PARAMS_CMD, 1439 WMI_TAG_HB_SET_TCP_PKT_FILTER_CMD, 1440 WMI_TAG_HB_SET_UDP_PARAMS_CMD, 1441 WMI_TAG_HB_SET_UDP_PKT_FILTER_CMD, 1442 WMI_TAG_HB_IND_EVENT, 1443 WMI_TAG_TX_PAUSE_EVENT, 1444 WMI_TAG_RFKILL_EVENT, 1445 WMI_TAG_DFS_RADAR_EVENT, 1446 WMI_TAG_DFS_PHYERR_FILTER_ENA_CMD, 1447 WMI_TAG_DFS_PHYERR_FILTER_DIS_CMD, 1448 WMI_TAG_BATCH_SCAN_RESULT_SCAN_LIST, 1449 WMI_TAG_BATCH_SCAN_RESULT_NETWORK_INFO, 1450 WMI_TAG_BATCH_SCAN_ENABLE_CMD, 1451 WMI_TAG_BATCH_SCAN_DISABLE_CMD, 1452 WMI_TAG_BATCH_SCAN_TRIGGER_RESULT_CMD, 1453 WMI_TAG_BATCH_SCAN_ENABLED_EVENT, 1454 WMI_TAG_BATCH_SCAN_RESULT_EVENT, 1455 WMI_TAG_VDEV_PLMREQ_START_CMD, 1456 WMI_TAG_VDEV_PLMREQ_STOP_CMD, 1457 WMI_TAG_THERMAL_MGMT_CMD, 1458 WMI_TAG_THERMAL_MGMT_EVENT, 1459 WMI_TAG_PEER_INFO_REQ_CMD, 1460 WMI_TAG_PEER_INFO_EVENT, 1461 WMI_TAG_PEER_INFO, 1462 WMI_TAG_PEER_TX_FAIL_CNT_THR_EVENT, 1463 WMI_TAG_RMC_SET_MODE_CMD, 1464 WMI_TAG_RMC_SET_ACTION_PERIOD_CMD, 1465 WMI_TAG_RMC_CONFIG_CMD, 1466 WMI_TAG_MHF_OFFLOAD_SET_MODE_CMD, 1467 WMI_TAG_MHF_OFFLOAD_PLUMB_ROUTING_TABLE_CMD, 1468 WMI_TAG_ADD_PROACTIVE_ARP_RSP_PATTERN_CMD, 1469 WMI_TAG_DEL_PROACTIVE_ARP_RSP_PATTERN_CMD, 1470 WMI_TAG_NAN_CMD_PARAM, 1471 WMI_TAG_NAN_EVENT_HDR, 1472 WMI_TAG_PDEV_L1SS_TRACK_EVENT, 1473 WMI_TAG_DIAG_DATA_CONTAINER_EVENT, 1474 WMI_TAG_MODEM_POWER_STATE_CMD_PARAM, 1475 WMI_TAG_PEER_GET_ESTIMATED_LINKSPEED_CMD, 1476 WMI_TAG_PEER_ESTIMATED_LINKSPEED_EVENT, 1477 WMI_TAG_AGGR_STATE_TRIG_EVENT, 1478 WMI_TAG_MHF_OFFLOAD_ROUTING_TABLE_ENTRY, 1479 WMI_TAG_ROAM_SCAN_CMD, 1480 WMI_TAG_REQ_STATS_EXT_CMD, 1481 WMI_TAG_STATS_EXT_EVENT, 1482 WMI_TAG_OBSS_SCAN_ENABLE_CMD, 1483 WMI_TAG_OBSS_SCAN_DISABLE_CMD, 1484 WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT, 1485 WMI_TAG_PDEV_SET_LED_CONFIG_CMD, 1486 WMI_TAG_HOST_AUTO_SHUTDOWN_CFG_CMD, 1487 WMI_TAG_HOST_AUTO_SHUTDOWN_EVENT, 1488 WMI_TAG_UPDATE_WHAL_MIB_STATS_EVENT, 1489 WMI_TAG_CHAN_AVOID_UPDATE_CMD_PARAM, 1490 WMI_TAG_WOW_IOAC_PKT_PATTERN_T, 1491 WMI_TAG_WOW_IOAC_TMR_PATTERN_T, 1492 WMI_TAG_WOW_IOAC_ADD_KEEPALIVE_CMD, 1493 WMI_TAG_WOW_IOAC_DEL_KEEPALIVE_CMD, 1494 WMI_TAG_WOW_IOAC_KEEPALIVE_T, 1495 WMI_TAG_WOW_IOAC_ADD_PATTERN_CMD, 1496 WMI_TAG_WOW_IOAC_DEL_PATTERN_CMD, 1497 WMI_TAG_START_LINK_STATS_CMD, 1498 WMI_TAG_CLEAR_LINK_STATS_CMD, 1499 WMI_TAG_REQUEST_LINK_STATS_CMD, 1500 WMI_TAG_IFACE_LINK_STATS_EVENT, 1501 WMI_TAG_RADIO_LINK_STATS_EVENT, 1502 WMI_TAG_PEER_STATS_EVENT, 1503 WMI_TAG_CHANNEL_STATS, 1504 WMI_TAG_RADIO_LINK_STATS, 1505 WMI_TAG_RATE_STATS, 1506 WMI_TAG_PEER_LINK_STATS, 1507 WMI_TAG_WMM_AC_STATS, 1508 WMI_TAG_IFACE_LINK_STATS, 1509 WMI_TAG_LPI_MGMT_SNOOPING_CONFIG_CMD, 1510 WMI_TAG_LPI_START_SCAN_CMD, 1511 WMI_TAG_LPI_STOP_SCAN_CMD, 1512 WMI_TAG_LPI_RESULT_EVENT, 1513 WMI_TAG_PEER_STATE_EVENT, 1514 WMI_TAG_EXTSCAN_BUCKET_CMD, 1515 WMI_TAG_EXTSCAN_BUCKET_CHANNEL_EVENT, 1516 WMI_TAG_EXTSCAN_START_CMD, 1517 WMI_TAG_EXTSCAN_STOP_CMD, 1518 WMI_TAG_EXTSCAN_CONFIGURE_WLAN_CHANGE_MONITOR_CMD, 1519 WMI_TAG_EXTSCAN_WLAN_CHANGE_BSSID_PARAM_CMD, 1520 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_MONITOR_CMD, 1521 WMI_TAG_EXTSCAN_GET_CACHED_RESULTS_CMD, 1522 WMI_TAG_EXTSCAN_GET_WLAN_CHANGE_RESULTS_CMD, 1523 WMI_TAG_EXTSCAN_SET_CAPABILITIES_CMD, 1524 WMI_TAG_EXTSCAN_GET_CAPABILITIES_CMD, 1525 WMI_TAG_EXTSCAN_OPERATION_EVENT, 1526 WMI_TAG_EXTSCAN_START_STOP_EVENT, 1527 WMI_TAG_EXTSCAN_TABLE_USAGE_EVENT, 1528 WMI_TAG_EXTSCAN_WLAN_DESCRIPTOR_EVENT, 1529 WMI_TAG_EXTSCAN_RSSI_INFO_EVENT, 1530 WMI_TAG_EXTSCAN_CACHED_RESULTS_EVENT, 1531 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULTS_EVENT, 1532 WMI_TAG_EXTSCAN_WLAN_CHANGE_RESULT_BSSID_EVENT, 1533 WMI_TAG_EXTSCAN_HOTLIST_MATCH_EVENT, 1534 WMI_TAG_EXTSCAN_CAPABILITIES_EVENT, 1535 WMI_TAG_EXTSCAN_CACHE_CAPABILITIES_EVENT, 1536 WMI_TAG_EXTSCAN_WLAN_CHANGE_MONITOR_CAPABILITIES_EVENT, 1537 WMI_TAG_EXTSCAN_HOTLIST_MONITOR_CAPABILITIES_EVENT, 1538 WMI_TAG_D0_WOW_ENABLE_DISABLE_CMD, 1539 WMI_TAG_D0_WOW_DISABLE_ACK_EVENT, 1540 WMI_TAG_UNIT_TEST_CMD, 1541 WMI_TAG_ROAM_OFFLOAD_TLV_PARAM, 1542 WMI_TAG_ROAM_11I_OFFLOAD_TLV_PARAM, 1543 WMI_TAG_ROAM_11R_OFFLOAD_TLV_PARAM, 1544 WMI_TAG_ROAM_ESE_OFFLOAD_TLV_PARAM, 1545 WMI_TAG_ROAM_SYNCH_EVENT, 1546 WMI_TAG_ROAM_SYNCH_COMPLETE, 1547 WMI_TAG_EXTWOW_ENABLE_CMD, 1548 WMI_TAG_EXTWOW_SET_APP_TYPE1_PARAMS_CMD, 1549 WMI_TAG_EXTWOW_SET_APP_TYPE2_PARAMS_CMD, 1550 WMI_TAG_LPI_STATUS_EVENT, 1551 WMI_TAG_LPI_HANDOFF_EVENT, 1552 WMI_TAG_VDEV_RATE_STATS_EVENT, 1553 WMI_TAG_VDEV_RATE_HT_INFO, 1554 WMI_TAG_RIC_REQUEST, 1555 WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1556 WMI_TAG_PDEV_TEMPERATURE_EVENT, 1557 WMI_TAG_SET_DHCP_SERVER_OFFLOAD_CMD, 1558 WMI_TAG_TPC_CHAINMASK_CONFIG_CMD, 1559 WMI_TAG_RIC_TSPEC, 1560 WMI_TAG_TPC_CHAINMASK_CONFIG, 1561 WMI_TAG_IPA_OFFLOAD_ENABLE_DISABLE_CMD, 1562 WMI_TAG_SCAN_PROB_REQ_OUI_CMD, 1563 WMI_TAG_KEY_MATERIAL, 1564 WMI_TAG_TDLS_SET_OFFCHAN_MODE_CMD, 1565 WMI_TAG_SET_LED_FLASHING_CMD, 1566 WMI_TAG_MDNS_OFFLOAD_CMD, 1567 WMI_TAG_MDNS_SET_FQDN_CMD, 1568 WMI_TAG_MDNS_SET_RESP_CMD, 1569 WMI_TAG_MDNS_GET_STATS_CMD, 1570 WMI_TAG_MDNS_STATS_EVENT, 1571 WMI_TAG_ROAM_INVOKE_CMD, 1572 WMI_TAG_PDEV_RESUME_EVENT, 1573 WMI_TAG_PDEV_SET_ANTENNA_DIVERSITY_CMD, 1574 WMI_TAG_SAP_OFL_ENABLE_CMD, 1575 WMI_TAG_SAP_OFL_ADD_STA_EVENT, 1576 WMI_TAG_SAP_OFL_DEL_STA_EVENT, 1577 WMI_TAG_APFIND_CMD_PARAM, 1578 WMI_TAG_APFIND_EVENT_HDR, 1579 WMI_TAG_OCB_SET_SCHED_CMD, 1580 WMI_TAG_OCB_SET_SCHED_EVENT, 1581 WMI_TAG_OCB_SET_CONFIG_CMD, 1582 WMI_TAG_OCB_SET_CONFIG_RESP_EVENT, 1583 WMI_TAG_OCB_SET_UTC_TIME_CMD, 1584 WMI_TAG_OCB_START_TIMING_ADVERT_CMD, 1585 WMI_TAG_OCB_STOP_TIMING_ADVERT_CMD, 1586 WMI_TAG_OCB_GET_TSF_TIMER_CMD, 1587 WMI_TAG_OCB_GET_TSF_TIMER_RESP_EVENT, 1588 WMI_TAG_DCC_GET_STATS_CMD, 1589 WMI_TAG_DCC_CHANNEL_STATS_REQUEST, 1590 WMI_TAG_DCC_GET_STATS_RESP_EVENT, 1591 WMI_TAG_DCC_CLEAR_STATS_CMD, 1592 WMI_TAG_DCC_UPDATE_NDL_CMD, 1593 WMI_TAG_DCC_UPDATE_NDL_RESP_EVENT, 1594 WMI_TAG_DCC_STATS_EVENT, 1595 WMI_TAG_OCB_CHANNEL, 1596 WMI_TAG_OCB_SCHEDULE_ELEMENT, 1597 WMI_TAG_DCC_NDL_STATS_PER_CHANNEL, 1598 WMI_TAG_DCC_NDL_CHAN, 1599 WMI_TAG_QOS_PARAMETER, 1600 WMI_TAG_DCC_NDL_ACTIVE_STATE_CONFIG, 1601 WMI_TAG_ROAM_SCAN_EXTENDED_THRESHOLD_PARAM, 1602 WMI_TAG_ROAM_FILTER, 1603 WMI_TAG_PASSPOINT_CONFIG_CMD, 1604 WMI_TAG_PASSPOINT_EVENT_HDR, 1605 WMI_TAG_EXTSCAN_CONFIGURE_HOTLIST_SSID_MONITOR_CMD, 1606 WMI_TAG_EXTSCAN_HOTLIST_SSID_MATCH_EVENT, 1607 WMI_TAG_VDEV_TSF_TSTAMP_ACTION_CMD, 1608 WMI_TAG_VDEV_TSF_REPORT_EVENT, 1609 WMI_TAG_GET_FW_MEM_DUMP, 1610 WMI_TAG_UPDATE_FW_MEM_DUMP, 1611 WMI_TAG_FW_MEM_DUMP_PARAMS, 1612 WMI_TAG_DEBUG_MESG_FLUSH, 1613 WMI_TAG_DEBUG_MESG_FLUSH_COMPLETE, 1614 WMI_TAG_PEER_SET_RATE_REPORT_CONDITION, 1615 WMI_TAG_ROAM_SUBNET_CHANGE_CONFIG, 1616 WMI_TAG_VDEV_SET_IE_CMD, 1617 WMI_TAG_RSSI_BREACH_MONITOR_CONFIG, 1618 WMI_TAG_RSSI_BREACH_EVENT, 1619 WMI_TAG_WOW_EVENT_INITIAL_WAKEUP, 1620 WMI_TAG_SOC_SET_PCL_CMD, 1621 WMI_TAG_SOC_SET_HW_MODE_CMD, 1622 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_EVENT, 1623 WMI_TAG_SOC_HW_MODE_TRANSITION_EVENT, 1624 WMI_TAG_VDEV_TXRX_STREAMS, 1625 WMI_TAG_SOC_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1626 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_CMD, 1627 WMI_TAG_SOC_SET_DUAL_MAC_CONFIG_RESPONSE_EVENT, 1628 WMI_TAG_WOW_IOAC_SOCK_PATTERN_T, 1629 WMI_TAG_WOW_ENABLE_ICMPV6_NA_FLT_CMD, 1630 WMI_TAG_DIAG_EVENT_LOG_CONFIG, 1631 WMI_TAG_DIAG_EVENT_LOG_SUPPORTED_EVENT_FIXED_PARAMS, 1632 WMI_TAG_PACKET_FILTER_CONFIG, 1633 WMI_TAG_PACKET_FILTER_ENABLE, 1634 WMI_TAG_SAP_SET_BLACKLIST_PARAM_CMD, 1635 WMI_TAG_MGMT_TX_SEND_CMD, 1636 WMI_TAG_MGMT_TX_COMPL_EVENT, 1637 WMI_TAG_SOC_SET_ANTENNA_MODE_CMD, 1638 WMI_TAG_WOW_UDP_SVC_OFLD_CMD, 1639 WMI_TAG_LRO_INFO_CMD, 1640 WMI_TAG_ROAM_EARLYSTOP_RSSI_THRES_PARAM, 1641 WMI_TAG_SERVICE_READY_EXT_EVENT, 1642 WMI_TAG_MAWC_SENSOR_REPORT_IND_CMD, 1643 WMI_TAG_MAWC_ENABLE_SENSOR_EVENT, 1644 WMI_TAG_ROAM_CONFIGURE_MAWC_CMD, 1645 WMI_TAG_NLO_CONFIGURE_MAWC_CMD, 1646 WMI_TAG_EXTSCAN_CONFIGURE_MAWC_CMD, 1647 WMI_TAG_PEER_ASSOC_CONF_EVENT, 1648 WMI_TAG_WOW_HOSTWAKEUP_GPIO_PIN_PATTERN_CONFIG_CMD, 1649 WMI_TAG_AP_PS_EGAP_PARAM_CMD, 1650 WMI_TAG_AP_PS_EGAP_INFO_EVENT, 1651 WMI_TAG_PMF_OFFLOAD_SET_SA_QUERY_CMD, 1652 WMI_TAG_TRANSFER_DATA_TO_FLASH_CMD, 1653 WMI_TAG_TRANSFER_DATA_TO_FLASH_COMPLETE_EVENT, 1654 WMI_TAG_SCPC_EVENT, 1655 WMI_TAG_AP_PS_EGAP_INFO_CHAINMASK_LIST, 1656 WMI_TAG_STA_SMPS_FORCE_MODE_COMPLETE_EVENT, 1657 WMI_TAG_BPF_GET_CAPABILITY_CMD, 1658 WMI_TAG_BPF_CAPABILITY_INFO_EVT, 1659 WMI_TAG_BPF_GET_VDEV_STATS_CMD, 1660 WMI_TAG_BPF_VDEV_STATS_INFO_EVT, 1661 WMI_TAG_BPF_SET_VDEV_INSTRUCTIONS_CMD, 1662 WMI_TAG_BPF_DEL_VDEV_INSTRUCTIONS_CMD, 1663 WMI_TAG_VDEV_DELETE_RESP_EVENT, 1664 WMI_TAG_PEER_DELETE_RESP_EVENT, 1665 WMI_TAG_ROAM_DENSE_THRES_PARAM, 1666 WMI_TAG_ENLO_CANDIDATE_SCORE_PARAM, 1667 WMI_TAG_PEER_UPDATE_WDS_ENTRY_CMD, 1668 WMI_TAG_VDEV_CONFIG_RATEMASK, 1669 WMI_TAG_PDEV_FIPS_CMD, 1670 WMI_TAG_PDEV_SMART_ANT_ENABLE_CMD, 1671 WMI_TAG_PDEV_SMART_ANT_SET_RX_ANTENNA_CMD, 1672 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_CMD, 1673 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_CMD, 1674 WMI_TAG_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMD, 1675 WMI_TAG_PDEV_SET_ANT_SWITCH_TBL_CMD, 1676 WMI_TAG_PDEV_SET_CTL_TABLE_CMD, 1677 WMI_TAG_PDEV_SET_MIMOGAIN_TABLE_CMD, 1678 WMI_TAG_FWTEST_SET_PARAM_CMD, 1679 WMI_TAG_PEER_ATF_REQUEST, 1680 WMI_TAG_VDEV_ATF_REQUEST, 1681 WMI_TAG_PDEV_GET_ANI_CCK_CONFIG_CMD, 1682 WMI_TAG_PDEV_GET_ANI_OFDM_CONFIG_CMD, 1683 WMI_TAG_INST_RSSI_STATS_RESP, 1684 WMI_TAG_MED_UTIL_REPORT_EVENT, 1685 WMI_TAG_PEER_STA_PS_STATECHANGE_EVENT, 1686 WMI_TAG_WDS_ADDR_EVENT, 1687 WMI_TAG_PEER_RATECODE_LIST_EVENT, 1688 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_EVENT, 1689 WMI_TAG_PDEV_TPC_EVENT, 1690 WMI_TAG_ANI_OFDM_EVENT, 1691 WMI_TAG_ANI_CCK_EVENT, 1692 WMI_TAG_PDEV_CHANNEL_HOPPING_EVENT, 1693 WMI_TAG_PDEV_FIPS_EVENT, 1694 WMI_TAG_ATF_PEER_INFO, 1695 WMI_TAG_PDEV_GET_TPC_CMD, 1696 WMI_TAG_VDEV_FILTER_NRP_CONFIG_CMD, 1697 WMI_TAG_QBOOST_CFG_CMD, 1698 WMI_TAG_PDEV_SMART_ANT_GPIO_HANDLE, 1699 WMI_TAG_PEER_SMART_ANT_SET_TX_ANTENNA_SERIES, 1700 WMI_TAG_PEER_SMART_ANT_SET_TRAIN_ANTENNA_PARAM, 1701 WMI_TAG_PDEV_SET_ANT_CTRL_CHAIN, 1702 WMI_TAG_PEER_CCK_OFDM_RATE_INFO, 1703 WMI_TAG_PEER_MCS_RATE_INFO, 1704 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBR, 1705 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_NFDBM, 1706 WMI_TAG_PDEV_NFCAL_POWER_ALL_CHANNELS_FREQNUM, 1707 WMI_TAG_MU_REPORT_TOTAL_MU, 1708 WMI_TAG_VDEV_SET_DSCP_TID_MAP_CMD, 1709 WMI_TAG_ROAM_SET_MBO, 1710 WMI_TAG_MIB_STATS_ENABLE_CMD, 1711 WMI_TAG_NAN_DISC_IFACE_CREATED_EVENT, 1712 WMI_TAG_NAN_DISC_IFACE_DELETED_EVENT, 1713 WMI_TAG_NAN_STARTED_CLUSTER_EVENT, 1714 WMI_TAG_NAN_JOINED_CLUSTER_EVENT, 1715 WMI_TAG_NDI_GET_CAP_REQ, 1716 WMI_TAG_NDP_INITIATOR_REQ, 1717 WMI_TAG_NDP_RESPONDER_REQ, 1718 WMI_TAG_NDP_END_REQ, 1719 WMI_TAG_NDI_CAP_RSP_EVENT, 1720 WMI_TAG_NDP_INITIATOR_RSP_EVENT, 1721 WMI_TAG_NDP_RESPONDER_RSP_EVENT, 1722 WMI_TAG_NDP_END_RSP_EVENT, 1723 WMI_TAG_NDP_INDICATION_EVENT, 1724 WMI_TAG_NDP_CONFIRM_EVENT, 1725 WMI_TAG_NDP_END_INDICATION_EVENT, 1726 WMI_TAG_VDEV_SET_QUIET_CMD, 1727 WMI_TAG_PDEV_SET_PCL_CMD, 1728 WMI_TAG_PDEV_SET_HW_MODE_CMD, 1729 WMI_TAG_PDEV_SET_MAC_CONFIG_CMD, 1730 WMI_TAG_PDEV_SET_ANTENNA_MODE_CMD, 1731 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_EVENT, 1732 WMI_TAG_PDEV_HW_MODE_TRANSITION_EVENT, 1733 WMI_TAG_PDEV_SET_HW_MODE_RESPONSE_VDEV_MAC_ENTRY, 1734 WMI_TAG_PDEV_SET_MAC_CONFIG_RESPONSE_EVENT, 1735 WMI_TAG_COEX_CONFIG_CMD, 1736 WMI_TAG_CONFIG_ENHANCED_MCAST_FILTER, 1737 WMI_TAG_CHAN_AVOID_RPT_ALLOW_CMD, 1738 WMI_TAG_SET_PERIODIC_CHANNEL_STATS_CONFIG, 1739 WMI_TAG_VDEV_SET_CUSTOM_AGGR_SIZE_CMD, 1740 WMI_TAG_PDEV_WAL_POWER_DEBUG_CMD, 1741 WMI_TAG_MAC_PHY_CAPABILITIES, 1742 WMI_TAG_HW_MODE_CAPABILITIES, 1743 WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS, 1744 WMI_TAG_HAL_REG_CAPABILITIES_EXT, 1745 WMI_TAG_SOC_HAL_REG_CAPABILITIES, 1746 WMI_TAG_VDEV_WISA_CMD, 1747 WMI_TAG_TX_POWER_LEVEL_STATS_EVT, 1748 WMI_TAG_SCAN_ADAPTIVE_DWELL_PARAMETERS_TLV, 1749 WMI_TAG_SCAN_ADAPTIVE_DWELL_CONFIG, 1750 WMI_TAG_WOW_SET_ACTION_WAKE_UP_CMD, 1751 WMI_TAG_NDP_END_RSP_PER_NDI, 1752 WMI_TAG_PEER_BWF_REQUEST, 1753 WMI_TAG_BWF_PEER_INFO, 1754 WMI_TAG_DBGLOG_TIME_STAMP_SYNC_CMD, 1755 WMI_TAG_RMC_SET_LEADER_CMD, 1756 WMI_TAG_RMC_MANUAL_LEADER_EVENT, 1757 WMI_TAG_PER_CHAIN_RSSI_STATS, 1758 WMI_TAG_RSSI_STATS, 1759 WMI_TAG_P2P_LO_START_CMD, 1760 WMI_TAG_P2P_LO_STOP_CMD, 1761 WMI_TAG_P2P_LO_STOPPED_EVENT, 1762 WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1763 WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1764 WMI_TAG_SET_MULTIPLE_MCAST_FILTER_CMD, 1765 WMI_TAG_MGMT_TX_COMPL_BUNDLE_EVENT, 1766 WMI_TAG_READ_DATA_FROM_FLASH_CMD, 1767 WMI_TAG_READ_DATA_FROM_FLASH_EVENT, 1768 WMI_TAG_PDEV_SET_REORDER_TIMEOUT_VAL_CMD, 1769 WMI_TAG_PEER_SET_RX_BLOCKSIZE_CMD, 1770 WMI_TAG_PDEV_SET_WAKEUP_CONFIG_CMDID, 1771 WMI_TAG_TLV_BUF_LEN_PARAM, 1772 WMI_TAG_SERVICE_AVAILABLE_EVENT, 1773 WMI_TAG_PEER_ANTDIV_INFO_REQ_CMD, 1774 WMI_TAG_PEER_ANTDIV_INFO_EVENT, 1775 WMI_TAG_PEER_ANTDIV_INFO, 1776 WMI_TAG_PDEV_GET_ANTDIV_STATUS_CMD, 1777 WMI_TAG_PDEV_ANTDIV_STATUS_EVENT, 1778 WMI_TAG_MNT_FILTER_CMD, 1779 WMI_TAG_GET_CHIP_POWER_STATS_CMD, 1780 WMI_TAG_PDEV_CHIP_POWER_STATS_EVENT, 1781 WMI_TAG_COEX_GET_ANTENNA_ISOLATION_CMD, 1782 WMI_TAG_COEX_REPORT_ISOLATION_EVENT, 1783 WMI_TAG_CHAN_CCA_STATS, 1784 WMI_TAG_PEER_SIGNAL_STATS, 1785 WMI_TAG_TX_STATS, 1786 WMI_TAG_PEER_AC_TX_STATS, 1787 WMI_TAG_RX_STATS, 1788 WMI_TAG_PEER_AC_RX_STATS, 1789 WMI_TAG_REPORT_STATS_EVENT, 1790 WMI_TAG_CHAN_CCA_STATS_THRESH, 1791 WMI_TAG_PEER_SIGNAL_STATS_THRESH, 1792 WMI_TAG_TX_STATS_THRESH, 1793 WMI_TAG_RX_STATS_THRESH, 1794 WMI_TAG_PDEV_SET_STATS_THRESHOLD_CMD, 1795 WMI_TAG_REQUEST_WLAN_STATS_CMD, 1796 WMI_TAG_RX_AGGR_FAILURE_EVENT, 1797 WMI_TAG_RX_AGGR_FAILURE_INFO, 1798 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_REQ_CMD, 1799 WMI_TAG_VDEV_ENCRYPT_DECRYPT_DATA_RESP_EVENT, 1800 WMI_TAG_PDEV_BAND_TO_MAC, 1801 WMI_TAG_TBTT_OFFSET_INFO, 1802 WMI_TAG_TBTT_OFFSET_EXT_EVENT, 1803 WMI_TAG_SAR_LIMITS_CMD, 1804 WMI_TAG_SAR_LIMIT_CMD_ROW, 1805 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 1806 WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_DISABLE_CMD, 1807 WMI_TAG_VDEV_ADFS_CH_CFG_CMD, 1808 WMI_TAG_VDEV_ADFS_OCAC_ABORT_CMD, 1809 WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT, 1810 WMI_TAG_VDEV_ADFS_OCAC_COMPLETE_EVENT, 1811 WMI_TAG_VDEV_DFS_CAC_COMPLETE_EVENT, 1812 WMI_TAG_VENDOR_OUI, 1813 WMI_TAG_REQUEST_RCPI_CMD, 1814 WMI_TAG_UPDATE_RCPI_EVENT, 1815 WMI_TAG_REQUEST_PEER_STATS_INFO_CMD, 1816 WMI_TAG_PEER_STATS_INFO, 1817 WMI_TAG_PEER_STATS_INFO_EVENT, 1818 WMI_TAG_PKGID_EVENT, 1819 WMI_TAG_CONNECTED_NLO_RSSI_PARAMS, 1820 WMI_TAG_SET_CURRENT_COUNTRY_CMD, 1821 WMI_TAG_REGULATORY_RULE_STRUCT, 1822 WMI_TAG_REG_CHAN_LIST_CC_EVENT, 1823 WMI_TAG_11D_SCAN_START_CMD, 1824 WMI_TAG_11D_SCAN_STOP_CMD, 1825 WMI_TAG_11D_NEW_COUNTRY_EVENT, 1826 WMI_TAG_REQUEST_RADIO_CHAN_STATS_CMD, 1827 WMI_TAG_RADIO_CHAN_STATS, 1828 WMI_TAG_RADIO_CHAN_STATS_EVENT, 1829 WMI_TAG_ROAM_PER_CONFIG, 1830 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_CMD, 1831 WMI_TAG_VDEV_ADD_MAC_ADDR_TO_RX_FILTER_STATUS_EVENT, 1832 WMI_TAG_BPF_SET_VDEV_ACTIVE_MODE_CMD, 1833 WMI_TAG_HW_DATA_FILTER_CMD, 1834 WMI_TAG_CONNECTED_NLO_BSS_BAND_RSSI_PREF, 1835 WMI_TAG_PEER_OPER_MODE_CHANGE_EVENT, 1836 WMI_TAG_CHIP_POWER_SAVE_FAILURE_DETECTED, 1837 WMI_TAG_PDEV_MULTIPLE_VDEV_RESTART_REQUEST_CMD, 1838 WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT, 1839 WMI_TAG_PDEV_UPDATE_PKT_ROUTING_CMD, 1840 WMI_TAG_PDEV_CHECK_CAL_VERSION_CMD, 1841 WMI_TAG_PDEV_CHECK_CAL_VERSION_EVENT, 1842 WMI_TAG_PDEV_SET_DIVERSITY_GAIN_CMD, 1843 WMI_TAG_MAC_PHY_CHAINMASK_COMBO, 1844 WMI_TAG_MAC_PHY_CHAINMASK_CAPABILITY, 1845 WMI_TAG_VDEV_SET_ARP_STATS_CMD, 1846 WMI_TAG_VDEV_GET_ARP_STATS_CMD, 1847 WMI_TAG_VDEV_GET_ARP_STATS_EVENT, 1848 WMI_TAG_IFACE_OFFLOAD_STATS, 1849 WMI_TAG_REQUEST_STATS_CMD_SUB_STRUCT_PARAM, 1850 WMI_TAG_RSSI_CTL_EXT, 1851 WMI_TAG_SINGLE_PHYERR_EXT_RX_HDR, 1852 WMI_TAG_COEX_BT_ACTIVITY_EVENT, 1853 WMI_TAG_VDEV_GET_TX_POWER_CMD, 1854 WMI_TAG_VDEV_TX_POWER_EVENT, 1855 WMI_TAG_OFFCHAN_DATA_TX_COMPL_EVENT, 1856 WMI_TAG_OFFCHAN_DATA_TX_SEND_CMD, 1857 WMI_TAG_TX_SEND_PARAMS, 1858 WMI_TAG_HE_RATE_SET, 1859 WMI_TAG_CONGESTION_STATS, 1860 WMI_TAG_SET_INIT_COUNTRY_CMD, 1861 WMI_TAG_SCAN_DBS_DUTY_CYCLE, 1862 WMI_TAG_SCAN_DBS_DUTY_CYCLE_PARAM_TLV, 1863 WMI_TAG_PDEV_DIV_GET_RSSI_ANTID, 1864 WMI_TAG_THERM_THROT_CONFIG_REQUEST, 1865 WMI_TAG_THERM_THROT_LEVEL_CONFIG_INFO, 1866 WMI_TAG_THERM_THROT_STATS_EVENT, 1867 WMI_TAG_THERM_THROT_LEVEL_STATS_INFO, 1868 WMI_TAG_PDEV_DIV_RSSI_ANTID_EVENT, 1869 WMI_TAG_OEM_DMA_RING_CAPABILITIES, 1870 WMI_TAG_OEM_DMA_RING_CFG_REQ, 1871 WMI_TAG_OEM_DMA_RING_CFG_RSP, 1872 WMI_TAG_OEM_INDIRECT_DATA, 1873 WMI_TAG_OEM_DMA_BUF_RELEASE, 1874 WMI_TAG_OEM_DMA_BUF_RELEASE_ENTRY, 1875 WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1876 WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT, 1877 WMI_TAG_ROAM_LCA_DISALLOW_CONFIG, 1878 WMI_TAG_VDEV_LIMIT_OFFCHAN_CMD, 1879 WMI_TAG_ROAM_RSSI_REJECTION_OCE_CONFIG, 1880 WMI_TAG_UNIT_TEST_EVENT, 1881 WMI_TAG_ROAM_FILS_OFFLOAD, 1882 WMI_TAG_PDEV_UPDATE_PMK_CACHE_CMD, 1883 WMI_TAG_PMK_CACHE, 1884 WMI_TAG_PDEV_UPDATE_FILS_HLP_PKT_CMD, 1885 WMI_TAG_ROAM_FILS_SYNCH, 1886 WMI_TAG_GTK_OFFLOAD_EXTENDED, 1887 WMI_TAG_ROAM_BG_SCAN_ROAMING, 1888 WMI_TAG_OIC_PING_OFFLOAD_PARAMS_CMD, 1889 WMI_TAG_OIC_PING_OFFLOAD_SET_ENABLE_CMD, 1890 WMI_TAG_OIC_PING_HANDOFF_EVENT, 1891 WMI_TAG_DHCP_LEASE_RENEW_OFFLOAD_CMD, 1892 WMI_TAG_DHCP_LEASE_RENEW_EVENT, 1893 WMI_TAG_BTM_CONFIG, 1894 WMI_TAG_DEBUG_MESG_FW_DATA_STALL, 1895 WMI_TAG_WLM_CONFIG_CMD, 1896 WMI_TAG_PDEV_UPDATE_CTLTABLE_REQUEST, 1897 WMI_TAG_PDEV_UPDATE_CTLTABLE_EVENT, 1898 WMI_TAG_ROAM_CND_SCORING_PARAM, 1899 WMI_TAG_PDEV_CONFIG_VENDOR_OUI_ACTION, 1900 WMI_TAG_VENDOR_OUI_EXT, 1901 WMI_TAG_ROAM_SYNCH_FRAME_EVENT, 1902 WMI_TAG_FD_SEND_FROM_HOST_CMD, 1903 WMI_TAG_ENABLE_FILS_CMD, 1904 WMI_TAG_HOST_SWFDA_EVENT, 1905 WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1906 WMI_TAG_PDEV_SET_AC_TX_QUEUE_OPTIMIZED_CMD, 1907 WMI_TAG_STATS_PERIOD, 1908 WMI_TAG_NDL_SCHEDULE_UPDATE, 1909 WMI_TAG_PEER_TID_MSDUQ_QDEPTH_THRESH_UPDATE_CMD, 1910 WMI_TAG_MSDUQ_QDEPTH_THRESH_UPDATE, 1911 WMI_TAG_PDEV_SET_RX_FILTER_PROMISCUOUS_CMD, 1912 WMI_TAG_SAR2_RESULT_EVENT, 1913 WMI_TAG_SAR_CAPABILITIES, 1914 WMI_TAG_SAP_OBSS_DETECTION_CFG_CMD, 1915 WMI_TAG_SAP_OBSS_DETECTION_INFO_EVT, 1916 WMI_TAG_DMA_RING_CAPABILITIES, 1917 WMI_TAG_DMA_RING_CFG_REQ, 1918 WMI_TAG_DMA_RING_CFG_RSP, 1919 WMI_TAG_DMA_BUF_RELEASE, 1920 WMI_TAG_DMA_BUF_RELEASE_ENTRY, 1921 WMI_TAG_SAR_GET_LIMITS_CMD, 1922 WMI_TAG_SAR_GET_LIMITS_EVENT, 1923 WMI_TAG_SAR_GET_LIMITS_EVENT_ROW, 1924 WMI_TAG_OFFLOAD_11K_REPORT, 1925 WMI_TAG_INVOKE_NEIGHBOR_REPORT, 1926 WMI_TAG_NEIGHBOR_REPORT_OFFLOAD, 1927 WMI_TAG_VDEV_SET_CONNECTIVITY_CHECK_STATS, 1928 WMI_TAG_VDEV_GET_CONNECTIVITY_CHECK_STATS, 1929 WMI_TAG_BPF_SET_VDEV_ENABLE_CMD, 1930 WMI_TAG_BPF_SET_VDEV_WORK_MEMORY_CMD, 1931 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_CMD, 1932 WMI_TAG_BPF_GET_VDEV_WORK_MEMORY_RESP_EVT, 1933 WMI_TAG_PDEV_GET_NFCAL_POWER, 1934 WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 1935 WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 1936 WMI_TAG_OBSS_COLOR_COLLISION_EVT, 1937 WMI_TAG_RUNTIME_DPD_RECAL_CMD, 1938 WMI_TAG_TWT_ENABLE_CMD, 1939 WMI_TAG_TWT_DISABLE_CMD, 1940 WMI_TAG_TWT_ADD_DIALOG_CMD, 1941 WMI_TAG_TWT_DEL_DIALOG_CMD, 1942 WMI_TAG_TWT_PAUSE_DIALOG_CMD, 1943 WMI_TAG_TWT_RESUME_DIALOG_CMD, 1944 WMI_TAG_TWT_ENABLE_COMPLETE_EVENT, 1945 WMI_TAG_TWT_DISABLE_COMPLETE_EVENT, 1946 WMI_TAG_TWT_ADD_DIALOG_COMPLETE_EVENT, 1947 WMI_TAG_TWT_DEL_DIALOG_COMPLETE_EVENT, 1948 WMI_TAG_TWT_PAUSE_DIALOG_COMPLETE_EVENT, 1949 WMI_TAG_TWT_RESUME_DIALOG_COMPLETE_EVENT, 1950 WMI_TAG_REQUEST_ROAM_SCAN_STATS_CMD, 1951 WMI_TAG_ROAM_SCAN_STATS_EVENT, 1952 WMI_TAG_PEER_TID_CONFIGURATIONS_CMD, 1953 WMI_TAG_VDEV_SET_CUSTOM_SW_RETRY_TH_CMD, 1954 WMI_TAG_GET_TPC_POWER_CMD, 1955 WMI_TAG_GET_TPC_POWER_EVENT, 1956 WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA, 1957 WMI_TAG_MOTION_DET_CONFIG_PARAMS_CMD, 1958 WMI_TAG_MOTION_DET_BASE_LINE_CONFIG_PARAMS_CMD, 1959 WMI_TAG_MOTION_DET_START_STOP_CMD, 1960 WMI_TAG_MOTION_DET_BASE_LINE_START_STOP_CMD, 1961 WMI_TAG_MOTION_DET_EVENT, 1962 WMI_TAG_MOTION_DET_BASE_LINE_EVENT, 1963 WMI_TAG_NDP_TRANSPORT_IP, 1964 WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 1965 WMI_TAG_ESP_ESTIMATE_EVENT, 1966 WMI_TAG_NAN_HOST_CONFIG, 1967 WMI_TAG_SPECTRAL_BIN_SCALING_PARAMS, 1968 WMI_TAG_PEER_CFR_CAPTURE_CMD, 1969 WMI_TAG_PEER_CHAN_WIDTH_SWITCH_CMD, 1970 WMI_TAG_CHAN_WIDTH_PEER_LIST, 1971 WMI_TAG_OBSS_SPATIAL_REUSE_SET_DEF_OBSS_THRESH_CMD, 1972 WMI_TAG_PDEV_HE_TB_ACTION_FRM_CMD, 1973 WMI_TAG_PEER_EXTD2_STATS, 1974 WMI_TAG_HPCS_PULSE_START_CMD, 1975 WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT, 1976 WMI_TAG_VDEV_CHAINMASK_CONFIG_CMD, 1977 WMI_TAG_VDEV_BCN_OFFLOAD_QUIET_CONFIG_CMD, 1978 WMI_TAG_NAN_EVENT_INFO, 1979 WMI_TAG_NDP_CHANNEL_INFO, 1980 WMI_TAG_NDP_CMD, 1981 WMI_TAG_NDP_EVENT, 1982 /* TODO add all the missing cmds */ 1983 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_CMD = 0x301, 1984 WMI_TAG_PDEV_PEER_PKTLOG_FILTER_INFO, 1985 WMI_TAG_SERVICE_READY_EXT2_EVENT = 0x334, 1986 WMI_TAG_FILS_DISCOVERY_TMPL_CMD = 0x344, 1987 WMI_TAG_MAC_PHY_CAPABILITIES_EXT = 0x36F, 1988 WMI_TAG_REGULATORY_RULE_EXT_STRUCT = 0x3A9, 1989 WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT, 1990 WMI_TAG_TPC_STATS_GET_CMD = 0x38B, 1991 WMI_TAG_TPC_STATS_EVENT_FIXED_PARAM, 1992 WMI_TAG_TPC_STATS_CONFIG_EVENT, 1993 WMI_TAG_TPC_STATS_REG_PWR_ALLOWED, 1994 WMI_TAG_TPC_STATS_RATES_ARRAY, 1995 WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT, 1996 WMI_TAG_VDEV_SET_TPC_POWER_CMD = 0x3B5, 1997 WMI_TAG_VDEV_CH_POWER_INFO, 1998 WMI_TAG_MLO_LINK_SET_ACTIVE_CMD = 0x3BE, 1999 WMI_TAG_EHT_RATE_SET = 0x3C4, 2000 WMI_TAG_DCS_AWGN_INT_TYPE = 0x3C5, 2001 WMI_TAG_MLO_TX_SEND_PARAMS, 2002 WMI_TAG_MLO_PARTNER_LINK_PARAMS, 2003 WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC, 2004 WMI_TAG_MLO_SETUP_CMD = 0x3C9, 2005 WMI_TAG_MLO_SETUP_COMPLETE_EVENT, 2006 WMI_TAG_MLO_READY_CMD, 2007 WMI_TAG_MLO_TEARDOWN_CMD, 2008 WMI_TAG_MLO_TEARDOWN_COMPLETE, 2009 WMI_TAG_MLO_PEER_ASSOC_PARAMS = 0x3D0, 2010 WMI_TAG_MLO_PEER_CREATE_PARAMS = 0x3D5, 2011 WMI_TAG_MLO_VDEV_START_PARAMS = 0x3D6, 2012 WMI_TAG_MLO_VDEV_CREATE_PARAMS = 0x3D7, 2013 WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD = 0x3D8, 2014 WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD = 0x3D9, 2015 WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD = 0x3FB, 2016 WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM = 0x427, 2017 WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO, 2018 WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO, 2019 WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM = 0x442, 2020 WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM, 2021 WMI_TAG_MAX 2022 }; 2023 2024 enum wmi_tlv_service { 2025 WMI_TLV_SERVICE_BEACON_OFFLOAD = 0, 2026 WMI_TLV_SERVICE_SCAN_OFFLOAD = 1, 2027 WMI_TLV_SERVICE_ROAM_SCAN_OFFLOAD = 2, 2028 WMI_TLV_SERVICE_BCN_MISS_OFFLOAD = 3, 2029 WMI_TLV_SERVICE_STA_PWRSAVE = 4, 2030 WMI_TLV_SERVICE_STA_ADVANCED_PWRSAVE = 5, 2031 WMI_TLV_SERVICE_AP_UAPSD = 6, 2032 WMI_TLV_SERVICE_AP_DFS = 7, 2033 WMI_TLV_SERVICE_11AC = 8, 2034 WMI_TLV_SERVICE_BLOCKACK = 9, 2035 WMI_TLV_SERVICE_PHYERR = 10, 2036 WMI_TLV_SERVICE_BCN_FILTER = 11, 2037 WMI_TLV_SERVICE_RTT = 12, 2038 WMI_TLV_SERVICE_WOW = 13, 2039 WMI_TLV_SERVICE_RATECTRL_CACHE = 14, 2040 WMI_TLV_SERVICE_IRAM_TIDS = 15, 2041 WMI_TLV_SERVICE_ARPNS_OFFLOAD = 16, 2042 WMI_TLV_SERVICE_NLO = 17, 2043 WMI_TLV_SERVICE_GTK_OFFLOAD = 18, 2044 WMI_TLV_SERVICE_SCAN_SCH = 19, 2045 WMI_TLV_SERVICE_CSA_OFFLOAD = 20, 2046 WMI_TLV_SERVICE_CHATTER = 21, 2047 WMI_TLV_SERVICE_COEX_FREQAVOID = 22, 2048 WMI_TLV_SERVICE_PACKET_POWER_SAVE = 23, 2049 WMI_TLV_SERVICE_FORCE_FW_HANG = 24, 2050 WMI_TLV_SERVICE_GPIO = 25, 2051 WMI_TLV_SERVICE_STA_DTIM_PS_MODULATED_DTIM = 26, 2052 WMI_STA_UAPSD_BASIC_AUTO_TRIG = 27, 2053 WMI_STA_UAPSD_VAR_AUTO_TRIG = 28, 2054 WMI_TLV_SERVICE_STA_KEEP_ALIVE = 29, 2055 WMI_TLV_SERVICE_TX_ENCAP = 30, 2056 WMI_TLV_SERVICE_AP_PS_DETECT_OUT_OF_SYNC = 31, 2057 WMI_TLV_SERVICE_EARLY_RX = 32, 2058 WMI_TLV_SERVICE_STA_SMPS = 33, 2059 WMI_TLV_SERVICE_FWTEST = 34, 2060 WMI_TLV_SERVICE_STA_WMMAC = 35, 2061 WMI_TLV_SERVICE_TDLS = 36, 2062 WMI_TLV_SERVICE_BURST = 37, 2063 WMI_TLV_SERVICE_MCC_BCN_INTERVAL_CHANGE = 38, 2064 WMI_TLV_SERVICE_ADAPTIVE_OCS = 39, 2065 WMI_TLV_SERVICE_BA_SSN_SUPPORT = 40, 2066 WMI_TLV_SERVICE_FILTER_IPSEC_NATKEEPALIVE = 41, 2067 WMI_TLV_SERVICE_WLAN_HB = 42, 2068 WMI_TLV_SERVICE_LTE_ANT_SHARE_SUPPORT = 43, 2069 WMI_TLV_SERVICE_BATCH_SCAN = 44, 2070 WMI_TLV_SERVICE_QPOWER = 45, 2071 WMI_TLV_SERVICE_PLMREQ = 46, 2072 WMI_TLV_SERVICE_THERMAL_MGMT = 47, 2073 WMI_TLV_SERVICE_RMC = 48, 2074 WMI_TLV_SERVICE_MHF_OFFLOAD = 49, 2075 WMI_TLV_SERVICE_COEX_SAR = 50, 2076 WMI_TLV_SERVICE_BCN_TXRATE_OVERRIDE = 51, 2077 WMI_TLV_SERVICE_NAN = 52, 2078 WMI_TLV_SERVICE_L1SS_STAT = 53, 2079 WMI_TLV_SERVICE_ESTIMATE_LINKSPEED = 54, 2080 WMI_TLV_SERVICE_OBSS_SCAN = 55, 2081 WMI_TLV_SERVICE_TDLS_OFFCHAN = 56, 2082 WMI_TLV_SERVICE_TDLS_UAPSD_BUFFER_STA = 57, 2083 WMI_TLV_SERVICE_TDLS_UAPSD_SLEEP_STA = 58, 2084 WMI_TLV_SERVICE_IBSS_PWRSAVE = 59, 2085 WMI_TLV_SERVICE_LPASS = 60, 2086 WMI_TLV_SERVICE_EXTSCAN = 61, 2087 WMI_TLV_SERVICE_D0WOW = 62, 2088 WMI_TLV_SERVICE_HSOFFLOAD = 63, 2089 WMI_TLV_SERVICE_ROAM_HO_OFFLOAD = 64, 2090 WMI_TLV_SERVICE_RX_FULL_REORDER = 65, 2091 WMI_TLV_SERVICE_DHCP_OFFLOAD = 66, 2092 WMI_TLV_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT = 67, 2093 WMI_TLV_SERVICE_MDNS_OFFLOAD = 68, 2094 WMI_TLV_SERVICE_SAP_AUTH_OFFLOAD = 69, 2095 WMI_TLV_SERVICE_DUAL_BAND_SIMULTANEOUS_SUPPORT = 70, 2096 WMI_TLV_SERVICE_OCB = 71, 2097 WMI_TLV_SERVICE_AP_ARPNS_OFFLOAD = 72, 2098 WMI_TLV_SERVICE_PER_BAND_CHAINMASK_SUPPORT = 73, 2099 WMI_TLV_SERVICE_PACKET_FILTER_OFFLOAD = 74, 2100 WMI_TLV_SERVICE_MGMT_TX_HTT = 75, 2101 WMI_TLV_SERVICE_MGMT_TX_WMI = 76, 2102 WMI_TLV_SERVICE_EXT_MSG = 77, 2103 WMI_TLV_SERVICE_MAWC = 78, 2104 WMI_TLV_SERVICE_PEER_ASSOC_CONF = 79, 2105 WMI_TLV_SERVICE_EGAP = 80, 2106 WMI_TLV_SERVICE_STA_PMF_OFFLOAD = 81, 2107 WMI_TLV_SERVICE_UNIFIED_WOW_CAPABILITY = 82, 2108 WMI_TLV_SERVICE_ENHANCED_PROXY_STA = 83, 2109 WMI_TLV_SERVICE_ATF = 84, 2110 WMI_TLV_SERVICE_COEX_GPIO = 85, 2111 WMI_TLV_SERVICE_AUX_SPECTRAL_INTF = 86, 2112 WMI_TLV_SERVICE_AUX_CHAN_LOAD_INTF = 87, 2113 WMI_TLV_SERVICE_BSS_CHANNEL_INFO_64 = 88, 2114 WMI_TLV_SERVICE_ENTERPRISE_MESH = 89, 2115 WMI_TLV_SERVICE_RESTRT_CHNL_SUPPORT = 90, 2116 WMI_TLV_SERVICE_BPF_OFFLOAD = 91, 2117 WMI_TLV_SERVICE_SYNC_DELETE_CMDS = 92, 2118 WMI_TLV_SERVICE_SMART_ANTENNA_SW_SUPPORT = 93, 2119 WMI_TLV_SERVICE_SMART_ANTENNA_HW_SUPPORT = 94, 2120 WMI_TLV_SERVICE_RATECTRL_LIMIT_MAX_MIN_RATES = 95, 2121 WMI_TLV_SERVICE_NAN_DATA = 96, 2122 WMI_TLV_SERVICE_NAN_RTT = 97, 2123 WMI_TLV_SERVICE_11AX = 98, 2124 WMI_TLV_SERVICE_DEPRECATED_REPLACE = 99, 2125 WMI_TLV_SERVICE_TDLS_CONN_TRACKER_IN_HOST_MODE = 100, 2126 WMI_TLV_SERVICE_ENHANCED_MCAST_FILTER = 101, 2127 WMI_TLV_SERVICE_PERIODIC_CHAN_STAT_SUPPORT = 102, 2128 WMI_TLV_SERVICE_MESH_11S = 103, 2129 WMI_TLV_SERVICE_HALF_RATE_QUARTER_RATE_SUPPORT = 104, 2130 WMI_TLV_SERVICE_VDEV_RX_FILTER = 105, 2131 WMI_TLV_SERVICE_P2P_LISTEN_OFFLOAD_SUPPORT = 106, 2132 WMI_TLV_SERVICE_MARK_FIRST_WAKEUP_PACKET = 107, 2133 WMI_TLV_SERVICE_MULTIPLE_MCAST_FILTER_SET = 108, 2134 WMI_TLV_SERVICE_HOST_MANAGED_RX_REORDER = 109, 2135 WMI_TLV_SERVICE_FLASH_RDWR_SUPPORT = 110, 2136 WMI_TLV_SERVICE_WLAN_STATS_REPORT = 111, 2137 WMI_TLV_SERVICE_TX_MSDU_ID_NEW_PARTITION_SUPPORT = 112, 2138 WMI_TLV_SERVICE_DFS_PHYERR_OFFLOAD = 113, 2139 WMI_TLV_SERVICE_RCPI_SUPPORT = 114, 2140 WMI_TLV_SERVICE_FW_MEM_DUMP_SUPPORT = 115, 2141 WMI_TLV_SERVICE_PEER_STATS_INFO = 116, 2142 WMI_TLV_SERVICE_REGULATORY_DB = 117, 2143 WMI_TLV_SERVICE_11D_OFFLOAD = 118, 2144 WMI_TLV_SERVICE_HW_DATA_FILTERING = 119, 2145 WMI_TLV_SERVICE_MULTIPLE_VDEV_RESTART = 120, 2146 WMI_TLV_SERVICE_PKT_ROUTING = 121, 2147 WMI_TLV_SERVICE_CHECK_CAL_VERSION = 122, 2148 WMI_TLV_SERVICE_OFFCHAN_TX_WMI = 123, 2149 WMI_TLV_SERVICE_8SS_TX_BFEE = 124, 2150 WMI_TLV_SERVICE_EXTENDED_NSS_SUPPORT = 125, 2151 WMI_TLV_SERVICE_ACK_TIMEOUT = 126, 2152 WMI_TLV_SERVICE_PDEV_BSS_CHANNEL_INFO_64 = 127, 2153 2154 WMI_MAX_SERVICE = 128, 2155 2156 WMI_TLV_SERVICE_CHAN_LOAD_INFO = 128, 2157 WMI_TLV_SERVICE_TX_PPDU_INFO_STATS_SUPPORT = 129, 2158 WMI_TLV_SERVICE_VDEV_LIMIT_OFFCHAN_SUPPORT = 130, 2159 WMI_TLV_SERVICE_FILS_SUPPORT = 131, 2160 WMI_TLV_SERVICE_WLAN_OIC_PING_OFFLOAD = 132, 2161 WMI_TLV_SERVICE_WLAN_DHCP_RENEW = 133, 2162 WMI_TLV_SERVICE_MAWC_SUPPORT = 134, 2163 WMI_TLV_SERVICE_VDEV_LATENCY_CONFIG = 135, 2164 WMI_TLV_SERVICE_PDEV_UPDATE_CTLTABLE_SUPPORT = 136, 2165 WMI_TLV_SERVICE_PKTLOG_SUPPORT_OVER_HTT = 137, 2166 WMI_TLV_SERVICE_VDEV_MULTI_GROUP_KEY_SUPPORT = 138, 2167 WMI_TLV_SERVICE_SCAN_PHYMODE_SUPPORT = 139, 2168 WMI_TLV_SERVICE_THERM_THROT = 140, 2169 WMI_TLV_SERVICE_BCN_OFFLOAD_START_STOP_SUPPORT = 141, 2170 WMI_TLV_SERVICE_WOW_WAKEUP_BY_TIMER_PATTERN = 142, 2171 WMI_TLV_SERVICE_PEER_MAP_UNMAP_V2_SUPPORT = 143, 2172 WMI_TLV_SERVICE_OFFCHAN_DATA_TID_SUPPORT = 144, 2173 WMI_TLV_SERVICE_RX_PROMISC_ENABLE_SUPPORT = 145, 2174 WMI_TLV_SERVICE_SUPPORT_DIRECT_DMA = 146, 2175 WMI_TLV_SERVICE_AP_OBSS_DETECTION_OFFLOAD = 147, 2176 WMI_TLV_SERVICE_11K_NEIGHBOUR_REPORT_SUPPORT = 148, 2177 WMI_TLV_SERVICE_LISTEN_INTERVAL_OFFLOAD_SUPPORT = 149, 2178 WMI_TLV_SERVICE_BSS_COLOR_OFFLOAD = 150, 2179 WMI_TLV_SERVICE_RUNTIME_DPD_RECAL = 151, 2180 WMI_TLV_SERVICE_STA_TWT = 152, 2181 WMI_TLV_SERVICE_AP_TWT = 153, 2182 WMI_TLV_SERVICE_GMAC_OFFLOAD_SUPPORT = 154, 2183 WMI_TLV_SERVICE_SPOOF_MAC_SUPPORT = 155, 2184 WMI_TLV_SERVICE_PEER_TID_CONFIGS_SUPPORT = 156, 2185 WMI_TLV_SERVICE_VDEV_SWRETRY_PER_AC_CONFIG_SUPPORT = 157, 2186 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_SCC_SUPPORT = 158, 2187 WMI_TLV_SERVICE_DUAL_BEACON_ON_SINGLE_MAC_MCC_SUPPORT = 159, 2188 WMI_TLV_SERVICE_MOTION_DET = 160, 2189 WMI_TLV_SERVICE_INFRA_MBSSID = 161, 2190 WMI_TLV_SERVICE_OBSS_SPATIAL_REUSE = 162, 2191 WMI_TLV_SERVICE_VDEV_DIFFERENT_BEACON_INTERVAL_SUPPORT = 163, 2192 WMI_TLV_SERVICE_NAN_DBS_SUPPORT = 164, 2193 WMI_TLV_SERVICE_NDI_DBS_SUPPORT = 165, 2194 WMI_TLV_SERVICE_NAN_SAP_SUPPORT = 166, 2195 WMI_TLV_SERVICE_NDI_SAP_SUPPORT = 167, 2196 WMI_TLV_SERVICE_CFR_CAPTURE_SUPPORT = 168, 2197 WMI_TLV_SERVICE_CFR_CAPTURE_IND_MSG_TYPE_1 = 169, 2198 WMI_TLV_SERVICE_ESP_SUPPORT = 170, 2199 WMI_TLV_SERVICE_PEER_CHWIDTH_CHANGE = 171, 2200 WMI_TLV_SERVICE_WLAN_HPCS_PULSE = 172, 2201 WMI_TLV_SERVICE_PER_VDEV_CHAINMASK_CONFIG_SUPPORT = 173, 2202 WMI_TLV_SERVICE_TX_DATA_MGMT_ACK_RSSI = 174, 2203 WMI_TLV_SERVICE_NAN_DISABLE_SUPPORT = 175, 2204 WMI_TLV_SERVICE_HTT_H2T_NO_HTC_HDR_LEN_IN_MSG_LEN = 176, 2205 WMI_TLV_SERVICE_COEX_SUPPORT_UNEQUAL_ISOLATION = 177, 2206 WMI_TLV_SERVICE_HW_DB2DBM_CONVERSION_SUPPORT = 178, 2207 WMI_TLV_SERVICE_SUPPORT_EXTEND_ADDRESS = 179, 2208 WMI_TLV_SERVICE_BEACON_RECEPTION_STATS = 180, 2209 WMI_TLV_SERVICE_FETCH_TX_PN = 181, 2210 WMI_TLV_SERVICE_PEER_UNMAP_RESPONSE_SUPPORT = 182, 2211 WMI_TLV_SERVICE_TX_PER_PEER_AMPDU_SIZE = 183, 2212 WMI_TLV_SERVICE_BSS_COLOR_SWITCH_COUNT = 184, 2213 WMI_TLV_SERVICE_HTT_PEER_STATS_SUPPORT = 185, 2214 WMI_TLV_SERVICE_UL_RU26_ALLOWED = 186, 2215 WMI_TLV_SERVICE_GET_MWS_COEX_STATE = 187, 2216 WMI_TLV_SERVICE_GET_MWS_DPWB_STATE = 188, 2217 WMI_TLV_SERVICE_GET_MWS_TDM_STATE = 189, 2218 WMI_TLV_SERVICE_GET_MWS_IDRX_STATE = 190, 2219 WMI_TLV_SERVICE_GET_MWS_ANTENNA_SHARING_STATE = 191, 2220 WMI_TLV_SERVICE_ENHANCED_TPC_CONFIG_EVENT = 192, 2221 WMI_TLV_SERVICE_WLM_STATS_REQUEST = 193, 2222 WMI_TLV_SERVICE_EXT_PEER_TID_CONFIGS_SUPPORT = 194, 2223 WMI_TLV_SERVICE_WPA3_FT_SAE_SUPPORT = 195, 2224 WMI_TLV_SERVICE_WPA3_FT_SUITE_B_SUPPORT = 196, 2225 WMI_TLV_SERVICE_VOW_ENABLE = 197, 2226 WMI_TLV_SERVICE_CFR_CAPTURE_IND_EVT_TYPE_1 = 198, 2227 WMI_TLV_SERVICE_BROADCAST_TWT = 199, 2228 WMI_TLV_SERVICE_RAP_DETECTION_SUPPORT = 200, 2229 WMI_TLV_SERVICE_PS_TDCC = 201, 2230 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_LEGACY = 202, 2231 WMI_TLV_SERVICE_THREE_WAY_COEX_CONFIG_OVERRIDE = 203, 2232 WMI_TLV_SERVICE_TX_PWR_PER_PEER = 204, 2233 WMI_TLV_SERVICE_STA_PLUS_STA_SUPPORT = 205, 2234 WMI_TLV_SERVICE_WPA3_FT_FILS = 206, 2235 WMI_TLV_SERVICE_ADAPTIVE_11R_ROAM = 207, 2236 WMI_TLV_SERVICE_CHAN_RF_CHARACTERIZATION_INFO = 208, 2237 WMI_TLV_SERVICE_FW_IFACE_COMBINATION_SUPPORT = 209, 2238 WMI_TLV_SERVICE_TX_COMPL_TSF64 = 210, 2239 WMI_TLV_SERVICE_DSM_ROAM_FILTER = 211, 2240 WMI_TLV_SERVICE_PACKET_CAPTURE_SUPPORT = 212, 2241 WMI_TLV_SERVICE_PER_PEER_HTT_STATS_RESET = 213, 2242 WMI_TLV_SERVICE_FREQINFO_IN_METADATA = 219, 2243 WMI_TLV_SERVICE_EXT2_MSG = 220, 2244 WMI_TLV_SERVICE_BEACON_PROTECTION_SUPPORT = 244, 2245 WMI_TLV_SERVICE_MBSS_PARAM_IN_VDEV_START_SUPPORT = 253, 2246 2247 WMI_MAX_EXT_SERVICE = 256, 2248 2249 WMI_TLV_SERVICE_EXT_TPC_REG_SUPPORT = 280, 2250 2251 WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT = 281, 2252 2253 WMI_TLV_SERVICE_11BE = 289, 2254 2255 WMI_TLV_SERVICE_WMSK_COMPACTION_RX_TLVS = 361, 2256 2257 WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT = 365, 2258 2259 WMI_MAX_EXT2_SERVICE, 2260 }; 2261 2262 enum { 2263 WMI_SMPS_FORCED_MODE_NONE = 0, 2264 WMI_SMPS_FORCED_MODE_DISABLED, 2265 WMI_SMPS_FORCED_MODE_STATIC, 2266 WMI_SMPS_FORCED_MODE_DYNAMIC 2267 }; 2268 2269 enum wmi_tpc_chainmask { 2270 WMI_TPC_CHAINMASK_CONFIG_BAND_2G = 0, 2271 WMI_TPC_CHAINMASK_CONFIG_BAND_5G = 1, 2272 WMI_NUM_SUPPORTED_BAND_MAX = 2, 2273 }; 2274 2275 enum wmi_peer_param { 2276 WMI_PEER_MIMO_PS_STATE = 1, 2277 WMI_PEER_AMPDU = 2, 2278 WMI_PEER_AUTHORIZE = 3, 2279 WMI_PEER_CHWIDTH = 4, 2280 WMI_PEER_NSS = 5, 2281 WMI_PEER_USE_4ADDR = 6, 2282 WMI_PEER_MEMBERSHIP = 7, 2283 WMI_PEER_USERPOS = 8, 2284 WMI_PEER_CRIT_PROTO_HINT_ENABLED = 9, 2285 WMI_PEER_TX_FAIL_CNT_THR = 10, 2286 WMI_PEER_SET_HW_RETRY_CTS2S = 11, 2287 WMI_PEER_IBSS_ATIM_WINDOW_LENGTH = 12, 2288 WMI_PEER_PHYMODE = 13, 2289 WMI_PEER_USE_FIXED_PWR = 14, 2290 WMI_PEER_PARAM_FIXED_RATE = 15, 2291 WMI_PEER_SET_MU_WHITELIST = 16, 2292 WMI_PEER_SET_MAX_TX_RATE = 17, 2293 WMI_PEER_SET_MIN_TX_RATE = 18, 2294 WMI_PEER_SET_DEFAULT_ROUTING = 19, 2295 WMI_PEER_CHWIDTH_PUNCTURE_20MHZ_BITMAP = 39, 2296 }; 2297 2298 #define WMI_PEER_PUNCTURE_BITMAP GENMASK(23, 8) 2299 2300 enum wmi_slot_time { 2301 WMI_VDEV_SLOT_TIME_LONG = 1, 2302 WMI_VDEV_SLOT_TIME_SHORT = 2, 2303 }; 2304 2305 enum wmi_preamble { 2306 WMI_VDEV_PREAMBLE_LONG = 1, 2307 WMI_VDEV_PREAMBLE_SHORT = 2, 2308 }; 2309 2310 enum wmi_peer_smps_state { 2311 WMI_PEER_SMPS_PS_NONE = 0, 2312 WMI_PEER_SMPS_STATIC = 1, 2313 WMI_PEER_SMPS_DYNAMIC = 2 2314 }; 2315 2316 enum wmi_peer_chwidth { 2317 WMI_PEER_CHWIDTH_20MHZ = 0, 2318 WMI_PEER_CHWIDTH_40MHZ = 1, 2319 WMI_PEER_CHWIDTH_80MHZ = 2, 2320 WMI_PEER_CHWIDTH_160MHZ = 3, 2321 WMI_PEER_CHWIDTH_320MHZ = 4, 2322 }; 2323 2324 enum wmi_beacon_gen_mode { 2325 WMI_BEACON_STAGGERED_MODE = 0, 2326 WMI_BEACON_BURST_MODE = 1 2327 }; 2328 2329 enum wmi_direct_buffer_module { 2330 WMI_DIRECT_BUF_SPECTRAL = 0, 2331 WMI_DIRECT_BUF_CFR = 1, 2332 2333 /* keep it last */ 2334 WMI_DIRECT_BUF_MAX 2335 }; 2336 2337 /** 2338 * enum wmi_nss_ratio - NSS ratio received from FW during service ready ext event 2339 * @WMI_NSS_RATIO_1BY2_NSS: Max nss of 160MHz is equals to half of the max nss of 80MHz 2340 * @WMI_NSS_RATIO_3BY4_NSS: Max nss of 160MHz is equals to 3/4 of the max nss of 80MHz 2341 * @WMI_NSS_RATIO_1_NSS: Max nss of 160MHz is equals to the max nss of 80MHz 2342 * @WMI_NSS_RATIO_2_NSS: Max nss of 160MHz is equals to two times the max nss of 80MHz 2343 */ 2344 2345 enum wmi_nss_ratio { 2346 WMI_NSS_RATIO_1BY2_NSS, 2347 WMI_NSS_RATIO_3BY4_NSS, 2348 WMI_NSS_RATIO_1_NSS, 2349 WMI_NSS_RATIO_2_NSS 2350 }; 2351 2352 struct ath12k_wmi_pdev_band_arg { 2353 u32 pdev_id; 2354 u32 start_freq; 2355 u32 end_freq; 2356 }; 2357 2358 struct ath12k_wmi_ppe_threshold_arg { 2359 u32 numss_m1; 2360 u32 ru_bit_mask; 2361 u32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2362 }; 2363 2364 #define PSOC_HOST_MAX_PHY_SIZE (3) 2365 #define ATH12K_11B_SUPPORT BIT(0) 2366 #define ATH12K_11G_SUPPORT BIT(1) 2367 #define ATH12K_11A_SUPPORT BIT(2) 2368 #define ATH12K_11N_SUPPORT BIT(3) 2369 #define ATH12K_11AC_SUPPORT BIT(4) 2370 #define ATH12K_11AX_SUPPORT BIT(5) 2371 2372 struct ath12k_wmi_hal_reg_capabilities_ext_arg { 2373 u32 phy_id; 2374 u32 eeprom_reg_domain; 2375 u32 eeprom_reg_domain_ext; 2376 u32 regcap1; 2377 u32 regcap2; 2378 u32 wireless_modes; 2379 u32 low_2ghz_chan; 2380 u32 high_2ghz_chan; 2381 u32 low_5ghz_chan; 2382 u32 high_5ghz_chan; 2383 }; 2384 2385 #define WMI_HOST_MAX_PDEV 3 2386 2387 struct ath12k_wmi_host_mem_chunk_params { 2388 __le32 tlv_header; 2389 __le32 req_id; 2390 __le32 ptr; 2391 __le32 size; 2392 } __packed; 2393 2394 struct ath12k_wmi_host_mem_chunk_arg { 2395 void *vaddr; 2396 dma_addr_t paddr; 2397 u32 len; 2398 u32 req_id; 2399 }; 2400 2401 enum ath12k_peer_metadata_version { 2402 ATH12K_PEER_METADATA_V0, 2403 ATH12K_PEER_METADATA_V1, 2404 ATH12K_PEER_METADATA_V1A, 2405 ATH12K_PEER_METADATA_V1B 2406 }; 2407 2408 struct ath12k_wmi_resource_config_arg { 2409 u32 num_vdevs; 2410 u32 num_peers; 2411 u32 num_active_peers; 2412 u32 num_offload_peers; 2413 u32 num_offload_reorder_buffs; 2414 u32 num_peer_keys; 2415 u32 num_tids; 2416 u32 ast_skid_limit; 2417 u32 tx_chain_mask; 2418 u32 rx_chain_mask; 2419 u32 rx_timeout_pri[4]; 2420 u32 rx_decap_mode; 2421 u32 scan_max_pending_req; 2422 u32 bmiss_offload_max_vdev; 2423 u32 roam_offload_max_vdev; 2424 u32 roam_offload_max_ap_profiles; 2425 u32 num_mcast_groups; 2426 u32 num_mcast_table_elems; 2427 u32 mcast2ucast_mode; 2428 u32 tx_dbg_log_size; 2429 u32 num_wds_entries; 2430 u32 dma_burst_size; 2431 u32 mac_aggr_delim; 2432 u32 rx_skip_defrag_timeout_dup_detection_check; 2433 u32 vow_config; 2434 u32 gtk_offload_max_vdev; 2435 u32 num_msdu_desc; 2436 u32 max_frag_entries; 2437 u32 max_peer_ext_stats; 2438 u32 smart_ant_cap; 2439 u32 bk_minfree; 2440 u32 be_minfree; 2441 u32 vi_minfree; 2442 u32 vo_minfree; 2443 u32 rx_batchmode; 2444 u32 tt_support; 2445 u32 atf_config; 2446 u32 iphdr_pad_config; 2447 u32 qwrap_config:16, 2448 alloc_frag_desc_for_data_pkt:16; 2449 u32 num_tdls_vdevs; 2450 u32 num_tdls_conn_table_entries; 2451 u32 beacon_tx_offload_max_vdev; 2452 u32 num_multicast_filter_entries; 2453 u32 num_wow_filters; 2454 u32 num_keep_alive_pattern; 2455 u32 keep_alive_pattern_size; 2456 u32 max_tdls_concurrent_sleep_sta; 2457 u32 max_tdls_concurrent_buffer_sta; 2458 u32 wmi_send_separate; 2459 u32 num_ocb_vdevs; 2460 u32 num_ocb_channels; 2461 u32 num_ocb_schedules; 2462 u32 num_ns_ext_tuples_cfg; 2463 u32 bpf_instruction_size; 2464 u32 max_bssid_rx_filters; 2465 u32 use_pdev_id; 2466 u32 peer_map_unmap_version; 2467 u32 sched_params; 2468 u32 twt_ap_pdev_count; 2469 u32 twt_ap_sta_count; 2470 enum ath12k_peer_metadata_version peer_metadata_ver; 2471 u32 ema_max_vap_cnt; 2472 u32 ema_max_profile_period; 2473 bool is_reg_cc_ext_event_supported; 2474 }; 2475 2476 struct ath12k_wmi_init_cmd_arg { 2477 struct ath12k_wmi_resource_config_arg res_cfg; 2478 u8 num_mem_chunks; 2479 struct ath12k_wmi_host_mem_chunk_arg *mem_chunks; 2480 u32 hw_mode_id; 2481 u32 num_band_to_mac; 2482 struct ath12k_wmi_pdev_band_arg band_to_mac[WMI_HOST_MAX_PDEV]; 2483 }; 2484 2485 struct ath12k_wmi_pdev_band_to_mac_params { 2486 __le32 tlv_header; 2487 __le32 pdev_id; 2488 __le32 start_freq; 2489 __le32 end_freq; 2490 } __packed; 2491 2492 /* This is both individual command WMI_PDEV_SET_HW_MODE_CMDID and also part 2493 * of WMI_TAG_INIT_CMD. 2494 */ 2495 struct ath12k_wmi_pdev_set_hw_mode_cmd { 2496 __le32 tlv_header; 2497 __le32 pdev_id; 2498 __le32 hw_mode_index; 2499 __le32 num_band_to_mac; 2500 } __packed; 2501 2502 struct ath12k_wmi_ppe_threshold_params { 2503 __le32 numss_m1; /** NSS - 1*/ 2504 __le32 ru_info; 2505 __le32 ppet16_ppet8_ru3_ru0[WMI_MAX_NUM_SS]; 2506 } __packed; 2507 2508 #define HW_BD_INFO_SIZE 5 2509 2510 struct ath12k_wmi_abi_version_params { 2511 __le32 abi_version_0; 2512 __le32 abi_version_1; 2513 __le32 abi_version_ns_0; 2514 __le32 abi_version_ns_1; 2515 __le32 abi_version_ns_2; 2516 __le32 abi_version_ns_3; 2517 } __packed; 2518 2519 struct wmi_init_cmd { 2520 __le32 tlv_header; 2521 struct ath12k_wmi_abi_version_params host_abi_vers; 2522 __le32 num_host_mem_chunks; 2523 } __packed; 2524 2525 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT 4 2526 #define WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT 12 2527 #define WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION GENMASK(5, 4) 2528 #define WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 BIT(5) 2529 #define WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET BIT(9) 2530 2531 struct ath12k_wmi_resource_config_params { 2532 __le32 tlv_header; 2533 __le32 num_vdevs; 2534 __le32 num_peers; 2535 __le32 num_offload_peers; 2536 __le32 num_offload_reorder_buffs; 2537 __le32 num_peer_keys; 2538 __le32 num_tids; 2539 __le32 ast_skid_limit; 2540 __le32 tx_chain_mask; 2541 __le32 rx_chain_mask; 2542 __le32 rx_timeout_pri[4]; 2543 __le32 rx_decap_mode; 2544 __le32 scan_max_pending_req; 2545 __le32 bmiss_offload_max_vdev; 2546 __le32 roam_offload_max_vdev; 2547 __le32 roam_offload_max_ap_profiles; 2548 __le32 num_mcast_groups; 2549 __le32 num_mcast_table_elems; 2550 __le32 mcast2ucast_mode; 2551 __le32 tx_dbg_log_size; 2552 __le32 num_wds_entries; 2553 __le32 dma_burst_size; 2554 __le32 mac_aggr_delim; 2555 __le32 rx_skip_defrag_timeout_dup_detection_check; 2556 __le32 vow_config; 2557 __le32 gtk_offload_max_vdev; 2558 __le32 num_msdu_desc; 2559 __le32 max_frag_entries; 2560 __le32 num_tdls_vdevs; 2561 __le32 num_tdls_conn_table_entries; 2562 __le32 beacon_tx_offload_max_vdev; 2563 __le32 num_multicast_filter_entries; 2564 __le32 num_wow_filters; 2565 __le32 num_keep_alive_pattern; 2566 __le32 keep_alive_pattern_size; 2567 __le32 max_tdls_concurrent_sleep_sta; 2568 __le32 max_tdls_concurrent_buffer_sta; 2569 __le32 wmi_send_separate; 2570 __le32 num_ocb_vdevs; 2571 __le32 num_ocb_channels; 2572 __le32 num_ocb_schedules; 2573 __le32 flag1; 2574 __le32 smart_ant_cap; 2575 __le32 bk_minfree; 2576 __le32 be_minfree; 2577 __le32 vi_minfree; 2578 __le32 vo_minfree; 2579 __le32 alloc_frag_desc_for_data_pkt; 2580 __le32 num_ns_ext_tuples_cfg; 2581 __le32 bpf_instruction_size; 2582 __le32 max_bssid_rx_filters; 2583 __le32 use_pdev_id; 2584 __le32 max_num_dbs_scan_duty_cycle; 2585 __le32 max_num_group_keys; 2586 __le32 peer_map_unmap_version; 2587 __le32 sched_params; 2588 __le32 twt_ap_pdev_count; 2589 __le32 twt_ap_sta_count; 2590 __le32 max_nlo_ssids; 2591 __le32 num_pkt_filters; 2592 __le32 num_max_sta_vdevs; 2593 __le32 max_bssid_indicator; 2594 __le32 ul_resp_config; 2595 __le32 msdu_flow_override_config0; 2596 __le32 msdu_flow_override_config1; 2597 __le32 flags2; 2598 __le32 host_service_flags; 2599 __le32 max_rnr_neighbours; 2600 __le32 ema_max_vap_cnt; 2601 __le32 ema_max_profile_period; 2602 } __packed; 2603 2604 struct wmi_service_ready_event { 2605 __le32 fw_build_vers; 2606 struct ath12k_wmi_abi_version_params fw_abi_vers; 2607 __le32 phy_capability; 2608 __le32 max_frag_entry; 2609 __le32 num_rf_chains; 2610 __le32 ht_cap_info; 2611 __le32 vht_cap_info; 2612 __le32 vht_supp_mcs; 2613 __le32 hw_min_tx_power; 2614 __le32 hw_max_tx_power; 2615 __le32 sys_cap_info; 2616 __le32 min_pkt_size_enable; 2617 __le32 max_bcn_ie_size; 2618 __le32 num_mem_reqs; 2619 __le32 max_num_scan_channels; 2620 __le32 hw_bd_id; 2621 __le32 hw_bd_info[HW_BD_INFO_SIZE]; 2622 __le32 max_supported_macs; 2623 __le32 wmi_fw_sub_feat_caps; 2624 __le32 num_dbs_hw_modes; 2625 /* txrx_chainmask 2626 * [7:0] - 2G band tx chain mask 2627 * [15:8] - 2G band rx chain mask 2628 * [23:16] - 5G band tx chain mask 2629 * [31:24] - 5G band rx chain mask 2630 */ 2631 __le32 txrx_chainmask; 2632 __le32 default_dbs_hw_mode_index; 2633 __le32 num_msdu_desc; 2634 } __packed; 2635 2636 #define WMI_SERVICE_BM_SIZE ((WMI_MAX_SERVICE + sizeof(u32) - 1) / sizeof(u32)) 2637 2638 #define WMI_SERVICE_SEGMENT_BM_SIZE32 4 /* 4x u32 = 128 bits */ 2639 #define WMI_SERVICE_EXT_BM_SIZE (WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32)) 2640 #define WMI_AVAIL_SERVICE_BITS_IN_SIZE32 32 2641 #define WMI_SERVICE_BITS_IN_SIZE32 4 2642 2643 struct wmi_service_ready_ext_event { 2644 __le32 default_conc_scan_config_bits; 2645 __le32 default_fw_config_bits; 2646 struct ath12k_wmi_ppe_threshold_params ppet; 2647 __le32 he_cap_info; 2648 __le32 mpdu_density; 2649 __le32 max_bssid_rx_filters; 2650 __le32 fw_build_vers_ext; 2651 __le32 max_nlo_ssids; 2652 __le32 max_bssid_indicator; 2653 __le32 he_cap_info_ext; 2654 } __packed; 2655 2656 struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params { 2657 __le32 num_hw_modes; 2658 __le32 num_chainmask_tables; 2659 } __packed; 2660 2661 #define WMI_HW_MODE_CAP_CFG_TYPE GENMASK(27, 0) 2662 2663 struct ath12k_wmi_hw_mode_cap_params { 2664 __le32 tlv_header; 2665 __le32 hw_mode_id; 2666 __le32 phy_id_map; 2667 __le32 hw_mode_config_type; 2668 } __packed; 2669 2670 #define WMI_MAX_HECAP_PHY_SIZE (3) 2671 #define WMI_NSS_RATIO_EN_DIS_BITPOS BIT(0) 2672 #define WMI_NSS_RATIO_EN_DIS_GET(_val) \ 2673 le32_get_bits(_val, WMI_NSS_RATIO_EN_DIS_BITPOS) 2674 #define WMI_NSS_RATIO_INFO_BITPOS GENMASK(4, 1) 2675 #define WMI_NSS_RATIO_INFO_GET(_val) \ 2676 le32_get_bits(_val, WMI_NSS_RATIO_INFO_BITPOS) 2677 2678 /* pdev_id is present in lower 16 bits of pdev_and_hw_link_ids in 2679 * ath12k_wmi_mac_phy_caps_params & ath12k_wmi_caps_ext_params. 2680 * 2681 * hw_link_id is present in higher 16 bits of pdev_and_hw_link_ids. 2682 */ 2683 #define WMI_CAPS_PARAMS_PDEV_ID GENMASK(15, 0) 2684 #define WMI_CAPS_PARAMS_HW_LINK_ID GENMASK(31, 16) 2685 2686 struct ath12k_wmi_mac_phy_caps_params { 2687 __le32 hw_mode_id; 2688 __le32 pdev_and_hw_link_ids; 2689 __le32 phy_id; 2690 __le32 supported_flags; 2691 __le32 supported_bands; 2692 __le32 ampdu_density; 2693 __le32 max_bw_supported_2g; 2694 __le32 ht_cap_info_2g; 2695 __le32 vht_cap_info_2g; 2696 __le32 vht_supp_mcs_2g; 2697 __le32 he_cap_info_2g; 2698 __le32 he_supp_mcs_2g; 2699 __le32 tx_chain_mask_2g; 2700 __le32 rx_chain_mask_2g; 2701 __le32 max_bw_supported_5g; 2702 __le32 ht_cap_info_5g; 2703 __le32 vht_cap_info_5g; 2704 __le32 vht_supp_mcs_5g; 2705 __le32 he_cap_info_5g; 2706 __le32 he_supp_mcs_5g; 2707 __le32 tx_chain_mask_5g; 2708 __le32 rx_chain_mask_5g; 2709 __le32 he_cap_phy_info_2g[WMI_MAX_HECAP_PHY_SIZE]; 2710 __le32 he_cap_phy_info_5g[WMI_MAX_HECAP_PHY_SIZE]; 2711 struct ath12k_wmi_ppe_threshold_params he_ppet2g; 2712 struct ath12k_wmi_ppe_threshold_params he_ppet5g; 2713 __le32 chainmask_table_id; 2714 __le32 lmac_id; 2715 __le32 he_cap_info_2g_ext; 2716 __le32 he_cap_info_5g_ext; 2717 __le32 he_cap_info_internal; 2718 __le32 wireless_modes; 2719 __le32 low_2ghz_chan_freq; 2720 __le32 high_2ghz_chan_freq; 2721 __le32 low_5ghz_chan_freq; 2722 __le32 high_5ghz_chan_freq; 2723 __le32 nss_ratio; 2724 } __packed; 2725 2726 struct ath12k_wmi_hal_reg_caps_ext_params { 2727 __le32 tlv_header; 2728 __le32 phy_id; 2729 __le32 eeprom_reg_domain; 2730 __le32 eeprom_reg_domain_ext; 2731 __le32 regcap1; 2732 __le32 regcap2; 2733 __le32 wireless_modes; 2734 __le32 low_2ghz_chan; 2735 __le32 high_2ghz_chan; 2736 __le32 low_5ghz_chan; 2737 __le32 high_5ghz_chan; 2738 } __packed; 2739 2740 struct ath12k_wmi_soc_hal_reg_caps_params { 2741 __le32 num_phy; 2742 } __packed; 2743 2744 enum wmi_channel_width { 2745 WMI_CHAN_WIDTH_20 = 0, 2746 WMI_CHAN_WIDTH_40 = 1, 2747 WMI_CHAN_WIDTH_80 = 2, 2748 WMI_CHAN_WIDTH_160 = 3, 2749 WMI_CHAN_WIDTH_80P80 = 4, 2750 WMI_CHAN_WIDTH_5 = 5, 2751 WMI_CHAN_WIDTH_10 = 6, 2752 WMI_CHAN_WIDTH_165 = 7, 2753 WMI_CHAN_WIDTH_160P160 = 8, 2754 WMI_CHAN_WIDTH_320 = 9, 2755 }; 2756 2757 #define WMI_MAX_EHTCAP_MAC_SIZE 2 2758 #define WMI_MAX_EHTCAP_PHY_SIZE 3 2759 #define WMI_MAX_EHTCAP_RATE_SET 3 2760 2761 /* Used for EHT MCS-NSS array. Data at each array index follows the format given 2762 * in IEEE P802.11be/D2.0, May 20229.4.2.313.4. 2763 * 2764 * Index interpretation: 2765 * 0 - 20 MHz only sta, all 4 bytes valid 2766 * 1 - index for bandwidths <= 80 MHz except 20 MHz-only, first 3 bytes valid 2767 * 2 - index for 160 MHz, first 3 bytes valid 2768 * 3 - index for 320 MHz, first 3 bytes valid 2769 */ 2770 #define WMI_MAX_EHT_SUPP_MCS_2GHZ_SIZE 2 2771 #define WMI_MAX_EHT_SUPP_MCS_5GHZ_SIZE 4 2772 2773 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_80 0 2774 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_160 1 2775 #define WMI_EHTCAP_TXRX_MCS_NSS_IDX_320 2 2776 2777 #define WMI_EHT_MCS_NSS_0_7 GENMASK(3, 0) 2778 #define WMI_EHT_MCS_NSS_8_9 GENMASK(7, 4) 2779 #define WMI_EHT_MCS_NSS_10_11 GENMASK(11, 8) 2780 #define WMI_EHT_MCS_NSS_12_13 GENMASK(15, 12) 2781 2782 struct wmi_service_ready_ext2_event { 2783 __le32 reg_db_version; 2784 __le32 hw_min_max_tx_power_2ghz; 2785 __le32 hw_min_max_tx_power_5ghz; 2786 __le32 chwidth_num_peer_caps; 2787 __le32 preamble_puncture_bw; 2788 __le32 max_user_per_ppdu_ofdma; 2789 __le32 max_user_per_ppdu_mumimo; 2790 __le32 target_cap_flags; 2791 __le32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 2792 __le32 max_num_linkview_peers; 2793 __le32 max_num_msduq_supported_per_tid; 2794 __le32 default_num_msduq_supported_per_tid; 2795 } __packed; 2796 2797 struct ath12k_wmi_dbs_or_sbs_cap_params { 2798 __le32 hw_mode_id; 2799 __le32 sbs_lower_band_end_freq; 2800 } __packed; 2801 2802 struct ath12k_wmi_caps_ext_params { 2803 __le32 hw_mode_id; 2804 __le32 pdev_and_hw_link_ids; 2805 __le32 phy_id; 2806 __le32 wireless_modes_ext; 2807 __le32 eht_cap_mac_info_2ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2808 __le32 eht_cap_mac_info_5ghz[WMI_MAX_EHTCAP_MAC_SIZE]; 2809 __le32 rsvd0[2]; 2810 __le32 eht_cap_phy_info_2ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2811 __le32 eht_cap_phy_info_5ghz[WMI_MAX_EHTCAP_PHY_SIZE]; 2812 struct ath12k_wmi_ppe_threshold_params eht_ppet_2ghz; 2813 struct ath12k_wmi_ppe_threshold_params eht_ppet_5ghz; 2814 __le32 eht_cap_info_internal; 2815 __le32 eht_supp_mcs_ext_2ghz[WMI_MAX_EHT_SUPP_MCS_2GHZ_SIZE]; 2816 __le32 eht_supp_mcs_ext_5ghz[WMI_MAX_EHT_SUPP_MCS_5GHZ_SIZE]; 2817 __le32 eml_capability; 2818 __le32 mld_capability; 2819 } __packed; 2820 2821 /* 2 word representation of MAC addr */ 2822 struct ath12k_wmi_mac_addr_params { 2823 u8 addr[ETH_ALEN]; 2824 u8 padding[2]; 2825 } __packed; 2826 2827 struct ath12k_wmi_dma_ring_caps_params { 2828 __le32 tlv_header; 2829 __le32 pdev_id; 2830 __le32 module_id; 2831 __le32 min_elem; 2832 __le32 min_buf_sz; 2833 __le32 min_buf_align; 2834 } __packed; 2835 2836 struct ath12k_wmi_ready_event_min_params { 2837 struct ath12k_wmi_abi_version_params fw_abi_vers; 2838 struct ath12k_wmi_mac_addr_params mac_addr; 2839 __le32 status; 2840 __le32 num_dscp_table; 2841 __le32 num_extra_mac_addr; 2842 __le32 num_total_peers; 2843 __le32 num_extra_peers; 2844 } __packed; 2845 2846 struct wmi_ready_event { 2847 struct ath12k_wmi_ready_event_min_params ready_event_min; 2848 __le32 max_ast_index; 2849 __le32 pktlog_defs_checksum; 2850 } __packed; 2851 2852 struct wmi_service_available_event { 2853 __le32 wmi_service_segment_offset; 2854 __le32 wmi_service_segment_bitmap[WMI_SERVICE_SEGMENT_BM_SIZE32]; 2855 } __packed; 2856 2857 struct ath12k_wmi_vdev_create_arg { 2858 u8 if_id; 2859 u32 type; 2860 u32 subtype; 2861 struct { 2862 u8 tx; 2863 u8 rx; 2864 } chains[NUM_NL80211_BANDS]; 2865 u32 pdev_id; 2866 u8 if_stats_id; 2867 u32 mbssid_flags; 2868 u32 mbssid_tx_vdev_id; 2869 u8 mld_addr[ETH_ALEN]; 2870 }; 2871 2872 #define ATH12K_MAX_VDEV_STATS_ID 0x30 2873 #define ATH12K_INVAL_VDEV_STATS_ID 0xFF 2874 2875 struct wmi_vdev_create_cmd { 2876 __le32 tlv_header; 2877 __le32 vdev_id; 2878 __le32 vdev_type; 2879 __le32 vdev_subtype; 2880 struct ath12k_wmi_mac_addr_params vdev_macaddr; 2881 __le32 num_cfg_txrx_streams; 2882 __le32 pdev_id; 2883 __le32 mbssid_flags; 2884 __le32 mbssid_tx_vdev_id; 2885 __le32 vdev_stats_id_valid; 2886 __le32 vdev_stats_id; 2887 } __packed; 2888 2889 struct ath12k_wmi_vdev_txrx_streams_params { 2890 __le32 tlv_header; 2891 __le32 band; 2892 __le32 supported_tx_streams; 2893 __le32 supported_rx_streams; 2894 } __packed; 2895 2896 struct wmi_vdev_create_mlo_params { 2897 __le32 tlv_header; 2898 struct ath12k_wmi_mac_addr_params mld_macaddr; 2899 } __packed; 2900 2901 #define ATH12K_WMI_FLAG_MLO_ENABLED BIT(0) 2902 #define ATH12K_WMI_FLAG_MLO_ASSOC_LINK BIT(1) 2903 #define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC BIT(2) 2904 #define ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID BIT(3) 2905 #define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID BIT(4) 2906 #define ATH12K_WMI_FLAG_MLO_MCAST_VDEV BIT(5) 2907 #define ATH12K_WMI_FLAG_MLO_EMLSR_SUPPORT BIT(6) 2908 #define ATH12K_WMI_FLAG_MLO_FORCED_INACTIVE BIT(7) 2909 #define ATH12K_WMI_FLAG_MLO_LINK_ADD BIT(8) 2910 2911 struct wmi_vdev_start_mlo_params { 2912 __le32 tlv_header; 2913 __le32 flags; 2914 } __packed; 2915 2916 struct wmi_partner_link_info { 2917 __le32 tlv_header; 2918 __le32 vdev_id; 2919 __le32 hw_link_id; 2920 struct ath12k_wmi_mac_addr_params vdev_addr; 2921 } __packed; 2922 2923 struct wmi_vdev_delete_cmd { 2924 __le32 tlv_header; 2925 __le32 vdev_id; 2926 } __packed; 2927 2928 struct ath12k_wmi_vdev_up_params { 2929 u32 vdev_id; 2930 u32 aid; 2931 const u8 *bssid; 2932 const u8 *tx_bssid; 2933 u32 nontx_profile_idx; 2934 u32 nontx_profile_cnt; 2935 }; 2936 2937 struct wmi_vdev_up_cmd { 2938 __le32 tlv_header; 2939 __le32 vdev_id; 2940 __le32 vdev_assoc_id; 2941 struct ath12k_wmi_mac_addr_params vdev_bssid; 2942 struct ath12k_wmi_mac_addr_params tx_vdev_bssid; 2943 __le32 nontx_profile_idx; 2944 __le32 nontx_profile_cnt; 2945 } __packed; 2946 2947 struct wmi_vdev_stop_cmd { 2948 __le32 tlv_header; 2949 __le32 vdev_id; 2950 } __packed; 2951 2952 struct wmi_vdev_down_cmd { 2953 __le32 tlv_header; 2954 __le32 vdev_id; 2955 } __packed; 2956 2957 #define WMI_VDEV_START_HIDDEN_SSID BIT(0) 2958 #define WMI_VDEV_START_PMF_ENABLED BIT(1) 2959 #define WMI_VDEV_START_LDPC_RX_ENABLED BIT(3) 2960 2961 #define ATH12K_WMI_SSID_LEN 32 2962 2963 struct ath12k_wmi_ssid_params { 2964 __le32 ssid_len; 2965 u8 ssid[ATH12K_WMI_SSID_LEN]; 2966 } __packed; 2967 2968 #define ATH12K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 2969 2970 enum wmi_vdev_mbssid_flags { 2971 WMI_VDEV_MBSSID_FLAGS_NON_MBSSID_AP = BIT(0), 2972 WMI_VDEV_MBSSID_FLAGS_TRANSMIT_AP = BIT(1), 2973 WMI_VDEV_MBSSID_FLAGS_NON_TRANSMIT_AP = BIT(2), 2974 WMI_VDEV_MBSSID_FLAGS_EMA_MODE = BIT(3), 2975 WMI_VDEV_MBSSID_FLAGS_SCAN_MODE_VAP = BIT(4), 2976 }; 2977 2978 struct wmi_vdev_start_request_cmd { 2979 __le32 tlv_header; 2980 __le32 vdev_id; 2981 __le32 requestor_id; 2982 __le32 beacon_interval; 2983 __le32 dtim_period; 2984 __le32 flags; 2985 struct ath12k_wmi_ssid_params ssid; 2986 __le32 bcn_tx_rate; 2987 __le32 bcn_txpower; 2988 __le32 num_noa_descriptors; 2989 __le32 disable_hw_ack; 2990 __le32 preferred_tx_streams; 2991 __le32 preferred_rx_streams; 2992 __le32 he_ops; 2993 __le32 cac_duration_ms; 2994 __le32 regdomain; 2995 __le32 min_data_rate; 2996 __le32 mbssid_flags; /* uses enum wmi_vdev_mbssid_flags */ 2997 __le32 mbssid_tx_vdev_id; 2998 __le32 eht_ops; 2999 __le32 punct_bitmap; 3000 } __packed; 3001 3002 #define MGMT_TX_DL_FRM_LEN 64 3003 3004 struct ath12k_wmi_channel_arg { 3005 u8 chan_id; 3006 u8 pwr; 3007 u32 mhz; 3008 u32 half_rate:1, 3009 quarter_rate:1, 3010 dfs_set:1, 3011 dfs_set_cfreq2:1, 3012 is_chan_passive:1, 3013 allow_ht:1, 3014 allow_vht:1, 3015 allow_he:1, 3016 set_agile:1, 3017 psc_channel:1; 3018 u32 phy_mode; 3019 u32 cfreq1; 3020 u32 cfreq2; 3021 char maxpower; 3022 char minpower; 3023 char maxregpower; 3024 u8 antennamax; 3025 u8 reg_class_id; 3026 }; 3027 3028 enum wmi_phy_mode { 3029 MODE_11A = 0, 3030 MODE_11G = 1, /* 11b/g Mode */ 3031 MODE_11B = 2, /* 11b Mode */ 3032 MODE_11GONLY = 3, /* 11g only Mode */ 3033 MODE_11NA_HT20 = 4, 3034 MODE_11NG_HT20 = 5, 3035 MODE_11NA_HT40 = 6, 3036 MODE_11NG_HT40 = 7, 3037 MODE_11AC_VHT20 = 8, 3038 MODE_11AC_VHT40 = 9, 3039 MODE_11AC_VHT80 = 10, 3040 MODE_11AC_VHT20_2G = 11, 3041 MODE_11AC_VHT40_2G = 12, 3042 MODE_11AC_VHT80_2G = 13, 3043 MODE_11AC_VHT80_80 = 14, 3044 MODE_11AC_VHT160 = 15, 3045 MODE_11AX_HE20 = 16, 3046 MODE_11AX_HE40 = 17, 3047 MODE_11AX_HE80 = 18, 3048 MODE_11AX_HE80_80 = 19, 3049 MODE_11AX_HE160 = 20, 3050 MODE_11AX_HE20_2G = 21, 3051 MODE_11AX_HE40_2G = 22, 3052 MODE_11AX_HE80_2G = 23, 3053 MODE_11BE_EHT20 = 24, 3054 MODE_11BE_EHT40 = 25, 3055 MODE_11BE_EHT80 = 26, 3056 MODE_11BE_EHT80_80 = 27, 3057 MODE_11BE_EHT160 = 28, 3058 MODE_11BE_EHT160_160 = 29, 3059 MODE_11BE_EHT320 = 30, 3060 MODE_11BE_EHT20_2G = 31, 3061 MODE_11BE_EHT40_2G = 32, 3062 MODE_UNKNOWN = 33, 3063 MODE_MAX = 33, 3064 }; 3065 3066 #define ATH12K_WMI_MLO_MAX_LINKS 4 3067 3068 struct wmi_ml_partner_info { 3069 u32 vdev_id; 3070 u32 hw_link_id; 3071 u8 addr[ETH_ALEN]; 3072 bool assoc_link; 3073 bool primary_umac; 3074 bool logical_link_idx_valid; 3075 u32 logical_link_idx; 3076 }; 3077 3078 struct wmi_ml_arg { 3079 bool enabled; 3080 bool assoc_link; 3081 bool mcast_link; 3082 bool link_add; 3083 u8 num_partner_links; 3084 struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS]; 3085 }; 3086 3087 struct wmi_vdev_start_req_arg { 3088 u32 vdev_id; 3089 u32 freq; 3090 u32 band_center_freq1; 3091 u32 band_center_freq2; 3092 bool passive; 3093 bool allow_ibss; 3094 bool allow_ht; 3095 bool allow_vht; 3096 bool ht40plus; 3097 bool chan_radar; 3098 bool freq2_radar; 3099 bool allow_he; 3100 u32 min_power; 3101 u32 max_power; 3102 u32 max_reg_power; 3103 u32 max_antenna_gain; 3104 enum wmi_phy_mode mode; 3105 u32 bcn_intval; 3106 u32 dtim_period; 3107 u8 *ssid; 3108 u32 ssid_len; 3109 u32 bcn_tx_rate; 3110 u32 bcn_tx_power; 3111 bool disable_hw_ack; 3112 bool hidden_ssid; 3113 bool pmf_enabled; 3114 u32 he_ops; 3115 u32 cac_duration_ms; 3116 u32 regdomain; 3117 u32 pref_rx_streams; 3118 u32 pref_tx_streams; 3119 u32 num_noa_descriptors; 3120 u32 min_data_rate; 3121 u32 mbssid_flags; 3122 u32 mbssid_tx_vdev_id; 3123 u32 punct_bitmap; 3124 struct wmi_ml_arg ml; 3125 }; 3126 3127 struct ath12k_wmi_peer_create_arg { 3128 const u8 *peer_addr; 3129 u32 peer_type; 3130 u32 vdev_id; 3131 bool ml_enabled; 3132 }; 3133 3134 struct wmi_peer_create_mlo_params { 3135 __le32 tlv_header; 3136 __le32 flags; 3137 }; 3138 3139 struct ath12k_wmi_pdev_set_regdomain_arg { 3140 u16 current_rd_in_use; 3141 u16 current_rd_2g; 3142 u16 current_rd_5g; 3143 u32 ctl_2g; 3144 u32 ctl_5g; 3145 u8 dfs_domain; 3146 u32 pdev_id; 3147 }; 3148 3149 struct ath12k_wmi_rx_reorder_queue_remove_arg { 3150 u8 *peer_macaddr; 3151 u16 vdev_id; 3152 u32 peer_tid_bitmap; 3153 }; 3154 3155 #define WMI_HOST_PDEV_ID_SOC 0xFF 3156 #define WMI_HOST_PDEV_ID_0 0 3157 #define WMI_HOST_PDEV_ID_1 1 3158 #define WMI_HOST_PDEV_ID_2 2 3159 3160 #define WMI_PDEV_ID_SOC 0 3161 #define WMI_PDEV_ID_1ST 1 3162 #define WMI_PDEV_ID_2ND 2 3163 #define WMI_PDEV_ID_3RD 3 3164 3165 /* Freq units in MHz */ 3166 #define REG_RULE_START_FREQ 0x0000ffff 3167 #define REG_RULE_END_FREQ 0xffff0000 3168 #define REG_RULE_FLAGS 0x0000ffff 3169 #define REG_RULE_MAX_BW 0x0000ffff 3170 #define REG_RULE_REG_PWR 0x00ff0000 3171 #define REG_RULE_ANT_GAIN 0xff000000 3172 #define REG_RULE_PSD_INFO BIT(2) 3173 #define REG_RULE_PSD_EIRP 0xffff0000 3174 3175 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFEE BIT(0) 3176 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFEE BIT(1) 3177 #define WMI_VDEV_PARAM_TXBF_SU_TX_BFER BIT(2) 3178 #define WMI_VDEV_PARAM_TXBF_MU_TX_BFER BIT(3) 3179 3180 #define HE_MODE_SU_TX_BFEE BIT(0) 3181 #define HE_MODE_SU_TX_BFER BIT(1) 3182 #define HE_MODE_MU_TX_BFEE BIT(2) 3183 #define HE_MODE_MU_TX_BFER BIT(3) 3184 #define HE_MODE_DL_OFDMA BIT(4) 3185 #define HE_MODE_UL_OFDMA BIT(5) 3186 #define HE_MODE_UL_MUMIMO BIT(6) 3187 3188 #define HE_DL_MUOFDMA_ENABLE 1 3189 #define HE_UL_MUOFDMA_ENABLE 1 3190 #define HE_DL_MUMIMO_ENABLE 1 3191 #define HE_UL_MUMIMO_ENABLE 1 3192 #define HE_MU_BFEE_ENABLE 1 3193 #define HE_SU_BFEE_ENABLE 1 3194 #define HE_MU_BFER_ENABLE 1 3195 #define HE_SU_BFER_ENABLE 1 3196 3197 #define EHT_MODE_SU_TX_BFEE BIT(0) 3198 #define EHT_MODE_SU_TX_BFER BIT(1) 3199 #define EHT_MODE_MU_TX_BFEE BIT(2) 3200 #define EHT_MODE_MU_TX_BFER BIT(3) 3201 #define EHT_MODE_DL_OFDMA BIT(4) 3202 #define EHT_MODE_UL_OFDMA BIT(5) 3203 #define EHT_MODE_MUMIMO BIT(6) 3204 #define EHT_MODE_DL_OFDMA_TXBF BIT(7) 3205 #define EHT_MODE_DL_OFDMA_MUMIMO BIT(8) 3206 #define EHT_MODE_UL_OFDMA_MUMIMO BIT(9) 3207 3208 #define EHT_DL_MUOFDMA_ENABLE 1 3209 #define EHT_UL_MUOFDMA_ENABLE 1 3210 #define EHT_DL_MUMIMO_ENABLE 1 3211 #define EHT_UL_MUMIMO_ENABLE 1 3212 #define EHT_MU_BFEE_ENABLE 1 3213 #define EHT_SU_BFEE_ENABLE 1 3214 #define EHT_MU_BFER_ENABLE 1 3215 #define EHT_SU_BFER_ENABLE 1 3216 3217 #define HE_VHT_SOUNDING_MODE_ENABLE 1 3218 #define HE_SU_MU_SOUNDING_MODE_ENABLE 1 3219 #define HE_TRIG_NONTRIG_SOUNDING_MODE_ENABLE 1 3220 3221 /* HE or VHT Sounding */ 3222 #define HE_VHT_SOUNDING_MODE BIT(0) 3223 /* SU or MU Sounding */ 3224 #define HE_SU_MU_SOUNDING_MODE BIT(2) 3225 /* Trig or Non-Trig Sounding */ 3226 #define HE_TRIG_NONTRIG_SOUNDING_MODE BIT(3) 3227 3228 #define WMI_TXBF_STS_CAP_OFFSET_LSB 4 3229 #define WMI_TXBF_STS_CAP_OFFSET_MASK 0x70 3230 #define WMI_BF_SOUND_DIM_OFFSET_LSB 8 3231 #define WMI_BF_SOUND_DIM_OFFSET_MASK 0x700 3232 3233 enum wmi_peer_type { 3234 WMI_PEER_TYPE_DEFAULT = 0, 3235 WMI_PEER_TYPE_BSS = 1, 3236 WMI_PEER_TYPE_TDLS = 2, 3237 }; 3238 3239 struct wmi_peer_create_cmd { 3240 __le32 tlv_header; 3241 __le32 vdev_id; 3242 struct ath12k_wmi_mac_addr_params peer_macaddr; 3243 __le32 peer_type; 3244 } __packed; 3245 3246 struct wmi_peer_delete_cmd { 3247 __le32 tlv_header; 3248 __le32 vdev_id; 3249 struct ath12k_wmi_mac_addr_params peer_macaddr; 3250 } __packed; 3251 3252 struct wmi_peer_reorder_queue_setup_cmd { 3253 __le32 tlv_header; 3254 __le32 vdev_id; 3255 struct ath12k_wmi_mac_addr_params peer_macaddr; 3256 __le32 tid; 3257 __le32 queue_ptr_lo; 3258 __le32 queue_ptr_hi; 3259 __le32 queue_no; 3260 __le32 ba_window_size_valid; 3261 __le32 ba_window_size; 3262 } __packed; 3263 3264 struct wmi_peer_reorder_queue_remove_cmd { 3265 __le32 tlv_header; 3266 __le32 vdev_id; 3267 struct ath12k_wmi_mac_addr_params peer_macaddr; 3268 __le32 tid_mask; 3269 } __packed; 3270 3271 enum wmi_bss_chan_info_req_type { 3272 WMI_BSS_SURVEY_REQ_TYPE_READ = 1, 3273 WMI_BSS_SURVEY_REQ_TYPE_READ_CLEAR, 3274 }; 3275 3276 struct wmi_pdev_set_param_cmd { 3277 __le32 tlv_header; 3278 __le32 pdev_id; 3279 __le32 param_id; 3280 __le32 param_value; 3281 } __packed; 3282 3283 struct wmi_pdev_set_ps_mode_cmd { 3284 __le32 tlv_header; 3285 __le32 vdev_id; 3286 __le32 sta_ps_mode; 3287 } __packed; 3288 3289 struct wmi_pdev_suspend_cmd { 3290 __le32 tlv_header; 3291 __le32 pdev_id; 3292 __le32 suspend_opt; 3293 } __packed; 3294 3295 struct wmi_pdev_resume_cmd { 3296 __le32 tlv_header; 3297 __le32 pdev_id; 3298 } __packed; 3299 3300 struct wmi_pdev_bss_chan_info_req_cmd { 3301 __le32 tlv_header; 3302 /* ref wmi_bss_chan_info_req_type */ 3303 __le32 req_type; 3304 __le32 pdev_id; 3305 } __packed; 3306 3307 struct wmi_ap_ps_peer_cmd { 3308 __le32 tlv_header; 3309 __le32 vdev_id; 3310 struct ath12k_wmi_mac_addr_params peer_macaddr; 3311 __le32 param; 3312 __le32 value; 3313 } __packed; 3314 3315 struct wmi_sta_powersave_param_cmd { 3316 __le32 tlv_header; 3317 __le32 vdev_id; 3318 __le32 param; 3319 __le32 value; 3320 } __packed; 3321 3322 struct wmi_pdev_set_regdomain_cmd { 3323 __le32 tlv_header; 3324 __le32 pdev_id; 3325 __le32 reg_domain; 3326 __le32 reg_domain_2g; 3327 __le32 reg_domain_5g; 3328 __le32 conformance_test_limit_2g; 3329 __le32 conformance_test_limit_5g; 3330 __le32 dfs_domain; 3331 } __packed; 3332 3333 struct wmi_peer_set_param_cmd { 3334 __le32 tlv_header; 3335 __le32 vdev_id; 3336 struct ath12k_wmi_mac_addr_params peer_macaddr; 3337 __le32 param_id; 3338 __le32 param_value; 3339 } __packed; 3340 3341 struct wmi_peer_flush_tids_cmd { 3342 __le32 tlv_header; 3343 __le32 vdev_id; 3344 struct ath12k_wmi_mac_addr_params peer_macaddr; 3345 __le32 peer_tid_bitmap; 3346 } __packed; 3347 3348 struct wmi_dfs_phyerr_offload_cmd { 3349 __le32 tlv_header; 3350 __le32 pdev_id; 3351 } __packed; 3352 3353 struct wmi_bcn_offload_ctrl_cmd { 3354 __le32 tlv_header; 3355 __le32 vdev_id; 3356 __le32 bcn_ctrl_op; 3357 } __packed; 3358 3359 enum scan_dwelltime_adaptive_mode { 3360 SCAN_DWELL_MODE_DEFAULT = 0, 3361 SCAN_DWELL_MODE_CONSERVATIVE = 1, 3362 SCAN_DWELL_MODE_MODERATE = 2, 3363 SCAN_DWELL_MODE_AGGRESSIVE = 3, 3364 SCAN_DWELL_MODE_STATIC = 4 3365 }; 3366 3367 #define WLAN_SCAN_MAX_NUM_SSID 10 3368 #define WLAN_SCAN_MAX_NUM_BSSID 10 3369 3370 struct ath12k_wmi_element_info_arg { 3371 u32 len; 3372 u8 *ptr; 3373 }; 3374 3375 #define WMI_IE_BITMAP_SIZE 8 3376 3377 #define WMI_SCAN_MAX_NUM_SSID 0x0A 3378 /* prefix used by scan requestor ids on the host */ 3379 #define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000 3380 3381 /* prefix used by scan request ids generated on the host */ 3382 /* host cycles through the lower 12 bits to generate ids */ 3383 #define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000 3384 3385 #define WLAN_SCAN_PARAMS_MAX_SSID 16 3386 #define WLAN_SCAN_PARAMS_MAX_BSSID 4 3387 #define WLAN_SCAN_PARAMS_MAX_IE_LEN 512 3388 3389 /* Values lower than this may be refused by some firmware revisions with a scan 3390 * completion with a timedout reason. 3391 */ 3392 #define WMI_SCAN_CHAN_MIN_TIME_MSEC 40 3393 3394 /* Scan priority numbers must be sequential, starting with 0 */ 3395 enum wmi_scan_priority { 3396 WMI_SCAN_PRIORITY_VERY_LOW = 0, 3397 WMI_SCAN_PRIORITY_LOW, 3398 WMI_SCAN_PRIORITY_MEDIUM, 3399 WMI_SCAN_PRIORITY_HIGH, 3400 WMI_SCAN_PRIORITY_VERY_HIGH, 3401 WMI_SCAN_PRIORITY_COUNT /* number of priorities supported */ 3402 }; 3403 3404 enum wmi_scan_event_type { 3405 WMI_SCAN_EVENT_STARTED = BIT(0), 3406 WMI_SCAN_EVENT_COMPLETED = BIT(1), 3407 WMI_SCAN_EVENT_BSS_CHANNEL = BIT(2), 3408 WMI_SCAN_EVENT_FOREIGN_CHAN = BIT(3), 3409 WMI_SCAN_EVENT_DEQUEUED = BIT(4), 3410 /* possibly by high-prio scan */ 3411 WMI_SCAN_EVENT_PREEMPTED = BIT(5), 3412 WMI_SCAN_EVENT_START_FAILED = BIT(6), 3413 WMI_SCAN_EVENT_RESTARTED = BIT(7), 3414 WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT = BIT(8), 3415 WMI_SCAN_EVENT_SUSPENDED = BIT(9), 3416 WMI_SCAN_EVENT_RESUMED = BIT(10), 3417 WMI_SCAN_EVENT_MAX = BIT(15), 3418 }; 3419 3420 enum wmi_scan_completion_reason { 3421 WMI_SCAN_REASON_COMPLETED, 3422 WMI_SCAN_REASON_CANCELLED, 3423 WMI_SCAN_REASON_PREEMPTED, 3424 WMI_SCAN_REASON_TIMEDOUT, 3425 WMI_SCAN_REASON_INTERNAL_FAILURE, 3426 WMI_SCAN_REASON_MAX, 3427 }; 3428 3429 struct wmi_start_scan_cmd { 3430 __le32 tlv_header; 3431 __le32 scan_id; 3432 __le32 scan_req_id; 3433 __le32 vdev_id; 3434 __le32 scan_priority; 3435 __le32 notify_scan_events; 3436 __le32 dwell_time_active; 3437 __le32 dwell_time_passive; 3438 __le32 min_rest_time; 3439 __le32 max_rest_time; 3440 __le32 repeat_probe_time; 3441 __le32 probe_spacing_time; 3442 __le32 idle_time; 3443 __le32 max_scan_time; 3444 __le32 probe_delay; 3445 __le32 scan_ctrl_flags; 3446 __le32 burst_duration; 3447 __le32 num_chan; 3448 __le32 num_bssid; 3449 __le32 num_ssids; 3450 __le32 ie_len; 3451 __le32 n_probes; 3452 struct ath12k_wmi_mac_addr_params mac_addr; 3453 struct ath12k_wmi_mac_addr_params mac_mask; 3454 u32 ie_bitmap[WMI_IE_BITMAP_SIZE]; 3455 __le32 num_vendor_oui; 3456 __le32 scan_ctrl_flags_ext; 3457 __le32 dwell_time_active_2g; 3458 __le32 dwell_time_active_6g; 3459 __le32 dwell_time_passive_6g; 3460 __le32 scan_start_offset; 3461 } __packed; 3462 3463 #define WMI_SCAN_FLAG_PASSIVE 0x1 3464 #define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2 3465 #define WMI_SCAN_ADD_CCK_RATES 0x4 3466 #define WMI_SCAN_ADD_OFDM_RATES 0x8 3467 #define WMI_SCAN_CHAN_STAT_EVENT 0x10 3468 #define WMI_SCAN_FILTER_PROBE_REQ 0x20 3469 #define WMI_SCAN_BYPASS_DFS_CHN 0x40 3470 #define WMI_SCAN_CONTINUE_ON_ERROR 0x80 3471 #define WMI_SCAN_FILTER_PROMISCUOS 0x100 3472 #define WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS 0x200 3473 #define WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ 0x400 3474 #define WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ 0x800 3475 #define WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ 0x1000 3476 #define WMI_SCAN_OFFCHAN_MGMT_TX 0x2000 3477 #define WMI_SCAN_OFFCHAN_DATA_TX 0x4000 3478 #define WMI_SCAN_CAPTURE_PHY_ERROR 0x8000 3479 #define WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN 0x10000 3480 #define WMI_SCAN_FLAG_HALF_RATE_SUPPORT 0x20000 3481 #define WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT 0x40000 3482 #define WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ 0x80000 3483 #define WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ 0x100000 3484 3485 #define WMI_SCAN_DWELL_MODE_MASK GENMASK(23, 21) 3486 3487 enum { 3488 WMI_SCAN_DWELL_MODE_DEFAULT = 0, 3489 WMI_SCAN_DWELL_MODE_CONSERVATIVE = 1, 3490 WMI_SCAN_DWELL_MODE_MODERATE = 2, 3491 WMI_SCAN_DWELL_MODE_AGGRESSIVE = 3, 3492 WMI_SCAN_DWELL_MODE_STATIC = 4, 3493 }; 3494 3495 struct ath12k_wmi_hint_short_ssid_arg { 3496 u32 freq_flags; 3497 u32 short_ssid; 3498 }; 3499 3500 struct ath12k_wmi_hint_bssid_arg { 3501 u32 freq_flags; 3502 struct ath12k_wmi_mac_addr_params bssid; 3503 }; 3504 3505 struct ath12k_wmi_scan_req_arg { 3506 u32 scan_id; 3507 u32 scan_req_id; 3508 u32 vdev_id; 3509 u32 pdev_id; 3510 enum wmi_scan_priority scan_priority; 3511 u32 scan_ev_started:1, 3512 scan_ev_completed:1, 3513 scan_ev_bss_chan:1, 3514 scan_ev_foreign_chan:1, 3515 scan_ev_dequeued:1, 3516 scan_ev_preempted:1, 3517 scan_ev_start_failed:1, 3518 scan_ev_restarted:1, 3519 scan_ev_foreign_chn_exit:1, 3520 scan_ev_invalid:1, 3521 scan_ev_gpio_timeout:1, 3522 scan_ev_suspended:1, 3523 scan_ev_resumed:1; 3524 u32 dwell_time_active; 3525 u32 dwell_time_active_2g; 3526 u32 dwell_time_passive; 3527 u32 dwell_time_active_6g; 3528 u32 dwell_time_passive_6g; 3529 u32 min_rest_time; 3530 u32 max_rest_time; 3531 u32 repeat_probe_time; 3532 u32 probe_spacing_time; 3533 u32 idle_time; 3534 u32 max_scan_time; 3535 u32 probe_delay; 3536 u32 scan_f_passive:1, 3537 scan_f_bcast_probe:1, 3538 scan_f_cck_rates:1, 3539 scan_f_ofdm_rates:1, 3540 scan_f_chan_stat_evnt:1, 3541 scan_f_filter_prb_req:1, 3542 scan_f_bypass_dfs_chn:1, 3543 scan_f_continue_on_err:1, 3544 scan_f_offchan_mgmt_tx:1, 3545 scan_f_offchan_data_tx:1, 3546 scan_f_promisc_mode:1, 3547 scan_f_capture_phy_err:1, 3548 scan_f_strict_passive_pch:1, 3549 scan_f_half_rate:1, 3550 scan_f_quarter_rate:1, 3551 scan_f_force_active_dfs_chn:1, 3552 scan_f_add_tpc_ie_in_probe:1, 3553 scan_f_add_ds_ie_in_probe:1, 3554 scan_f_add_spoofed_mac_in_probe:1, 3555 scan_f_add_rand_seq_in_probe:1, 3556 scan_f_en_ie_whitelist_in_probe:1, 3557 scan_f_forced:1, 3558 scan_f_2ghz:1, 3559 scan_f_5ghz:1, 3560 scan_f_80mhz:1; 3561 enum scan_dwelltime_adaptive_mode adaptive_dwell_time_mode; 3562 u32 burst_duration; 3563 u32 num_chan; 3564 u32 num_bssid; 3565 u32 num_ssids; 3566 u32 n_probes; 3567 u32 *chan_list; 3568 u32 notify_scan_events; 3569 struct cfg80211_ssid ssid[WLAN_SCAN_MAX_NUM_SSID]; 3570 struct ath12k_wmi_mac_addr_params bssid_list[WLAN_SCAN_MAX_NUM_BSSID]; 3571 struct ath12k_wmi_element_info_arg extraie; 3572 u32 num_hint_s_ssid; 3573 u32 num_hint_bssid; 3574 struct ath12k_wmi_hint_short_ssid_arg hint_s_ssid[WLAN_SCAN_MAX_HINT_S_SSID]; 3575 struct ath12k_wmi_hint_bssid_arg hint_bssid[WLAN_SCAN_MAX_HINT_BSSID]; 3576 }; 3577 3578 struct wmi_ssid_arg { 3579 int len; 3580 const u8 *ssid; 3581 }; 3582 3583 struct wmi_bssid_arg { 3584 const u8 *bssid; 3585 }; 3586 3587 #define WMI_SCAN_STOP_ONE 0x00000000 3588 #define WMI_SCAN_STOP_VAP_ALL 0x01000000 3589 #define WMI_SCAN_STOP_ALL 0x04000000 3590 3591 /* Prefix 0xA000 indicates that the scan request 3592 * is trigger by HOST 3593 */ 3594 #define ATH12K_SCAN_ID 0xA000 3595 3596 enum scan_cancel_req_type { 3597 WLAN_SCAN_CANCEL_SINGLE = 1, 3598 WLAN_SCAN_CANCEL_VDEV_ALL, 3599 WLAN_SCAN_CANCEL_PDEV_ALL, 3600 }; 3601 3602 struct ath12k_wmi_scan_cancel_arg { 3603 u32 requester; 3604 u32 scan_id; 3605 enum scan_cancel_req_type req_type; 3606 u32 vdev_id; 3607 u32 pdev_id; 3608 }; 3609 3610 struct wmi_bcn_send_from_host_cmd { 3611 __le32 tlv_header; 3612 __le32 vdev_id; 3613 __le32 data_len; 3614 union { 3615 __le32 frag_ptr; 3616 __le32 frag_ptr_lo; 3617 }; 3618 __le32 frame_ctrl; 3619 __le32 dtim_flag; 3620 __le32 bcn_antenna; 3621 __le32 frag_ptr_hi; 3622 }; 3623 3624 #define WMI_CHAN_INFO_MODE GENMASK(5, 0) 3625 #define WMI_CHAN_INFO_HT40_PLUS BIT(6) 3626 #define WMI_CHAN_INFO_PASSIVE BIT(7) 3627 #define WMI_CHAN_INFO_ADHOC_ALLOWED BIT(8) 3628 #define WMI_CHAN_INFO_AP_DISABLED BIT(9) 3629 #define WMI_CHAN_INFO_DFS BIT(10) 3630 #define WMI_CHAN_INFO_ALLOW_HT BIT(11) 3631 #define WMI_CHAN_INFO_ALLOW_VHT BIT(12) 3632 #define WMI_CHAN_INFO_CHAN_CHANGE_CAUSE_CSA BIT(13) 3633 #define WMI_CHAN_INFO_HALF_RATE BIT(14) 3634 #define WMI_CHAN_INFO_QUARTER_RATE BIT(15) 3635 #define WMI_CHAN_INFO_DFS_FREQ2 BIT(16) 3636 #define WMI_CHAN_INFO_ALLOW_HE BIT(17) 3637 #define WMI_CHAN_INFO_PSC BIT(18) 3638 3639 #define WMI_CHAN_REG_INFO1_MIN_PWR GENMASK(7, 0) 3640 #define WMI_CHAN_REG_INFO1_MAX_PWR GENMASK(15, 8) 3641 #define WMI_CHAN_REG_INFO1_MAX_REG_PWR GENMASK(23, 16) 3642 #define WMI_CHAN_REG_INFO1_REG_CLS GENMASK(31, 24) 3643 3644 #define WMI_CHAN_REG_INFO2_ANT_MAX GENMASK(7, 0) 3645 #define WMI_CHAN_REG_INFO2_MAX_TX_PWR GENMASK(15, 8) 3646 3647 struct ath12k_wmi_channel_params { 3648 __le32 tlv_header; 3649 __le32 mhz; 3650 __le32 band_center_freq1; 3651 __le32 band_center_freq2; 3652 __le32 info; 3653 __le32 reg_info_1; 3654 __le32 reg_info_2; 3655 } __packed; 3656 3657 enum wmi_sta_ps_mode { 3658 WMI_STA_PS_MODE_DISABLED = 0, 3659 WMI_STA_PS_MODE_ENABLED = 1, 3660 }; 3661 3662 #define WMI_SMPS_MASK_LOWER_16BITS 0xFF 3663 #define WMI_SMPS_MASK_UPPER_3BITS 0x7 3664 #define WMI_SMPS_PARAM_VALUE_SHIFT 29 3665 3666 #define ATH12K_WMI_FW_HANG_ASSERT_TYPE 1 3667 #define ATH12K_WMI_FW_HANG_DELAY 0 3668 3669 /* type, 0:unused 1: ASSERT 2: not respond detect command 3670 * delay_time_ms, the simulate will delay time 3671 */ 3672 3673 struct wmi_force_fw_hang_cmd { 3674 __le32 tlv_header; 3675 __le32 type; 3676 __le32 delay_time_ms; 3677 } __packed; 3678 3679 /* Param values to be sent for WMI_VDEV_PARAM_SGI param_id 3680 * which are used in 11n, 11ac systems 3681 * @WMI_GI_800_NS - Always uses 0.8us (Long GI) 3682 * @WMI_GI_400_NS - Firmware switches between 0.4us (Short GI) 3683 * and 0.8us (Long GI) based on packet error rate. 3684 */ 3685 #define WMI_GI_800_NS 0 3686 #define WMI_GI_400_NS 1 3687 3688 struct wmi_vdev_set_param_cmd { 3689 __le32 tlv_header; 3690 __le32 vdev_id; 3691 __le32 param_id; 3692 __le32 param_value; 3693 } __packed; 3694 3695 struct wmi_get_pdev_temperature_cmd { 3696 __le32 tlv_header; 3697 __le32 param; 3698 __le32 pdev_id; 3699 } __packed; 3700 3701 #define WMI_P2P_MAX_NOA_DESCRIPTORS 4 3702 3703 struct wmi_p2p_noa_event { 3704 __le32 vdev_id; 3705 } __packed; 3706 3707 struct ath12k_wmi_p2p_noa_descriptor { 3708 __le32 type_count; /* 255: continuous schedule, 0: reserved */ 3709 __le32 duration; /* Absent period duration in micro seconds */ 3710 __le32 interval; /* Absent period interval in micro seconds */ 3711 __le32 start_time; /* 32 bit tsf time when in starts */ 3712 } __packed; 3713 3714 #define WMI_P2P_NOA_INFO_CHANGED_FLAG BIT(0) 3715 #define WMI_P2P_NOA_INFO_INDEX GENMASK(15, 8) 3716 #define WMI_P2P_NOA_INFO_OPP_PS BIT(16) 3717 #define WMI_P2P_NOA_INFO_CTWIN_TU GENMASK(23, 17) 3718 #define WMI_P2P_NOA_INFO_DESC_NUM GENMASK(31, 24) 3719 3720 struct ath12k_wmi_p2p_noa_info { 3721 /* Bit 0 - Flag to indicate an update in NOA schedule 3722 * Bits 7-1 - Reserved 3723 * Bits 15-8 - Index (identifies the instance of NOA sub element) 3724 * Bit 16 - Opp PS state of the AP 3725 * Bits 23-17 - Ctwindow in TUs 3726 * Bits 31-24 - Number of NOA descriptors 3727 */ 3728 __le32 noa_attr; 3729 struct ath12k_wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS]; 3730 } __packed; 3731 3732 #define MAX_WMI_UTF_LEN 252 3733 3734 struct ath12k_wmi_ftm_seg_hdr_params { 3735 __le32 len; 3736 __le32 msgref; 3737 __le32 segmentinfo; 3738 __le32 pdev_id; 3739 } __packed; 3740 3741 struct ath12k_wmi_ftm_cmd { 3742 __le32 tlv_header; 3743 struct ath12k_wmi_ftm_seg_hdr_params seg_hdr; 3744 u8 data[]; 3745 } __packed; 3746 3747 struct ath12k_wmi_ftm_event { 3748 struct ath12k_wmi_ftm_seg_hdr_params seg_hdr; 3749 u8 data[]; 3750 } __packed; 3751 3752 #define WMI_BEACON_TX_BUFFER_SIZE 512 3753 3754 #define WMI_EMA_BEACON_CNT GENMASK(7, 0) 3755 #define WMI_EMA_BEACON_IDX GENMASK(15, 8) 3756 #define WMI_EMA_BEACON_FIRST GENMASK(23, 16) 3757 #define WMI_EMA_BEACON_LAST GENMASK(31, 24) 3758 3759 #define WMI_BEACON_PROTECTION_EN_BIT BIT(0) 3760 3761 struct ath12k_wmi_bcn_tmpl_ema_arg { 3762 u8 bcn_cnt; 3763 u8 bcn_index; 3764 }; 3765 3766 struct wmi_bcn_tmpl_cmd { 3767 __le32 tlv_header; 3768 __le32 vdev_id; 3769 __le32 tim_ie_offset; 3770 __le32 buf_len; 3771 __le32 csa_switch_count_offset; 3772 __le32 ext_csa_switch_count_offset; 3773 __le32 csa_event_bitmap; 3774 __le32 mbssid_ie_offset; 3775 __le32 esp_ie_offset; 3776 __le32 csc_switch_count_offset; 3777 __le32 csc_event_bitmap; 3778 __le32 mu_edca_ie_offset; 3779 __le32 feature_enable_bitmap; 3780 __le32 ema_params; 3781 } __packed; 3782 3783 struct wmi_p2p_go_set_beacon_ie_cmd { 3784 __le32 tlv_header; 3785 __le32 vdev_id; 3786 __le32 ie_buf_len; 3787 } __packed; 3788 3789 struct wmi_vdev_install_key_cmd { 3790 __le32 tlv_header; 3791 __le32 vdev_id; 3792 struct ath12k_wmi_mac_addr_params peer_macaddr; 3793 __le32 key_idx; 3794 __le32 key_flags; 3795 __le32 key_cipher; 3796 __le64 key_rsc_counter; 3797 __le64 key_global_rsc_counter; 3798 __le64 key_tsc_counter; 3799 u8 wpi_key_rsc_counter[16]; 3800 u8 wpi_key_tsc_counter[16]; 3801 __le32 key_len; 3802 __le32 key_txmic_len; 3803 __le32 key_rxmic_len; 3804 __le32 is_group_key_id_valid; 3805 __le32 group_key_id; 3806 3807 /* Followed by key_data containing key followed by 3808 * tx mic and then rx mic 3809 */ 3810 } __packed; 3811 3812 struct wmi_vdev_install_key_arg { 3813 u32 vdev_id; 3814 const u8 *macaddr; 3815 u32 key_idx; 3816 u32 key_flags; 3817 u32 key_cipher; 3818 u32 ieee80211_key_cipher; 3819 u32 key_len; 3820 u32 key_txmic_len; 3821 u32 key_rxmic_len; 3822 u64 key_rsc_counter; 3823 const void *key_data; 3824 }; 3825 3826 #define WMI_MAX_SUPPORTED_RATES 128 3827 #define WMI_HOST_MAX_HECAP_PHY_SIZE 3 3828 #define WMI_HOST_MAX_HE_RATE_SET 3 3829 #define WMI_HECAP_TXRX_MCS_NSS_IDX_80 0 3830 #define WMI_HECAP_TXRX_MCS_NSS_IDX_160 1 3831 3832 #define ATH12K_WMI_MLO_MAX_PARTNER_LINKS \ 3833 (ATH12K_WMI_MLO_MAX_LINKS + ATH12K_MAX_NUM_BRIDGE_LINKS - 1) 3834 3835 struct peer_assoc_mlo_params { 3836 bool enabled; 3837 bool assoc_link; 3838 bool primary_umac; 3839 bool peer_id_valid; 3840 bool logical_link_idx_valid; 3841 bool bridge_peer; 3842 u8 mld_addr[ETH_ALEN]; 3843 u32 logical_link_idx; 3844 u32 ml_peer_id; 3845 u32 ieee_link_id; 3846 u8 num_partner_links; 3847 struct wmi_ml_partner_info partner_info[ATH12K_WMI_MLO_MAX_LINKS]; 3848 u16 eml_cap; 3849 }; 3850 3851 struct wmi_rate_set_arg { 3852 u32 num_rates; 3853 u8 rates[WMI_MAX_SUPPORTED_RATES]; 3854 }; 3855 3856 struct ath12k_wmi_peer_assoc_arg { 3857 u32 vdev_id; 3858 u32 peer_new_assoc; 3859 u32 peer_associd; 3860 u32 peer_flags; 3861 u32 peer_caps; 3862 u32 peer_listen_intval; 3863 u32 peer_ht_caps; 3864 u32 peer_max_mpdu; 3865 u32 peer_mpdu_density; 3866 u32 peer_rate_caps; 3867 u32 peer_nss; 3868 u32 peer_vht_caps; 3869 u32 peer_phymode; 3870 u32 peer_ht_info[2]; 3871 struct wmi_rate_set_arg peer_legacy_rates; 3872 struct wmi_rate_set_arg peer_ht_rates; 3873 u32 rx_max_rate; 3874 u32 rx_mcs_set; 3875 u32 tx_max_rate; 3876 u32 tx_mcs_set; 3877 u8 vht_capable; 3878 u8 min_data_rate; 3879 u32 tx_max_mcs_nss; 3880 u32 peer_bw_rxnss_override; 3881 bool is_pmf_enabled; 3882 bool is_wme_set; 3883 bool qos_flag; 3884 bool apsd_flag; 3885 bool ht_flag; 3886 bool bw_40; 3887 bool bw_80; 3888 bool bw_160; 3889 bool bw_320; 3890 bool stbc_flag; 3891 bool ldpc_flag; 3892 bool static_mimops_flag; 3893 bool dynamic_mimops_flag; 3894 bool spatial_mux_flag; 3895 bool vht_flag; 3896 bool vht_ng_flag; 3897 bool need_ptk_4_way; 3898 bool need_gtk_2_way; 3899 bool auth_flag; 3900 bool safe_mode_enabled; 3901 bool amsdu_disable; 3902 /* Use common structure */ 3903 u8 peer_mac[ETH_ALEN]; 3904 3905 bool he_flag; 3906 u32 peer_he_cap_macinfo[2]; 3907 u32 peer_he_cap_macinfo_internal; 3908 u32 peer_he_caps_6ghz; 3909 u32 peer_he_ops; 3910 u32 peer_he_cap_phyinfo[WMI_HOST_MAX_HECAP_PHY_SIZE]; 3911 u32 peer_he_mcs_count; 3912 u32 peer_he_rx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3913 u32 peer_he_tx_mcs_set[WMI_HOST_MAX_HE_RATE_SET]; 3914 bool twt_responder; 3915 bool twt_requester; 3916 struct ath12k_wmi_ppe_threshold_arg peer_ppet; 3917 bool eht_flag; 3918 u32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3919 u32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3920 u32 peer_eht_mcs_count; 3921 u32 peer_eht_rx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3922 u32 peer_eht_tx_mcs_set[WMI_MAX_EHTCAP_RATE_SET]; 3923 struct ath12k_wmi_ppe_threshold_arg peer_eht_ppet; 3924 u32 punct_bitmap; 3925 bool is_assoc; 3926 struct peer_assoc_mlo_params ml; 3927 bool eht_disable_mcs15; 3928 }; 3929 3930 #define ATH12K_WMI_FLAG_MLO_ENABLED BIT(0) 3931 #define ATH12K_WMI_FLAG_MLO_ASSOC_LINK BIT(1) 3932 #define ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC BIT(2) 3933 #define ATH12K_WMI_FLAG_MLO_LINK_ID_VALID BIT(3) 3934 #define ATH12K_WMI_FLAG_MLO_PEER_ID_VALID BIT(4) 3935 3936 struct wmi_peer_assoc_mlo_partner_info_params { 3937 __le32 tlv_header; 3938 __le32 vdev_id; 3939 __le32 hw_link_id; 3940 __le32 flags; 3941 __le32 logical_link_idx; 3942 } __packed; 3943 3944 struct wmi_peer_assoc_mlo_params { 3945 __le32 tlv_header; 3946 __le32 flags; 3947 struct ath12k_wmi_mac_addr_params mld_addr; 3948 __le32 logical_link_idx; 3949 __le32 ml_peer_id; 3950 __le32 ieee_link_id; 3951 __le32 emlsr_trans_timeout_us; 3952 __le32 emlsr_trans_delay_us; 3953 __le32 emlsr_padding_delay_us; 3954 } __packed; 3955 3956 struct wmi_peer_assoc_complete_cmd { 3957 __le32 tlv_header; 3958 struct ath12k_wmi_mac_addr_params peer_macaddr; 3959 __le32 vdev_id; 3960 __le32 peer_new_assoc; 3961 __le32 peer_associd; 3962 __le32 peer_flags; 3963 __le32 peer_caps; 3964 __le32 peer_listen_intval; 3965 __le32 peer_ht_caps; 3966 __le32 peer_max_mpdu; 3967 __le32 peer_mpdu_density; 3968 __le32 peer_rate_caps; 3969 __le32 peer_nss; 3970 __le32 peer_vht_caps; 3971 __le32 peer_phymode; 3972 __le32 peer_ht_info[2]; 3973 __le32 num_peer_legacy_rates; 3974 __le32 num_peer_ht_rates; 3975 __le32 peer_bw_rxnss_override; 3976 struct ath12k_wmi_ppe_threshold_params peer_ppet; 3977 __le32 peer_he_cap_info; 3978 __le32 peer_he_ops; 3979 __le32 peer_he_cap_phy[WMI_MAX_HECAP_PHY_SIZE]; 3980 __le32 peer_he_mcs; 3981 __le32 peer_he_cap_info_ext; 3982 __le32 peer_he_cap_info_internal; 3983 __le32 min_data_rate; 3984 __le32 peer_he_caps_6ghz; 3985 __le32 sta_type; 3986 __le32 bss_max_idle_option; 3987 __le32 auth_mode; 3988 __le32 peer_flags_ext; 3989 __le32 punct_bitmap; 3990 __le32 peer_eht_cap_mac[WMI_MAX_EHTCAP_MAC_SIZE]; 3991 __le32 peer_eht_cap_phy[WMI_MAX_EHTCAP_PHY_SIZE]; 3992 __le32 peer_eht_ops; 3993 struct ath12k_wmi_ppe_threshold_params peer_eht_ppet; 3994 } __packed; 3995 3996 struct wmi_stop_scan_cmd { 3997 __le32 tlv_header; 3998 __le32 requestor; 3999 __le32 scan_id; 4000 __le32 req_type; 4001 __le32 vdev_id; 4002 __le32 pdev_id; 4003 } __packed; 4004 4005 struct ath12k_wmi_scan_chan_list_arg { 4006 struct list_head list; 4007 u32 pdev_id; 4008 u16 nallchans; 4009 struct ath12k_wmi_channel_arg channel[]; 4010 }; 4011 4012 struct wmi_scan_chan_list_cmd { 4013 __le32 tlv_header; 4014 __le32 num_scan_chans; 4015 __le32 flags; 4016 __le32 pdev_id; 4017 } __packed; 4018 4019 #define WMI_MGMT_SEND_DOWNLD_LEN 64 4020 4021 #define WMI_TX_PARAMS_DWORD0_POWER GENMASK(7, 0) 4022 #define WMI_TX_PARAMS_DWORD0_MCS_MASK GENMASK(19, 8) 4023 #define WMI_TX_PARAMS_DWORD0_NSS_MASK GENMASK(27, 20) 4024 #define WMI_TX_PARAMS_DWORD0_RETRY_LIMIT GENMASK(31, 28) 4025 4026 #define WMI_TX_PARAMS_DWORD1_CHAIN_MASK GENMASK(7, 0) 4027 #define WMI_TX_PARAMS_DWORD1_BW_MASK GENMASK(14, 8) 4028 #define WMI_TX_PARAMS_DWORD1_PREAMBLE_TYPE GENMASK(19, 15) 4029 #define WMI_TX_PARAMS_DWORD1_FRAME_TYPE BIT(20) 4030 #define WMI_TX_PARAMS_DWORD1_RSVD GENMASK(31, 21) 4031 4032 struct wmi_mgmt_send_cmd { 4033 __le32 tlv_header; 4034 __le32 vdev_id; 4035 __le32 desc_id; 4036 __le32 chanfreq; 4037 __le32 paddr_lo; 4038 __le32 paddr_hi; 4039 __le32 frame_len; 4040 __le32 buf_len; 4041 __le32 tx_params_valid; 4042 4043 /* This TLV is followed by struct wmi_mgmt_frame */ 4044 4045 /* Followed by struct wmi_mgmt_send_params */ 4046 } __packed; 4047 4048 struct wmi_sta_powersave_mode_cmd { 4049 __le32 tlv_header; 4050 __le32 vdev_id; 4051 __le32 sta_ps_mode; 4052 } __packed; 4053 4054 struct wmi_sta_smps_force_mode_cmd { 4055 __le32 tlv_header; 4056 __le32 vdev_id; 4057 __le32 forced_mode; 4058 } __packed; 4059 4060 struct wmi_sta_smps_param_cmd { 4061 __le32 tlv_header; 4062 __le32 vdev_id; 4063 __le32 param; 4064 __le32 value; 4065 } __packed; 4066 4067 struct ath12k_wmi_bcn_prb_info_params { 4068 __le32 tlv_header; 4069 __le32 caps; 4070 __le32 erp; 4071 } __packed; 4072 4073 enum { 4074 WMI_PDEV_SUSPEND, 4075 WMI_PDEV_SUSPEND_AND_DISABLE_INTR, 4076 }; 4077 4078 struct wmi_pdev_green_ap_ps_enable_cmd_param { 4079 __le32 tlv_header; 4080 __le32 pdev_id; 4081 __le32 enable; 4082 } __packed; 4083 4084 struct ath12k_wmi_ap_ps_arg { 4085 u32 vdev_id; 4086 u32 param; 4087 u32 value; 4088 }; 4089 4090 enum set_init_cc_type { 4091 WMI_COUNTRY_INFO_TYPE_ALPHA, 4092 WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE, 4093 WMI_COUNTRY_INFO_TYPE_REGDOMAIN, 4094 }; 4095 4096 enum set_init_cc_flags { 4097 INVALID_CC, 4098 CC_IS_SET, 4099 REGDMN_IS_SET, 4100 ALPHA_IS_SET, 4101 }; 4102 4103 struct ath12k_wmi_init_country_arg { 4104 union { 4105 u16 country_code; 4106 u16 regdom_id; 4107 u8 alpha2[3]; 4108 } cc_info; 4109 enum set_init_cc_flags flags; 4110 }; 4111 4112 struct wmi_init_country_cmd { 4113 __le32 tlv_header; 4114 __le32 pdev_id; 4115 __le32 init_cc_type; 4116 union { 4117 __le32 country_code; 4118 __le32 regdom_id; 4119 __le32 alpha2; 4120 } cc_info; 4121 } __packed; 4122 4123 struct wmi_11d_scan_start_arg { 4124 u32 vdev_id; 4125 u32 scan_period_msec; 4126 u32 start_interval_msec; 4127 }; 4128 4129 struct wmi_11d_scan_start_cmd { 4130 __le32 tlv_header; 4131 __le32 vdev_id; 4132 __le32 scan_period_msec; 4133 __le32 start_interval_msec; 4134 } __packed; 4135 4136 struct wmi_11d_scan_stop_cmd { 4137 __le32 tlv_header; 4138 __le32 vdev_id; 4139 } __packed; 4140 4141 struct wmi_11d_new_cc_event { 4142 __le32 new_alpha2; 4143 } __packed; 4144 4145 struct wmi_delba_send_cmd { 4146 __le32 tlv_header; 4147 __le32 vdev_id; 4148 struct ath12k_wmi_mac_addr_params peer_macaddr; 4149 __le32 tid; 4150 __le32 initiator; 4151 __le32 reasoncode; 4152 } __packed; 4153 4154 struct wmi_addba_setresponse_cmd { 4155 __le32 tlv_header; 4156 __le32 vdev_id; 4157 struct ath12k_wmi_mac_addr_params peer_macaddr; 4158 __le32 tid; 4159 __le32 statuscode; 4160 } __packed; 4161 4162 struct wmi_addba_send_cmd { 4163 __le32 tlv_header; 4164 __le32 vdev_id; 4165 struct ath12k_wmi_mac_addr_params peer_macaddr; 4166 __le32 tid; 4167 __le32 buffersize; 4168 } __packed; 4169 4170 struct wmi_addba_clear_resp_cmd { 4171 __le32 tlv_header; 4172 __le32 vdev_id; 4173 struct ath12k_wmi_mac_addr_params peer_macaddr; 4174 } __packed; 4175 4176 #define DFS_PHYERR_UNIT_TEST_CMD 0 4177 #define DFS_UNIT_TEST_MODULE 0x2b 4178 #define DFS_UNIT_TEST_TOKEN 0xAA 4179 4180 enum dfs_test_args_idx { 4181 DFS_TEST_CMDID = 0, 4182 DFS_TEST_PDEV_ID, 4183 DFS_TEST_RADAR_PARAM, 4184 DFS_MAX_TEST_ARGS, 4185 }; 4186 4187 struct wmi_dfs_unit_test_arg { 4188 u32 cmd_id; 4189 u32 pdev_id; 4190 u32 radar_param; 4191 }; 4192 4193 struct wmi_unit_test_cmd { 4194 __le32 tlv_header; 4195 __le32 vdev_id; 4196 __le32 module_id; 4197 __le32 num_args; 4198 __le32 diag_token; 4199 /* Followed by test args*/ 4200 } __packed; 4201 4202 #define MAX_SUPPORTED_RATES 128 4203 4204 struct ath12k_wmi_vht_rate_set_params { 4205 __le32 tlv_header; 4206 __le32 rx_max_rate; 4207 __le32 rx_mcs_set; 4208 __le32 tx_max_rate; 4209 __le32 tx_mcs_set; 4210 __le32 tx_max_mcs_nss; 4211 } __packed; 4212 4213 struct ath12k_wmi_he_rate_set_params { 4214 __le32 tlv_header; 4215 __le32 rx_mcs_set; 4216 __le32 tx_mcs_set; 4217 } __packed; 4218 4219 struct ath12k_wmi_eht_rate_set_params { 4220 __le32 tlv_header; 4221 __le32 rx_mcs_set; 4222 __le32 tx_mcs_set; 4223 } __packed; 4224 4225 #define MAX_REG_RULES 10 4226 #define REG_ALPHA2_LEN 2 4227 #define MAX_6GHZ_REG_RULES 5 4228 4229 struct wmi_set_current_country_arg { 4230 u8 alpha2[REG_ALPHA2_LEN]; 4231 }; 4232 4233 struct wmi_set_current_country_cmd { 4234 __le32 tlv_header; 4235 __le32 pdev_id; 4236 __le32 new_alpha2; 4237 } __packed; 4238 4239 enum wmi_start_event_param { 4240 WMI_VDEV_START_RESP_EVENT = 0, 4241 WMI_VDEV_RESTART_RESP_EVENT, 4242 }; 4243 4244 struct wmi_vdev_start_resp_event { 4245 __le32 vdev_id; 4246 __le32 requestor_id; 4247 /* enum wmi_start_event_param */ 4248 __le32 resp_type; 4249 __le32 status; 4250 __le32 chain_mask; 4251 __le32 smps_mode; 4252 union { 4253 __le32 mac_id; 4254 __le32 pdev_id; 4255 }; 4256 __le32 cfgd_tx_streams; 4257 __le32 cfgd_rx_streams; 4258 __le32 max_allowed_tx_power; 4259 } __packed; 4260 4261 /* VDEV start response status codes */ 4262 enum wmi_vdev_start_resp_status_code { 4263 WMI_VDEV_START_RESPONSE_STATUS_SUCCESS = 0, 4264 WMI_VDEV_START_RESPONSE_INVALID_VDEVID = 1, 4265 WMI_VDEV_START_RESPONSE_NOT_SUPPORTED = 2, 4266 WMI_VDEV_START_RESPONSE_DFS_VIOLATION = 3, 4267 WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN = 4, 4268 }; 4269 4270 enum wmi_reg_6g_ap_type { 4271 WMI_REG_INDOOR_AP = 0, 4272 WMI_REG_STD_POWER_AP = 1, 4273 WMI_REG_VLP_AP = 2, 4274 WMI_REG_CURRENT_MAX_AP_TYPE, 4275 WMI_REG_MAX_SUPP_AP_TYPE = WMI_REG_VLP_AP, 4276 WMI_REG_MAX_AP_TYPE = 7, 4277 }; 4278 4279 enum wmi_reg_6g_client_type { 4280 WMI_REG_DEFAULT_CLIENT = 0, 4281 WMI_REG_SUBORDINATE_CLIENT = 1, 4282 WMI_REG_MAX_CLIENT_TYPE = 2, 4283 }; 4284 4285 /* Regulatory Rule Flags Passed by FW */ 4286 #define REGULATORY_CHAN_DISABLED BIT(0) 4287 #define REGULATORY_CHAN_NO_IR BIT(1) 4288 #define REGULATORY_CHAN_RADAR BIT(3) 4289 #define REGULATORY_CHAN_NO_OFDM BIT(6) 4290 #define REGULATORY_CHAN_INDOOR_ONLY BIT(9) 4291 4292 #define REGULATORY_CHAN_NO_HT40 BIT(4) 4293 #define REGULATORY_CHAN_NO_80MHZ BIT(7) 4294 #define REGULATORY_CHAN_NO_160MHZ BIT(8) 4295 #define REGULATORY_CHAN_NO_20MHZ BIT(11) 4296 #define REGULATORY_CHAN_NO_10MHZ BIT(12) 4297 4298 enum { 4299 WMI_REG_SET_CC_STATUS_PASS = 0, 4300 WMI_REG_CURRENT_ALPHA2_NOT_FOUND = 1, 4301 WMI_REG_INIT_ALPHA2_NOT_FOUND = 2, 4302 WMI_REG_SET_CC_CHANGE_NOT_ALLOWED = 3, 4303 WMI_REG_SET_CC_STATUS_NO_MEMORY = 4, 4304 WMI_REG_SET_CC_STATUS_FAIL = 5, 4305 }; 4306 4307 #define WMI_REG_CLIENT_MAX 4 4308 4309 struct wmi_reg_chan_list_cc_ext_event { 4310 __le32 status_code; 4311 __le32 phy_id; 4312 __le32 alpha2; 4313 __le32 num_phy; 4314 __le32 country_id; 4315 __le32 domain_code; 4316 __le32 dfs_region; 4317 __le32 phybitmap; 4318 __le32 min_bw_2g; 4319 __le32 max_bw_2g; 4320 __le32 min_bw_5g; 4321 __le32 max_bw_5g; 4322 __le32 num_2g_reg_rules; 4323 __le32 num_5g_reg_rules; 4324 __le32 client_type; 4325 __le32 rnr_tpe_usable; 4326 __le32 unspecified_ap_usable; 4327 __le32 domain_code_6g_ap_lpi; 4328 __le32 domain_code_6g_ap_sp; 4329 __le32 domain_code_6g_ap_vlp; 4330 __le32 domain_code_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4331 __le32 domain_code_6g_client_sp[WMI_REG_CLIENT_MAX]; 4332 __le32 domain_code_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4333 __le32 domain_code_6g_super_id; 4334 __le32 min_bw_6g_ap_sp; 4335 __le32 max_bw_6g_ap_sp; 4336 __le32 min_bw_6g_ap_lpi; 4337 __le32 max_bw_6g_ap_lpi; 4338 __le32 min_bw_6g_ap_vlp; 4339 __le32 max_bw_6g_ap_vlp; 4340 __le32 min_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4341 __le32 max_bw_6g_client_sp[WMI_REG_CLIENT_MAX]; 4342 __le32 min_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4343 __le32 max_bw_6g_client_lpi[WMI_REG_CLIENT_MAX]; 4344 __le32 min_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4345 __le32 max_bw_6g_client_vlp[WMI_REG_CLIENT_MAX]; 4346 __le32 num_6g_reg_rules_ap_sp; 4347 __le32 num_6g_reg_rules_ap_lpi; 4348 __le32 num_6g_reg_rules_ap_vlp; 4349 __le32 num_6g_reg_rules_cl_sp[WMI_REG_CLIENT_MAX]; 4350 __le32 num_6g_reg_rules_cl_lpi[WMI_REG_CLIENT_MAX]; 4351 __le32 num_6g_reg_rules_cl_vlp[WMI_REG_CLIENT_MAX]; 4352 } __packed; 4353 4354 struct ath12k_wmi_reg_rule_ext_params { 4355 __le32 tlv_header; 4356 __le32 freq_info; 4357 __le32 bw_pwr_info; 4358 __le32 flag_info; 4359 __le32 psd_power_info; 4360 } __packed; 4361 4362 struct wmi_vdev_delete_resp_event { 4363 __le32 vdev_id; 4364 } __packed; 4365 4366 struct wmi_peer_delete_resp_event { 4367 __le32 vdev_id; 4368 struct ath12k_wmi_mac_addr_params peer_macaddr; 4369 } __packed; 4370 4371 struct wmi_bcn_tx_status_event { 4372 __le32 vdev_id; 4373 __le32 tx_status; 4374 } __packed; 4375 4376 struct wmi_vdev_stopped_event { 4377 __le32 vdev_id; 4378 } __packed; 4379 4380 struct wmi_pdev_bss_chan_info_event { 4381 __le32 freq; /* Units in MHz */ 4382 __le32 noise_floor; /* units are dBm */ 4383 /* rx clear - how often the channel was unused */ 4384 __le32 rx_clear_count_low; 4385 __le32 rx_clear_count_high; 4386 /* cycle count - elapsed time during measured period, in clock ticks */ 4387 __le32 cycle_count_low; 4388 __le32 cycle_count_high; 4389 /* tx cycle count - elapsed time spent in tx, in clock ticks */ 4390 __le32 tx_cycle_count_low; 4391 __le32 tx_cycle_count_high; 4392 /* rx cycle count - elapsed time spent in rx, in clock ticks */ 4393 __le32 rx_cycle_count_low; 4394 __le32 rx_cycle_count_high; 4395 /*rx_cycle cnt for my bss in 64bits format */ 4396 __le32 rx_bss_cycle_count_low; 4397 __le32 rx_bss_cycle_count_high; 4398 __le32 pdev_id; 4399 } __packed; 4400 4401 #define WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS 0 4402 4403 struct wmi_vdev_install_key_compl_event { 4404 __le32 vdev_id; 4405 struct ath12k_wmi_mac_addr_params peer_macaddr; 4406 __le32 key_idx; 4407 __le32 key_flags; 4408 __le32 status; 4409 } __packed; 4410 4411 struct wmi_vdev_install_key_complete_arg { 4412 u32 vdev_id; 4413 const u8 *macaddr; 4414 u32 key_idx; 4415 u32 key_flags; 4416 u32 status; 4417 }; 4418 4419 struct wmi_peer_assoc_conf_event { 4420 __le32 vdev_id; 4421 struct ath12k_wmi_mac_addr_params peer_macaddr; 4422 } __packed; 4423 4424 struct wmi_peer_assoc_conf_arg { 4425 u32 vdev_id; 4426 const u8 *macaddr; 4427 }; 4428 4429 struct wmi_fils_discovery_event { 4430 __le32 vdev_id; 4431 __le32 fils_tt; 4432 __le32 tbtt; 4433 } __packed; 4434 4435 struct wmi_probe_resp_tx_status_event { 4436 __le32 vdev_id; 4437 __le32 tx_status; 4438 } __packed; 4439 4440 struct wmi_pdev_ctl_failsafe_chk_event { 4441 __le32 pdev_id; 4442 __le32 ctl_failsafe_status; 4443 } __packed; 4444 4445 struct ath12k_wmi_pdev_csa_event { 4446 __le32 pdev_id; 4447 __le32 current_switch_count; 4448 __le32 num_vdevs; 4449 } __packed; 4450 4451 struct ath12k_wmi_pdev_radar_event { 4452 __le32 pdev_id; 4453 __le32 detection_mode; 4454 __le32 chan_freq; 4455 __le32 chan_width; 4456 __le32 detector_id; 4457 __le32 segment_id; 4458 __le32 timestamp; 4459 __le32 is_chirp; 4460 a_sle32 freq_offset; 4461 a_sle32 sidx; 4462 } __packed; 4463 4464 struct wmi_pdev_temperature_event { 4465 /* temperature value in Celsius degree */ 4466 a_sle32 temp; 4467 __le32 pdev_id; 4468 } __packed; 4469 4470 #define WMI_RX_STATUS_OK 0x00 4471 #define WMI_RX_STATUS_ERR_CRC 0x01 4472 #define WMI_RX_STATUS_ERR_DECRYPT 0x08 4473 #define WMI_RX_STATUS_ERR_MIC 0x10 4474 #define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20 4475 4476 #define WLAN_MGMT_TXRX_HOST_MAX_ANTENNA 4 4477 4478 struct ath12k_wmi_mgmt_rx_arg { 4479 u32 chan_freq; 4480 u32 channel; 4481 u32 snr; 4482 u8 rssi_ctl[WLAN_MGMT_TXRX_HOST_MAX_ANTENNA]; 4483 u32 rate; 4484 enum wmi_phy_mode phy_mode; 4485 u32 buf_len; 4486 int status; 4487 u32 flags; 4488 int rssi; 4489 u32 tsf_delta; 4490 u8 pdev_id; 4491 }; 4492 4493 #define ATH_MAX_ANTENNA 4 4494 4495 struct ath12k_wmi_mgmt_rx_params { 4496 __le32 channel; 4497 __le32 snr; 4498 __le32 rate; 4499 __le32 phy_mode; 4500 __le32 buf_len; 4501 __le32 status; 4502 __le32 rssi_ctl[ATH_MAX_ANTENNA]; 4503 __le32 flags; 4504 a_sle32 rssi; 4505 __le32 tsf_delta; 4506 __le32 rx_tsf_l32; 4507 __le32 rx_tsf_u32; 4508 __le32 pdev_id; 4509 __le32 chan_freq; 4510 } __packed; 4511 4512 #define MAX_ANTENNA_EIGHT 8 4513 4514 struct wmi_mgmt_tx_compl_event { 4515 __le32 desc_id; 4516 __le32 status; 4517 __le32 pdev_id; 4518 } __packed; 4519 4520 struct wmi_scan_event { 4521 __le32 event_type; /* %WMI_SCAN_EVENT_ */ 4522 __le32 reason; /* %WMI_SCAN_REASON_ */ 4523 __le32 channel_freq; /* only valid for WMI_SCAN_EVENT_FOREIGN_CHANNEL */ 4524 __le32 scan_req_id; 4525 __le32 scan_id; 4526 __le32 vdev_id; 4527 /* TSF Timestamp when the scan event (%WMI_SCAN_EVENT_) is completed 4528 * In case of AP it is TSF of the AP vdev 4529 * In case of STA connected state, this is the TSF of the AP 4530 * In case of STA not connected, it will be the free running HW timer 4531 */ 4532 __le32 tsf_timestamp; 4533 } __packed; 4534 4535 struct wmi_peer_sta_kickout_arg { 4536 const u8 *mac_addr; 4537 }; 4538 4539 struct wmi_peer_sta_kickout_event { 4540 struct ath12k_wmi_mac_addr_params peer_macaddr; 4541 } __packed; 4542 4543 #define WMI_ROAM_REASON_MASK GENMASK(3, 0) 4544 #define WMI_ROAM_SUBNET_STATUS_MASK GENMASK(5, 4) 4545 4546 enum wmi_roam_reason { 4547 WMI_ROAM_REASON_BETTER_AP = 1, 4548 WMI_ROAM_REASON_BEACON_MISS = 2, 4549 WMI_ROAM_REASON_LOW_RSSI = 3, 4550 WMI_ROAM_REASON_SUITABLE_AP_FOUND = 4, 4551 WMI_ROAM_REASON_HO_FAILED = 5, 4552 4553 /* keep last */ 4554 WMI_ROAM_REASON_MAX, 4555 }; 4556 4557 struct wmi_roam_event { 4558 __le32 vdev_id; 4559 __le32 reason; 4560 __le32 rssi; 4561 } __packed; 4562 4563 #define WMI_CHAN_INFO_START_RESP 0 4564 #define WMI_CHAN_INFO_END_RESP 1 4565 4566 struct wmi_chan_info_event { 4567 __le32 err_code; 4568 __le32 freq; 4569 __le32 cmd_flags; 4570 __le32 noise_floor; 4571 __le32 rx_clear_count; 4572 __le32 cycle_count; 4573 __le32 chan_tx_pwr_range; 4574 __le32 chan_tx_pwr_tp; 4575 __le32 rx_frame_count; 4576 __le32 my_bss_rx_cycle_count; 4577 __le32 rx_11b_mode_data_duration; 4578 __le32 tx_frame_cnt; 4579 __le32 mac_clk_mhz; 4580 __le32 vdev_id; 4581 } __packed; 4582 4583 struct ath12k_wmi_target_cap_arg { 4584 u32 phy_capability; 4585 u32 max_frag_entry; 4586 u32 num_rf_chains; 4587 u32 ht_cap_info; 4588 u32 vht_cap_info; 4589 u32 vht_supp_mcs; 4590 u32 hw_min_tx_power; 4591 u32 hw_max_tx_power; 4592 u32 sys_cap_info; 4593 u32 min_pkt_size_enable; 4594 u32 max_bcn_ie_size; 4595 u32 max_num_scan_channels; 4596 u32 max_supported_macs; 4597 u32 wmi_fw_sub_feat_caps; 4598 u32 txrx_chainmask; 4599 u32 default_dbs_hw_mode_index; 4600 u32 num_msdu_desc; 4601 }; 4602 4603 enum wmi_vdev_type { 4604 WMI_VDEV_TYPE_UNSPEC = 0, 4605 WMI_VDEV_TYPE_AP = 1, 4606 WMI_VDEV_TYPE_STA = 2, 4607 WMI_VDEV_TYPE_IBSS = 3, 4608 WMI_VDEV_TYPE_MONITOR = 4, 4609 }; 4610 4611 enum wmi_vdev_subtype { 4612 WMI_VDEV_SUBTYPE_NONE, 4613 WMI_VDEV_SUBTYPE_P2P_DEVICE, 4614 WMI_VDEV_SUBTYPE_P2P_CLIENT, 4615 WMI_VDEV_SUBTYPE_P2P_GO, 4616 WMI_VDEV_SUBTYPE_PROXY_STA, 4617 WMI_VDEV_SUBTYPE_MESH_NON_11S, 4618 WMI_VDEV_SUBTYPE_MESH_11S, 4619 }; 4620 4621 enum wmi_sta_powersave_param { 4622 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0, 4623 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1, 4624 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2, 4625 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3, 4626 WMI_STA_PS_PARAM_UAPSD = 4, 4627 }; 4628 4629 enum wmi_sta_ps_param_uapsd { 4630 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4631 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4632 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4633 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4634 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4635 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4636 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4637 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4638 }; 4639 4640 enum wmi_sta_ps_param_tx_wake_threshold { 4641 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0, 4642 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1, 4643 4644 /* Values greater than one indicate that many TX attempts per beacon 4645 * interval before the STA will wake up 4646 */ 4647 }; 4648 4649 /* The maximum number of PS-Poll frames the FW will send in response to 4650 * traffic advertised in TIM before waking up (by sending a null frame with PS 4651 * = 0). Value 0 has a special meaning: there is no maximum count and the FW 4652 * will send as many PS-Poll as are necessary to retrieve buffered BU. This 4653 * parameter is used when the RX wake policy is 4654 * WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD and ignored when the RX wake 4655 * policy is WMI_STA_PS_RX_WAKE_POLICY_WAKE. 4656 */ 4657 enum wmi_sta_ps_param_pspoll_count { 4658 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0, 4659 /* Values greater than 0 indicate the maximum number of PS-Poll frames 4660 * FW will send before waking up. 4661 */ 4662 }; 4663 4664 /* U-APSD configuration of peer station from (re)assoc request and TSPECs */ 4665 enum wmi_ap_ps_param_uapsd { 4666 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0), 4667 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1), 4668 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2), 4669 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3), 4670 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4), 4671 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5), 4672 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6), 4673 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7), 4674 }; 4675 4676 /* U-APSD maximum service period of peer station */ 4677 enum wmi_ap_ps_peer_param_max_sp { 4678 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0, 4679 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1, 4680 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2, 4681 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3, 4682 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP, 4683 }; 4684 4685 enum wmi_ap_ps_peer_param { 4686 /** Set uapsd configuration for a given peer. 4687 * 4688 * This include the delivery and trigger enabled state for each AC. 4689 * The host MLME needs to set this based on AP capability and stations 4690 * request Set in the association request received from the station. 4691 * 4692 * Lower 8 bits of the value specify the UAPSD configuration. 4693 * 4694 * (see enum wmi_ap_ps_param_uapsd) 4695 * The default value is 0. 4696 */ 4697 WMI_AP_PS_PEER_PARAM_UAPSD = 0, 4698 4699 /** 4700 * Set the service period for a UAPSD capable station 4701 * 4702 * The service period from wme ie in the (re)assoc request frame. 4703 * 4704 * (see enum wmi_ap_ps_peer_param_max_sp) 4705 */ 4706 WMI_AP_PS_PEER_PARAM_MAX_SP = 1, 4707 4708 /** Time in seconds for aging out buffered frames 4709 * for STA in power save 4710 */ 4711 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2, 4712 4713 /** Specify frame types that are considered SIFS 4714 * RESP trigger frame 4715 */ 4716 WMI_AP_PS_PEER_PARAM_SIFS_RESP_FRMTYPE = 3, 4717 4718 /** Specifies the trigger state of TID. 4719 * Valid only for UAPSD frame type 4720 */ 4721 WMI_AP_PS_PEER_PARAM_SIFS_RESP_UAPSD = 4, 4722 4723 /* Specifies the WNM sleep state of a STA */ 4724 WMI_AP_PS_PEER_PARAM_WNM_SLEEP = 5, 4725 }; 4726 4727 #define DISABLE_SIFS_RESPONSE_TRIGGER 0 4728 4729 #define WMI_MAX_KEY_INDEX 7 4730 #define WMI_MAX_KEY_LEN 32 4731 4732 enum wmi_key_type { 4733 WMI_KEY_PAIRWISE = 0, 4734 WMI_KEY_GROUP = 1, 4735 }; 4736 4737 enum wmi_cipher_type { 4738 WMI_CIPHER_NONE = 0, /* clear key */ 4739 WMI_CIPHER_WEP = 1, 4740 WMI_CIPHER_TKIP = 2, 4741 WMI_CIPHER_AES_OCB = 3, 4742 WMI_CIPHER_AES_CCM = 4, 4743 WMI_CIPHER_WAPI = 5, 4744 WMI_CIPHER_CKIP = 6, 4745 WMI_CIPHER_AES_CMAC = 7, 4746 WMI_CIPHER_ANY = 8, 4747 WMI_CIPHER_AES_GCM = 9, 4748 WMI_CIPHER_AES_GMAC = 10, 4749 }; 4750 4751 /* Value to disable fixed rate setting */ 4752 #define WMI_FIXED_RATE_NONE (0xffff) 4753 4754 #define ATH12K_RC_VERSION_OFFSET 28 4755 #define ATH12K_RC_PREAMBLE_OFFSET 8 4756 #define ATH12K_RC_NSS_OFFSET 5 4757 4758 #define ATH12K_HW_RATE_CODE(rate, nss, preamble) \ 4759 ((1 << ATH12K_RC_VERSION_OFFSET) | \ 4760 ((nss) << ATH12K_RC_NSS_OFFSET) | \ 4761 ((preamble) << ATH12K_RC_PREAMBLE_OFFSET) | \ 4762 (rate)) 4763 4764 /* Preamble types to be used with VDEV fixed rate configuration */ 4765 enum wmi_rate_preamble { 4766 WMI_RATE_PREAMBLE_OFDM, 4767 WMI_RATE_PREAMBLE_CCK, 4768 WMI_RATE_PREAMBLE_HT, 4769 WMI_RATE_PREAMBLE_VHT, 4770 WMI_RATE_PREAMBLE_HE, 4771 WMI_RATE_PREAMBLE_EHT, 4772 }; 4773 4774 /** 4775 * enum wmi_rtscts_prot_mode - Enable/Disable RTS/CTS and CTS2Self Protection. 4776 * @WMI_RTS_CTS_DISABLED: RTS/CTS protection is disabled. 4777 * @WMI_USE_RTS_CTS: RTS/CTS Enabled. 4778 * @WMI_USE_CTS2SELF: CTS to self protection Enabled. 4779 */ 4780 enum wmi_rtscts_prot_mode { 4781 WMI_RTS_CTS_DISABLED = 0, 4782 WMI_USE_RTS_CTS = 1, 4783 WMI_USE_CTS2SELF = 2, 4784 }; 4785 4786 /** 4787 * enum wmi_rtscts_profile - Selection of RTS CTS profile along with enabling 4788 * protection mode. 4789 * @WMI_RTSCTS_FOR_NO_RATESERIES: Neither of rate-series should use RTS-CTS 4790 * @WMI_RTSCTS_FOR_SECOND_RATESERIES: Only second rate-series will use RTS-CTS 4791 * @WMI_RTSCTS_ACROSS_SW_RETRIES: Only the second rate-series will use RTS-CTS, 4792 * but if there's a sw retry, both the rate 4793 * series will use RTS-CTS. 4794 * @WMI_RTSCTS_ERP: RTS/CTS used for ERP protection for every PPDU. 4795 * @WMI_RTSCTS_FOR_ALL_RATESERIES: Enable RTS-CTS for all rate series. 4796 */ 4797 enum wmi_rtscts_profile { 4798 WMI_RTSCTS_FOR_NO_RATESERIES = 0, 4799 WMI_RTSCTS_FOR_SECOND_RATESERIES = 1, 4800 WMI_RTSCTS_ACROSS_SW_RETRIES = 2, 4801 WMI_RTSCTS_ERP = 3, 4802 WMI_RTSCTS_FOR_ALL_RATESERIES = 4, 4803 }; 4804 4805 #define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr) 4806 4807 enum wmi_sta_ps_param_rx_wake_policy { 4808 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0, 4809 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1, 4810 }; 4811 4812 /* Do not change existing values! Used by ath12k_frame_mode parameter 4813 * module parameter. 4814 */ 4815 enum ath12k_hw_txrx_mode { 4816 ATH12K_HW_TXRX_RAW = 0, 4817 ATH12K_HW_TXRX_NATIVE_WIFI = 1, 4818 ATH12K_HW_TXRX_ETHERNET = 2, 4819 }; 4820 4821 struct wmi_wmm_params { 4822 __le32 tlv_header; 4823 __le32 cwmin; 4824 __le32 cwmax; 4825 __le32 aifs; 4826 __le32 txoplimit; 4827 __le32 acm; 4828 __le32 no_ack; 4829 } __packed; 4830 4831 struct wmi_wmm_params_arg { 4832 u8 acm; 4833 u8 aifs; 4834 u16 cwmin; 4835 u16 cwmax; 4836 u16 txop; 4837 u8 no_ack; 4838 }; 4839 4840 struct wmi_vdev_set_wmm_params_cmd { 4841 __le32 tlv_header; 4842 __le32 vdev_id; 4843 struct wmi_wmm_params wmm_params[4]; 4844 __le32 wmm_param_type; 4845 } __packed; 4846 4847 struct wmi_wmm_params_all_arg { 4848 struct wmi_wmm_params_arg ac_be; 4849 struct wmi_wmm_params_arg ac_bk; 4850 struct wmi_wmm_params_arg ac_vi; 4851 struct wmi_wmm_params_arg ac_vo; 4852 }; 4853 4854 #define ATH12K_TWT_DEF_STA_CONG_TIMER_MS 5000 4855 #define ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE 10 4856 #define ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP 50 4857 #define ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN 20 4858 #define ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL 100 4859 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN 80 4860 #define ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP 50 4861 #define ATH12K_TWT_DEF_MIN_NO_STA_SETUP 10 4862 #define ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN 2 4863 #define ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS 2 4864 #define ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS 2 4865 #define ATH12K_TWT_DEF_MAX_NO_STA_TWT 500 4866 #define ATH12K_TWT_DEF_MODE_CHECK_INTERVAL 10000 4867 #define ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL 1000 4868 #define ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL 5000 4869 4870 struct wmi_twt_enable_params_cmd { 4871 __le32 tlv_header; 4872 __le32 pdev_id; 4873 __le32 sta_cong_timer_ms; 4874 __le32 mbss_support; 4875 __le32 default_slot_size; 4876 __le32 congestion_thresh_setup; 4877 __le32 congestion_thresh_teardown; 4878 __le32 congestion_thresh_critical; 4879 __le32 interference_thresh_teardown; 4880 __le32 interference_thresh_setup; 4881 __le32 min_no_sta_setup; 4882 __le32 min_no_sta_teardown; 4883 __le32 no_of_bcast_mcast_slots; 4884 __le32 min_no_twt_slots; 4885 __le32 max_no_sta_twt; 4886 __le32 mode_check_interval; 4887 __le32 add_sta_slot_interval; 4888 __le32 remove_sta_slot_interval; 4889 } __packed; 4890 4891 struct wmi_twt_disable_params_cmd { 4892 __le32 tlv_header; 4893 __le32 pdev_id; 4894 } __packed; 4895 4896 struct wmi_obss_spatial_reuse_params_cmd { 4897 __le32 tlv_header; 4898 __le32 pdev_id; 4899 __le32 enable; 4900 a_sle32 obss_min; 4901 a_sle32 obss_max; 4902 __le32 vdev_id; 4903 } __packed; 4904 4905 #define ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS 200 4906 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE 0 4907 #define ATH12K_OBSS_COLOR_COLLISION_DETECTION 1 4908 4909 #define ATH12K_BSS_COLOR_STA_PERIODS 10000 4910 #define ATH12K_BSS_COLOR_AP_PERIODS 5000 4911 4912 struct wmi_obss_color_collision_cfg_params_cmd { 4913 __le32 tlv_header; 4914 __le32 vdev_id; 4915 __le32 flags; 4916 __le32 evt_type; 4917 __le32 current_bss_color; 4918 __le32 detection_period_ms; 4919 __le32 scan_period_ms; 4920 __le32 free_slot_expiry_time_ms; 4921 } __packed; 4922 4923 struct wmi_bss_color_change_enable_params_cmd { 4924 __le32 tlv_header; 4925 __le32 vdev_id; 4926 __le32 enable; 4927 } __packed; 4928 4929 #define ATH12K_IPV4_TH_SEED_SIZE 5 4930 #define ATH12K_IPV6_TH_SEED_SIZE 11 4931 4932 struct ath12k_wmi_pdev_lro_config_cmd { 4933 __le32 tlv_header; 4934 __le32 lro_enable; 4935 __le32 res; 4936 u32 th_4[ATH12K_IPV4_TH_SEED_SIZE]; 4937 u32 th_6[ATH12K_IPV6_TH_SEED_SIZE]; 4938 __le32 pdev_id; 4939 } __packed; 4940 4941 #define ATH12K_WMI_SPECTRAL_COUNT_DEFAULT 0 4942 #define ATH12K_WMI_SPECTRAL_PERIOD_DEFAULT 224 4943 #define ATH12K_WMI_SPECTRAL_PRIORITY_DEFAULT 1 4944 #define ATH12K_WMI_SPECTRAL_FFT_SIZE_DEFAULT 7 4945 #define ATH12K_WMI_SPECTRAL_GC_ENA_DEFAULT 1 4946 #define ATH12K_WMI_SPECTRAL_RESTART_ENA_DEFAULT 0 4947 #define ATH12K_WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96 4948 #define ATH12K_WMI_SPECTRAL_INIT_DELAY_DEFAULT 80 4949 #define ATH12K_WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12 4950 #define ATH12K_WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8 4951 #define ATH12K_WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0 4952 #define ATH12K_WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0 4953 #define ATH12K_WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0 4954 #define ATH12K_WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0 4955 #define ATH12K_WMI_SPECTRAL_RPT_MODE_DEFAULT 2 4956 #define ATH12K_WMI_SPECTRAL_BIN_SCALE_DEFAULT 1 4957 #define ATH12K_WMI_SPECTRAL_DBM_ADJ_DEFAULT 1 4958 #define ATH12K_WMI_SPECTRAL_CHN_MASK_DEFAULT 1 4959 4960 struct ath12k_wmi_vdev_spectral_conf_arg { 4961 u32 vdev_id; 4962 u32 scan_count; 4963 u32 scan_period; 4964 u32 scan_priority; 4965 u32 scan_fft_size; 4966 u32 scan_gc_ena; 4967 u32 scan_restart_ena; 4968 u32 scan_noise_floor_ref; 4969 u32 scan_init_delay; 4970 u32 scan_nb_tone_thr; 4971 u32 scan_str_bin_thr; 4972 u32 scan_wb_rpt_mode; 4973 u32 scan_rssi_rpt_mode; 4974 u32 scan_rssi_thr; 4975 u32 scan_pwr_format; 4976 u32 scan_rpt_mode; 4977 u32 scan_bin_scale; 4978 u32 scan_dbm_adj; 4979 u32 scan_chn_mask; 4980 }; 4981 4982 struct ath12k_wmi_vdev_spectral_conf_cmd { 4983 __le32 tlv_header; 4984 __le32 vdev_id; 4985 __le32 scan_count; 4986 __le32 scan_period; 4987 __le32 scan_priority; 4988 __le32 scan_fft_size; 4989 __le32 scan_gc_ena; 4990 __le32 scan_restart_ena; 4991 __le32 scan_noise_floor_ref; 4992 __le32 scan_init_delay; 4993 __le32 scan_nb_tone_thr; 4994 __le32 scan_str_bin_thr; 4995 __le32 scan_wb_rpt_mode; 4996 __le32 scan_rssi_rpt_mode; 4997 __le32 scan_rssi_thr; 4998 __le32 scan_pwr_format; 4999 __le32 scan_rpt_mode; 5000 __le32 scan_bin_scale; 5001 __le32 scan_dbm_adj; 5002 __le32 scan_chn_mask; 5003 } __packed; 5004 5005 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1 5006 #define ATH12K_WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2 5007 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_ENABLE 1 5008 #define ATH12K_WMI_SPECTRAL_ENABLE_CMD_DISABLE 2 5009 5010 struct ath12k_wmi_vdev_spectral_enable_cmd { 5011 __le32 tlv_header; 5012 __le32 vdev_id; 5013 __le32 trigger_cmd; 5014 __le32 enable_cmd; 5015 } __packed; 5016 5017 struct ath12k_wmi_pdev_dma_ring_cfg_arg { 5018 u32 tlv_header; 5019 u32 pdev_id; 5020 u32 module_id; 5021 u32 base_paddr_lo; 5022 u32 base_paddr_hi; 5023 u32 head_idx_paddr_lo; 5024 u32 head_idx_paddr_hi; 5025 u32 tail_idx_paddr_lo; 5026 u32 tail_idx_paddr_hi; 5027 u32 num_elems; 5028 u32 buf_size; 5029 u32 num_resp_per_event; 5030 u32 event_timeout_ms; 5031 }; 5032 5033 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd { 5034 __le32 tlv_header; 5035 __le32 pdev_id; 5036 __le32 module_id; /* see enum wmi_direct_buffer_module */ 5037 __le32 base_paddr_lo; 5038 __le32 base_paddr_hi; 5039 __le32 head_idx_paddr_lo; 5040 __le32 head_idx_paddr_hi; 5041 __le32 tail_idx_paddr_lo; 5042 __le32 tail_idx_paddr_hi; 5043 __le32 num_elems; /* Number of elems in the ring */ 5044 __le32 buf_size; /* size of allocated buffer in bytes */ 5045 5046 /* Number of wmi_dma_buf_release_entry packed together */ 5047 __le32 num_resp_per_event; 5048 5049 /* Target should timeout and send whatever resp 5050 * it has if this time expires, units in milliseconds 5051 */ 5052 __le32 event_timeout_ms; 5053 } __packed; 5054 5055 struct ath12k_wmi_dma_buf_release_fixed_params { 5056 __le32 pdev_id; 5057 __le32 module_id; 5058 __le32 num_buf_release_entry; 5059 __le32 num_meta_data_entry; 5060 } __packed; 5061 5062 struct ath12k_wmi_dma_buf_release_entry_params { 5063 __le32 tlv_header; 5064 __le32 paddr_lo; 5065 5066 /* Bits 11:0: address of data 5067 * Bits 31:12: host context data 5068 */ 5069 __le32 paddr_hi; 5070 } __packed; 5071 5072 #define WMI_SPECTRAL_META_INFO1_FREQ1 GENMASK(15, 0) 5073 #define WMI_SPECTRAL_META_INFO1_FREQ2 GENMASK(31, 16) 5074 5075 #define WMI_SPECTRAL_META_INFO2_CHN_WIDTH GENMASK(7, 0) 5076 5077 struct ath12k_wmi_dma_buf_release_meta_data_params { 5078 __le32 tlv_header; 5079 a_sle32 noise_floor[WMI_MAX_CHAINS]; 5080 __le32 reset_delay; 5081 __le32 freq1; 5082 __le32 freq2; 5083 __le32 ch_width; 5084 } __packed; 5085 5086 enum wmi_fils_discovery_cmd_type { 5087 WMI_FILS_DISCOVERY_CMD, 5088 WMI_UNSOL_BCAST_PROBE_RESP, 5089 }; 5090 5091 struct wmi_fils_discovery_cmd { 5092 __le32 tlv_header; 5093 __le32 vdev_id; 5094 __le32 interval; 5095 __le32 config; /* enum wmi_fils_discovery_cmd_type */ 5096 } __packed; 5097 5098 struct wmi_fils_discovery_tmpl_cmd { 5099 __le32 tlv_header; 5100 __le32 vdev_id; 5101 __le32 buf_len; 5102 } __packed; 5103 5104 struct wmi_probe_tmpl_cmd { 5105 __le32 tlv_header; 5106 __le32 vdev_id; 5107 __le32 buf_len; 5108 } __packed; 5109 5110 #define MAX_RADIOS 2 5111 5112 #define WMI_MLO_CMD_TIMEOUT_HZ (5 * HZ) 5113 #define WMI_SERVICE_READY_TIMEOUT_HZ (5 * HZ) 5114 #define WMI_SEND_TIMEOUT_HZ (3 * HZ) 5115 5116 struct ath12k_wmi_pdev { 5117 struct ath12k_wmi_base *wmi_ab; 5118 enum ath12k_htc_ep_id eid; 5119 u32 rx_decap_mode; 5120 }; 5121 5122 struct ath12k_hw_mode_freq_range_arg { 5123 u32 low_2ghz_freq; 5124 u32 high_2ghz_freq; 5125 u32 low_5ghz_freq; 5126 u32 high_5ghz_freq; 5127 }; 5128 5129 struct ath12k_svc_ext_mac_phy_info { 5130 enum wmi_host_hw_mode_config_type hw_mode_config_type; 5131 u32 phy_id; 5132 u32 supported_bands; 5133 struct ath12k_hw_mode_freq_range_arg hw_freq_range; 5134 }; 5135 5136 #define ATH12K_MAX_MAC_PHY_CAP 8 5137 5138 struct ath12k_svc_ext_info { 5139 u32 num_hw_modes; 5140 struct ath12k_svc_ext_mac_phy_info mac_phy_info[ATH12K_MAX_MAC_PHY_CAP]; 5141 }; 5142 5143 /** 5144 * enum ath12k_hw_mode - enum for host mode 5145 * @ATH12K_HW_MODE_SMM: Single mac mode 5146 * @ATH12K_HW_MODE_DBS: DBS mode 5147 * @ATH12K_HW_MODE_SBS: SBS mode with either high share or low share 5148 * @ATH12K_HW_MODE_SBS_UPPER_SHARE: Higher 5 GHz shared with 2.4 GHz 5149 * @ATH12K_HW_MODE_SBS_LOWER_SHARE: Lower 5 GHz shared with 2.4 GHz 5150 * @ATH12K_HW_MODE_MAX: Max, used to indicate invalid mode 5151 */ 5152 enum ath12k_hw_mode { 5153 ATH12K_HW_MODE_SMM, 5154 ATH12K_HW_MODE_DBS, 5155 ATH12K_HW_MODE_SBS, 5156 ATH12K_HW_MODE_SBS_UPPER_SHARE, 5157 ATH12K_HW_MODE_SBS_LOWER_SHARE, 5158 ATH12K_HW_MODE_MAX, 5159 }; 5160 5161 struct ath12k_hw_mode_info { 5162 bool support_dbs:1; 5163 bool support_sbs:1; 5164 5165 struct ath12k_hw_mode_freq_range_arg freq_range_caps[ATH12K_HW_MODE_MAX] 5166 [MAX_RADIOS]; 5167 }; 5168 5169 struct ath12k_wmi_base { 5170 struct ath12k_base *ab; 5171 struct ath12k_wmi_pdev wmi[MAX_RADIOS]; 5172 enum ath12k_htc_ep_id wmi_endpoint_id[MAX_RADIOS]; 5173 u32 max_msg_len[MAX_RADIOS]; 5174 5175 struct completion service_ready; 5176 struct completion unified_ready; 5177 DECLARE_BITMAP(svc_map, WMI_MAX_EXT2_SERVICE); 5178 wait_queue_head_t tx_credits_wq; 5179 u32 num_mem_chunks; 5180 u32 rx_decap_mode; 5181 struct ath12k_wmi_host_mem_chunk_arg mem_chunks[WMI_MAX_MEM_REQS]; 5182 5183 enum wmi_host_hw_mode_config_type preferred_hw_mode; 5184 5185 struct ath12k_wmi_target_cap_arg *targ_cap; 5186 5187 struct ath12k_svc_ext_info svc_ext_info; 5188 u32 sbs_lower_band_end_freq; 5189 struct ath12k_hw_mode_info hw_mode_info; 5190 }; 5191 5192 struct wmi_pdev_set_bios_interface_cmd { 5193 __le32 tlv_header; 5194 __le32 pdev_id; 5195 __le32 param_type_id; 5196 __le32 length; 5197 } __packed; 5198 5199 enum wmi_bios_param_type { 5200 WMI_BIOS_PARAM_CCA_THRESHOLD_TYPE = 0, 5201 WMI_BIOS_PARAM_TAS_CONFIG_TYPE = 1, 5202 WMI_BIOS_PARAM_TAS_DATA_TYPE = 2, 5203 5204 /* bandedge control power */ 5205 WMI_BIOS_PARAM_TYPE_BANDEDGE = 3, 5206 5207 WMI_BIOS_PARAM_TYPE_MAX, 5208 }; 5209 5210 struct wmi_pdev_set_bios_sar_table_cmd { 5211 __le32 tlv_header; 5212 __le32 pdev_id; 5213 __le32 sar_len; 5214 __le32 dbs_backoff_len; 5215 } __packed; 5216 5217 struct wmi_pdev_set_bios_geo_table_cmd { 5218 __le32 tlv_header; 5219 __le32 pdev_id; 5220 __le32 geo_len; 5221 } __packed; 5222 5223 #define ATH12K_FW_STATS_BUF_SIZE (1024 * 1024) 5224 5225 enum wmi_sys_cap_info_flags { 5226 WMI_SYS_CAP_INFO_RXTX_LED = BIT(0), 5227 WMI_SYS_CAP_INFO_RFKILL = BIT(1), 5228 }; 5229 5230 #define WMI_RFKILL_CFG_GPIO_PIN_NUM GENMASK(5, 0) 5231 #define WMI_RFKILL_CFG_RADIO_LEVEL BIT(6) 5232 #define WMI_RFKILL_CFG_PIN_AS_GPIO GENMASK(10, 7) 5233 5234 enum wmi_rfkill_enable_radio { 5235 WMI_RFKILL_ENABLE_RADIO_ON = 0, 5236 WMI_RFKILL_ENABLE_RADIO_OFF = 1, 5237 }; 5238 5239 enum wmi_rfkill_radio_state { 5240 WMI_RFKILL_RADIO_STATE_OFF = 1, 5241 WMI_RFKILL_RADIO_STATE_ON = 2, 5242 }; 5243 5244 struct wmi_rfkill_state_change_event { 5245 __le32 gpio_pin_num; 5246 __le32 int_type; 5247 __le32 radio_state; 5248 } __packed; 5249 5250 struct wmi_twt_enable_event { 5251 __le32 pdev_id; 5252 __le32 status; 5253 } __packed; 5254 5255 struct wmi_twt_disable_event { 5256 __le32 pdev_id; 5257 __le32 status; 5258 } __packed; 5259 5260 struct wmi_mlo_setup_cmd { 5261 __le32 tlv_header; 5262 __le32 mld_group_id; 5263 __le32 pdev_id; 5264 } __packed; 5265 5266 struct wmi_mlo_setup_arg { 5267 __le32 group_id; 5268 u8 num_partner_links; 5269 u8 *partner_link_id; 5270 }; 5271 5272 struct wmi_mlo_ready_cmd { 5273 __le32 tlv_header; 5274 __le32 pdev_id; 5275 } __packed; 5276 5277 enum wmi_mlo_tear_down_reason_code_type { 5278 WMI_MLO_TEARDOWN_SSR_REASON, 5279 }; 5280 5281 struct wmi_mlo_teardown_cmd { 5282 __le32 tlv_header; 5283 __le32 pdev_id; 5284 __le32 reason_code; 5285 } __packed; 5286 5287 struct wmi_mlo_setup_complete_event { 5288 __le32 pdev_id; 5289 __le32 status; 5290 } __packed; 5291 5292 struct wmi_mlo_teardown_complete_event { 5293 __le32 pdev_id; 5294 __le32 status; 5295 } __packed; 5296 5297 /* WOW structures */ 5298 enum wmi_wow_wakeup_event { 5299 WOW_BMISS_EVENT = 0, 5300 WOW_BETTER_AP_EVENT, 5301 WOW_DEAUTH_RECVD_EVENT, 5302 WOW_MAGIC_PKT_RECVD_EVENT, 5303 WOW_GTK_ERR_EVENT, 5304 WOW_FOURWAY_HSHAKE_EVENT, 5305 WOW_EAPOL_RECVD_EVENT, 5306 WOW_NLO_DETECTED_EVENT, 5307 WOW_DISASSOC_RECVD_EVENT, 5308 WOW_PATTERN_MATCH_EVENT, 5309 WOW_CSA_IE_EVENT, 5310 WOW_PROBE_REQ_WPS_IE_EVENT, 5311 WOW_AUTH_REQ_EVENT, 5312 WOW_ASSOC_REQ_EVENT, 5313 WOW_HTT_EVENT, 5314 WOW_RA_MATCH_EVENT, 5315 WOW_HOST_AUTO_SHUTDOWN_EVENT, 5316 WOW_IOAC_MAGIC_EVENT, 5317 WOW_IOAC_SHORT_EVENT, 5318 WOW_IOAC_EXTEND_EVENT, 5319 WOW_IOAC_TIMER_EVENT, 5320 WOW_DFS_PHYERR_RADAR_EVENT, 5321 WOW_BEACON_EVENT, 5322 WOW_CLIENT_KICKOUT_EVENT, 5323 WOW_EVENT_MAX, 5324 }; 5325 5326 enum wmi_wow_interface_cfg { 5327 WOW_IFACE_PAUSE_ENABLED, 5328 WOW_IFACE_PAUSE_DISABLED 5329 }; 5330 5331 #define C2S(x) case x: return #x 5332 5333 static inline const char *wow_wakeup_event(enum wmi_wow_wakeup_event ev) 5334 { 5335 switch (ev) { 5336 C2S(WOW_BMISS_EVENT); 5337 C2S(WOW_BETTER_AP_EVENT); 5338 C2S(WOW_DEAUTH_RECVD_EVENT); 5339 C2S(WOW_MAGIC_PKT_RECVD_EVENT); 5340 C2S(WOW_GTK_ERR_EVENT); 5341 C2S(WOW_FOURWAY_HSHAKE_EVENT); 5342 C2S(WOW_EAPOL_RECVD_EVENT); 5343 C2S(WOW_NLO_DETECTED_EVENT); 5344 C2S(WOW_DISASSOC_RECVD_EVENT); 5345 C2S(WOW_PATTERN_MATCH_EVENT); 5346 C2S(WOW_CSA_IE_EVENT); 5347 C2S(WOW_PROBE_REQ_WPS_IE_EVENT); 5348 C2S(WOW_AUTH_REQ_EVENT); 5349 C2S(WOW_ASSOC_REQ_EVENT); 5350 C2S(WOW_HTT_EVENT); 5351 C2S(WOW_RA_MATCH_EVENT); 5352 C2S(WOW_HOST_AUTO_SHUTDOWN_EVENT); 5353 C2S(WOW_IOAC_MAGIC_EVENT); 5354 C2S(WOW_IOAC_SHORT_EVENT); 5355 C2S(WOW_IOAC_EXTEND_EVENT); 5356 C2S(WOW_IOAC_TIMER_EVENT); 5357 C2S(WOW_DFS_PHYERR_RADAR_EVENT); 5358 C2S(WOW_BEACON_EVENT); 5359 C2S(WOW_CLIENT_KICKOUT_EVENT); 5360 C2S(WOW_EVENT_MAX); 5361 default: 5362 return NULL; 5363 } 5364 } 5365 5366 enum wmi_wow_wake_reason { 5367 WOW_REASON_UNSPECIFIED = -1, 5368 WOW_REASON_NLOD = 0, 5369 WOW_REASON_AP_ASSOC_LOST, 5370 WOW_REASON_LOW_RSSI, 5371 WOW_REASON_DEAUTH_RECVD, 5372 WOW_REASON_DISASSOC_RECVD, 5373 WOW_REASON_GTK_HS_ERR, 5374 WOW_REASON_EAP_REQ, 5375 WOW_REASON_FOURWAY_HS_RECV, 5376 WOW_REASON_TIMER_INTR_RECV, 5377 WOW_REASON_PATTERN_MATCH_FOUND, 5378 WOW_REASON_RECV_MAGIC_PATTERN, 5379 WOW_REASON_P2P_DISC, 5380 WOW_REASON_WLAN_HB, 5381 WOW_REASON_CSA_EVENT, 5382 WOW_REASON_PROBE_REQ_WPS_IE_RECV, 5383 WOW_REASON_AUTH_REQ_RECV, 5384 WOW_REASON_ASSOC_REQ_RECV, 5385 WOW_REASON_HTT_EVENT, 5386 WOW_REASON_RA_MATCH, 5387 WOW_REASON_HOST_AUTO_SHUTDOWN, 5388 WOW_REASON_IOAC_MAGIC_EVENT, 5389 WOW_REASON_IOAC_SHORT_EVENT, 5390 WOW_REASON_IOAC_EXTEND_EVENT, 5391 WOW_REASON_IOAC_TIMER_EVENT, 5392 WOW_REASON_ROAM_HO, 5393 WOW_REASON_DFS_PHYERR_RADADR_EVENT, 5394 WOW_REASON_BEACON_RECV, 5395 WOW_REASON_CLIENT_KICKOUT_EVENT, 5396 WOW_REASON_PAGE_FAULT = 0x3a, 5397 WOW_REASON_DEBUG_TEST = 0xFF, 5398 }; 5399 5400 static inline const char *wow_reason(enum wmi_wow_wake_reason reason) 5401 { 5402 switch (reason) { 5403 C2S(WOW_REASON_UNSPECIFIED); 5404 C2S(WOW_REASON_NLOD); 5405 C2S(WOW_REASON_AP_ASSOC_LOST); 5406 C2S(WOW_REASON_LOW_RSSI); 5407 C2S(WOW_REASON_DEAUTH_RECVD); 5408 C2S(WOW_REASON_DISASSOC_RECVD); 5409 C2S(WOW_REASON_GTK_HS_ERR); 5410 C2S(WOW_REASON_EAP_REQ); 5411 C2S(WOW_REASON_FOURWAY_HS_RECV); 5412 C2S(WOW_REASON_TIMER_INTR_RECV); 5413 C2S(WOW_REASON_PATTERN_MATCH_FOUND); 5414 C2S(WOW_REASON_RECV_MAGIC_PATTERN); 5415 C2S(WOW_REASON_P2P_DISC); 5416 C2S(WOW_REASON_WLAN_HB); 5417 C2S(WOW_REASON_CSA_EVENT); 5418 C2S(WOW_REASON_PROBE_REQ_WPS_IE_RECV); 5419 C2S(WOW_REASON_AUTH_REQ_RECV); 5420 C2S(WOW_REASON_ASSOC_REQ_RECV); 5421 C2S(WOW_REASON_HTT_EVENT); 5422 C2S(WOW_REASON_RA_MATCH); 5423 C2S(WOW_REASON_HOST_AUTO_SHUTDOWN); 5424 C2S(WOW_REASON_IOAC_MAGIC_EVENT); 5425 C2S(WOW_REASON_IOAC_SHORT_EVENT); 5426 C2S(WOW_REASON_IOAC_EXTEND_EVENT); 5427 C2S(WOW_REASON_IOAC_TIMER_EVENT); 5428 C2S(WOW_REASON_ROAM_HO); 5429 C2S(WOW_REASON_DFS_PHYERR_RADADR_EVENT); 5430 C2S(WOW_REASON_BEACON_RECV); 5431 C2S(WOW_REASON_CLIENT_KICKOUT_EVENT); 5432 C2S(WOW_REASON_PAGE_FAULT); 5433 C2S(WOW_REASON_DEBUG_TEST); 5434 default: 5435 return NULL; 5436 } 5437 } 5438 5439 #undef C2S 5440 5441 #define WOW_DEFAULT_BITMAP_PATTERN_SIZE 148 5442 #define WOW_DEFAULT_BITMASK_SIZE 148 5443 5444 #define WOW_MIN_PATTERN_SIZE 1 5445 #define WOW_MAX_PATTERN_SIZE 148 5446 #define WOW_MAX_PKT_OFFSET 128 5447 #define WOW_HDR_LEN (sizeof(struct ieee80211_hdr_3addr) + \ 5448 sizeof(struct rfc1042_hdr)) 5449 #define WOW_MAX_REDUCE (WOW_HDR_LEN - sizeof(struct ethhdr) - \ 5450 offsetof(struct ieee80211_hdr_3addr, addr1)) 5451 5452 struct wmi_wow_bitmap_pattern_params { 5453 __le32 tlv_header; 5454 u8 patternbuf[WOW_DEFAULT_BITMAP_PATTERN_SIZE]; 5455 u8 bitmaskbuf[WOW_DEFAULT_BITMASK_SIZE]; 5456 __le32 pattern_offset; 5457 __le32 pattern_len; 5458 __le32 bitmask_len; 5459 __le32 pattern_id; 5460 } __packed; 5461 5462 struct wmi_wow_add_pattern_cmd { 5463 __le32 tlv_header; 5464 __le32 vdev_id; 5465 __le32 pattern_id; 5466 __le32 pattern_type; 5467 } __packed; 5468 5469 struct wmi_wow_del_pattern_cmd { 5470 __le32 tlv_header; 5471 __le32 vdev_id; 5472 __le32 pattern_id; 5473 __le32 pattern_type; 5474 } __packed; 5475 5476 enum wmi_tlv_pattern_type { 5477 WOW_PATTERN_MIN = 0, 5478 WOW_BITMAP_PATTERN = WOW_PATTERN_MIN, 5479 WOW_IPV4_SYNC_PATTERN, 5480 WOW_IPV6_SYNC_PATTERN, 5481 WOW_WILD_CARD_PATTERN, 5482 WOW_TIMER_PATTERN, 5483 WOW_MAGIC_PATTERN, 5484 WOW_IPV6_RA_PATTERN, 5485 WOW_IOAC_PKT_PATTERN, 5486 WOW_IOAC_TMR_PATTERN, 5487 WOW_PATTERN_MAX 5488 }; 5489 5490 struct wmi_wow_add_del_event_cmd { 5491 __le32 tlv_header; 5492 __le32 vdev_id; 5493 __le32 is_add; 5494 __le32 event_bitmap; 5495 } __packed; 5496 5497 struct wmi_wow_enable_cmd { 5498 __le32 tlv_header; 5499 __le32 enable; 5500 __le32 pause_iface_config; 5501 __le32 flags; 5502 } __packed; 5503 5504 struct wmi_wow_host_wakeup_cmd { 5505 __le32 tlv_header; 5506 __le32 reserved; 5507 } __packed; 5508 5509 struct wmi_wow_ev_param { 5510 __le32 vdev_id; 5511 __le32 flag; 5512 __le32 wake_reason; 5513 __le32 data_len; 5514 } __packed; 5515 5516 struct wmi_wow_ev_pg_fault_param { 5517 __le32 len; 5518 u8 data[]; 5519 } __packed; 5520 5521 struct wmi_wow_ev_arg { 5522 enum wmi_wow_wake_reason wake_reason; 5523 }; 5524 5525 #define WMI_PNO_MAX_SCHED_SCAN_PLANS 2 5526 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_INT 7200 5527 #define WMI_PNO_MAX_SCHED_SCAN_PLAN_ITRNS 100 5528 #define WMI_PNO_MAX_NETW_CHANNELS 26 5529 #define WMI_PNO_MAX_NETW_CHANNELS_EX 60 5530 #define WMI_PNO_MAX_SUPP_NETWORKS WLAN_SCAN_PARAMS_MAX_SSID 5531 #define WMI_PNO_MAX_IE_LENGTH WLAN_SCAN_PARAMS_MAX_IE_LEN 5532 5533 /* size based of dot11 declaration without extra IEs as we will not carry those for PNO */ 5534 #define WMI_PNO_MAX_PB_REQ_SIZE 450 5535 5536 #define WMI_PNO_24GHZ_DEFAULT_CH 1 5537 #define WMI_PNO_5GHZ_DEFAULT_CH 36 5538 5539 #define WMI_ACTIVE_MAX_CHANNEL_TIME 40 5540 #define WMI_PASSIVE_MAX_CHANNEL_TIME 110 5541 5542 /* SSID broadcast type */ 5543 enum wmi_ssid_bcast_type { 5544 BCAST_UNKNOWN = 0, 5545 BCAST_NORMAL = 1, 5546 BCAST_HIDDEN = 2, 5547 }; 5548 5549 #define WMI_NLO_MAX_SSIDS 16 5550 #define WMI_NLO_MAX_CHAN 48 5551 5552 #define WMI_NLO_CONFIG_STOP BIT(0) 5553 #define WMI_NLO_CONFIG_START BIT(1) 5554 #define WMI_NLO_CONFIG_RESET BIT(2) 5555 #define WMI_NLO_CONFIG_SLOW_SCAN BIT(4) 5556 #define WMI_NLO_CONFIG_FAST_SCAN BIT(5) 5557 #define WMI_NLO_CONFIG_SSID_HIDE_EN BIT(6) 5558 5559 /* This bit is used to indicate if EPNO or supplicant PNO is enabled. 5560 * Only one of them can be enabled at a given time 5561 */ 5562 #define WMI_NLO_CONFIG_ENLO BIT(7) 5563 #define WMI_NLO_CONFIG_SCAN_PASSIVE BIT(8) 5564 #define WMI_NLO_CONFIG_ENLO_RESET BIT(9) 5565 #define WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ BIT(10) 5566 #define WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ BIT(11) 5567 #define WMI_NLO_CONFIG_ENABLE_IE_WHITELIST_IN_PROBE_REQ BIT(12) 5568 #define WMI_NLO_CONFIG_ENABLE_CNLO_RSSI_CONFIG BIT(13) 5569 5570 struct wmi_nlo_ssid_params { 5571 __le32 valid; 5572 struct ath12k_wmi_ssid_params ssid; 5573 } __packed; 5574 5575 struct wmi_nlo_enc_params { 5576 __le32 valid; 5577 __le32 enc_type; 5578 } __packed; 5579 5580 struct wmi_nlo_auth_params { 5581 __le32 valid; 5582 __le32 auth_type; 5583 } __packed; 5584 5585 struct wmi_nlo_bcast_nw_params { 5586 __le32 valid; 5587 __le32 bcast_nw_type; 5588 } __packed; 5589 5590 struct wmi_nlo_rssi_params { 5591 __le32 valid; 5592 __le32 rssi; 5593 } __packed; 5594 5595 struct nlo_configured_params { 5596 /* TLV tag and len;*/ 5597 __le32 tlv_header; 5598 struct wmi_nlo_ssid_params ssid; 5599 struct wmi_nlo_enc_params enc_type; 5600 struct wmi_nlo_auth_params auth_type; 5601 struct wmi_nlo_rssi_params rssi_cond; 5602 5603 /* indicates if the SSID is hidden or not */ 5604 struct wmi_nlo_bcast_nw_params bcast_nw_type; 5605 } __packed; 5606 5607 struct wmi_network_type_arg { 5608 struct cfg80211_ssid ssid; 5609 u32 authentication; 5610 u32 encryption; 5611 u32 bcast_nw_type; 5612 u8 channel_count; 5613 u16 channels[WMI_PNO_MAX_NETW_CHANNELS_EX]; 5614 s32 rssi_threshold; 5615 }; 5616 5617 struct wmi_pno_scan_req_arg { 5618 u8 enable; 5619 u8 vdev_id; 5620 u8 uc_networks_count; 5621 struct wmi_network_type_arg a_networks[WMI_PNO_MAX_SUPP_NETWORKS]; 5622 u32 fast_scan_period; 5623 u32 slow_scan_period; 5624 u8 fast_scan_max_cycles; 5625 5626 bool do_passive_scan; 5627 5628 u32 delay_start_time; 5629 u32 active_min_time; 5630 u32 active_max_time; 5631 u32 passive_min_time; 5632 u32 passive_max_time; 5633 5634 /* mac address randomization attributes */ 5635 u32 enable_pno_scan_randomization; 5636 u8 mac_addr[ETH_ALEN]; 5637 u8 mac_addr_mask[ETH_ALEN]; 5638 }; 5639 5640 struct wmi_wow_nlo_config_cmd { 5641 __le32 tlv_header; 5642 __le32 flags; 5643 __le32 vdev_id; 5644 __le32 fast_scan_max_cycles; 5645 __le32 active_dwell_time; 5646 __le32 passive_dwell_time; 5647 __le32 probe_bundle_size; 5648 5649 /* ART = IRT */ 5650 __le32 rest_time; 5651 5652 /* max value that can be reached after scan_backoff_multiplier */ 5653 __le32 max_rest_time; 5654 5655 __le32 scan_backoff_multiplier; 5656 __le32 fast_scan_period; 5657 5658 /* specific to windows */ 5659 __le32 slow_scan_period; 5660 5661 __le32 no_of_ssids; 5662 5663 __le32 num_of_channels; 5664 5665 /* NLO scan start delay time in milliseconds */ 5666 __le32 delay_start_time; 5667 5668 /* MAC Address to use in Probe Req as SA */ 5669 struct ath12k_wmi_mac_addr_params mac_addr; 5670 5671 /* Mask on which MAC has to be randomized */ 5672 struct ath12k_wmi_mac_addr_params mac_mask; 5673 5674 /* IE bitmap to use in Probe Req */ 5675 __le32 ie_bitmap[8]; 5676 5677 /* Number of vendor OUIs. In the TLV vendor_oui[] */ 5678 __le32 num_vendor_oui; 5679 5680 /* Number of connected NLO band preferences */ 5681 __le32 num_cnlo_band_pref; 5682 5683 /* The TLVs will follow. 5684 * nlo_configured_params nlo_list[]; 5685 * u32 channel_list[num_of_channels]; 5686 */ 5687 } __packed; 5688 5689 /* Definition of HW data filtering */ 5690 enum hw_data_filter_type { 5691 WMI_HW_DATA_FILTER_DROP_NON_ARP_BC = BIT(0), 5692 WMI_HW_DATA_FILTER_DROP_NON_ICMPV6_MC = BIT(1), 5693 }; 5694 5695 struct wmi_hw_data_filter_cmd { 5696 __le32 tlv_header; 5697 __le32 vdev_id; 5698 __le32 enable; 5699 __le32 hw_filter_bitmap; 5700 } __packed; 5701 5702 struct wmi_hw_data_filter_arg { 5703 u32 vdev_id; 5704 bool enable; 5705 u32 hw_filter_bitmap; 5706 }; 5707 5708 #define WMI_IPV6_UC_TYPE 0 5709 #define WMI_IPV6_AC_TYPE 1 5710 5711 #define WMI_IPV6_MAX_COUNT 16 5712 #define WMI_IPV4_MAX_COUNT 2 5713 5714 struct wmi_arp_ns_offload_arg { 5715 u8 ipv4_addr[WMI_IPV4_MAX_COUNT][4]; 5716 u32 ipv4_count; 5717 u32 ipv6_count; 5718 u8 ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5719 u8 self_ipv6_addr[WMI_IPV6_MAX_COUNT][16]; 5720 u8 ipv6_type[WMI_IPV6_MAX_COUNT]; 5721 bool ipv6_valid[WMI_IPV6_MAX_COUNT]; 5722 u8 mac_addr[ETH_ALEN]; 5723 }; 5724 5725 #define WMI_MAX_NS_OFFLOADS 2 5726 #define WMI_MAX_ARP_OFFLOADS 2 5727 5728 #define WMI_ARPOL_FLAGS_VALID BIT(0) 5729 #define WMI_ARPOL_FLAGS_MAC_VALID BIT(1) 5730 #define WMI_ARPOL_FLAGS_REMOTE_IP_VALID BIT(2) 5731 5732 struct wmi_arp_offload_params { 5733 __le32 tlv_header; 5734 __le32 flags; 5735 u8 target_ipaddr[4]; 5736 u8 remote_ipaddr[4]; 5737 struct ath12k_wmi_mac_addr_params target_mac; 5738 } __packed; 5739 5740 #define WMI_NSOL_FLAGS_VALID BIT(0) 5741 #define WMI_NSOL_FLAGS_MAC_VALID BIT(1) 5742 #define WMI_NSOL_FLAGS_REMOTE_IP_VALID BIT(2) 5743 #define WMI_NSOL_FLAGS_IS_IPV6_ANYCAST BIT(3) 5744 5745 #define WMI_NSOL_MAX_TARGET_IPS 2 5746 5747 struct wmi_ns_offload_params { 5748 __le32 tlv_header; 5749 __le32 flags; 5750 u8 target_ipaddr[WMI_NSOL_MAX_TARGET_IPS][16]; 5751 u8 solicitation_ipaddr[16]; 5752 u8 remote_ipaddr[16]; 5753 struct ath12k_wmi_mac_addr_params target_mac; 5754 } __packed; 5755 5756 struct wmi_set_arp_ns_offload_cmd { 5757 __le32 tlv_header; 5758 __le32 flags; 5759 __le32 vdev_id; 5760 __le32 num_ns_ext_tuples; 5761 /* The TLVs follow: 5762 * wmi_ns_offload_params ns[WMI_MAX_NS_OFFLOADS]; 5763 * wmi_arp_offload_params arp[WMI_MAX_ARP_OFFLOADS]; 5764 * wmi_ns_offload_params ns_ext[num_ns_ext_tuples]; 5765 */ 5766 } __packed; 5767 5768 #define GTK_OFFLOAD_OPCODE_MASK 0xFF000000 5769 #define GTK_OFFLOAD_ENABLE_OPCODE 0x01000000 5770 #define GTK_OFFLOAD_DISABLE_OPCODE 0x02000000 5771 #define GTK_OFFLOAD_REQUEST_STATUS_OPCODE 0x04000000 5772 5773 #define GTK_OFFLOAD_KEK_BYTES 16 5774 #define GTK_OFFLOAD_KCK_BYTES 16 5775 #define GTK_REPLAY_COUNTER_BYTES 8 5776 #define WMI_MAX_KEY_LEN 32 5777 #define IGTK_PN_SIZE 6 5778 5779 struct wmi_gtk_offload_status_event { 5780 __le32 vdev_id; 5781 __le32 flags; 5782 __le32 refresh_cnt; 5783 __le64 replay_ctr; 5784 u8 igtk_key_index; 5785 u8 igtk_key_length; 5786 u8 igtk_key_rsc[IGTK_PN_SIZE]; 5787 u8 igtk_key[WMI_MAX_KEY_LEN]; 5788 u8 gtk_key_index; 5789 u8 gtk_key_length; 5790 u8 gtk_key_rsc[GTK_REPLAY_COUNTER_BYTES]; 5791 u8 gtk_key[WMI_MAX_KEY_LEN]; 5792 } __packed; 5793 5794 struct wmi_gtk_rekey_offload_cmd { 5795 __le32 tlv_header; 5796 __le32 vdev_id; 5797 __le32 flags; 5798 u8 kek[GTK_OFFLOAD_KEK_BYTES]; 5799 u8 kck[GTK_OFFLOAD_KCK_BYTES]; 5800 u8 replay_ctr[GTK_REPLAY_COUNTER_BYTES]; 5801 } __packed; 5802 5803 struct wmi_sta_keepalive_cmd { 5804 __le32 tlv_header; 5805 __le32 vdev_id; 5806 __le32 enabled; 5807 5808 /* WMI_STA_KEEPALIVE_METHOD_ */ 5809 __le32 method; 5810 5811 /* in seconds */ 5812 __le32 interval; 5813 5814 /* following this structure is the TLV for struct 5815 * wmi_sta_keepalive_arp_resp_params 5816 */ 5817 } __packed; 5818 5819 struct wmi_sta_keepalive_arp_resp_params { 5820 __le32 tlv_header; 5821 __le32 src_ip4_addr; 5822 __le32 dest_ip4_addr; 5823 struct ath12k_wmi_mac_addr_params dest_mac_addr; 5824 } __packed; 5825 5826 struct wmi_sta_keepalive_arg { 5827 u32 vdev_id; 5828 u32 enabled; 5829 u32 method; 5830 u32 interval; 5831 u32 src_ip4_addr; 5832 u32 dest_ip4_addr; 5833 const u8 dest_mac_addr[ETH_ALEN]; 5834 }; 5835 5836 enum wmi_sta_keepalive_method { 5837 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1, 5838 WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE = 2, 5839 WMI_STA_KEEPALIVE_METHOD_ETHERNET_LOOPBACK = 3, 5840 WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST = 4, 5841 WMI_STA_KEEPALIVE_METHOD_MGMT_VENDOR_ACTION = 5, 5842 }; 5843 5844 #define WMI_STA_KEEPALIVE_INTERVAL_DEFAULT 30 5845 #define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0 5846 5847 struct wmi_stats_event { 5848 __le32 stats_id; 5849 __le32 num_pdev_stats; 5850 __le32 num_vdev_stats; 5851 __le32 num_peer_stats; 5852 __le32 num_bcnflt_stats; 5853 __le32 num_chan_stats; 5854 __le32 num_mib_stats; 5855 __le32 pdev_id; 5856 __le32 num_bcn_stats; 5857 __le32 num_peer_extd_stats; 5858 __le32 num_peer_extd2_stats; 5859 } __packed; 5860 5861 enum wmi_stats_id { 5862 WMI_REQUEST_PDEV_STAT = BIT(2), 5863 WMI_REQUEST_VDEV_STAT = BIT(3), 5864 WMI_REQUEST_BCN_STAT = BIT(11), 5865 }; 5866 5867 struct wmi_request_stats_cmd { 5868 __le32 tlv_header; 5869 __le32 stats_id; 5870 __le32 vdev_id; 5871 struct ath12k_wmi_mac_addr_params peer_macaddr; 5872 __le32 pdev_id; 5873 } __packed; 5874 5875 #define WLAN_MAX_AC 4 5876 #define MAX_TX_RATE_VALUES 10 5877 5878 struct wmi_vdev_stats_params { 5879 __le32 vdev_id; 5880 __le32 beacon_snr; 5881 __le32 data_snr; 5882 __le32 num_tx_frames[WLAN_MAX_AC]; 5883 __le32 num_rx_frames; 5884 __le32 num_tx_frames_retries[WLAN_MAX_AC]; 5885 __le32 num_tx_frames_failures[WLAN_MAX_AC]; 5886 __le32 num_rts_fail; 5887 __le32 num_rts_success; 5888 __le32 num_rx_err; 5889 __le32 num_rx_discard; 5890 __le32 num_tx_not_acked; 5891 __le32 tx_rate_history[MAX_TX_RATE_VALUES]; 5892 __le32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 5893 } __packed; 5894 5895 struct ath12k_wmi_bcn_stats_params { 5896 __le32 vdev_id; 5897 __le32 tx_bcn_succ_cnt; 5898 __le32 tx_bcn_outage_cnt; 5899 } __packed; 5900 5901 struct ath12k_wmi_pdev_base_stats_params { 5902 a_sle32 chan_nf; 5903 __le32 tx_frame_count; /* Cycles spent transmitting frames */ 5904 __le32 rx_frame_count; /* Cycles spent receiving frames */ 5905 __le32 rx_clear_count; /* Total channel busy time, evidently */ 5906 __le32 cycle_count; /* Total on-channel time */ 5907 __le32 phy_err_count; 5908 __le32 chan_tx_pwr; 5909 } __packed; 5910 5911 struct ath12k_wmi_pdev_tx_stats_params { 5912 a_sle32 comp_queued; 5913 a_sle32 comp_delivered; 5914 a_sle32 msdu_enqued; 5915 a_sle32 mpdu_enqued; 5916 a_sle32 wmm_drop; 5917 a_sle32 local_enqued; 5918 a_sle32 local_freed; 5919 a_sle32 hw_queued; 5920 a_sle32 hw_reaped; 5921 a_sle32 underrun; 5922 a_sle32 tx_abort; 5923 a_sle32 mpdus_requed; 5924 __le32 tx_ko; 5925 __le32 data_rc; 5926 __le32 self_triggers; 5927 __le32 sw_retry_failure; 5928 __le32 illgl_rate_phy_err; 5929 __le32 pdev_cont_xretry; 5930 __le32 pdev_tx_timeout; 5931 __le32 pdev_resets; 5932 __le32 stateless_tid_alloc_failure; 5933 __le32 phy_underrun; 5934 __le32 txop_ovf; 5935 } __packed; 5936 5937 struct ath12k_wmi_pdev_rx_stats_params { 5938 a_sle32 mid_ppdu_route_change; 5939 a_sle32 status_rcvd; 5940 a_sle32 r0_frags; 5941 a_sle32 r1_frags; 5942 a_sle32 r2_frags; 5943 a_sle32 r3_frags; 5944 a_sle32 htt_msdus; 5945 a_sle32 htt_mpdus; 5946 a_sle32 loc_msdus; 5947 a_sle32 loc_mpdus; 5948 a_sle32 oversize_amsdu; 5949 a_sle32 phy_errs; 5950 a_sle32 phy_err_drop; 5951 a_sle32 mpdu_errs; 5952 } __packed; 5953 5954 struct ath12k_wmi_pdev_stats_params { 5955 struct ath12k_wmi_pdev_base_stats_params base; 5956 struct ath12k_wmi_pdev_tx_stats_params tx; 5957 struct ath12k_wmi_pdev_rx_stats_params rx; 5958 } __packed; 5959 5960 struct ath12k_fw_stats_req_params { 5961 u32 stats_id; 5962 u32 vdev_id; 5963 u32 pdev_id; 5964 }; 5965 5966 #define WMI_REQ_CTRL_PATH_PDEV_TX_STAT 1 5967 #define WMI_REQUEST_CTRL_PATH_STAT_GET 1 5968 5969 #define WMI_TPC_CONFIG BIT(1) 5970 #define WMI_TPC_REG_PWR_ALLOWED BIT(2) 5971 #define WMI_TPC_RATES_ARRAY1 BIT(3) 5972 #define WMI_TPC_RATES_ARRAY2 BIT(4) 5973 #define WMI_TPC_RATES_DL_OFDMA_ARRAY BIT(5) 5974 #define WMI_TPC_CTL_PWR_ARRAY BIT(6) 5975 #define WMI_TPC_CONFIG_PARAM 0x1 5976 #define ATH12K_TPC_RATE_ARRAY_MU GENMASK(15, 8) 5977 #define ATH12K_TPC_RATE_ARRAY_SU GENMASK(7, 0) 5978 #define TPC_STATS_REG_PWR_ALLOWED_TYPE 0 5979 5980 enum wmi_halphy_ctrl_path_stats_id { 5981 WMI_HALPHY_PDEV_TX_SU_STATS = 0, 5982 WMI_HALPHY_PDEV_TX_SUTXBF_STATS, 5983 WMI_HALPHY_PDEV_TX_MU_STATS, 5984 WMI_HALPHY_PDEV_TX_MUTXBF_STATS, 5985 WMI_HALPHY_PDEV_TX_STATS_MAX, 5986 }; 5987 5988 enum ath12k_wmi_tpc_stats_rates_array { 5989 ATH12K_TPC_STATS_RATES_ARRAY1, 5990 ATH12K_TPC_STATS_RATES_ARRAY2, 5991 }; 5992 5993 enum ath12k_wmi_tpc_stats_ctl_array { 5994 ATH12K_TPC_STATS_CTL_ARRAY, 5995 ATH12K_TPC_STATS_CTL_160ARRAY, 5996 }; 5997 5998 enum ath12k_wmi_tpc_stats_events { 5999 ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT, 6000 ATH12K_TPC_STATS_RATES_EVENT1, 6001 ATH12K_TPC_STATS_RATES_EVENT2, 6002 ATH12K_TPC_STATS_CTL_TABLE_EVENT 6003 }; 6004 6005 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params { 6006 __le32 tlv_header; 6007 __le32 stats_id_mask; 6008 __le32 request_id; 6009 __le32 action; 6010 __le32 subid; 6011 } __packed; 6012 6013 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params { 6014 __le32 pdev_id; 6015 __le32 end_of_event; 6016 __le32 event_count; 6017 } __packed; 6018 6019 struct wmi_tpc_config_params { 6020 __le32 reg_domain; 6021 __le32 chan_freq; 6022 __le32 phy_mode; 6023 __le32 twice_antenna_reduction; 6024 __le32 twice_max_reg_power; 6025 __le32 twice_antenna_gain; 6026 __le32 power_limit; 6027 __le32 rate_max; 6028 __le32 num_tx_chain; 6029 __le32 ctl; 6030 __le32 flags; 6031 __le32 caps; 6032 } __packed; 6033 6034 struct wmi_max_reg_power_fixed_params { 6035 __le32 reg_power_type; 6036 __le32 reg_array_len; 6037 __le32 d1; 6038 __le32 d2; 6039 __le32 d3; 6040 __le32 d4; 6041 } __packed; 6042 6043 struct wmi_max_reg_power_allowed_arg { 6044 struct wmi_max_reg_power_fixed_params tpc_reg_pwr; 6045 s16 *reg_pwr_array; 6046 }; 6047 6048 struct wmi_tpc_rates_array_fixed_params { 6049 __le32 rate_array_type; 6050 __le32 rate_array_len; 6051 } __packed; 6052 6053 struct wmi_tpc_rates_array_arg { 6054 struct wmi_tpc_rates_array_fixed_params tpc_rates_array; 6055 s16 *rate_array; 6056 }; 6057 6058 struct wmi_tpc_ctl_pwr_fixed_params { 6059 __le32 ctl_array_type; 6060 __le32 ctl_array_len; 6061 __le32 end_of_ctl_pwr; 6062 __le32 ctl_pwr_count; 6063 __le32 d1; 6064 __le32 d2; 6065 __le32 d3; 6066 __le32 d4; 6067 } __packed; 6068 6069 struct wmi_tpc_ctl_pwr_table_arg { 6070 struct wmi_tpc_ctl_pwr_fixed_params tpc_ctl_pwr; 6071 s8 *ctl_pwr_table; 6072 }; 6073 6074 struct wmi_tpc_stats_arg { 6075 u32 pdev_id; 6076 u32 event_count; 6077 u32 end_of_event; 6078 u32 tlvs_rcvd; 6079 struct wmi_max_reg_power_allowed_arg max_reg_allowed_power; 6080 struct wmi_tpc_rates_array_arg rates_array1; 6081 struct wmi_tpc_rates_array_arg rates_array2; 6082 struct wmi_tpc_config_params tpc_config; 6083 struct wmi_tpc_ctl_pwr_table_arg ctl_array; 6084 }; 6085 6086 struct wmi_vdev_ch_power_params { 6087 __le32 tlv_header; 6088 6089 /* Channel center frequency (MHz) */ 6090 __le32 chan_cfreq; 6091 6092 /* Unit: dBm, either PSD/EIRP power for this frequency or 6093 * incremental for non-PSD BW 6094 */ 6095 __le32 tx_power; 6096 } __packed; 6097 6098 struct wmi_vdev_set_tpc_power_cmd { 6099 __le32 tlv_header; 6100 __le32 vdev_id; 6101 6102 /* Value: 0 or 1, is PSD power or not */ 6103 __le32 psd_power; 6104 6105 /* Maximum EIRP power (dBm units), valid only if power is PSD */ 6106 __le32 eirp_power; 6107 6108 /* Type: WMI_6GHZ_REG_TYPE, used for halphy CTL lookup */ 6109 __le32 power_type_6ghz; 6110 6111 /* This fixed_param TLV is followed by the below TLVs: 6112 * num_pwr_levels of wmi_vdev_ch_power_info 6113 * For PSD power, it is the PSD/EIRP power of the frequency (20 MHz chunks). 6114 * For non-PSD power, the power values are for 20, 40, and till 6115 * BSS BW power levels. 6116 * The num_pwr_levels will be checked by sw how many elements present 6117 * in the variable-length array. 6118 */ 6119 } __packed; 6120 6121 #define CRTL_F_DYNC_FORCE_LINK_NUM GENMASK(3, 2) 6122 6123 struct wmi_mlo_link_set_active_cmd { 6124 __le32 tlv_header; 6125 __le32 force_mode; 6126 __le32 reason; 6127 __le32 use_ieee_link_id_bitmap; 6128 struct ath12k_wmi_mac_addr_params ap_mld_mac_addr; 6129 __le32 ctrl_flags; 6130 } __packed; 6131 6132 struct wmi_mlo_set_active_link_number_params { 6133 __le32 tlv_header; 6134 __le32 num_of_link; 6135 __le32 vdev_type; 6136 __le32 vdev_subtype; 6137 __le32 home_freq; 6138 } __packed; 6139 6140 #define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1 GENMASK(7, 0) 6141 #define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2 GENMASK(15, 8) 6142 #define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3 GENMASK(23, 16) 6143 #define WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4 GENMASK(31, 24) 6144 6145 struct wmi_disallowed_mlo_mode_bitmap_params { 6146 __le32 tlv_header; 6147 __le32 disallowed_mode_bitmap; 6148 __le32 ieee_link_id_comb; 6149 } __packed; 6150 6151 enum wmi_mlo_link_force_mode { 6152 WMI_MLO_LINK_FORCE_MODE_ACTIVE = 1, 6153 WMI_MLO_LINK_FORCE_MODE_INACTIVE = 2, 6154 WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM = 3, 6155 WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM = 4, 6156 WMI_MLO_LINK_FORCE_MODE_NO_FORCE = 5, 6157 WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE = 6, 6158 WMI_MLO_LINK_FORCE_MODE_NON_FORCE_UPDATE = 7, 6159 }; 6160 6161 enum wmi_mlo_link_force_reason { 6162 WMI_MLO_LINK_FORCE_REASON_NEW_CONNECT = 1, 6163 WMI_MLO_LINK_FORCE_REASON_NEW_DISCONNECT = 2, 6164 WMI_MLO_LINK_FORCE_REASON_LINK_REMOVAL = 3, 6165 WMI_MLO_LINK_FORCE_REASON_TDLS = 4, 6166 WMI_MLO_LINK_FORCE_REASON_REVERT_FAILURE = 5, 6167 WMI_MLO_LINK_FORCE_REASON_LINK_DELETE = 6, 6168 WMI_MLO_LINK_FORCE_REASON_SINGLE_LINK_EMLSR_OP = 7, 6169 }; 6170 6171 struct wmi_mlo_link_num_arg { 6172 u32 num_of_link; 6173 u32 vdev_type; 6174 u32 vdev_subtype; 6175 u32 home_freq; 6176 }; 6177 6178 struct wmi_mlo_control_flags_arg { 6179 bool overwrite_force_active_bitmap; 6180 bool overwrite_force_inactive_bitmap; 6181 bool dync_force_link_num; 6182 bool post_re_evaluate; 6183 u8 post_re_evaluate_loops; 6184 bool dont_reschedule_workqueue; 6185 }; 6186 6187 struct wmi_ml_link_force_cmd_arg { 6188 u8 ap_mld_mac_addr[ETH_ALEN]; 6189 u16 ieee_link_id_bitmap; 6190 u16 ieee_link_id_bitmap2; 6191 u8 link_num; 6192 }; 6193 6194 struct wmi_ml_disallow_mode_bmap_arg { 6195 u32 disallowed_mode; 6196 union { 6197 u32 ieee_link_id_comb; 6198 u8 ieee_link_id[4]; 6199 }; 6200 }; 6201 6202 /* maximum size of link number param array 6203 * for MLO link set active command 6204 */ 6205 #define WMI_MLO_LINK_NUM_SZ 2 6206 6207 /* maximum size of vdev bitmap array for 6208 * MLO link set active command 6209 */ 6210 #define WMI_MLO_VDEV_BITMAP_SZ 2 6211 6212 /* Max number of disallowed bitmap combination 6213 * sent to firmware 6214 */ 6215 #define WMI_ML_MAX_DISALLOW_BMAP_COMB 4 6216 6217 struct wmi_mlo_link_set_active_arg { 6218 enum wmi_mlo_link_force_mode force_mode; 6219 enum wmi_mlo_link_force_reason reason; 6220 u32 num_link_entry; 6221 u32 num_vdev_bitmap; 6222 u32 num_inactive_vdev_bitmap; 6223 struct wmi_mlo_link_num_arg link_num[WMI_MLO_LINK_NUM_SZ]; 6224 u32 vdev_bitmap[WMI_MLO_VDEV_BITMAP_SZ]; 6225 u32 inactive_vdev_bitmap[WMI_MLO_VDEV_BITMAP_SZ]; 6226 struct wmi_mlo_control_flags_arg ctrl_flags; 6227 bool use_ieee_link_id; 6228 struct wmi_ml_link_force_cmd_arg force_cmd; 6229 u32 num_disallow_mode_comb; 6230 struct wmi_ml_disallow_mode_bmap_arg disallow_bmap[WMI_ML_MAX_DISALLOW_BMAP_COMB]; 6231 }; 6232 6233 #define ATH12K_MAX_20MHZ_SEGMENTS 16 6234 #define ATH12K_MAX_NUM_ANTENNA 8 6235 #define ATH12K_MAX_NUM_NF_HW_DBM 32 6236 6237 struct ath12k_wmi_rssi_dbm_conv_info_fixed_params { 6238 __le32 pdev_id; 6239 } __packed; 6240 6241 struct ath12k_wmi_rssi_dbm_conv_info_params { 6242 __le32 curr_bw; 6243 __le32 curr_rx_chainmask; 6244 __le32 xbar_config; 6245 a_sle32 xlna_bypass_offset; 6246 a_sle32 xlna_bypass_threshold; 6247 a_sle32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM]; 6248 } __packed; 6249 6250 struct ath12k_wmi_rssi_dbm_conv_temp_info_params { 6251 a_sle32 offset; 6252 } __packed; 6253 6254 struct ath12k_wmi_rssi_dbm_conv_param_arg { 6255 u32 curr_bw; 6256 u32 curr_rx_chainmask; 6257 u32 xbar_config; 6258 s32 xlna_bypass_offset; 6259 s32 xlna_bypass_threshold; 6260 s8 nf_hw_dbm[ATH12K_MAX_NUM_ANTENNA][ATH12K_MAX_20MHZ_SEGMENTS]; 6261 }; 6262 6263 struct ath12k_wmi_rssi_dbm_conv_info_arg { 6264 bool temp_offset_present; 6265 s32 temp_offset; 6266 bool nf_dbm_present; 6267 s8 min_nf_dbm; 6268 }; 6269 6270 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 6271 struct ath12k_wmi_resource_config_arg *config); 6272 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 6273 struct ath12k_wmi_resource_config_arg *config); 6274 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 6275 u32 cmd_id); 6276 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_sc, u32 len); 6277 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 6278 struct sk_buff *frame); 6279 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 6280 const u8 *p2p_ie); 6281 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif, 6282 struct ieee80211_mutable_offsets *offs, 6283 struct sk_buff *bcn, 6284 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args); 6285 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id); 6286 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params); 6287 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id); 6288 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 6289 bool restart); 6290 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 6291 u32 vdev_id, u32 param_id, u32 param_val); 6292 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 6293 u32 param_value, u8 pdev_id); 6294 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable); 6295 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab); 6296 int ath12k_wmi_cmd_init(struct ath12k_base *ab); 6297 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab); 6298 int ath12k_wmi_connect(struct ath12k_base *ab); 6299 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 6300 u8 pdev_id); 6301 int ath12k_wmi_attach(struct ath12k_base *ab); 6302 void ath12k_wmi_detach(struct ath12k_base *ab); 6303 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 6304 struct ath12k_wmi_vdev_create_arg *arg); 6305 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 6306 struct ath12k_wmi_peer_create_arg *arg); 6307 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 6308 u32 param_id, u32 param_value); 6309 6310 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 6311 u32 param, u32 param_value); 6312 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms); 6313 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 6314 const u8 *peer_addr, u8 vdev_id); 6315 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id); 6316 void ath12k_wmi_start_scan_init(struct ath12k *ar, 6317 struct ath12k_wmi_scan_req_arg *arg); 6318 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 6319 struct ath12k_wmi_scan_req_arg *arg); 6320 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 6321 struct ath12k_wmi_scan_cancel_arg *arg); 6322 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 6323 struct wmi_wmm_params_all_arg *param); 6324 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 6325 u32 pdev_id); 6326 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id); 6327 6328 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 6329 struct ath12k_wmi_peer_assoc_arg *arg); 6330 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 6331 struct wmi_vdev_install_key_arg *arg); 6332 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 6333 enum wmi_bss_chan_info_req_type type); 6334 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar); 6335 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 6336 u8 peer_addr[ETH_ALEN], 6337 u32 peer_tid_bitmap, 6338 u8 vdev_id); 6339 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 6340 struct ath12k_wmi_ap_ps_arg *arg); 6341 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 6342 struct ath12k_wmi_scan_chan_list_arg *arg); 6343 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 6344 u32 pdev_id); 6345 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac); 6346 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 6347 u32 tid, u32 buf_size); 6348 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 6349 u32 tid, u32 status); 6350 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 6351 u32 tid, u32 initiator, u32 reason); 6352 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 6353 u32 vdev_id, u32 bcn_ctrl_op); 6354 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 6355 struct ath12k_wmi_init_country_arg *arg); 6356 int 6357 ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar, 6358 struct wmi_set_current_country_arg *arg); 6359 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 6360 int vdev_id, const u8 *addr, 6361 dma_addr_t paddr, u8 tid, 6362 u8 ba_window_size_valid, 6363 u32 ba_window_size); 6364 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar, 6365 struct wmi_11d_scan_start_arg *arg); 6366 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id); 6367 int 6368 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 6369 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg); 6370 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 6371 struct ath12k_wmi_pdev_set_regdomain_arg *arg); 6372 int ath12k_wmi_simulate_radar(struct ath12k *ar); 6373 int ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id); 6374 int ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id); 6375 int ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 6376 struct ieee80211_he_obss_pd *he_obss_pd); 6377 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 6378 u8 bss_color, u32 period, 6379 bool enable); 6380 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 6381 bool enable); 6382 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, int pdev_id); 6383 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 6384 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg); 6385 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 6386 u32 trigger, u32 enable); 6387 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 6388 struct ath12k_wmi_vdev_spectral_conf_arg *arg); 6389 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 6390 struct sk_buff *tmpl); 6391 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 6392 bool unsol_bcast_probe_resp_enabled); 6393 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 6394 struct sk_buff *tmpl); 6395 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 6396 enum wmi_host_hw_mode_config_type mode); 6397 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 6398 const u8 *buf, size_t buf_len); 6399 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table); 6400 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table); 6401 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id, 6402 u32 vdev_id, u32 pdev_id); 6403 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len); 6404 6405 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar, 6406 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type); 6407 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar); 6408 6409 static inline u32 6410 ath12k_wmi_caps_ext_get_pdev_id(const struct ath12k_wmi_caps_ext_params *param) 6411 { 6412 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_PDEV_ID); 6413 } 6414 6415 static inline u32 6416 ath12k_wmi_caps_ext_get_hw_link_id(const struct ath12k_wmi_caps_ext_params *param) 6417 { 6418 return le32_get_bits(param->pdev_and_hw_link_ids, WMI_CAPS_PARAMS_HW_LINK_ID); 6419 } 6420 6421 static inline u32 6422 ath12k_wmi_mac_phy_get_pdev_id(const struct ath12k_wmi_mac_phy_caps_params *param) 6423 { 6424 return le32_get_bits(param->pdev_and_hw_link_ids, 6425 WMI_CAPS_PARAMS_PDEV_ID); 6426 } 6427 6428 static inline u32 6429 ath12k_wmi_mac_phy_get_hw_link_id(const struct ath12k_wmi_mac_phy_caps_params *param) 6430 { 6431 return le32_get_bits(param->pdev_and_hw_link_ids, 6432 WMI_CAPS_PARAMS_HW_LINK_ID); 6433 } 6434 6435 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar); 6436 int ath12k_wmi_wow_enable(struct ath12k *ar); 6437 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id); 6438 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 6439 const u8 *pattern, const u8 *mask, 6440 int pattern_len, int pattern_offset); 6441 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 6442 enum wmi_wow_wakeup_event event, 6443 u32 enable); 6444 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 6445 struct wmi_pno_scan_req_arg *pno_scan); 6446 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, 6447 struct wmi_hw_data_filter_arg *arg); 6448 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 6449 struct ath12k_link_vif *arvif, 6450 struct wmi_arp_ns_offload_arg *offload, 6451 bool enable); 6452 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 6453 struct ath12k_link_vif *arvif, bool enable); 6454 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 6455 struct ath12k_link_vif *arvif); 6456 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 6457 const struct wmi_sta_keepalive_arg *arg); 6458 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params); 6459 int ath12k_wmi_mlo_ready(struct ath12k *ar); 6460 int ath12k_wmi_mlo_teardown(struct ath12k *ar); 6461 void ath12k_wmi_fw_stats_dump(struct ath12k *ar, 6462 struct ath12k_fw_stats *fw_stats, u32 stats_id, 6463 char *buf); 6464 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar); 6465 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar, 6466 u32 vdev_id, 6467 struct ath12k_reg_tpc_power_info *param); 6468 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab, 6469 struct wmi_mlo_link_set_active_arg *param); 6470 #endif 6471