1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include "core.h" 18 #include "debugfs.h" 19 #include "debug.h" 20 #include "mac.h" 21 #include "hw.h" 22 #include "peer.h" 23 #include "p2p.h" 24 #include "testmode.h" 25 26 struct ath12k_wmi_svc_ready_parse { 27 bool wmi_svc_bitmap_done; 28 }; 29 30 struct wmi_tlv_fw_stats_parse { 31 const struct wmi_stats_event *ev; 32 struct ath12k_fw_stats *stats; 33 }; 34 35 struct ath12k_wmi_dma_ring_caps_parse { 36 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 37 u32 n_dma_ring_caps; 38 }; 39 40 struct ath12k_wmi_service_ext_arg { 41 u32 default_conc_scan_config_bits; 42 u32 default_fw_config_bits; 43 struct ath12k_wmi_ppe_threshold_arg ppet; 44 u32 he_cap_info; 45 u32 mpdu_density; 46 u32 max_bssid_rx_filters; 47 u32 num_hw_modes; 48 u32 num_phy; 49 }; 50 51 struct ath12k_wmi_svc_rdy_ext_parse { 52 struct ath12k_wmi_service_ext_arg arg; 53 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 54 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 55 u32 n_hw_mode_caps; 56 u32 tot_phy_id; 57 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 58 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 59 u32 n_mac_phy_caps; 60 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 61 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 62 u32 n_ext_hal_reg_caps; 63 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 64 bool hw_mode_done; 65 bool mac_phy_done; 66 bool ext_hal_reg_done; 67 bool mac_phy_chainmask_combo_done; 68 bool mac_phy_chainmask_cap_done; 69 bool oem_dma_ring_cap_done; 70 bool dma_ring_cap_done; 71 }; 72 73 struct ath12k_wmi_svc_rdy_ext2_arg { 74 u32 reg_db_version; 75 u32 hw_min_max_tx_power_2ghz; 76 u32 hw_min_max_tx_power_5ghz; 77 u32 chwidth_num_peer_caps; 78 u32 preamble_puncture_bw; 79 u32 max_user_per_ppdu_ofdma; 80 u32 max_user_per_ppdu_mumimo; 81 u32 target_cap_flags; 82 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 83 u32 max_num_linkview_peers; 84 u32 max_num_msduq_supported_per_tid; 85 u32 default_num_msduq_supported_per_tid; 86 }; 87 88 struct ath12k_wmi_svc_rdy_ext2_parse { 89 struct ath12k_wmi_svc_rdy_ext2_arg arg; 90 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 91 bool dma_ring_cap_done; 92 bool spectral_bin_scaling_done; 93 bool mac_phy_caps_ext_done; 94 bool hal_reg_caps_ext2_done; 95 bool scan_radio_caps_ext2_done; 96 bool twt_caps_done; 97 bool htt_msdu_idx_to_qtype_map_done; 98 bool dbs_or_sbs_cap_ext_done; 99 }; 100 101 struct ath12k_wmi_rdy_parse { 102 u32 num_extra_mac_addr; 103 }; 104 105 struct ath12k_wmi_dma_buf_release_arg { 106 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 107 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 108 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 109 u32 num_buf_entry; 110 u32 num_meta; 111 bool buf_entry_done; 112 bool meta_data_done; 113 }; 114 115 struct ath12k_wmi_tlv_policy { 116 size_t min_len; 117 }; 118 119 struct wmi_tlv_mgmt_rx_parse { 120 const struct ath12k_wmi_mgmt_rx_params *fixed; 121 const u8 *frame_buf; 122 bool frame_buf_done; 123 }; 124 125 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 126 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 127 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 128 [WMI_TAG_SERVICE_READY_EVENT] = { 129 .min_len = sizeof(struct wmi_service_ready_event) }, 130 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 131 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 132 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 133 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 134 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 135 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 136 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 137 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 138 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 139 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 140 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 141 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 142 [WMI_TAG_VDEV_STOPPED_EVENT] = { 143 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 144 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 145 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 146 [WMI_TAG_MGMT_RX_HDR] = { 147 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 148 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 149 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 150 [WMI_TAG_SCAN_EVENT] = { 151 .min_len = sizeof(struct wmi_scan_event) }, 152 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 153 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 154 [WMI_TAG_ROAM_EVENT] = { 155 .min_len = sizeof(struct wmi_roam_event) }, 156 [WMI_TAG_CHAN_INFO_EVENT] = { 157 .min_len = sizeof(struct wmi_chan_info_event) }, 158 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 159 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 160 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 161 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 162 [WMI_TAG_READY_EVENT] = { 163 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 164 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 165 .min_len = sizeof(struct wmi_service_available_event) }, 166 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 167 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 168 [WMI_TAG_RFKILL_EVENT] = { 169 .min_len = sizeof(struct wmi_rfkill_state_change_event) }, 170 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 171 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 172 [WMI_TAG_HOST_SWFDA_EVENT] = { 173 .min_len = sizeof(struct wmi_fils_discovery_event) }, 174 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 175 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 176 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 177 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 178 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = { 179 .min_len = sizeof(struct wmi_twt_enable_event) }, 180 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = { 181 .min_len = sizeof(struct wmi_twt_disable_event) }, 182 [WMI_TAG_P2P_NOA_INFO] = { 183 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) }, 184 [WMI_TAG_P2P_NOA_EVENT] = { 185 .min_len = sizeof(struct wmi_p2p_noa_event) }, 186 [WMI_TAG_11D_NEW_COUNTRY_EVENT] = { 187 .min_len = sizeof(struct wmi_11d_new_cc_event) }, 188 }; 189 190 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 191 { 192 return le32_encode_bits(cmd, WMI_TLV_TAG) | 193 le32_encode_bits(len, WMI_TLV_LEN); 194 } 195 196 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 197 { 198 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 199 } 200 201 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 202 struct ath12k_wmi_resource_config_arg *config) 203 { 204 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS(ab); 205 config->num_peers = ab->num_radios * 206 ath12k_core_get_max_peers_per_radio(ab); 207 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 208 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 209 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 210 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 211 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 212 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 213 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 214 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 215 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 216 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 217 218 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) 219 config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 220 else 221 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 222 223 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 224 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 225 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 226 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 227 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 228 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 229 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 230 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 231 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 232 config->dma_burst_size = TARGET_DMA_BURST_SIZE; 233 config->rx_skip_defrag_timeout_dup_detection_check = 234 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 235 config->vow_config = TARGET_VOW_CONFIG; 236 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 237 config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 238 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 239 config->rx_batchmode = TARGET_RX_BATCHMODE; 240 /* Indicates host supports peer map v3 and unmap v2 support */ 241 config->peer_map_unmap_version = 0x32; 242 config->twt_ap_pdev_count = ab->num_radios; 243 config->twt_ap_sta_count = 1000; 244 config->ema_max_vap_cnt = ab->num_radios; 245 config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD; 246 config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt; 247 248 if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map)) 249 config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B; 250 } 251 252 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 253 struct ath12k_wmi_resource_config_arg *config) 254 { 255 config->num_vdevs = 4; 256 config->num_peers = 16; 257 config->num_tids = 32; 258 259 config->num_offload_peers = 3; 260 config->num_offload_reorder_buffs = 3; 261 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 262 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 263 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 264 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 265 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 266 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 267 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 268 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 269 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 270 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 271 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 272 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 273 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 274 config->num_mcast_groups = 0; 275 config->num_mcast_table_elems = 0; 276 config->mcast2ucast_mode = 0; 277 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 278 config->num_wds_entries = 0; 279 config->dma_burst_size = 0; 280 config->rx_skip_defrag_timeout_dup_detection_check = 0; 281 config->vow_config = TARGET_VOW_CONFIG; 282 config->gtk_offload_max_vdev = 2; 283 config->num_msdu_desc = 0x400; 284 config->beacon_tx_offload_max_vdev = 2; 285 config->rx_batchmode = TARGET_RX_BATCHMODE; 286 287 config->peer_map_unmap_version = 0x1; 288 config->use_pdev_id = 1; 289 config->max_frag_entries = 0xa; 290 config->num_tdls_vdevs = 0x1; 291 config->num_tdls_conn_table_entries = 8; 292 config->beacon_tx_offload_max_vdev = 0x2; 293 config->num_multicast_filter_entries = 0x20; 294 config->num_wow_filters = 0x16; 295 config->num_keep_alive_pattern = 0; 296 } 297 298 #define PRIMAP(_hw_mode_) \ 299 [_hw_mode_] = _hw_mode_##_PRI 300 301 static const int ath12k_hw_mode_pri_map[] = { 302 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 303 PRIMAP(WMI_HOST_HW_MODE_DBS), 304 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 305 PRIMAP(WMI_HOST_HW_MODE_SBS), 306 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 307 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 308 /* keep last */ 309 PRIMAP(WMI_HOST_HW_MODE_MAX), 310 }; 311 312 static int 313 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 314 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 315 const void *ptr, void *data), 316 void *data) 317 { 318 const void *begin = ptr; 319 const struct wmi_tlv *tlv; 320 u16 tlv_tag, tlv_len; 321 int ret; 322 323 while (len > 0) { 324 if (len < sizeof(*tlv)) { 325 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 326 ptr - begin, len, sizeof(*tlv)); 327 return -EINVAL; 328 } 329 330 tlv = ptr; 331 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 332 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 333 ptr += sizeof(*tlv); 334 len -= sizeof(*tlv); 335 336 if (tlv_len > len) { 337 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 338 tlv_tag, ptr - begin, len, tlv_len); 339 return -EINVAL; 340 } 341 342 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 343 ath12k_wmi_tlv_policies[tlv_tag].min_len && 344 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 345 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 346 tlv_tag, ptr - begin, tlv_len, 347 ath12k_wmi_tlv_policies[tlv_tag].min_len); 348 return -EINVAL; 349 } 350 351 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 352 if (ret) 353 return ret; 354 355 ptr += tlv_len; 356 len -= tlv_len; 357 } 358 359 return 0; 360 } 361 362 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 363 const void *ptr, void *data) 364 { 365 const void **tb = data; 366 367 if (tag < WMI_TAG_MAX) 368 tb[tag] = ptr; 369 370 return 0; 371 } 372 373 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb, 374 const void *ptr, size_t len) 375 { 376 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse, 377 (void *)tb); 378 } 379 380 static const void ** 381 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, 382 struct sk_buff *skb, gfp_t gfp) 383 { 384 const void **tb; 385 int ret; 386 387 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp); 388 if (!tb) 389 return ERR_PTR(-ENOMEM); 390 391 ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len); 392 if (ret) { 393 kfree(tb); 394 return ERR_PTR(ret); 395 } 396 397 return tb; 398 } 399 400 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 401 u32 cmd_id) 402 { 403 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 404 struct ath12k_base *ab = wmi->wmi_ab->ab; 405 struct wmi_cmd_hdr *cmd_hdr; 406 int ret; 407 408 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 409 return -ENOMEM; 410 411 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 412 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 413 414 memset(skb_cb, 0, sizeof(*skb_cb)); 415 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 416 417 if (ret) 418 goto err_pull; 419 420 return 0; 421 422 err_pull: 423 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 424 return ret; 425 } 426 427 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 428 u32 cmd_id) 429 { 430 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab; 431 int ret = -EOPNOTSUPP; 432 433 might_sleep(); 434 435 wait_event_timeout(wmi_ab->tx_credits_wq, ({ 436 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 437 438 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags)) 439 ret = -ESHUTDOWN; 440 441 (ret != -EAGAIN); 442 }), WMI_SEND_TIMEOUT_HZ); 443 444 if (ret == -EAGAIN) 445 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id); 446 447 return ret; 448 } 449 450 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 451 const void *ptr, 452 struct ath12k_wmi_service_ext_arg *arg) 453 { 454 const struct wmi_service_ready_ext_event *ev = ptr; 455 int i; 456 457 if (!ev) 458 return -EINVAL; 459 460 /* Move this to host based bitmap */ 461 arg->default_conc_scan_config_bits = 462 le32_to_cpu(ev->default_conc_scan_config_bits); 463 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 464 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 465 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 466 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 467 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 468 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 469 470 for (i = 0; i < WMI_MAX_NUM_SS; i++) 471 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 472 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 473 474 return 0; 475 } 476 477 static int 478 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 479 struct ath12k_wmi_svc_rdy_ext_parse *svc, 480 u8 hw_mode_id, u8 phy_id, 481 struct ath12k_pdev *pdev) 482 { 483 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 484 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 485 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 486 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 487 struct ath12k_base *ab = wmi_handle->wmi_ab->ab; 488 struct ath12k_band_cap *cap_band; 489 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 490 struct ath12k_fw_pdev *fw_pdev; 491 u32 phy_map; 492 u32 hw_idx, phy_idx = 0; 493 int i; 494 495 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 496 return -EINVAL; 497 498 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 499 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 500 break; 501 502 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 503 phy_idx = fls(phy_map); 504 } 505 506 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 507 return -EINVAL; 508 509 phy_idx += phy_id; 510 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 511 return -EINVAL; 512 513 mac_caps = wmi_mac_phy_caps + phy_idx; 514 515 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 516 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps); 517 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands); 518 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 519 520 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count]; 521 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands); 522 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 523 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id); 524 ab->fw_pdev_count++; 525 526 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 527 * band to band for a single radio, need to see how this should be 528 * handled. 529 */ 530 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) { 531 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 532 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 533 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) { 534 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 535 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 536 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 537 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 538 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 539 pdev_cap->nss_ratio_enabled = 540 WMI_NSS_RATIO_EN_DIS_GET(mac_caps->nss_ratio); 541 pdev_cap->nss_ratio_info = 542 WMI_NSS_RATIO_INFO_GET(mac_caps->nss_ratio); 543 } else { 544 return -EINVAL; 545 } 546 547 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 548 * For example, for 4x4 capable macphys, first 4 chains can be used for first 549 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 550 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 551 * will be advertised for second mac or vice-versa. Compute the shift value 552 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 553 * mac80211. 554 */ 555 pdev_cap->tx_chain_mask_shift = 556 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 557 pdev_cap->rx_chain_mask_shift = 558 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 559 560 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) { 561 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 562 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 563 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 564 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 565 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 566 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 567 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 568 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 569 cap_band->he_cap_phy_info[i] = 570 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 571 572 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 573 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 574 575 for (i = 0; i < WMI_MAX_NUM_SS; i++) 576 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 577 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 578 } 579 580 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) { 581 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 582 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 583 cap_band->max_bw_supported = 584 le32_to_cpu(mac_caps->max_bw_supported_5g); 585 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 586 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 587 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 588 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 589 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 590 cap_band->he_cap_phy_info[i] = 591 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 592 593 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 594 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 595 596 for (i = 0; i < WMI_MAX_NUM_SS; i++) 597 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 598 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 599 600 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 601 cap_band->max_bw_supported = 602 le32_to_cpu(mac_caps->max_bw_supported_5g); 603 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 604 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 605 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 606 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 607 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 608 cap_band->he_cap_phy_info[i] = 609 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 610 611 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 612 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 613 614 for (i = 0; i < WMI_MAX_NUM_SS; i++) 615 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 616 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 617 } 618 619 return 0; 620 } 621 622 static int 623 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 624 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 625 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 626 u8 phy_idx, 627 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 628 { 629 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 630 631 if (!reg_caps || !ext_caps) 632 return -EINVAL; 633 634 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 635 return -EINVAL; 636 637 ext_reg_cap = &ext_caps[phy_idx]; 638 639 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 640 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 641 param->eeprom_reg_domain_ext = 642 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 643 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 644 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 645 /* check if param->wireless_mode is needed */ 646 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 647 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 648 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 649 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 650 651 return 0; 652 } 653 654 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 655 const void *evt_buf, 656 struct ath12k_wmi_target_cap_arg *cap) 657 { 658 const struct wmi_service_ready_event *ev = evt_buf; 659 660 if (!ev) { 661 ath12k_err(ab, "%s: failed by NULL param\n", 662 __func__); 663 return -EINVAL; 664 } 665 666 cap->phy_capability = le32_to_cpu(ev->phy_capability); 667 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 668 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 669 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 670 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 671 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 672 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 673 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 674 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 675 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 676 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 677 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 678 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 679 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 680 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 681 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 682 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 683 684 return 0; 685 } 686 687 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 688 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 689 * 4-byte word. 690 */ 691 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 692 const u32 *wmi_svc_bm) 693 { 694 int i, j; 695 696 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 697 do { 698 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 699 set_bit(j, wmi->wmi_ab->svc_map); 700 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 701 } 702 } 703 704 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 705 const void *ptr, void *data) 706 { 707 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 708 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 709 u16 expect_len; 710 711 switch (tag) { 712 case WMI_TAG_SERVICE_READY_EVENT: 713 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 714 return -EINVAL; 715 break; 716 717 case WMI_TAG_ARRAY_UINT32: 718 if (!svc_ready->wmi_svc_bitmap_done) { 719 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 720 if (len < expect_len) { 721 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 722 len, tag); 723 return -EINVAL; 724 } 725 726 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 727 728 svc_ready->wmi_svc_bitmap_done = true; 729 } 730 break; 731 default: 732 break; 733 } 734 735 return 0; 736 } 737 738 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 739 { 740 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 741 int ret; 742 743 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 744 ath12k_wmi_svc_rdy_parse, 745 &svc_ready); 746 if (ret) { 747 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 748 return ret; 749 } 750 751 return 0; 752 } 753 754 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar, 755 struct ieee80211_tx_info *info) 756 { 757 struct ath12k_base *ab = ar->ab; 758 u32 freq = 0; 759 760 if (ab->hw_params->single_pdev_only && 761 ar->scan.is_roc && 762 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)) 763 freq = ar->scan.roc_freq; 764 765 return freq; 766 } 767 768 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len) 769 { 770 struct sk_buff *skb; 771 struct ath12k_base *ab = wmi_ab->ab; 772 u32 round_len = roundup(len, 4); 773 774 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 775 if (!skb) 776 return NULL; 777 778 skb_reserve(skb, WMI_SKB_HEADROOM); 779 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 780 ath12k_warn(ab, "unaligned WMI skb data\n"); 781 782 skb_put(skb, round_len); 783 memset(skb->data, 0, round_len); 784 785 return skb; 786 } 787 788 int ath12k_wmi_mgmt_send(struct ath12k_link_vif *arvif, u32 buf_id, 789 struct sk_buff *frame) 790 { 791 struct ath12k *ar = arvif->ar; 792 struct ath12k_wmi_pdev *wmi = ar->wmi; 793 struct wmi_mgmt_send_cmd *cmd; 794 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame); 795 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)frame->data; 796 struct ieee80211_vif *vif = ath12k_ahvif_to_vif(arvif->ahvif); 797 int cmd_len = sizeof(struct ath12k_wmi_mgmt_send_tx_params); 798 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)hdr; 799 struct ath12k_wmi_mlo_mgmt_send_params *ml_params; 800 struct ath12k_base *ab = ar->ab; 801 struct wmi_tlv *frame_tlv, *tlv; 802 struct ath12k_skb_cb *skb_cb; 803 u32 buf_len, buf_len_aligned; 804 u32 vdev_id = arvif->vdev_id; 805 bool link_agnostic = false; 806 struct sk_buff *skb; 807 int ret, len; 808 void *ptr; 809 810 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 811 812 buf_len_aligned = roundup(buf_len, sizeof(u32)); 813 814 len = sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned; 815 816 if (ieee80211_vif_is_mld(vif)) { 817 skb_cb = ATH12K_SKB_CB(frame); 818 if ((skb_cb->flags & ATH12K_SKB_MLO_STA) && 819 ab->hw_params->hw_ops->is_frame_link_agnostic && 820 ab->hw_params->hw_ops->is_frame_link_agnostic(arvif, mgmt)) { 821 len += cmd_len + TLV_HDR_SIZE + sizeof(*ml_params); 822 ath12k_generic_dbg(ATH12K_DBG_MGMT, 823 "Sending Mgmt Frame fc 0x%0x as link agnostic", 824 mgmt->frame_control); 825 link_agnostic = true; 826 } 827 } 828 829 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 830 if (!skb) 831 return -ENOMEM; 832 833 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 834 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 835 sizeof(*cmd)); 836 cmd->vdev_id = cpu_to_le32(vdev_id); 837 cmd->desc_id = cpu_to_le32(buf_id); 838 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info)); 839 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 840 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 841 cmd->frame_len = cpu_to_le32(frame->len); 842 cmd->buf_len = cpu_to_le32(buf_len); 843 cmd->tx_params_valid = 0; 844 845 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 846 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len); 847 848 memcpy(frame_tlv->value, frame->data, buf_len); 849 850 if (!link_agnostic) 851 goto send; 852 853 ptr = skb->data + sizeof(*cmd) + sizeof(*frame_tlv) + buf_len_aligned; 854 855 tlv = ptr; 856 857 /* Tx params not used currently */ 858 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TX_SEND_PARAMS, cmd_len); 859 ptr += cmd_len; 860 861 tlv = ptr; 862 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*ml_params)); 863 ptr += TLV_HDR_SIZE; 864 865 ml_params = ptr; 866 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TX_SEND_PARAMS, 867 sizeof(*ml_params)); 868 869 ml_params->hw_link_id = cpu_to_le32(WMI_MGMT_LINK_AGNOSTIC_ID); 870 871 send: 872 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 873 if (ret) { 874 ath12k_warn(ar->ab, 875 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 876 dev_kfree_skb(skb); 877 } 878 879 return ret; 880 } 881 882 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id, 883 u32 vdev_id, u32 pdev_id) 884 { 885 struct ath12k_wmi_pdev *wmi = ar->wmi; 886 struct wmi_request_stats_cmd *cmd; 887 struct sk_buff *skb; 888 int ret; 889 890 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 891 if (!skb) 892 return -ENOMEM; 893 894 cmd = (struct wmi_request_stats_cmd *)skb->data; 895 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REQUEST_STATS_CMD, 896 sizeof(*cmd)); 897 898 cmd->stats_id = cpu_to_le32(stats_id); 899 cmd->vdev_id = cpu_to_le32(vdev_id); 900 cmd->pdev_id = cpu_to_le32(pdev_id); 901 902 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_STATS_CMDID); 903 if (ret) { 904 ath12k_warn(ar->ab, "failed to send WMI_REQUEST_STATS cmd\n"); 905 dev_kfree_skb(skb); 906 } 907 908 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 909 "WMI request stats 0x%x vdev id %d pdev id %d\n", 910 stats_id, vdev_id, pdev_id); 911 912 return ret; 913 } 914 915 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 916 struct ath12k_wmi_vdev_create_arg *args) 917 { 918 struct ath12k_wmi_pdev *wmi = ar->wmi; 919 struct wmi_vdev_create_cmd *cmd; 920 struct sk_buff *skb; 921 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 922 bool is_ml_vdev = is_valid_ether_addr(args->mld_addr); 923 struct wmi_vdev_create_mlo_params *ml_params; 924 struct wmi_tlv *tlv; 925 int ret, len; 926 void *ptr; 927 928 /* It can be optimized my sending tx/rx chain configuration 929 * only for supported bands instead of always sending it for 930 * both the bands. 931 */ 932 len = sizeof(*cmd) + TLV_HDR_SIZE + 933 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) + 934 (is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0); 935 936 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 937 if (!skb) 938 return -ENOMEM; 939 940 cmd = (struct wmi_vdev_create_cmd *)skb->data; 941 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 942 sizeof(*cmd)); 943 944 cmd->vdev_id = cpu_to_le32(args->if_id); 945 cmd->vdev_type = cpu_to_le32(args->type); 946 cmd->vdev_subtype = cpu_to_le32(args->subtype); 947 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 948 cmd->pdev_id = cpu_to_le32(args->pdev_id); 949 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags); 950 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id); 951 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 952 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 953 954 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID) 955 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0)); 956 957 ptr = skb->data + sizeof(*cmd); 958 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 959 960 tlv = ptr; 961 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 962 963 ptr += TLV_HDR_SIZE; 964 txrx_streams = ptr; 965 len = sizeof(*txrx_streams); 966 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 967 len); 968 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G); 969 txrx_streams->supported_tx_streams = 970 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx); 971 txrx_streams->supported_rx_streams = 972 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx); 973 974 txrx_streams++; 975 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 976 len); 977 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G); 978 txrx_streams->supported_tx_streams = 979 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx); 980 txrx_streams->supported_rx_streams = 981 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx); 982 983 ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 984 985 if (is_ml_vdev) { 986 tlv = ptr; 987 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 988 sizeof(*ml_params)); 989 ptr += TLV_HDR_SIZE; 990 ml_params = ptr; 991 992 ml_params->tlv_header = 993 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS, 994 sizeof(*ml_params)); 995 ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr); 996 } 997 998 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 999 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 1000 args->if_id, args->type, args->subtype, 1001 macaddr, args->pdev_id); 1002 1003 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 1004 if (ret) { 1005 ath12k_warn(ar->ab, 1006 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 1007 dev_kfree_skb(skb); 1008 } 1009 1010 return ret; 1011 } 1012 1013 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 1014 { 1015 struct ath12k_wmi_pdev *wmi = ar->wmi; 1016 struct wmi_vdev_delete_cmd *cmd; 1017 struct sk_buff *skb; 1018 int ret; 1019 1020 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1021 if (!skb) 1022 return -ENOMEM; 1023 1024 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 1025 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 1026 sizeof(*cmd)); 1027 cmd->vdev_id = cpu_to_le32(vdev_id); 1028 1029 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 1030 1031 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 1032 if (ret) { 1033 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 1034 dev_kfree_skb(skb); 1035 } 1036 1037 return ret; 1038 } 1039 1040 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 1041 { 1042 struct ath12k_wmi_pdev *wmi = ar->wmi; 1043 struct wmi_vdev_stop_cmd *cmd; 1044 struct sk_buff *skb; 1045 int ret; 1046 1047 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1048 if (!skb) 1049 return -ENOMEM; 1050 1051 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 1052 1053 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 1054 sizeof(*cmd)); 1055 cmd->vdev_id = cpu_to_le32(vdev_id); 1056 1057 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 1058 1059 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 1060 if (ret) { 1061 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 1062 dev_kfree_skb(skb); 1063 } 1064 1065 return ret; 1066 } 1067 1068 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 1069 { 1070 struct ath12k_wmi_pdev *wmi = ar->wmi; 1071 struct wmi_vdev_down_cmd *cmd; 1072 struct sk_buff *skb; 1073 int ret; 1074 1075 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1076 if (!skb) 1077 return -ENOMEM; 1078 1079 cmd = (struct wmi_vdev_down_cmd *)skb->data; 1080 1081 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 1082 sizeof(*cmd)); 1083 cmd->vdev_id = cpu_to_le32(vdev_id); 1084 1085 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 1086 1087 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 1088 if (ret) { 1089 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 1090 dev_kfree_skb(skb); 1091 } 1092 1093 return ret; 1094 } 1095 1096 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 1097 struct wmi_vdev_start_req_arg *arg) 1098 { 1099 u32 center_freq1 = arg->band_center_freq1; 1100 1101 memset(chan, 0, sizeof(*chan)); 1102 1103 chan->mhz = cpu_to_le32(arg->freq); 1104 chan->band_center_freq1 = cpu_to_le32(center_freq1); 1105 if (arg->mode == MODE_11BE_EHT320) { 1106 if (arg->freq > center_freq1) 1107 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80); 1108 else 1109 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80); 1110 1111 chan->band_center_freq2 = cpu_to_le32(center_freq1); 1112 1113 } else if (arg->mode == MODE_11BE_EHT160 || 1114 arg->mode == MODE_11AX_HE160) { 1115 if (arg->freq > center_freq1) 1116 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40); 1117 else 1118 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40); 1119 1120 chan->band_center_freq2 = cpu_to_le32(center_freq1); 1121 } else { 1122 chan->band_center_freq2 = 0; 1123 } 1124 1125 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 1126 if (arg->passive) 1127 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 1128 if (arg->allow_ibss) 1129 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 1130 if (arg->allow_ht) 1131 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 1132 if (arg->allow_vht) 1133 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 1134 if (arg->allow_he) 1135 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 1136 if (arg->ht40plus) 1137 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 1138 if (arg->chan_radar) 1139 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 1140 if (arg->freq2_radar) 1141 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 1142 1143 chan->reg_info_1 = le32_encode_bits(arg->max_power, 1144 WMI_CHAN_REG_INFO1_MAX_PWR) | 1145 le32_encode_bits(arg->max_reg_power, 1146 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 1147 1148 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 1149 WMI_CHAN_REG_INFO2_ANT_MAX) | 1150 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 1151 } 1152 1153 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 1154 bool restart) 1155 { 1156 struct wmi_vdev_start_mlo_params *ml_params; 1157 struct wmi_partner_link_info *partner_info; 1158 struct ath12k_wmi_pdev *wmi = ar->wmi; 1159 struct wmi_vdev_start_request_cmd *cmd; 1160 struct sk_buff *skb; 1161 struct ath12k_wmi_channel_params *chan; 1162 struct wmi_tlv *tlv; 1163 void *ptr; 1164 int ret, len, i, ml_arg_size = 0; 1165 1166 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 1167 return -EINVAL; 1168 1169 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 1170 1171 if (!restart && arg->ml.enabled) { 1172 ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) + 1173 TLV_HDR_SIZE + (arg->ml.num_partner_links * 1174 sizeof(*partner_info)); 1175 len += ml_arg_size; 1176 } 1177 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1178 if (!skb) 1179 return -ENOMEM; 1180 1181 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 1182 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 1183 sizeof(*cmd)); 1184 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1185 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 1186 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 1187 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 1188 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 1189 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 1190 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 1191 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 1192 cmd->regdomain = cpu_to_le32(arg->regdomain); 1193 cmd->he_ops = cpu_to_le32(arg->he_ops); 1194 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1195 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags); 1196 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id); 1197 1198 if (!restart) { 1199 if (arg->ssid) { 1200 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1201 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1202 } 1203 if (arg->hidden_ssid) 1204 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1205 if (arg->pmf_enabled) 1206 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1207 } 1208 1209 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1210 1211 ptr = skb->data + sizeof(*cmd); 1212 chan = ptr; 1213 1214 ath12k_wmi_put_wmi_channel(chan, arg); 1215 1216 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1217 sizeof(*chan)); 1218 ptr += sizeof(*chan); 1219 1220 tlv = ptr; 1221 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1222 1223 /* Note: This is a nested TLV containing: 1224 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv].. 1225 */ 1226 1227 ptr += sizeof(*tlv); 1228 1229 if (ml_arg_size) { 1230 tlv = ptr; 1231 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1232 sizeof(*ml_params)); 1233 ptr += TLV_HDR_SIZE; 1234 1235 ml_params = ptr; 1236 1237 ml_params->tlv_header = 1238 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS, 1239 sizeof(*ml_params)); 1240 1241 ml_params->flags = le32_encode_bits(arg->ml.enabled, 1242 ATH12K_WMI_FLAG_MLO_ENABLED) | 1243 le32_encode_bits(arg->ml.assoc_link, 1244 ATH12K_WMI_FLAG_MLO_ASSOC_LINK) | 1245 le32_encode_bits(arg->ml.mcast_link, 1246 ATH12K_WMI_FLAG_MLO_MCAST_VDEV) | 1247 le32_encode_bits(arg->ml.link_add, 1248 ATH12K_WMI_FLAG_MLO_LINK_ADD); 1249 1250 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %d start ml flags 0x%x\n", 1251 arg->vdev_id, ml_params->flags); 1252 1253 ptr += sizeof(*ml_params); 1254 1255 tlv = ptr; 1256 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1257 arg->ml.num_partner_links * 1258 sizeof(*partner_info)); 1259 ptr += TLV_HDR_SIZE; 1260 1261 partner_info = ptr; 1262 1263 for (i = 0; i < arg->ml.num_partner_links; i++) { 1264 partner_info->tlv_header = 1265 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS, 1266 sizeof(*partner_info)); 1267 partner_info->vdev_id = 1268 cpu_to_le32(arg->ml.partner_info[i].vdev_id); 1269 partner_info->hw_link_id = 1270 cpu_to_le32(arg->ml.partner_info[i].hw_link_id); 1271 ether_addr_copy(partner_info->vdev_addr.addr, 1272 arg->ml.partner_info[i].addr); 1273 1274 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %d hw_link_id %d macaddr%pM\n", 1275 partner_info->vdev_id, partner_info->hw_link_id, 1276 partner_info->vdev_addr.addr); 1277 1278 partner_info++; 1279 } 1280 1281 ptr = partner_info; 1282 } 1283 1284 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1285 restart ? "restart" : "start", arg->vdev_id, 1286 arg->freq, arg->mode); 1287 1288 if (restart) 1289 ret = ath12k_wmi_cmd_send(wmi, skb, 1290 WMI_VDEV_RESTART_REQUEST_CMDID); 1291 else 1292 ret = ath12k_wmi_cmd_send(wmi, skb, 1293 WMI_VDEV_START_REQUEST_CMDID); 1294 if (ret) { 1295 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1296 restart ? "restart" : "start"); 1297 dev_kfree_skb(skb); 1298 } 1299 1300 return ret; 1301 } 1302 1303 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params) 1304 { 1305 struct ath12k_wmi_pdev *wmi = ar->wmi; 1306 struct wmi_vdev_up_cmd *cmd; 1307 struct sk_buff *skb; 1308 int ret; 1309 1310 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1311 if (!skb) 1312 return -ENOMEM; 1313 1314 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1315 1316 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1317 sizeof(*cmd)); 1318 cmd->vdev_id = cpu_to_le32(params->vdev_id); 1319 cmd->vdev_assoc_id = cpu_to_le32(params->aid); 1320 1321 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid); 1322 1323 if (params->tx_bssid) { 1324 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid); 1325 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx); 1326 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt); 1327 } 1328 1329 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1330 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1331 params->vdev_id, params->aid, params->bssid); 1332 1333 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1334 if (ret) { 1335 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1336 dev_kfree_skb(skb); 1337 } 1338 1339 return ret; 1340 } 1341 1342 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1343 struct ath12k_wmi_peer_create_arg *arg) 1344 { 1345 struct ath12k_wmi_pdev *wmi = ar->wmi; 1346 struct wmi_peer_create_cmd *cmd; 1347 struct sk_buff *skb; 1348 int ret, len; 1349 struct wmi_peer_create_mlo_params *ml_param; 1350 void *ptr; 1351 struct wmi_tlv *tlv; 1352 1353 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param); 1354 1355 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1356 if (!skb) 1357 return -ENOMEM; 1358 1359 cmd = (struct wmi_peer_create_cmd *)skb->data; 1360 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1361 sizeof(*cmd)); 1362 1363 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1364 cmd->peer_type = cpu_to_le32(arg->peer_type); 1365 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1366 1367 ptr = skb->data + sizeof(*cmd); 1368 tlv = ptr; 1369 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1370 sizeof(*ml_param)); 1371 ptr += TLV_HDR_SIZE; 1372 ml_param = ptr; 1373 ml_param->tlv_header = 1374 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS, 1375 sizeof(*ml_param)); 1376 if (arg->ml_enabled) 1377 ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 1378 1379 ptr += sizeof(*ml_param); 1380 1381 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1382 "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n", 1383 arg->vdev_id, arg->peer_addr, ml_param->flags); 1384 1385 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1386 if (ret) { 1387 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1388 dev_kfree_skb(skb); 1389 } 1390 1391 return ret; 1392 } 1393 1394 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1395 const u8 *peer_addr, u8 vdev_id) 1396 { 1397 struct ath12k_wmi_pdev *wmi = ar->wmi; 1398 struct wmi_peer_delete_cmd *cmd; 1399 struct sk_buff *skb; 1400 int ret; 1401 1402 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1403 if (!skb) 1404 return -ENOMEM; 1405 1406 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1407 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1408 sizeof(*cmd)); 1409 1410 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1411 cmd->vdev_id = cpu_to_le32(vdev_id); 1412 1413 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1414 "WMI peer delete vdev_id %d peer_addr %pM\n", 1415 vdev_id, peer_addr); 1416 1417 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1418 if (ret) { 1419 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1420 dev_kfree_skb(skb); 1421 } 1422 1423 return ret; 1424 } 1425 1426 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1427 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1428 { 1429 struct ath12k_wmi_pdev *wmi = ar->wmi; 1430 struct wmi_pdev_set_regdomain_cmd *cmd; 1431 struct sk_buff *skb; 1432 int ret; 1433 1434 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1435 if (!skb) 1436 return -ENOMEM; 1437 1438 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1439 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1440 sizeof(*cmd)); 1441 1442 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1443 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1444 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1445 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1446 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1447 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1448 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1449 1450 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1451 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1452 arg->current_rd_in_use, arg->current_rd_2g, 1453 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1454 1455 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1456 if (ret) { 1457 ath12k_warn(ar->ab, 1458 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1459 dev_kfree_skb(skb); 1460 } 1461 1462 return ret; 1463 } 1464 1465 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1466 u32 vdev_id, u32 param_id, u32 param_val) 1467 { 1468 struct ath12k_wmi_pdev *wmi = ar->wmi; 1469 struct wmi_peer_set_param_cmd *cmd; 1470 struct sk_buff *skb; 1471 int ret; 1472 1473 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1474 if (!skb) 1475 return -ENOMEM; 1476 1477 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1478 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1479 sizeof(*cmd)); 1480 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1481 cmd->vdev_id = cpu_to_le32(vdev_id); 1482 cmd->param_id = cpu_to_le32(param_id); 1483 cmd->param_value = cpu_to_le32(param_val); 1484 1485 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1486 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1487 vdev_id, peer_addr, param_id, param_val); 1488 1489 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1490 if (ret) { 1491 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1492 dev_kfree_skb(skb); 1493 } 1494 1495 return ret; 1496 } 1497 1498 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1499 u8 peer_addr[ETH_ALEN], 1500 u32 peer_tid_bitmap, 1501 u8 vdev_id) 1502 { 1503 struct ath12k_wmi_pdev *wmi = ar->wmi; 1504 struct wmi_peer_flush_tids_cmd *cmd; 1505 struct sk_buff *skb; 1506 int ret; 1507 1508 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1509 if (!skb) 1510 return -ENOMEM; 1511 1512 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1513 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1514 sizeof(*cmd)); 1515 1516 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1517 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1518 cmd->vdev_id = cpu_to_le32(vdev_id); 1519 1520 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1521 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1522 vdev_id, peer_addr, peer_tid_bitmap); 1523 1524 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1525 if (ret) { 1526 ath12k_warn(ar->ab, 1527 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1528 dev_kfree_skb(skb); 1529 } 1530 1531 return ret; 1532 } 1533 1534 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1535 int vdev_id, const u8 *addr, 1536 dma_addr_t paddr, u8 tid, 1537 u8 ba_window_size_valid, 1538 u32 ba_window_size) 1539 { 1540 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1541 struct sk_buff *skb; 1542 int ret; 1543 1544 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1545 if (!skb) 1546 return -ENOMEM; 1547 1548 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1549 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1550 sizeof(*cmd)); 1551 1552 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1553 cmd->vdev_id = cpu_to_le32(vdev_id); 1554 cmd->tid = cpu_to_le32(tid); 1555 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1556 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1557 cmd->queue_no = cpu_to_le32(tid); 1558 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1559 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1560 1561 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1562 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1563 addr, vdev_id, tid); 1564 1565 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1566 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1567 if (ret) { 1568 ath12k_warn(ar->ab, 1569 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1570 dev_kfree_skb(skb); 1571 } 1572 1573 return ret; 1574 } 1575 1576 int 1577 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1578 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1579 { 1580 struct ath12k_wmi_pdev *wmi = ar->wmi; 1581 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1582 struct sk_buff *skb; 1583 int ret; 1584 1585 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1586 if (!skb) 1587 return -ENOMEM; 1588 1589 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1590 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1591 sizeof(*cmd)); 1592 1593 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1594 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1595 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1596 1597 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1598 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1599 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1600 1601 ret = ath12k_wmi_cmd_send(wmi, skb, 1602 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1603 if (ret) { 1604 ath12k_warn(ar->ab, 1605 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1606 dev_kfree_skb(skb); 1607 } 1608 1609 return ret; 1610 } 1611 1612 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1613 u32 param_value, u8 pdev_id) 1614 { 1615 struct ath12k_wmi_pdev *wmi = ar->wmi; 1616 struct wmi_pdev_set_param_cmd *cmd; 1617 struct sk_buff *skb; 1618 int ret; 1619 1620 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1621 if (!skb) 1622 return -ENOMEM; 1623 1624 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1625 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1626 sizeof(*cmd)); 1627 cmd->pdev_id = cpu_to_le32(pdev_id); 1628 cmd->param_id = cpu_to_le32(param_id); 1629 cmd->param_value = cpu_to_le32(param_value); 1630 1631 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1632 "WMI pdev set param %d pdev id %d value %d\n", 1633 param_id, pdev_id, param_value); 1634 1635 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1636 if (ret) { 1637 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1638 dev_kfree_skb(skb); 1639 } 1640 1641 return ret; 1642 } 1643 1644 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1645 { 1646 struct ath12k_wmi_pdev *wmi = ar->wmi; 1647 struct wmi_pdev_set_ps_mode_cmd *cmd; 1648 struct sk_buff *skb; 1649 int ret; 1650 1651 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1652 if (!skb) 1653 return -ENOMEM; 1654 1655 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1656 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1657 sizeof(*cmd)); 1658 cmd->vdev_id = cpu_to_le32(vdev_id); 1659 cmd->sta_ps_mode = cpu_to_le32(enable); 1660 1661 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1662 "WMI vdev set psmode %d vdev id %d\n", 1663 enable, vdev_id); 1664 1665 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1666 if (ret) { 1667 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1668 dev_kfree_skb(skb); 1669 } 1670 1671 return ret; 1672 } 1673 1674 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1675 u32 pdev_id) 1676 { 1677 struct ath12k_wmi_pdev *wmi = ar->wmi; 1678 struct wmi_pdev_suspend_cmd *cmd; 1679 struct sk_buff *skb; 1680 int ret; 1681 1682 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1683 if (!skb) 1684 return -ENOMEM; 1685 1686 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1687 1688 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1689 sizeof(*cmd)); 1690 1691 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1692 cmd->pdev_id = cpu_to_le32(pdev_id); 1693 1694 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1695 "WMI pdev suspend pdev_id %d\n", pdev_id); 1696 1697 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1698 if (ret) { 1699 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1700 dev_kfree_skb(skb); 1701 } 1702 1703 return ret; 1704 } 1705 1706 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1707 { 1708 struct ath12k_wmi_pdev *wmi = ar->wmi; 1709 struct wmi_pdev_resume_cmd *cmd; 1710 struct sk_buff *skb; 1711 int ret; 1712 1713 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1714 if (!skb) 1715 return -ENOMEM; 1716 1717 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1718 1719 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1720 sizeof(*cmd)); 1721 cmd->pdev_id = cpu_to_le32(pdev_id); 1722 1723 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1724 "WMI pdev resume pdev id %d\n", pdev_id); 1725 1726 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1727 if (ret) { 1728 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1729 dev_kfree_skb(skb); 1730 } 1731 1732 return ret; 1733 } 1734 1735 /* TODO FW Support for the cmd is not available yet. 1736 * Can be tested once the command and corresponding 1737 * event is implemented in FW 1738 */ 1739 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1740 enum wmi_bss_chan_info_req_type type) 1741 { 1742 struct ath12k_wmi_pdev *wmi = ar->wmi; 1743 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1744 struct sk_buff *skb; 1745 int ret; 1746 1747 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1748 if (!skb) 1749 return -ENOMEM; 1750 1751 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1752 1753 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1754 sizeof(*cmd)); 1755 cmd->req_type = cpu_to_le32(type); 1756 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1757 1758 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1759 "WMI bss chan info req type %d\n", type); 1760 1761 ret = ath12k_wmi_cmd_send(wmi, skb, 1762 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1763 if (ret) { 1764 ath12k_warn(ar->ab, 1765 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1766 dev_kfree_skb(skb); 1767 } 1768 1769 return ret; 1770 } 1771 1772 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1773 struct ath12k_wmi_ap_ps_arg *arg) 1774 { 1775 struct ath12k_wmi_pdev *wmi = ar->wmi; 1776 struct wmi_ap_ps_peer_cmd *cmd; 1777 struct sk_buff *skb; 1778 int ret; 1779 1780 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1781 if (!skb) 1782 return -ENOMEM; 1783 1784 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1785 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1786 sizeof(*cmd)); 1787 1788 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1789 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1790 cmd->param = cpu_to_le32(arg->param); 1791 cmd->value = cpu_to_le32(arg->value); 1792 1793 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1794 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1795 arg->vdev_id, peer_addr, arg->param, arg->value); 1796 1797 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1798 if (ret) { 1799 ath12k_warn(ar->ab, 1800 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1801 dev_kfree_skb(skb); 1802 } 1803 1804 return ret; 1805 } 1806 1807 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1808 u32 param, u32 param_value) 1809 { 1810 struct ath12k_wmi_pdev *wmi = ar->wmi; 1811 struct wmi_sta_powersave_param_cmd *cmd; 1812 struct sk_buff *skb; 1813 int ret; 1814 1815 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1816 if (!skb) 1817 return -ENOMEM; 1818 1819 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1820 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1821 sizeof(*cmd)); 1822 1823 cmd->vdev_id = cpu_to_le32(vdev_id); 1824 cmd->param = cpu_to_le32(param); 1825 cmd->value = cpu_to_le32(param_value); 1826 1827 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1828 "WMI set sta ps vdev_id %d param %d value %d\n", 1829 vdev_id, param, param_value); 1830 1831 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1832 if (ret) { 1833 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1834 dev_kfree_skb(skb); 1835 } 1836 1837 return ret; 1838 } 1839 1840 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1841 { 1842 struct ath12k_wmi_pdev *wmi = ar->wmi; 1843 struct wmi_force_fw_hang_cmd *cmd; 1844 struct sk_buff *skb; 1845 int ret, len; 1846 1847 len = sizeof(*cmd); 1848 1849 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1850 if (!skb) 1851 return -ENOMEM; 1852 1853 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1854 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1855 len); 1856 1857 cmd->type = cpu_to_le32(type); 1858 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1859 1860 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1861 1862 if (ret) { 1863 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1864 dev_kfree_skb(skb); 1865 } 1866 return ret; 1867 } 1868 1869 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1870 u32 param_id, u32 param_value) 1871 { 1872 struct ath12k_wmi_pdev *wmi = ar->wmi; 1873 struct wmi_vdev_set_param_cmd *cmd; 1874 struct sk_buff *skb; 1875 int ret; 1876 1877 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1878 if (!skb) 1879 return -ENOMEM; 1880 1881 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1882 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1883 sizeof(*cmd)); 1884 1885 cmd->vdev_id = cpu_to_le32(vdev_id); 1886 cmd->param_id = cpu_to_le32(param_id); 1887 cmd->param_value = cpu_to_le32(param_value); 1888 1889 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1890 "WMI vdev id 0x%x set param %d value %d\n", 1891 vdev_id, param_id, param_value); 1892 1893 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1894 if (ret) { 1895 ath12k_warn(ar->ab, 1896 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1897 dev_kfree_skb(skb); 1898 } 1899 1900 return ret; 1901 } 1902 1903 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1904 { 1905 struct ath12k_wmi_pdev *wmi = ar->wmi; 1906 struct wmi_get_pdev_temperature_cmd *cmd; 1907 struct sk_buff *skb; 1908 int ret; 1909 1910 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1911 if (!skb) 1912 return -ENOMEM; 1913 1914 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1915 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1916 sizeof(*cmd)); 1917 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1918 1919 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1920 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1921 1922 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1923 if (ret) { 1924 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1925 dev_kfree_skb(skb); 1926 } 1927 1928 return ret; 1929 } 1930 1931 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1932 u32 vdev_id, u32 bcn_ctrl_op) 1933 { 1934 struct ath12k_wmi_pdev *wmi = ar->wmi; 1935 struct wmi_bcn_offload_ctrl_cmd *cmd; 1936 struct sk_buff *skb; 1937 int ret; 1938 1939 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1940 if (!skb) 1941 return -ENOMEM; 1942 1943 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1944 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1945 sizeof(*cmd)); 1946 1947 cmd->vdev_id = cpu_to_le32(vdev_id); 1948 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1949 1950 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1951 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1952 vdev_id, bcn_ctrl_op); 1953 1954 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1955 if (ret) { 1956 ath12k_warn(ar->ab, 1957 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1958 dev_kfree_skb(skb); 1959 } 1960 1961 return ret; 1962 } 1963 1964 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 1965 const u8 *p2p_ie) 1966 { 1967 struct ath12k_wmi_pdev *wmi = ar->wmi; 1968 struct wmi_p2p_go_set_beacon_ie_cmd *cmd; 1969 size_t p2p_ie_len, aligned_len; 1970 struct wmi_tlv *tlv; 1971 struct sk_buff *skb; 1972 void *ptr; 1973 int ret, len; 1974 1975 p2p_ie_len = p2p_ie[1] + 2; 1976 aligned_len = roundup(p2p_ie_len, sizeof(u32)); 1977 1978 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 1979 1980 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1981 if (!skb) 1982 return -ENOMEM; 1983 1984 ptr = skb->data; 1985 cmd = ptr; 1986 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE, 1987 sizeof(*cmd)); 1988 cmd->vdev_id = cpu_to_le32(vdev_id); 1989 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len); 1990 1991 ptr += sizeof(*cmd); 1992 tlv = ptr; 1993 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 1994 aligned_len); 1995 memcpy(tlv->value, p2p_ie, p2p_ie_len); 1996 1997 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE); 1998 if (ret) { 1999 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n"); 2000 dev_kfree_skb(skb); 2001 } 2002 2003 return ret; 2004 } 2005 2006 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif, 2007 struct ieee80211_mutable_offsets *offs, 2008 struct sk_buff *bcn, 2009 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args) 2010 { 2011 struct ath12k *ar = arvif->ar; 2012 struct ath12k_wmi_pdev *wmi = ar->wmi; 2013 struct ath12k_base *ab = ar->ab; 2014 struct wmi_bcn_tmpl_cmd *cmd; 2015 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 2016 struct ath12k_vif *ahvif = arvif->ahvif; 2017 struct ieee80211_bss_conf *conf; 2018 u32 vdev_id = arvif->vdev_id; 2019 struct wmi_tlv *tlv; 2020 struct sk_buff *skb; 2021 u32 ema_params = 0; 2022 void *ptr; 2023 int ret, len; 2024 size_t aligned_len = roundup(bcn->len, 4); 2025 2026 conf = ath12k_mac_get_link_bss_conf(arvif); 2027 if (!conf) { 2028 ath12k_warn(ab, 2029 "unable to access bss link conf in beacon template command for vif %pM link %u\n", 2030 ahvif->vif->addr, arvif->link_id); 2031 return -EINVAL; 2032 } 2033 2034 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 2035 2036 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2037 if (!skb) 2038 return -ENOMEM; 2039 2040 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 2041 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 2042 sizeof(*cmd)); 2043 cmd->vdev_id = cpu_to_le32(vdev_id); 2044 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 2045 2046 if (conf->csa_active) { 2047 cmd->csa_switch_count_offset = 2048 cpu_to_le32(offs->cntdwn_counter_offs[0]); 2049 cmd->ext_csa_switch_count_offset = 2050 cpu_to_le32(offs->cntdwn_counter_offs[1]); 2051 cmd->csa_event_bitmap = cpu_to_le32(0xFFFFFFFF); 2052 arvif->current_cntdown_counter = bcn->data[offs->cntdwn_counter_offs[0]]; 2053 } 2054 2055 cmd->buf_len = cpu_to_le32(bcn->len); 2056 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off); 2057 if (ema_args) { 2058 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT); 2059 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX); 2060 if (ema_args->bcn_index == 0) 2061 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST); 2062 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt) 2063 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST); 2064 cmd->ema_params = cpu_to_le32(ema_params); 2065 } 2066 cmd->feature_enable_bitmap = 2067 cpu_to_le32(u32_encode_bits(arvif->beacon_prot, 2068 WMI_BEACON_PROTECTION_EN_BIT)); 2069 2070 ptr = skb->data + sizeof(*cmd); 2071 2072 bcn_prb_info = ptr; 2073 len = sizeof(*bcn_prb_info); 2074 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 2075 len); 2076 bcn_prb_info->caps = 0; 2077 bcn_prb_info->erp = 0; 2078 2079 ptr += sizeof(*bcn_prb_info); 2080 2081 tlv = ptr; 2082 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 2083 memcpy(tlv->value, bcn->data, bcn->len); 2084 2085 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 2086 if (ret) { 2087 ath12k_warn(ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 2088 dev_kfree_skb(skb); 2089 } 2090 2091 return ret; 2092 } 2093 2094 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 2095 struct wmi_vdev_install_key_arg *arg) 2096 { 2097 struct ath12k_wmi_pdev *wmi = ar->wmi; 2098 struct wmi_vdev_install_key_cmd *cmd; 2099 struct wmi_tlv *tlv; 2100 struct sk_buff *skb; 2101 int ret, len, key_len_aligned; 2102 2103 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 2104 * length is specified in cmd->key_len. 2105 */ 2106 key_len_aligned = roundup(arg->key_len, 4); 2107 2108 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 2109 2110 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2111 if (!skb) 2112 return -ENOMEM; 2113 2114 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 2115 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 2116 sizeof(*cmd)); 2117 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2118 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 2119 cmd->key_idx = cpu_to_le32(arg->key_idx); 2120 cmd->key_flags = cpu_to_le32(arg->key_flags); 2121 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 2122 cmd->key_len = cpu_to_le32(arg->key_len); 2123 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 2124 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 2125 2126 if (arg->key_rsc_counter) 2127 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 2128 2129 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 2130 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 2131 memcpy(tlv->value, arg->key_data, arg->key_len); 2132 2133 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2134 "WMI vdev install key idx %d cipher %d len %d\n", 2135 arg->key_idx, arg->key_cipher, arg->key_len); 2136 2137 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 2138 if (ret) { 2139 ath12k_warn(ar->ab, 2140 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 2141 dev_kfree_skb(skb); 2142 } 2143 2144 return ret; 2145 } 2146 2147 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 2148 struct ath12k_wmi_peer_assoc_arg *arg, 2149 bool hw_crypto_disabled) 2150 { 2151 cmd->peer_flags = 0; 2152 cmd->peer_flags_ext = 0; 2153 2154 if (arg->is_wme_set) { 2155 if (arg->qos_flag) 2156 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 2157 if (arg->apsd_flag) 2158 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 2159 if (arg->ht_flag) 2160 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 2161 if (arg->bw_40) 2162 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 2163 if (arg->bw_80) 2164 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 2165 if (arg->bw_160) 2166 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 2167 if (arg->bw_320) 2168 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ); 2169 2170 /* Typically if STBC is enabled for VHT it should be enabled 2171 * for HT as well 2172 **/ 2173 if (arg->stbc_flag) 2174 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 2175 2176 /* Typically if LDPC is enabled for VHT it should be enabled 2177 * for HT as well 2178 **/ 2179 if (arg->ldpc_flag) 2180 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 2181 2182 if (arg->static_mimops_flag) 2183 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 2184 if (arg->dynamic_mimops_flag) 2185 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 2186 if (arg->spatial_mux_flag) 2187 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 2188 if (arg->vht_flag) 2189 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 2190 if (arg->he_flag) 2191 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 2192 if (arg->twt_requester) 2193 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 2194 if (arg->twt_responder) 2195 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 2196 if (arg->eht_flag) 2197 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT); 2198 } 2199 2200 /* Suppress authorization for all AUTH modes that need 4-way handshake 2201 * (during re-association). 2202 * Authorization will be done for these modes on key installation. 2203 */ 2204 if (arg->auth_flag) 2205 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 2206 if (arg->need_ptk_4_way) { 2207 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 2208 if (!hw_crypto_disabled && arg->is_assoc) 2209 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 2210 } 2211 if (arg->need_gtk_2_way) 2212 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 2213 /* safe mode bypass the 4-way handshake */ 2214 if (arg->safe_mode_enabled) 2215 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 2216 WMI_PEER_NEED_GTK_2_WAY)); 2217 2218 if (arg->is_pmf_enabled) 2219 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 2220 2221 /* Disable AMSDU for station transmit, if user configures it */ 2222 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 2223 * it 2224 * if (arg->amsdu_disable) Add after FW support 2225 **/ 2226 2227 /* Target asserts if node is marked HT and all MCS is set to 0. 2228 * Mark the node as non-HT if all the mcs rates are disabled through 2229 * iwpriv 2230 **/ 2231 if (arg->peer_ht_rates.num_rates == 0) 2232 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 2233 } 2234 2235 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 2236 struct ath12k_wmi_peer_assoc_arg *arg) 2237 { 2238 struct ath12k_wmi_pdev *wmi = ar->wmi; 2239 struct wmi_peer_assoc_complete_cmd *cmd; 2240 struct ath12k_wmi_vht_rate_set_params *mcs; 2241 struct ath12k_wmi_he_rate_set_params *he_mcs; 2242 struct ath12k_wmi_eht_rate_set_params *eht_mcs; 2243 struct wmi_peer_assoc_mlo_params *ml_params; 2244 struct wmi_peer_assoc_mlo_partner_info_params *partner_info; 2245 struct sk_buff *skb; 2246 struct wmi_tlv *tlv; 2247 void *ptr; 2248 u32 peer_legacy_rates_align, eml_pad_delay, eml_trans_delay; 2249 u32 peer_ht_rates_align, eml_trans_timeout; 2250 int i, ret, len; 2251 u16 eml_cap; 2252 __le32 v; 2253 2254 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 2255 sizeof(u32)); 2256 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 2257 sizeof(u32)); 2258 2259 len = sizeof(*cmd) + 2260 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 2261 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 2262 sizeof(*mcs) + TLV_HDR_SIZE + 2263 (sizeof(*he_mcs) * arg->peer_he_mcs_count) + 2264 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count); 2265 2266 if (arg->ml.enabled) 2267 len += TLV_HDR_SIZE + sizeof(*ml_params) + 2268 TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info)); 2269 else 2270 len += (2 * TLV_HDR_SIZE); 2271 2272 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2273 if (!skb) 2274 return -ENOMEM; 2275 2276 ptr = skb->data; 2277 2278 cmd = ptr; 2279 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 2280 sizeof(*cmd)); 2281 2282 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2283 2284 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 2285 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 2286 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 2287 2288 ath12k_wmi_copy_peer_flags(cmd, arg, 2289 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 2290 &ar->ab->dev_flags)); 2291 2292 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 2293 2294 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 2295 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 2296 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 2297 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 2298 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 2299 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 2300 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 2301 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 2302 2303 /* Update 11ax capabilities */ 2304 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 2305 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 2306 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 2307 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 2308 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 2309 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 2310 cmd->peer_he_cap_phy[i] = 2311 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 2312 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 2313 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 2314 for (i = 0; i < WMI_MAX_NUM_SS; i++) 2315 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 2316 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 2317 2318 /* Update 11be capabilities */ 2319 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac), 2320 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac), 2321 0); 2322 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy), 2323 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy), 2324 0); 2325 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet), 2326 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0); 2327 2328 /* Update peer legacy rate information */ 2329 ptr += sizeof(*cmd); 2330 2331 tlv = ptr; 2332 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 2333 2334 ptr += TLV_HDR_SIZE; 2335 2336 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 2337 memcpy(ptr, arg->peer_legacy_rates.rates, 2338 arg->peer_legacy_rates.num_rates); 2339 2340 /* Update peer HT rate information */ 2341 ptr += peer_legacy_rates_align; 2342 2343 tlv = ptr; 2344 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 2345 ptr += TLV_HDR_SIZE; 2346 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 2347 memcpy(ptr, arg->peer_ht_rates.rates, 2348 arg->peer_ht_rates.num_rates); 2349 2350 /* VHT Rates */ 2351 ptr += peer_ht_rates_align; 2352 2353 mcs = ptr; 2354 2355 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 2356 sizeof(*mcs)); 2357 2358 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 2359 2360 /* Update bandwidth-NSS mapping */ 2361 cmd->peer_bw_rxnss_override = 0; 2362 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 2363 2364 if (arg->vht_capable) { 2365 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate); 2366 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 2367 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate); 2368 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 2369 } 2370 2371 /* HE Rates */ 2372 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 2373 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 2374 2375 ptr += sizeof(*mcs); 2376 2377 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 2378 2379 tlv = ptr; 2380 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2381 ptr += TLV_HDR_SIZE; 2382 2383 /* Loop through the HE rate set */ 2384 for (i = 0; i < arg->peer_he_mcs_count; i++) { 2385 he_mcs = ptr; 2386 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2387 sizeof(*he_mcs)); 2388 2389 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2390 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2391 ptr += sizeof(*he_mcs); 2392 } 2393 2394 tlv = ptr; 2395 len = arg->ml.enabled ? sizeof(*ml_params) : 0; 2396 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2397 ptr += TLV_HDR_SIZE; 2398 if (!len) 2399 goto skip_ml_params; 2400 2401 ml_params = ptr; 2402 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS, 2403 len); 2404 ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 2405 2406 if (arg->ml.assoc_link) 2407 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK); 2408 2409 if (arg->ml.primary_umac) 2410 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC); 2411 2412 if (arg->ml.logical_link_idx_valid) 2413 ml_params->flags |= 2414 cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID); 2415 2416 if (arg->ml.peer_id_valid) 2417 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID); 2418 2419 ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr); 2420 ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx); 2421 ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id); 2422 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id); 2423 2424 eml_cap = arg->ml.eml_cap; 2425 if (u16_get_bits(eml_cap, IEEE80211_EML_CAP_EMLSR_SUPP)) { 2426 /* Padding delay */ 2427 eml_pad_delay = ieee80211_emlsr_pad_delay_in_us(eml_cap); 2428 ml_params->emlsr_padding_delay_us = cpu_to_le32(eml_pad_delay); 2429 /* Transition delay */ 2430 eml_trans_delay = ieee80211_emlsr_trans_delay_in_us(eml_cap); 2431 ml_params->emlsr_trans_delay_us = cpu_to_le32(eml_trans_delay); 2432 /* Transition timeout */ 2433 eml_trans_timeout = ieee80211_eml_trans_timeout_in_us(eml_cap); 2434 ml_params->emlsr_trans_timeout_us = 2435 cpu_to_le32(eml_trans_timeout); 2436 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi peer %pM emlsr padding delay %u, trans delay %u trans timeout %u", 2437 arg->peer_mac, eml_pad_delay, eml_trans_delay, 2438 eml_trans_timeout); 2439 } 2440 2441 ptr += sizeof(*ml_params); 2442 2443 skip_ml_params: 2444 /* Loop through the EHT rate set */ 2445 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs); 2446 tlv = ptr; 2447 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2448 ptr += TLV_HDR_SIZE; 2449 2450 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2451 eht_mcs = ptr; 2452 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET, 2453 sizeof(*eht_mcs)); 2454 2455 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); 2456 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]); 2457 ptr += sizeof(*eht_mcs); 2458 } 2459 2460 /* Update MCS15 capability */ 2461 if (arg->eht_disable_mcs15) 2462 cmd->peer_eht_ops = cpu_to_le32(IEEE80211_EHT_OPER_MCS15_DISABLE); 2463 2464 tlv = ptr; 2465 len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0; 2466 /* fill ML Partner links */ 2467 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2468 ptr += TLV_HDR_SIZE; 2469 2470 if (len == 0) 2471 goto send; 2472 2473 for (i = 0; i < arg->ml.num_partner_links; i++) { 2474 u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC; 2475 2476 partner_info = ptr; 2477 partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd, 2478 sizeof(*partner_info)); 2479 partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id); 2480 partner_info->hw_link_id = 2481 cpu_to_le32(arg->ml.partner_info[i].hw_link_id); 2482 partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 2483 2484 if (arg->ml.partner_info[i].assoc_link) 2485 partner_info->flags |= 2486 cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK); 2487 2488 if (arg->ml.partner_info[i].primary_umac) 2489 partner_info->flags |= 2490 cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC); 2491 2492 if (arg->ml.partner_info[i].logical_link_idx_valid) { 2493 v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID); 2494 partner_info->flags |= v; 2495 } 2496 2497 partner_info->logical_link_idx = 2498 cpu_to_le32(arg->ml.partner_info[i].logical_link_idx); 2499 ptr += sizeof(*partner_info); 2500 } 2501 2502 send: 2503 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2504 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x peer_eht_ops %x\n", 2505 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2506 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2507 cmd->peer_listen_intval, cmd->peer_ht_caps, 2508 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2509 cmd->peer_mpdu_density, 2510 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2511 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2512 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2513 cmd->peer_he_cap_phy[2], 2514 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext, 2515 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1], 2516 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1], 2517 cmd->peer_eht_cap_phy[2], cmd->peer_eht_ops); 2518 2519 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2520 if (ret) { 2521 ath12k_warn(ar->ab, 2522 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2523 dev_kfree_skb(skb); 2524 } 2525 2526 return ret; 2527 } 2528 2529 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2530 struct ath12k_wmi_scan_req_arg *arg) 2531 { 2532 /* setup commonly used values */ 2533 arg->scan_req_id = 1; 2534 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2535 arg->dwell_time_active = 50; 2536 arg->dwell_time_active_2g = 0; 2537 arg->dwell_time_passive = 150; 2538 arg->dwell_time_active_6g = 70; 2539 arg->dwell_time_passive_6g = 70; 2540 arg->min_rest_time = 50; 2541 arg->max_rest_time = 500; 2542 arg->repeat_probe_time = 0; 2543 arg->probe_spacing_time = 0; 2544 arg->idle_time = 0; 2545 arg->max_scan_time = 20000; 2546 arg->probe_delay = 5; 2547 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2548 WMI_SCAN_EVENT_COMPLETED | 2549 WMI_SCAN_EVENT_BSS_CHANNEL | 2550 WMI_SCAN_EVENT_FOREIGN_CHAN | 2551 WMI_SCAN_EVENT_DEQUEUED; 2552 arg->scan_f_chan_stat_evnt = 1; 2553 arg->num_bssid = 1; 2554 2555 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2556 * ZEROs in probe request 2557 */ 2558 eth_broadcast_addr(arg->bssid_list[0].addr); 2559 } 2560 2561 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2562 struct ath12k_wmi_scan_req_arg *arg) 2563 { 2564 /* Scan events subscription */ 2565 if (arg->scan_ev_started) 2566 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2567 if (arg->scan_ev_completed) 2568 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2569 if (arg->scan_ev_bss_chan) 2570 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2571 if (arg->scan_ev_foreign_chan) 2572 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2573 if (arg->scan_ev_dequeued) 2574 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2575 if (arg->scan_ev_preempted) 2576 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2577 if (arg->scan_ev_start_failed) 2578 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2579 if (arg->scan_ev_restarted) 2580 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2581 if (arg->scan_ev_foreign_chn_exit) 2582 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2583 if (arg->scan_ev_suspended) 2584 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2585 if (arg->scan_ev_resumed) 2586 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2587 2588 /** Set scan control flags */ 2589 cmd->scan_ctrl_flags = 0; 2590 if (arg->scan_f_passive) 2591 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2592 if (arg->scan_f_strict_passive_pch) 2593 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2594 if (arg->scan_f_promisc_mode) 2595 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2596 if (arg->scan_f_capture_phy_err) 2597 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2598 if (arg->scan_f_half_rate) 2599 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2600 if (arg->scan_f_quarter_rate) 2601 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2602 if (arg->scan_f_cck_rates) 2603 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2604 if (arg->scan_f_ofdm_rates) 2605 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2606 if (arg->scan_f_chan_stat_evnt) 2607 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2608 if (arg->scan_f_filter_prb_req) 2609 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2610 if (arg->scan_f_bcast_probe) 2611 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2612 if (arg->scan_f_offchan_mgmt_tx) 2613 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2614 if (arg->scan_f_offchan_data_tx) 2615 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2616 if (arg->scan_f_force_active_dfs_chn) 2617 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2618 if (arg->scan_f_add_tpc_ie_in_probe) 2619 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2620 if (arg->scan_f_add_ds_ie_in_probe) 2621 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2622 if (arg->scan_f_add_spoofed_mac_in_probe) 2623 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2624 if (arg->scan_f_add_rand_seq_in_probe) 2625 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2626 if (arg->scan_f_en_ie_whitelist_in_probe) 2627 cmd->scan_ctrl_flags |= 2628 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2629 2630 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2631 WMI_SCAN_DWELL_MODE_MASK); 2632 } 2633 2634 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2635 struct ath12k_wmi_scan_req_arg *arg) 2636 { 2637 struct ath12k_wmi_pdev *wmi = ar->wmi; 2638 struct wmi_start_scan_cmd *cmd; 2639 struct ath12k_wmi_ssid_params *ssid = NULL; 2640 struct ath12k_wmi_mac_addr_params *bssid; 2641 struct sk_buff *skb; 2642 struct wmi_tlv *tlv; 2643 void *ptr; 2644 int i, ret, len; 2645 u32 *tmp_ptr, extraie_len_with_pad = 0; 2646 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL; 2647 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL; 2648 2649 len = sizeof(*cmd); 2650 2651 len += TLV_HDR_SIZE; 2652 if (arg->num_chan) 2653 len += arg->num_chan * sizeof(u32); 2654 2655 len += TLV_HDR_SIZE; 2656 if (arg->num_ssids) 2657 len += arg->num_ssids * sizeof(*ssid); 2658 2659 len += TLV_HDR_SIZE; 2660 if (arg->num_bssid) 2661 len += sizeof(*bssid) * arg->num_bssid; 2662 2663 if (arg->num_hint_bssid) 2664 len += TLV_HDR_SIZE + 2665 arg->num_hint_bssid * sizeof(*hint_bssid); 2666 2667 if (arg->num_hint_s_ssid) 2668 len += TLV_HDR_SIZE + 2669 arg->num_hint_s_ssid * sizeof(*s_ssid); 2670 2671 len += TLV_HDR_SIZE; 2672 if (arg->extraie.len) 2673 extraie_len_with_pad = 2674 roundup(arg->extraie.len, sizeof(u32)); 2675 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) { 2676 len += extraie_len_with_pad; 2677 } else { 2678 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n", 2679 arg->extraie.len); 2680 extraie_len_with_pad = 0; 2681 } 2682 2683 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2684 if (!skb) 2685 return -ENOMEM; 2686 2687 ptr = skb->data; 2688 2689 cmd = ptr; 2690 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2691 sizeof(*cmd)); 2692 2693 cmd->scan_id = cpu_to_le32(arg->scan_id); 2694 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2695 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2696 if (ar->state_11d == ATH12K_11D_PREPARING) 2697 arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM; 2698 else 2699 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2700 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2701 2702 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2703 2704 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2705 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2706 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2707 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2708 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2709 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2710 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2711 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2712 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2713 cmd->idle_time = cpu_to_le32(arg->idle_time); 2714 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2715 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2716 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2717 cmd->num_chan = cpu_to_le32(arg->num_chan); 2718 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2719 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2720 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2721 cmd->n_probes = cpu_to_le32(arg->n_probes); 2722 2723 ptr += sizeof(*cmd); 2724 2725 len = arg->num_chan * sizeof(u32); 2726 2727 tlv = ptr; 2728 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2729 ptr += TLV_HDR_SIZE; 2730 tmp_ptr = (u32 *)ptr; 2731 2732 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4); 2733 2734 ptr += len; 2735 2736 len = arg->num_ssids * sizeof(*ssid); 2737 tlv = ptr; 2738 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2739 2740 ptr += TLV_HDR_SIZE; 2741 2742 if (arg->num_ssids) { 2743 ssid = ptr; 2744 for (i = 0; i < arg->num_ssids; ++i) { 2745 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2746 memcpy(ssid->ssid, arg->ssid[i].ssid, 2747 arg->ssid[i].ssid_len); 2748 ssid++; 2749 } 2750 } 2751 2752 ptr += (arg->num_ssids * sizeof(*ssid)); 2753 len = arg->num_bssid * sizeof(*bssid); 2754 tlv = ptr; 2755 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2756 2757 ptr += TLV_HDR_SIZE; 2758 bssid = ptr; 2759 2760 if (arg->num_bssid) { 2761 for (i = 0; i < arg->num_bssid; ++i) { 2762 ether_addr_copy(bssid->addr, 2763 arg->bssid_list[i].addr); 2764 bssid++; 2765 } 2766 } 2767 2768 ptr += arg->num_bssid * sizeof(*bssid); 2769 2770 len = extraie_len_with_pad; 2771 tlv = ptr; 2772 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2773 ptr += TLV_HDR_SIZE; 2774 2775 if (extraie_len_with_pad) 2776 memcpy(ptr, arg->extraie.ptr, 2777 arg->extraie.len); 2778 2779 ptr += extraie_len_with_pad; 2780 2781 if (arg->num_hint_s_ssid) { 2782 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2783 tlv = ptr; 2784 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2785 ptr += TLV_HDR_SIZE; 2786 s_ssid = ptr; 2787 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2788 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags; 2789 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid; 2790 s_ssid++; 2791 } 2792 ptr += len; 2793 } 2794 2795 if (arg->num_hint_bssid) { 2796 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2797 tlv = ptr; 2798 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2799 ptr += TLV_HDR_SIZE; 2800 hint_bssid = ptr; 2801 for (i = 0; i < arg->num_hint_bssid; ++i) { 2802 hint_bssid->freq_flags = 2803 arg->hint_bssid[i].freq_flags; 2804 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0], 2805 &hint_bssid->bssid.addr[0]); 2806 hint_bssid++; 2807 } 2808 } 2809 2810 ret = ath12k_wmi_cmd_send(wmi, skb, 2811 WMI_START_SCAN_CMDID); 2812 if (ret) { 2813 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2814 dev_kfree_skb(skb); 2815 } 2816 2817 return ret; 2818 } 2819 2820 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2821 struct ath12k_wmi_scan_cancel_arg *arg) 2822 { 2823 struct ath12k_wmi_pdev *wmi = ar->wmi; 2824 struct wmi_stop_scan_cmd *cmd; 2825 struct sk_buff *skb; 2826 int ret; 2827 2828 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2829 if (!skb) 2830 return -ENOMEM; 2831 2832 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2833 2834 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2835 sizeof(*cmd)); 2836 2837 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2838 cmd->requestor = cpu_to_le32(arg->requester); 2839 cmd->scan_id = cpu_to_le32(arg->scan_id); 2840 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2841 /* stop the scan with the corresponding scan_id */ 2842 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2843 /* Cancelling all scans */ 2844 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2845 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2846 /* Cancelling VAP scans */ 2847 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2848 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2849 /* Cancelling specific scan */ 2850 cmd->req_type = WMI_SCAN_STOP_ONE; 2851 } else { 2852 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2853 arg->req_type); 2854 dev_kfree_skb(skb); 2855 return -EINVAL; 2856 } 2857 2858 ret = ath12k_wmi_cmd_send(wmi, skb, 2859 WMI_STOP_SCAN_CMDID); 2860 if (ret) { 2861 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2862 dev_kfree_skb(skb); 2863 } 2864 2865 return ret; 2866 } 2867 2868 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2869 struct ath12k_wmi_scan_chan_list_arg *arg) 2870 { 2871 struct ath12k_wmi_pdev *wmi = ar->wmi; 2872 struct wmi_scan_chan_list_cmd *cmd; 2873 struct sk_buff *skb; 2874 struct ath12k_wmi_channel_params *chan_info; 2875 struct ath12k_wmi_channel_arg *channel_arg; 2876 struct wmi_tlv *tlv; 2877 void *ptr; 2878 int i, ret, len; 2879 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2880 __le32 *reg1, *reg2; 2881 2882 channel_arg = &arg->channel[0]; 2883 while (arg->nallchans) { 2884 len = sizeof(*cmd) + TLV_HDR_SIZE; 2885 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2886 sizeof(*chan_info); 2887 2888 num_send_chans = min(arg->nallchans, max_chan_limit); 2889 2890 arg->nallchans -= num_send_chans; 2891 len += sizeof(*chan_info) * num_send_chans; 2892 2893 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2894 if (!skb) 2895 return -ENOMEM; 2896 2897 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2898 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2899 sizeof(*cmd)); 2900 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2901 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2902 if (num_sends) 2903 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2904 2905 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2906 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2907 num_send_chans, len, cmd->pdev_id, num_sends); 2908 2909 ptr = skb->data + sizeof(*cmd); 2910 2911 len = sizeof(*chan_info) * num_send_chans; 2912 tlv = ptr; 2913 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2914 len); 2915 ptr += TLV_HDR_SIZE; 2916 2917 for (i = 0; i < num_send_chans; ++i) { 2918 chan_info = ptr; 2919 memset(chan_info, 0, sizeof(*chan_info)); 2920 len = sizeof(*chan_info); 2921 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2922 len); 2923 2924 reg1 = &chan_info->reg_info_1; 2925 reg2 = &chan_info->reg_info_2; 2926 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2927 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2928 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2929 2930 if (channel_arg->is_chan_passive) 2931 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2932 if (channel_arg->allow_he) 2933 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2934 else if (channel_arg->allow_vht) 2935 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2936 else if (channel_arg->allow_ht) 2937 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2938 if (channel_arg->half_rate) 2939 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2940 if (channel_arg->quarter_rate) 2941 chan_info->info |= 2942 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2943 2944 if (channel_arg->psc_channel) 2945 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2946 2947 if (channel_arg->dfs_set) 2948 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2949 2950 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2951 WMI_CHAN_INFO_MODE); 2952 *reg1 |= le32_encode_bits(channel_arg->minpower, 2953 WMI_CHAN_REG_INFO1_MIN_PWR); 2954 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2955 WMI_CHAN_REG_INFO1_MAX_PWR); 2956 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2957 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2958 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2959 WMI_CHAN_REG_INFO1_REG_CLS); 2960 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2961 WMI_CHAN_REG_INFO2_ANT_MAX); 2962 *reg2 |= le32_encode_bits(channel_arg->maxregpower, 2963 WMI_CHAN_REG_INFO2_MAX_TX_PWR); 2964 2965 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2966 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2967 i, chan_info->mhz, chan_info->info); 2968 2969 ptr += sizeof(*chan_info); 2970 2971 channel_arg++; 2972 } 2973 2974 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2975 if (ret) { 2976 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2977 dev_kfree_skb(skb); 2978 return ret; 2979 } 2980 2981 num_sends++; 2982 } 2983 2984 return 0; 2985 } 2986 2987 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2988 struct wmi_wmm_params_all_arg *param) 2989 { 2990 struct ath12k_wmi_pdev *wmi = ar->wmi; 2991 struct wmi_vdev_set_wmm_params_cmd *cmd; 2992 struct wmi_wmm_params *wmm_param; 2993 struct wmi_wmm_params_arg *wmi_wmm_arg; 2994 struct sk_buff *skb; 2995 int ret, ac; 2996 2997 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2998 if (!skb) 2999 return -ENOMEM; 3000 3001 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 3002 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 3003 sizeof(*cmd)); 3004 3005 cmd->vdev_id = cpu_to_le32(vdev_id); 3006 cmd->wmm_param_type = 0; 3007 3008 for (ac = 0; ac < WME_NUM_AC; ac++) { 3009 switch (ac) { 3010 case WME_AC_BE: 3011 wmi_wmm_arg = ¶m->ac_be; 3012 break; 3013 case WME_AC_BK: 3014 wmi_wmm_arg = ¶m->ac_bk; 3015 break; 3016 case WME_AC_VI: 3017 wmi_wmm_arg = ¶m->ac_vi; 3018 break; 3019 case WME_AC_VO: 3020 wmi_wmm_arg = ¶m->ac_vo; 3021 break; 3022 } 3023 3024 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 3025 wmm_param->tlv_header = 3026 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 3027 sizeof(*wmm_param)); 3028 3029 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 3030 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 3031 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 3032 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 3033 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 3034 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 3035 3036 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3037 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 3038 ac, wmm_param->aifs, wmm_param->cwmin, 3039 wmm_param->cwmax, wmm_param->txoplimit, 3040 wmm_param->acm, wmm_param->no_ack); 3041 } 3042 ret = ath12k_wmi_cmd_send(wmi, skb, 3043 WMI_VDEV_SET_WMM_PARAMS_CMDID); 3044 if (ret) { 3045 ath12k_warn(ar->ab, 3046 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 3047 dev_kfree_skb(skb); 3048 } 3049 3050 return ret; 3051 } 3052 3053 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 3054 u32 pdev_id) 3055 { 3056 struct ath12k_wmi_pdev *wmi = ar->wmi; 3057 struct wmi_dfs_phyerr_offload_cmd *cmd; 3058 struct sk_buff *skb; 3059 int ret; 3060 3061 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3062 if (!skb) 3063 return -ENOMEM; 3064 3065 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 3066 cmd->tlv_header = 3067 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 3068 sizeof(*cmd)); 3069 3070 cmd->pdev_id = cpu_to_le32(pdev_id); 3071 3072 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3073 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 3074 3075 ret = ath12k_wmi_cmd_send(wmi, skb, 3076 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 3077 if (ret) { 3078 ath12k_warn(ar->ab, 3079 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 3080 dev_kfree_skb(skb); 3081 } 3082 3083 return ret; 3084 } 3085 3086 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 3087 const u8 *buf, size_t buf_len) 3088 { 3089 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3090 struct wmi_pdev_set_bios_interface_cmd *cmd; 3091 struct wmi_tlv *tlv; 3092 struct sk_buff *skb; 3093 u8 *ptr; 3094 u32 len, len_aligned; 3095 int ret; 3096 3097 len_aligned = roundup(buf_len, sizeof(u32)); 3098 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned; 3099 3100 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3101 if (!skb) 3102 return -ENOMEM; 3103 3104 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data; 3105 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD, 3106 sizeof(*cmd)); 3107 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3108 cmd->param_type_id = cpu_to_le32(param_id); 3109 cmd->length = cpu_to_le32(buf_len); 3110 3111 ptr = skb->data + sizeof(*cmd); 3112 tlv = (struct wmi_tlv *)ptr; 3113 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned); 3114 ptr += TLV_HDR_SIZE; 3115 memcpy(ptr, buf, buf_len); 3116 3117 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3118 skb, 3119 WMI_PDEV_SET_BIOS_INTERFACE_CMDID); 3120 if (ret) { 3121 ath12k_warn(ab, 3122 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n", 3123 param_id, ret); 3124 dev_kfree_skb(skb); 3125 } 3126 3127 return 0; 3128 } 3129 3130 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table) 3131 { 3132 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3133 struct wmi_pdev_set_bios_sar_table_cmd *cmd; 3134 struct wmi_tlv *tlv; 3135 struct sk_buff *skb; 3136 int ret; 3137 u8 *buf_ptr; 3138 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned; 3139 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET; 3140 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET; 3141 3142 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32)); 3143 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN, 3144 sizeof(u32)); 3145 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned + 3146 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned; 3147 3148 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3149 if (!skb) 3150 return -ENOMEM; 3151 3152 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data; 3153 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD, 3154 sizeof(*cmd)); 3155 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3156 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 3157 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 3158 3159 buf_ptr = skb->data + sizeof(*cmd); 3160 tlv = (struct wmi_tlv *)buf_ptr; 3161 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 3162 sar_table_len_aligned); 3163 buf_ptr += TLV_HDR_SIZE; 3164 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 3165 3166 buf_ptr += sar_table_len_aligned; 3167 tlv = (struct wmi_tlv *)buf_ptr; 3168 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 3169 sar_dbs_backoff_len_aligned); 3170 buf_ptr += TLV_HDR_SIZE; 3171 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 3172 3173 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3174 skb, 3175 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID); 3176 if (ret) { 3177 ath12k_warn(ab, 3178 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n", 3179 ret); 3180 dev_kfree_skb(skb); 3181 } 3182 3183 return ret; 3184 } 3185 3186 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table) 3187 { 3188 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3189 struct wmi_pdev_set_bios_geo_table_cmd *cmd; 3190 struct wmi_tlv *tlv; 3191 struct sk_buff *skb; 3192 int ret; 3193 u8 *buf_ptr; 3194 u32 len, sar_geo_len_aligned; 3195 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET; 3196 3197 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32)); 3198 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned; 3199 3200 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3201 if (!skb) 3202 return -ENOMEM; 3203 3204 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data; 3205 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD, 3206 sizeof(*cmd)); 3207 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3208 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 3209 3210 buf_ptr = skb->data + sizeof(*cmd); 3211 tlv = (struct wmi_tlv *)buf_ptr; 3212 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned); 3213 buf_ptr += TLV_HDR_SIZE; 3214 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 3215 3216 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3217 skb, 3218 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID); 3219 if (ret) { 3220 ath12k_warn(ab, 3221 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n", 3222 ret); 3223 dev_kfree_skb(skb); 3224 } 3225 3226 return ret; 3227 } 3228 3229 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3230 u32 tid, u32 initiator, u32 reason) 3231 { 3232 struct ath12k_wmi_pdev *wmi = ar->wmi; 3233 struct wmi_delba_send_cmd *cmd; 3234 struct sk_buff *skb; 3235 int ret; 3236 3237 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3238 if (!skb) 3239 return -ENOMEM; 3240 3241 cmd = (struct wmi_delba_send_cmd *)skb->data; 3242 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 3243 sizeof(*cmd)); 3244 cmd->vdev_id = cpu_to_le32(vdev_id); 3245 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3246 cmd->tid = cpu_to_le32(tid); 3247 cmd->initiator = cpu_to_le32(initiator); 3248 cmd->reasoncode = cpu_to_le32(reason); 3249 3250 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3251 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 3252 vdev_id, mac, tid, initiator, reason); 3253 3254 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 3255 3256 if (ret) { 3257 ath12k_warn(ar->ab, 3258 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 3259 dev_kfree_skb(skb); 3260 } 3261 3262 return ret; 3263 } 3264 3265 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3266 u32 tid, u32 status) 3267 { 3268 struct ath12k_wmi_pdev *wmi = ar->wmi; 3269 struct wmi_addba_setresponse_cmd *cmd; 3270 struct sk_buff *skb; 3271 int ret; 3272 3273 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3274 if (!skb) 3275 return -ENOMEM; 3276 3277 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 3278 cmd->tlv_header = 3279 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 3280 sizeof(*cmd)); 3281 cmd->vdev_id = cpu_to_le32(vdev_id); 3282 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3283 cmd->tid = cpu_to_le32(tid); 3284 cmd->statuscode = cpu_to_le32(status); 3285 3286 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3287 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 3288 vdev_id, mac, tid, status); 3289 3290 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 3291 3292 if (ret) { 3293 ath12k_warn(ar->ab, 3294 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 3295 dev_kfree_skb(skb); 3296 } 3297 3298 return ret; 3299 } 3300 3301 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3302 u32 tid, u32 buf_size) 3303 { 3304 struct ath12k_wmi_pdev *wmi = ar->wmi; 3305 struct wmi_addba_send_cmd *cmd; 3306 struct sk_buff *skb; 3307 int ret; 3308 3309 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3310 if (!skb) 3311 return -ENOMEM; 3312 3313 cmd = (struct wmi_addba_send_cmd *)skb->data; 3314 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 3315 sizeof(*cmd)); 3316 cmd->vdev_id = cpu_to_le32(vdev_id); 3317 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3318 cmd->tid = cpu_to_le32(tid); 3319 cmd->buffersize = cpu_to_le32(buf_size); 3320 3321 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3322 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 3323 vdev_id, mac, tid, buf_size); 3324 3325 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 3326 3327 if (ret) { 3328 ath12k_warn(ar->ab, 3329 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 3330 dev_kfree_skb(skb); 3331 } 3332 3333 return ret; 3334 } 3335 3336 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 3337 { 3338 struct ath12k_wmi_pdev *wmi = ar->wmi; 3339 struct wmi_addba_clear_resp_cmd *cmd; 3340 struct sk_buff *skb; 3341 int ret; 3342 3343 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3344 if (!skb) 3345 return -ENOMEM; 3346 3347 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 3348 cmd->tlv_header = 3349 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 3350 sizeof(*cmd)); 3351 cmd->vdev_id = cpu_to_le32(vdev_id); 3352 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3353 3354 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3355 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 3356 vdev_id, mac); 3357 3358 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 3359 3360 if (ret) { 3361 ath12k_warn(ar->ab, 3362 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 3363 dev_kfree_skb(skb); 3364 } 3365 3366 return ret; 3367 } 3368 3369 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 3370 struct ath12k_wmi_init_country_arg *arg) 3371 { 3372 struct ath12k_wmi_pdev *wmi = ar->wmi; 3373 struct wmi_init_country_cmd *cmd; 3374 struct sk_buff *skb; 3375 int ret; 3376 3377 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3378 if (!skb) 3379 return -ENOMEM; 3380 3381 cmd = (struct wmi_init_country_cmd *)skb->data; 3382 cmd->tlv_header = 3383 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 3384 sizeof(*cmd)); 3385 3386 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3387 3388 switch (arg->flags) { 3389 case ALPHA_IS_SET: 3390 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 3391 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 3392 break; 3393 case CC_IS_SET: 3394 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 3395 cmd->cc_info.country_code = 3396 cpu_to_le32(arg->cc_info.country_code); 3397 break; 3398 case REGDMN_IS_SET: 3399 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 3400 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 3401 break; 3402 default: 3403 ret = -EINVAL; 3404 goto out; 3405 } 3406 3407 ret = ath12k_wmi_cmd_send(wmi, skb, 3408 WMI_SET_INIT_COUNTRY_CMDID); 3409 3410 out: 3411 if (ret) { 3412 ath12k_warn(ar->ab, 3413 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 3414 ret); 3415 dev_kfree_skb(skb); 3416 } 3417 3418 return ret; 3419 } 3420 3421 int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar, 3422 struct wmi_set_current_country_arg *arg) 3423 { 3424 struct ath12k_wmi_pdev *wmi = ar->wmi; 3425 struct wmi_set_current_country_cmd *cmd; 3426 struct sk_buff *skb; 3427 int ret; 3428 3429 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3430 if (!skb) 3431 return -ENOMEM; 3432 3433 cmd = (struct wmi_set_current_country_cmd *)skb->data; 3434 cmd->tlv_header = 3435 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD, 3436 sizeof(*cmd)); 3437 3438 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3439 memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2)); 3440 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID); 3441 3442 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3443 "set current country pdev id %d alpha2 %c%c\n", 3444 ar->pdev->pdev_id, 3445 arg->alpha2[0], 3446 arg->alpha2[1]); 3447 3448 if (ret) { 3449 ath12k_warn(ar->ab, 3450 "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret); 3451 dev_kfree_skb(skb); 3452 } 3453 3454 return ret; 3455 } 3456 3457 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar, 3458 struct wmi_11d_scan_start_arg *arg) 3459 { 3460 struct ath12k_wmi_pdev *wmi = ar->wmi; 3461 struct wmi_11d_scan_start_cmd *cmd; 3462 struct sk_buff *skb; 3463 int ret; 3464 3465 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3466 if (!skb) 3467 return -ENOMEM; 3468 3469 cmd = (struct wmi_11d_scan_start_cmd *)skb->data; 3470 cmd->tlv_header = 3471 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD, 3472 sizeof(*cmd)); 3473 3474 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3475 cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec); 3476 cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec); 3477 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID); 3478 3479 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3480 "send 11d scan start vdev id %d period %d ms internal %d ms\n", 3481 arg->vdev_id, arg->scan_period_msec, 3482 arg->start_interval_msec); 3483 3484 if (ret) { 3485 ath12k_warn(ar->ab, 3486 "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret); 3487 dev_kfree_skb(skb); 3488 } 3489 3490 return ret; 3491 } 3492 3493 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id) 3494 { 3495 struct ath12k_wmi_pdev *wmi = ar->wmi; 3496 struct wmi_11d_scan_stop_cmd *cmd; 3497 struct sk_buff *skb; 3498 int ret; 3499 3500 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3501 if (!skb) 3502 return -ENOMEM; 3503 3504 cmd = (struct wmi_11d_scan_stop_cmd *)skb->data; 3505 cmd->tlv_header = 3506 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD, 3507 sizeof(*cmd)); 3508 3509 cmd->vdev_id = cpu_to_le32(vdev_id); 3510 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID); 3511 3512 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3513 "send 11d scan stop vdev id %d\n", 3514 cmd->vdev_id); 3515 3516 if (ret) { 3517 ath12k_warn(ar->ab, 3518 "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret); 3519 dev_kfree_skb(skb); 3520 } 3521 3522 return ret; 3523 } 3524 3525 int 3526 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 3527 { 3528 struct ath12k_wmi_pdev *wmi = ar->wmi; 3529 struct ath12k_base *ab = wmi->wmi_ab->ab; 3530 struct wmi_twt_enable_params_cmd *cmd; 3531 struct sk_buff *skb; 3532 int ret, len; 3533 3534 len = sizeof(*cmd); 3535 3536 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3537 if (!skb) 3538 return -ENOMEM; 3539 3540 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 3541 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 3542 len); 3543 cmd->pdev_id = cpu_to_le32(pdev_id); 3544 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 3545 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 3546 cmd->congestion_thresh_setup = 3547 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 3548 cmd->congestion_thresh_teardown = 3549 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 3550 cmd->congestion_thresh_critical = 3551 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 3552 cmd->interference_thresh_teardown = 3553 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 3554 cmd->interference_thresh_setup = 3555 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 3556 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 3557 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 3558 cmd->no_of_bcast_mcast_slots = 3559 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 3560 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 3561 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 3562 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 3563 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 3564 cmd->remove_sta_slot_interval = 3565 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 3566 /* TODO add MBSSID support */ 3567 cmd->mbss_support = 0; 3568 3569 ret = ath12k_wmi_cmd_send(wmi, skb, 3570 WMI_TWT_ENABLE_CMDID); 3571 if (ret) { 3572 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 3573 dev_kfree_skb(skb); 3574 } 3575 return ret; 3576 } 3577 3578 int 3579 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 3580 { 3581 struct ath12k_wmi_pdev *wmi = ar->wmi; 3582 struct ath12k_base *ab = wmi->wmi_ab->ab; 3583 struct wmi_twt_disable_params_cmd *cmd; 3584 struct sk_buff *skb; 3585 int ret, len; 3586 3587 len = sizeof(*cmd); 3588 3589 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3590 if (!skb) 3591 return -ENOMEM; 3592 3593 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 3594 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 3595 len); 3596 cmd->pdev_id = cpu_to_le32(pdev_id); 3597 3598 ret = ath12k_wmi_cmd_send(wmi, skb, 3599 WMI_TWT_DISABLE_CMDID); 3600 if (ret) { 3601 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 3602 dev_kfree_skb(skb); 3603 } 3604 return ret; 3605 } 3606 3607 int 3608 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 3609 struct ieee80211_he_obss_pd *he_obss_pd) 3610 { 3611 struct ath12k_wmi_pdev *wmi = ar->wmi; 3612 struct ath12k_base *ab = wmi->wmi_ab->ab; 3613 struct wmi_obss_spatial_reuse_params_cmd *cmd; 3614 struct sk_buff *skb; 3615 int ret, len; 3616 3617 len = sizeof(*cmd); 3618 3619 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3620 if (!skb) 3621 return -ENOMEM; 3622 3623 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 3624 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 3625 len); 3626 cmd->vdev_id = cpu_to_le32(vdev_id); 3627 cmd->enable = cpu_to_le32(he_obss_pd->enable); 3628 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 3629 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 3630 3631 ret = ath12k_wmi_cmd_send(wmi, skb, 3632 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 3633 if (ret) { 3634 ath12k_warn(ab, 3635 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 3636 dev_kfree_skb(skb); 3637 } 3638 return ret; 3639 } 3640 3641 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 3642 u8 bss_color, u32 period, 3643 bool enable) 3644 { 3645 struct ath12k_wmi_pdev *wmi = ar->wmi; 3646 struct ath12k_base *ab = wmi->wmi_ab->ab; 3647 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 3648 struct sk_buff *skb; 3649 int ret, len; 3650 3651 len = sizeof(*cmd); 3652 3653 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3654 if (!skb) 3655 return -ENOMEM; 3656 3657 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 3658 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 3659 len); 3660 cmd->vdev_id = cpu_to_le32(vdev_id); 3661 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 3662 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 3663 cmd->current_bss_color = cpu_to_le32(bss_color); 3664 cmd->detection_period_ms = cpu_to_le32(period); 3665 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 3666 cmd->free_slot_expiry_time_ms = 0; 3667 cmd->flags = 0; 3668 3669 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3670 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 3671 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 3672 cmd->detection_period_ms, cmd->scan_period_ms); 3673 3674 ret = ath12k_wmi_cmd_send(wmi, skb, 3675 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 3676 if (ret) { 3677 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 3678 dev_kfree_skb(skb); 3679 } 3680 return ret; 3681 } 3682 3683 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 3684 bool enable) 3685 { 3686 struct ath12k_wmi_pdev *wmi = ar->wmi; 3687 struct ath12k_base *ab = wmi->wmi_ab->ab; 3688 struct wmi_bss_color_change_enable_params_cmd *cmd; 3689 struct sk_buff *skb; 3690 int ret, len; 3691 3692 len = sizeof(*cmd); 3693 3694 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3695 if (!skb) 3696 return -ENOMEM; 3697 3698 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 3699 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 3700 len); 3701 cmd->vdev_id = cpu_to_le32(vdev_id); 3702 cmd->enable = enable ? cpu_to_le32(1) : 0; 3703 3704 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3705 "wmi_send_bss_color_change_enable id %d enable %d\n", 3706 cmd->vdev_id, cmd->enable); 3707 3708 ret = ath12k_wmi_cmd_send(wmi, skb, 3709 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 3710 if (ret) { 3711 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 3712 dev_kfree_skb(skb); 3713 } 3714 return ret; 3715 } 3716 3717 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 3718 struct sk_buff *tmpl) 3719 { 3720 struct wmi_tlv *tlv; 3721 struct sk_buff *skb; 3722 void *ptr; 3723 int ret, len; 3724 size_t aligned_len; 3725 struct wmi_fils_discovery_tmpl_cmd *cmd; 3726 3727 aligned_len = roundup(tmpl->len, 4); 3728 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 3729 3730 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3731 "WMI vdev %i set FILS discovery template\n", vdev_id); 3732 3733 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3734 if (!skb) 3735 return -ENOMEM; 3736 3737 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 3738 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 3739 sizeof(*cmd)); 3740 cmd->vdev_id = cpu_to_le32(vdev_id); 3741 cmd->buf_len = cpu_to_le32(tmpl->len); 3742 ptr = skb->data + sizeof(*cmd); 3743 3744 tlv = ptr; 3745 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3746 memcpy(tlv->value, tmpl->data, tmpl->len); 3747 3748 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 3749 if (ret) { 3750 ath12k_warn(ar->ab, 3751 "WMI vdev %i failed to send FILS discovery template command\n", 3752 vdev_id); 3753 dev_kfree_skb(skb); 3754 } 3755 return ret; 3756 } 3757 3758 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3759 struct sk_buff *tmpl) 3760 { 3761 struct wmi_probe_tmpl_cmd *cmd; 3762 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3763 struct wmi_tlv *tlv; 3764 struct sk_buff *skb; 3765 void *ptr; 3766 int ret, len; 3767 size_t aligned_len = roundup(tmpl->len, 4); 3768 3769 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3770 "WMI vdev %i set probe response template\n", vdev_id); 3771 3772 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3773 3774 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3775 if (!skb) 3776 return -ENOMEM; 3777 3778 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3779 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3780 sizeof(*cmd)); 3781 cmd->vdev_id = cpu_to_le32(vdev_id); 3782 cmd->buf_len = cpu_to_le32(tmpl->len); 3783 3784 ptr = skb->data + sizeof(*cmd); 3785 3786 probe_info = ptr; 3787 len = sizeof(*probe_info); 3788 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 3789 len); 3790 probe_info->caps = 0; 3791 probe_info->erp = 0; 3792 3793 ptr += sizeof(*probe_info); 3794 3795 tlv = ptr; 3796 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3797 memcpy(tlv->value, tmpl->data, tmpl->len); 3798 3799 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 3800 if (ret) { 3801 ath12k_warn(ar->ab, 3802 "WMI vdev %i failed to send probe response template command\n", 3803 vdev_id); 3804 dev_kfree_skb(skb); 3805 } 3806 return ret; 3807 } 3808 3809 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 3810 bool unsol_bcast_probe_resp_enabled) 3811 { 3812 struct sk_buff *skb; 3813 int ret, len; 3814 struct wmi_fils_discovery_cmd *cmd; 3815 3816 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3817 "WMI vdev %i set %s interval to %u TU\n", 3818 vdev_id, unsol_bcast_probe_resp_enabled ? 3819 "unsolicited broadcast probe response" : "FILS discovery", 3820 interval); 3821 3822 len = sizeof(*cmd); 3823 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3824 if (!skb) 3825 return -ENOMEM; 3826 3827 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 3828 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 3829 len); 3830 cmd->vdev_id = cpu_to_le32(vdev_id); 3831 cmd->interval = cpu_to_le32(interval); 3832 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 3833 3834 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 3835 if (ret) { 3836 ath12k_warn(ar->ab, 3837 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 3838 vdev_id); 3839 dev_kfree_skb(skb); 3840 } 3841 return ret; 3842 } 3843 3844 static void 3845 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 3846 struct ath12k_wmi_pdev_band_arg *arg) 3847 { 3848 u8 i; 3849 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 3850 struct ath12k_pdev *pdev; 3851 3852 for (i = 0; i < soc->num_radios; i++) { 3853 pdev = &soc->pdevs[i]; 3854 hal_reg_cap = &soc->hal_reg_cap[i]; 3855 arg[i].pdev_id = pdev->pdev_id; 3856 3857 switch (pdev->cap.supported_bands) { 3858 case WMI_HOST_WLAN_2GHZ_5GHZ_CAP: 3859 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3860 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3861 break; 3862 case WMI_HOST_WLAN_2GHZ_CAP: 3863 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3864 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3865 break; 3866 case WMI_HOST_WLAN_5GHZ_CAP: 3867 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3868 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3869 break; 3870 default: 3871 break; 3872 } 3873 } 3874 } 3875 3876 static void 3877 ath12k_wmi_copy_resource_config(struct ath12k_base *ab, 3878 struct ath12k_wmi_resource_config_params *wmi_cfg, 3879 struct ath12k_wmi_resource_config_arg *tg_cfg) 3880 { 3881 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 3882 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 3883 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 3884 wmi_cfg->num_offload_reorder_buffs = 3885 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 3886 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 3887 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 3888 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 3889 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 3890 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 3891 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 3892 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 3893 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 3894 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 3895 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 3896 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 3897 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 3898 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 3899 wmi_cfg->roam_offload_max_ap_profiles = 3900 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 3901 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 3902 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 3903 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 3904 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 3905 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 3906 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 3907 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 3908 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 3909 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 3910 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 3911 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 3912 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 3913 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 3914 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 3915 wmi_cfg->num_tdls_conn_table_entries = 3916 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 3917 wmi_cfg->beacon_tx_offload_max_vdev = 3918 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 3919 wmi_cfg->num_multicast_filter_entries = 3920 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 3921 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 3922 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 3923 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 3924 wmi_cfg->max_tdls_concurrent_sleep_sta = 3925 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 3926 wmi_cfg->max_tdls_concurrent_buffer_sta = 3927 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 3928 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 3929 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 3930 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 3931 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 3932 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 3933 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 3934 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 3935 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config | 3936 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64 | 3937 WMI_RSRC_CFG_FLAG1_ACK_RSSI); 3938 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 3939 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 3940 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 3941 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 3942 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver, 3943 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION); 3944 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 3945 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3946 if (ab->hw_params->reoq_lut_support) 3947 wmi_cfg->host_service_flags |= 3948 cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT); 3949 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt); 3950 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period); 3951 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET); 3952 } 3953 3954 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 3955 struct ath12k_wmi_init_cmd_arg *arg) 3956 { 3957 struct ath12k_base *ab = wmi->wmi_ab->ab; 3958 struct sk_buff *skb; 3959 struct wmi_init_cmd *cmd; 3960 struct ath12k_wmi_resource_config_params *cfg; 3961 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 3962 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 3963 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 3964 struct wmi_tlv *tlv; 3965 size_t ret, len; 3966 void *ptr; 3967 u32 hw_mode_len = 0; 3968 u16 idx; 3969 3970 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 3971 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 3972 (arg->num_band_to_mac * sizeof(*band_to_mac)); 3973 3974 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 3975 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 3976 3977 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3978 if (!skb) 3979 return -ENOMEM; 3980 3981 cmd = (struct wmi_init_cmd *)skb->data; 3982 3983 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 3984 sizeof(*cmd)); 3985 3986 ptr = skb->data + sizeof(*cmd); 3987 cfg = ptr; 3988 3989 ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg); 3990 3991 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3992 sizeof(*cfg)); 3993 3994 ptr += sizeof(*cfg); 3995 host_mem_chunks = ptr + TLV_HDR_SIZE; 3996 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 3997 3998 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 3999 host_mem_chunks[idx].tlv_header = 4000 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 4001 len); 4002 4003 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 4004 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 4005 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 4006 4007 ath12k_dbg(ab, ATH12K_DBG_WMI, 4008 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 4009 arg->mem_chunks[idx].req_id, 4010 (u64)arg->mem_chunks[idx].paddr, 4011 arg->mem_chunks[idx].len); 4012 } 4013 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 4014 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 4015 4016 /* num_mem_chunks is zero */ 4017 tlv = ptr; 4018 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 4019 ptr += TLV_HDR_SIZE + len; 4020 4021 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 4022 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 4023 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 4024 sizeof(*hw_mode)); 4025 4026 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 4027 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 4028 4029 ptr += sizeof(*hw_mode); 4030 4031 len = arg->num_band_to_mac * sizeof(*band_to_mac); 4032 tlv = ptr; 4033 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 4034 4035 ptr += TLV_HDR_SIZE; 4036 len = sizeof(*band_to_mac); 4037 4038 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 4039 band_to_mac = (void *)ptr; 4040 4041 band_to_mac->tlv_header = 4042 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 4043 len); 4044 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 4045 band_to_mac->start_freq = 4046 cpu_to_le32(arg->band_to_mac[idx].start_freq); 4047 band_to_mac->end_freq = 4048 cpu_to_le32(arg->band_to_mac[idx].end_freq); 4049 ptr += sizeof(*band_to_mac); 4050 } 4051 } 4052 4053 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 4054 if (ret) { 4055 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 4056 dev_kfree_skb(skb); 4057 } 4058 4059 return ret; 4060 } 4061 4062 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 4063 int pdev_id) 4064 { 4065 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 4066 struct sk_buff *skb; 4067 int ret; 4068 4069 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4070 if (!skb) 4071 return -ENOMEM; 4072 4073 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 4074 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 4075 sizeof(*cmd)); 4076 4077 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 4078 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 4079 4080 cmd->pdev_id = cpu_to_le32(pdev_id); 4081 4082 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4083 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 4084 4085 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 4086 if (ret) { 4087 ath12k_warn(ar->ab, 4088 "failed to send lro cfg req wmi cmd\n"); 4089 goto err; 4090 } 4091 4092 return 0; 4093 err: 4094 dev_kfree_skb(skb); 4095 return ret; 4096 } 4097 4098 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 4099 { 4100 unsigned long time_left; 4101 4102 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 4103 WMI_SERVICE_READY_TIMEOUT_HZ); 4104 if (!time_left) 4105 return -ETIMEDOUT; 4106 4107 return 0; 4108 } 4109 4110 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 4111 { 4112 unsigned long time_left; 4113 4114 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 4115 WMI_SERVICE_READY_TIMEOUT_HZ); 4116 if (!time_left) 4117 return -ETIMEDOUT; 4118 4119 return 0; 4120 } 4121 4122 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 4123 enum wmi_host_hw_mode_config_type mode) 4124 { 4125 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 4126 struct sk_buff *skb; 4127 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 4128 int len; 4129 int ret; 4130 4131 len = sizeof(*cmd); 4132 4133 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 4134 if (!skb) 4135 return -ENOMEM; 4136 4137 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 4138 4139 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 4140 sizeof(*cmd)); 4141 4142 cmd->pdev_id = WMI_PDEV_ID_SOC; 4143 cmd->hw_mode_index = cpu_to_le32(mode); 4144 4145 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 4146 if (ret) { 4147 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 4148 dev_kfree_skb(skb); 4149 } 4150 4151 return ret; 4152 } 4153 4154 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 4155 { 4156 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 4157 struct ath12k_wmi_init_cmd_arg arg = {}; 4158 4159 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 4160 ab->wmi_ab.svc_map)) 4161 arg.res_cfg.is_reg_cc_ext_event_supported = true; 4162 4163 ab->hw_params->wmi_init(ab, &arg.res_cfg); 4164 ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode; 4165 4166 arg.num_mem_chunks = wmi_ab->num_mem_chunks; 4167 arg.hw_mode_id = wmi_ab->preferred_hw_mode; 4168 arg.mem_chunks = wmi_ab->mem_chunks; 4169 4170 if (ab->hw_params->single_pdev_only) 4171 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 4172 4173 arg.num_band_to_mac = ab->num_radios; 4174 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 4175 4176 ab->dp.peer_metadata_ver = arg.res_cfg.peer_metadata_ver; 4177 4178 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg); 4179 } 4180 4181 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 4182 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 4183 { 4184 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 4185 struct sk_buff *skb; 4186 int ret; 4187 4188 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4189 if (!skb) 4190 return -ENOMEM; 4191 4192 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 4193 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 4194 sizeof(*cmd)); 4195 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 4196 cmd->scan_count = cpu_to_le32(arg->scan_count); 4197 cmd->scan_period = cpu_to_le32(arg->scan_period); 4198 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 4199 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 4200 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 4201 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 4202 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 4203 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 4204 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 4205 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 4206 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 4207 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 4208 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 4209 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 4210 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 4211 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 4212 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 4213 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 4214 4215 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4216 "WMI spectral scan config cmd vdev_id 0x%x\n", 4217 arg->vdev_id); 4218 4219 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4220 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 4221 if (ret) { 4222 ath12k_warn(ar->ab, 4223 "failed to send spectral scan config wmi cmd\n"); 4224 goto err; 4225 } 4226 4227 return 0; 4228 err: 4229 dev_kfree_skb(skb); 4230 return ret; 4231 } 4232 4233 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 4234 u32 trigger, u32 enable) 4235 { 4236 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 4237 struct sk_buff *skb; 4238 int ret; 4239 4240 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4241 if (!skb) 4242 return -ENOMEM; 4243 4244 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 4245 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 4246 sizeof(*cmd)); 4247 4248 cmd->vdev_id = cpu_to_le32(vdev_id); 4249 cmd->trigger_cmd = cpu_to_le32(trigger); 4250 cmd->enable_cmd = cpu_to_le32(enable); 4251 4252 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4253 "WMI spectral enable cmd vdev id 0x%x\n", 4254 vdev_id); 4255 4256 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4257 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 4258 if (ret) { 4259 ath12k_warn(ar->ab, 4260 "failed to send spectral enable wmi cmd\n"); 4261 goto err; 4262 } 4263 4264 return 0; 4265 err: 4266 dev_kfree_skb(skb); 4267 return ret; 4268 } 4269 4270 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 4271 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 4272 { 4273 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 4274 struct sk_buff *skb; 4275 int ret; 4276 4277 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4278 if (!skb) 4279 return -ENOMEM; 4280 4281 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 4282 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 4283 sizeof(*cmd)); 4284 4285 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 4286 cmd->module_id = cpu_to_le32(arg->module_id); 4287 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 4288 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 4289 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 4290 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 4291 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 4292 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 4293 cmd->num_elems = cpu_to_le32(arg->num_elems); 4294 cmd->buf_size = cpu_to_le32(arg->buf_size); 4295 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 4296 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 4297 4298 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4299 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 4300 arg->pdev_id); 4301 4302 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4303 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 4304 if (ret) { 4305 ath12k_warn(ar->ab, 4306 "failed to send dma ring cfg req wmi cmd\n"); 4307 goto err; 4308 } 4309 4310 return 0; 4311 err: 4312 dev_kfree_skb(skb); 4313 return ret; 4314 } 4315 4316 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 4317 u16 tag, u16 len, 4318 const void *ptr, void *data) 4319 { 4320 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4321 4322 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 4323 return -EPROTO; 4324 4325 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 4326 return -ENOBUFS; 4327 4328 arg->num_buf_entry++; 4329 return 0; 4330 } 4331 4332 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 4333 u16 tag, u16 len, 4334 const void *ptr, void *data) 4335 { 4336 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4337 4338 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 4339 return -EPROTO; 4340 4341 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 4342 return -ENOBUFS; 4343 4344 arg->num_meta++; 4345 4346 return 0; 4347 } 4348 4349 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 4350 u16 tag, u16 len, 4351 const void *ptr, void *data) 4352 { 4353 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4354 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 4355 u32 pdev_id; 4356 int ret; 4357 4358 switch (tag) { 4359 case WMI_TAG_DMA_BUF_RELEASE: 4360 fixed = ptr; 4361 arg->fixed = *fixed; 4362 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 4363 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 4364 break; 4365 case WMI_TAG_ARRAY_STRUCT: 4366 if (!arg->buf_entry_done) { 4367 arg->num_buf_entry = 0; 4368 arg->buf_entry = ptr; 4369 4370 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4371 ath12k_wmi_dma_buf_entry_parse, 4372 arg); 4373 if (ret) { 4374 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 4375 ret); 4376 return ret; 4377 } 4378 4379 arg->buf_entry_done = true; 4380 } else if (!arg->meta_data_done) { 4381 arg->num_meta = 0; 4382 arg->meta_data = ptr; 4383 4384 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4385 ath12k_wmi_dma_buf_meta_parse, 4386 arg); 4387 if (ret) { 4388 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 4389 ret); 4390 return ret; 4391 } 4392 4393 arg->meta_data_done = true; 4394 } 4395 break; 4396 default: 4397 break; 4398 } 4399 return 0; 4400 } 4401 4402 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 4403 struct sk_buff *skb) 4404 { 4405 struct ath12k_wmi_dma_buf_release_arg arg = {}; 4406 struct ath12k_dbring_buf_release_event param; 4407 int ret; 4408 4409 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4410 ath12k_wmi_dma_buf_parse, 4411 &arg); 4412 if (ret) { 4413 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 4414 return; 4415 } 4416 4417 param.fixed = arg.fixed; 4418 param.buf_entry = arg.buf_entry; 4419 param.num_buf_entry = arg.num_buf_entry; 4420 param.meta_data = arg.meta_data; 4421 param.num_meta = arg.num_meta; 4422 4423 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 4424 if (ret) { 4425 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 4426 return; 4427 } 4428 } 4429 4430 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 4431 u16 tag, u16 len, 4432 const void *ptr, void *data) 4433 { 4434 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4435 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 4436 u32 phy_map = 0; 4437 4438 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 4439 return -EPROTO; 4440 4441 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 4442 return -ENOBUFS; 4443 4444 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 4445 hw_mode_id); 4446 svc_rdy_ext->n_hw_mode_caps++; 4447 4448 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 4449 svc_rdy_ext->tot_phy_id += fls(phy_map); 4450 4451 return 0; 4452 } 4453 4454 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 4455 u16 len, const void *ptr, void *data) 4456 { 4457 struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info; 4458 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4459 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 4460 enum wmi_host_hw_mode_config_type mode, pref; 4461 u32 i; 4462 int ret; 4463 4464 svc_rdy_ext->n_hw_mode_caps = 0; 4465 svc_rdy_ext->hw_mode_caps = ptr; 4466 4467 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4468 ath12k_wmi_hw_mode_caps_parse, 4469 svc_rdy_ext); 4470 if (ret) { 4471 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4472 return ret; 4473 } 4474 4475 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 4476 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 4477 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 4478 4479 if (mode >= WMI_HOST_HW_MODE_MAX) 4480 continue; 4481 4482 pref = soc->wmi_ab.preferred_hw_mode; 4483 4484 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) { 4485 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 4486 soc->wmi_ab.preferred_hw_mode = mode; 4487 } 4488 } 4489 4490 svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps; 4491 4492 ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n", 4493 svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode); 4494 4495 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 4496 return -EINVAL; 4497 4498 return 0; 4499 } 4500 4501 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 4502 u16 tag, u16 len, 4503 const void *ptr, void *data) 4504 { 4505 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4506 4507 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 4508 return -EPROTO; 4509 4510 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 4511 return -ENOBUFS; 4512 4513 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 4514 if (!svc_rdy_ext->n_mac_phy_caps) { 4515 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len, 4516 GFP_ATOMIC); 4517 if (!svc_rdy_ext->mac_phy_caps) 4518 return -ENOMEM; 4519 } 4520 4521 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 4522 svc_rdy_ext->n_mac_phy_caps++; 4523 return 0; 4524 } 4525 4526 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 4527 u16 tag, u16 len, 4528 const void *ptr, void *data) 4529 { 4530 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4531 4532 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 4533 return -EPROTO; 4534 4535 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 4536 return -ENOBUFS; 4537 4538 svc_rdy_ext->n_ext_hal_reg_caps++; 4539 return 0; 4540 } 4541 4542 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 4543 u16 len, const void *ptr, void *data) 4544 { 4545 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4546 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4547 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 4548 int ret; 4549 u32 i; 4550 4551 svc_rdy_ext->n_ext_hal_reg_caps = 0; 4552 svc_rdy_ext->ext_hal_reg_caps = ptr; 4553 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4554 ath12k_wmi_ext_hal_reg_caps_parse, 4555 svc_rdy_ext); 4556 if (ret) { 4557 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4558 return ret; 4559 } 4560 4561 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 4562 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 4563 svc_rdy_ext->soc_hal_reg_caps, 4564 svc_rdy_ext->ext_hal_reg_caps, i, 4565 ®_cap); 4566 if (ret) { 4567 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 4568 return ret; 4569 } 4570 4571 if (reg_cap.phy_id >= MAX_RADIOS) { 4572 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id); 4573 return -EINVAL; 4574 } 4575 4576 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 4577 } 4578 return 0; 4579 } 4580 4581 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 4582 u16 len, const void *ptr, 4583 void *data) 4584 { 4585 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4586 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4587 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 4588 u32 phy_id_map; 4589 int pdev_index = 0; 4590 int ret; 4591 4592 svc_rdy_ext->soc_hal_reg_caps = ptr; 4593 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 4594 4595 soc->num_radios = 0; 4596 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 4597 soc->fw_pdev_count = 0; 4598 4599 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 4600 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 4601 svc_rdy_ext, 4602 hw_mode_id, soc->num_radios, 4603 &soc->pdevs[pdev_index]); 4604 if (ret) { 4605 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 4606 soc->num_radios); 4607 return ret; 4608 } 4609 4610 soc->num_radios++; 4611 4612 /* For single_pdev_only targets, 4613 * save mac_phy capability in the same pdev 4614 */ 4615 if (soc->hw_params->single_pdev_only) 4616 pdev_index = 0; 4617 else 4618 pdev_index = soc->num_radios; 4619 4620 /* TODO: mac_phy_cap prints */ 4621 phy_id_map >>= 1; 4622 } 4623 4624 if (soc->hw_params->single_pdev_only) { 4625 soc->num_radios = 1; 4626 soc->pdevs[0].pdev_id = 0; 4627 } 4628 4629 return 0; 4630 } 4631 4632 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 4633 u16 tag, u16 len, 4634 const void *ptr, void *data) 4635 { 4636 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 4637 4638 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 4639 return -EPROTO; 4640 4641 parse->n_dma_ring_caps++; 4642 return 0; 4643 } 4644 4645 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 4646 u32 num_cap) 4647 { 4648 size_t sz; 4649 void *ptr; 4650 4651 sz = num_cap * sizeof(struct ath12k_dbring_cap); 4652 ptr = kzalloc(sz, GFP_ATOMIC); 4653 if (!ptr) 4654 return -ENOMEM; 4655 4656 ab->db_caps = ptr; 4657 ab->num_db_cap = num_cap; 4658 4659 return 0; 4660 } 4661 4662 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 4663 { 4664 kfree(ab->db_caps); 4665 ab->db_caps = NULL; 4666 ab->num_db_cap = 0; 4667 } 4668 4669 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 4670 u16 len, const void *ptr, void *data) 4671 { 4672 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 4673 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 4674 struct ath12k_dbring_cap *dir_buff_caps; 4675 int ret; 4676 u32 i; 4677 4678 dma_caps_parse->n_dma_ring_caps = 0; 4679 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 4680 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4681 ath12k_wmi_dma_ring_caps_parse, 4682 dma_caps_parse); 4683 if (ret) { 4684 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 4685 return ret; 4686 } 4687 4688 if (!dma_caps_parse->n_dma_ring_caps) 4689 return 0; 4690 4691 if (ab->num_db_cap) { 4692 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 4693 return 0; 4694 } 4695 4696 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 4697 if (ret) 4698 return ret; 4699 4700 dir_buff_caps = ab->db_caps; 4701 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 4702 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 4703 ath12k_warn(ab, "Invalid module id %d\n", 4704 le32_to_cpu(dma_caps[i].module_id)); 4705 ret = -EINVAL; 4706 goto free_dir_buff; 4707 } 4708 4709 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 4710 dir_buff_caps[i].pdev_id = 4711 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 4712 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 4713 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 4714 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 4715 } 4716 4717 return 0; 4718 4719 free_dir_buff: 4720 ath12k_wmi_free_dbring_caps(ab); 4721 return ret; 4722 } 4723 4724 static void 4725 ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab, 4726 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap, 4727 struct ath12k_svc_ext_mac_phy_info *mac_phy_info) 4728 { 4729 mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id); 4730 mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands); 4731 mac_phy_info->hw_freq_range.low_2ghz_freq = 4732 __le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq); 4733 mac_phy_info->hw_freq_range.high_2ghz_freq = 4734 __le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq); 4735 mac_phy_info->hw_freq_range.low_5ghz_freq = 4736 __le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq); 4737 mac_phy_info->hw_freq_range.high_5ghz_freq = 4738 __le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq); 4739 } 4740 4741 static void 4742 ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab, 4743 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext) 4744 { 4745 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info; 4746 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap; 4747 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 4748 struct ath12k_svc_ext_mac_phy_info *mac_phy_info; 4749 u32 hw_mode_id, phy_bit_map; 4750 u8 hw_idx; 4751 4752 mac_phy_info = &svc_ext_info->mac_phy_info[0]; 4753 mac_phy_cap = svc_rdy_ext->mac_phy_caps; 4754 4755 for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) { 4756 hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx]; 4757 hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id); 4758 phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map); 4759 4760 while (phy_bit_map) { 4761 ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info); 4762 mac_phy_info->hw_mode_config_type = 4763 le32_get_bits(hw_mode_cap->hw_mode_config_type, 4764 WMI_HW_MODE_CAP_CFG_TYPE); 4765 ath12k_dbg(ab, ATH12K_DBG_WMI, 4766 "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n", 4767 hw_idx, hw_mode_id, 4768 mac_phy_info->hw_mode_config_type, 4769 mac_phy_info->supported_bands, mac_phy_info->phy_id, 4770 mac_phy_info->hw_freq_range.low_2ghz_freq, 4771 mac_phy_info->hw_freq_range.high_2ghz_freq, 4772 mac_phy_info->hw_freq_range.low_5ghz_freq, 4773 mac_phy_info->hw_freq_range.high_5ghz_freq); 4774 4775 mac_phy_cap++; 4776 mac_phy_info++; 4777 4778 phy_bit_map >>= 1; 4779 } 4780 } 4781 } 4782 4783 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 4784 u16 tag, u16 len, 4785 const void *ptr, void *data) 4786 { 4787 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4788 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4789 int ret; 4790 4791 switch (tag) { 4792 case WMI_TAG_SERVICE_READY_EXT_EVENT: 4793 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 4794 &svc_rdy_ext->arg); 4795 if (ret) { 4796 ath12k_warn(ab, "unable to extract ext params\n"); 4797 return ret; 4798 } 4799 break; 4800 4801 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 4802 svc_rdy_ext->hw_caps = ptr; 4803 svc_rdy_ext->arg.num_hw_modes = 4804 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 4805 break; 4806 4807 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 4808 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 4809 svc_rdy_ext); 4810 if (ret) 4811 return ret; 4812 break; 4813 4814 case WMI_TAG_ARRAY_STRUCT: 4815 if (!svc_rdy_ext->hw_mode_done) { 4816 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 4817 if (ret) 4818 return ret; 4819 4820 svc_rdy_ext->hw_mode_done = true; 4821 } else if (!svc_rdy_ext->mac_phy_done) { 4822 svc_rdy_ext->n_mac_phy_caps = 0; 4823 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4824 ath12k_wmi_mac_phy_caps_parse, 4825 svc_rdy_ext); 4826 if (ret) { 4827 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4828 return ret; 4829 } 4830 4831 ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext); 4832 4833 svc_rdy_ext->mac_phy_done = true; 4834 } else if (!svc_rdy_ext->ext_hal_reg_done) { 4835 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 4836 if (ret) 4837 return ret; 4838 4839 svc_rdy_ext->ext_hal_reg_done = true; 4840 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 4841 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 4842 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 4843 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 4844 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 4845 svc_rdy_ext->oem_dma_ring_cap_done = true; 4846 } else if (!svc_rdy_ext->dma_ring_cap_done) { 4847 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4848 &svc_rdy_ext->dma_caps_parse); 4849 if (ret) 4850 return ret; 4851 4852 svc_rdy_ext->dma_ring_cap_done = true; 4853 } 4854 break; 4855 4856 default: 4857 break; 4858 } 4859 return 0; 4860 } 4861 4862 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 4863 struct sk_buff *skb) 4864 { 4865 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 4866 int ret; 4867 4868 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4869 ath12k_wmi_svc_rdy_ext_parse, 4870 &svc_rdy_ext); 4871 if (ret) { 4872 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4873 goto err; 4874 } 4875 4876 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 4877 complete(&ab->wmi_ab.service_ready); 4878 4879 kfree(svc_rdy_ext.mac_phy_caps); 4880 return 0; 4881 4882 err: 4883 kfree(svc_rdy_ext.mac_phy_caps); 4884 ath12k_wmi_free_dbring_caps(ab); 4885 return ret; 4886 } 4887 4888 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle, 4889 const void *ptr, 4890 struct ath12k_wmi_svc_rdy_ext2_arg *arg) 4891 { 4892 const struct wmi_service_ready_ext2_event *ev = ptr; 4893 4894 if (!ev) 4895 return -EINVAL; 4896 4897 arg->reg_db_version = le32_to_cpu(ev->reg_db_version); 4898 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz); 4899 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz); 4900 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps); 4901 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw); 4902 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma); 4903 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo); 4904 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags); 4905 return 0; 4906 } 4907 4908 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band, 4909 const __le32 cap_mac_info[], 4910 const __le32 cap_phy_info[], 4911 const __le32 supp_mcs[], 4912 const struct ath12k_wmi_ppe_threshold_params *ppet, 4913 __le32 cap_info_internal) 4914 { 4915 struct ath12k_band_cap *cap_band = &pdev->cap.band[band]; 4916 u32 support_320mhz; 4917 u8 i; 4918 4919 if (band == NL80211_BAND_6GHZ) 4920 support_320mhz = cap_band->eht_cap_phy_info[0] & 4921 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4922 4923 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++) 4924 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]); 4925 4926 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++) 4927 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]); 4928 4929 if (band == NL80211_BAND_6GHZ) 4930 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4931 4932 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]); 4933 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]); 4934 if (band != NL80211_BAND_2GHZ) { 4935 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]); 4936 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]); 4937 } 4938 4939 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1); 4940 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info); 4941 for (i = 0; i < WMI_MAX_NUM_SS; i++) 4942 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] = 4943 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]); 4944 4945 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal); 4946 } 4947 4948 static int 4949 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab, 4950 const struct ath12k_wmi_caps_ext_params *caps, 4951 struct ath12k_pdev *pdev) 4952 { 4953 struct ath12k_band_cap *cap_band; 4954 u32 bands, support_320mhz; 4955 int i; 4956 4957 if (ab->hw_params->single_pdev_only) { 4958 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) { 4959 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) & 4960 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4961 cap_band = &pdev->cap.band[NL80211_BAND_6GHZ]; 4962 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4963 return 0; 4964 } 4965 4966 for (i = 0; i < ab->fw_pdev_count; i++) { 4967 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i]; 4968 4969 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) && 4970 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) { 4971 bands = fw_pdev->supported_bands; 4972 break; 4973 } 4974 } 4975 4976 if (i == ab->fw_pdev_count) 4977 return -EINVAL; 4978 } else { 4979 bands = pdev->cap.supported_bands; 4980 } 4981 4982 if (bands & WMI_HOST_WLAN_2GHZ_CAP) { 4983 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 4984 caps->eht_cap_mac_info_2ghz, 4985 caps->eht_cap_phy_info_2ghz, 4986 caps->eht_supp_mcs_ext_2ghz, 4987 &caps->eht_ppet_2ghz, 4988 caps->eht_cap_info_internal); 4989 } 4990 4991 if (bands & WMI_HOST_WLAN_5GHZ_CAP) { 4992 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 4993 caps->eht_cap_mac_info_5ghz, 4994 caps->eht_cap_phy_info_5ghz, 4995 caps->eht_supp_mcs_ext_5ghz, 4996 &caps->eht_ppet_5ghz, 4997 caps->eht_cap_info_internal); 4998 4999 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ, 5000 caps->eht_cap_mac_info_5ghz, 5001 caps->eht_cap_phy_info_5ghz, 5002 caps->eht_supp_mcs_ext_5ghz, 5003 &caps->eht_ppet_5ghz, 5004 caps->eht_cap_info_internal); 5005 } 5006 5007 pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability); 5008 pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability); 5009 5010 return 0; 5011 } 5012 5013 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag, 5014 u16 len, const void *ptr, 5015 void *data) 5016 { 5017 const struct ath12k_wmi_caps_ext_params *caps = ptr; 5018 int i = 0, ret; 5019 5020 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT) 5021 return -EPROTO; 5022 5023 if (ab->hw_params->single_pdev_only) { 5024 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) && 5025 caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE) 5026 return 0; 5027 } else { 5028 for (i = 0; i < ab->num_radios; i++) { 5029 if (ab->pdevs[i].pdev_id == 5030 ath12k_wmi_caps_ext_get_pdev_id(caps)) 5031 break; 5032 } 5033 5034 if (i == ab->num_radios) 5035 return -EINVAL; 5036 } 5037 5038 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]); 5039 if (ret) { 5040 ath12k_warn(ab, 5041 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n", 5042 ret, ab->pdevs[i].pdev_id); 5043 return ret; 5044 } 5045 5046 return 0; 5047 } 5048 5049 static void 5050 ath12k_wmi_update_freq_info(struct ath12k_base *ab, 5051 struct ath12k_svc_ext_mac_phy_info *mac_cap, 5052 enum ath12k_hw_mode mode, 5053 u32 phy_id) 5054 { 5055 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5056 struct ath12k_hw_mode_freq_range_arg *mac_range; 5057 5058 mac_range = &hw_mode_info->freq_range_caps[mode][phy_id]; 5059 5060 if (mac_cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 5061 mac_range->low_2ghz_freq = max_t(u32, 5062 mac_cap->hw_freq_range.low_2ghz_freq, 5063 ATH12K_MIN_2GHZ_FREQ); 5064 mac_range->high_2ghz_freq = mac_cap->hw_freq_range.high_2ghz_freq ? 5065 min_t(u32, 5066 mac_cap->hw_freq_range.high_2ghz_freq, 5067 ATH12K_MAX_2GHZ_FREQ) : 5068 ATH12K_MAX_2GHZ_FREQ; 5069 } 5070 5071 if (mac_cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) { 5072 mac_range->low_5ghz_freq = max_t(u32, 5073 mac_cap->hw_freq_range.low_5ghz_freq, 5074 ATH12K_MIN_5GHZ_FREQ); 5075 mac_range->high_5ghz_freq = mac_cap->hw_freq_range.high_5ghz_freq ? 5076 min_t(u32, 5077 mac_cap->hw_freq_range.high_5ghz_freq, 5078 ATH12K_MAX_6GHZ_FREQ) : 5079 ATH12K_MAX_6GHZ_FREQ; 5080 } 5081 } 5082 5083 static bool 5084 ath12k_wmi_all_phy_range_updated(struct ath12k_base *ab, 5085 enum ath12k_hw_mode hwmode) 5086 { 5087 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5088 struct ath12k_hw_mode_freq_range_arg *mac_range; 5089 u8 phy_id; 5090 5091 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5092 mac_range = &hw_mode_info->freq_range_caps[hwmode][phy_id]; 5093 /* modify SBS/DBS range only when both phy for DBS are filled */ 5094 if (!mac_range->low_2ghz_freq && !mac_range->low_5ghz_freq) 5095 return false; 5096 } 5097 5098 return true; 5099 } 5100 5101 static void ath12k_wmi_update_dbs_freq_info(struct ath12k_base *ab) 5102 { 5103 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5104 struct ath12k_hw_mode_freq_range_arg *mac_range; 5105 u8 phy_id; 5106 5107 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_DBS]; 5108 /* Reset 5 GHz range for shared mac for DBS */ 5109 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5110 if (mac_range[phy_id].low_2ghz_freq && 5111 mac_range[phy_id].low_5ghz_freq) { 5112 mac_range[phy_id].low_5ghz_freq = 0; 5113 mac_range[phy_id].high_5ghz_freq = 0; 5114 } 5115 } 5116 } 5117 5118 static u32 5119 ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range) 5120 { 5121 u32 highest_freq = 0; 5122 u8 phy_id; 5123 5124 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5125 if (range[phy_id].high_5ghz_freq > highest_freq) 5126 highest_freq = range[phy_id].high_5ghz_freq; 5127 } 5128 5129 return highest_freq ? highest_freq : ATH12K_MAX_6GHZ_FREQ; 5130 } 5131 5132 static u32 5133 ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range) 5134 { 5135 u32 lowest_freq = 0; 5136 u8 phy_id; 5137 5138 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5139 if ((!lowest_freq && range[phy_id].low_5ghz_freq) || 5140 range[phy_id].low_5ghz_freq < lowest_freq) 5141 lowest_freq = range[phy_id].low_5ghz_freq; 5142 } 5143 5144 return lowest_freq ? lowest_freq : ATH12K_MIN_5GHZ_FREQ; 5145 } 5146 5147 static void 5148 ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base *ab, 5149 u16 sbs_range_sep, 5150 struct ath12k_hw_mode_freq_range_arg *ref_freq) 5151 { 5152 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5153 struct ath12k_hw_mode_freq_range_arg *upper_sbs_freq_range; 5154 u8 phy_id; 5155 5156 upper_sbs_freq_range = 5157 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_UPPER_SHARE]; 5158 5159 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5160 upper_sbs_freq_range[phy_id].low_2ghz_freq = 5161 ref_freq[phy_id].low_2ghz_freq; 5162 upper_sbs_freq_range[phy_id].high_2ghz_freq = 5163 ref_freq[phy_id].high_2ghz_freq; 5164 5165 /* update for shared mac */ 5166 if (upper_sbs_freq_range[phy_id].low_2ghz_freq) { 5167 upper_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10; 5168 upper_sbs_freq_range[phy_id].high_5ghz_freq = 5169 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq); 5170 } else { 5171 upper_sbs_freq_range[phy_id].low_5ghz_freq = 5172 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq); 5173 upper_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep; 5174 } 5175 } 5176 } 5177 5178 static void 5179 ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base *ab, 5180 u16 sbs_range_sep, 5181 struct ath12k_hw_mode_freq_range_arg *ref_freq) 5182 { 5183 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5184 struct ath12k_hw_mode_freq_range_arg *lower_sbs_freq_range; 5185 u8 phy_id; 5186 5187 lower_sbs_freq_range = 5188 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_LOWER_SHARE]; 5189 5190 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5191 lower_sbs_freq_range[phy_id].low_2ghz_freq = 5192 ref_freq[phy_id].low_2ghz_freq; 5193 lower_sbs_freq_range[phy_id].high_2ghz_freq = 5194 ref_freq[phy_id].high_2ghz_freq; 5195 5196 /* update for shared mac */ 5197 if (lower_sbs_freq_range[phy_id].low_2ghz_freq) { 5198 lower_sbs_freq_range[phy_id].low_5ghz_freq = 5199 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq); 5200 lower_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep; 5201 } else { 5202 lower_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10; 5203 lower_sbs_freq_range[phy_id].high_5ghz_freq = 5204 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq); 5205 } 5206 } 5207 } 5208 5209 static const char *ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode) 5210 { 5211 static const char * const mode_str[] = { 5212 [ATH12K_HW_MODE_SMM] = "SMM", 5213 [ATH12K_HW_MODE_DBS] = "DBS", 5214 [ATH12K_HW_MODE_SBS] = "SBS", 5215 [ATH12K_HW_MODE_SBS_UPPER_SHARE] = "SBS_UPPER_SHARE", 5216 [ATH12K_HW_MODE_SBS_LOWER_SHARE] = "SBS_LOWER_SHARE", 5217 }; 5218 5219 if (hw_mode >= ARRAY_SIZE(mode_str)) 5220 return "Unknown"; 5221 5222 return mode_str[hw_mode]; 5223 } 5224 5225 static void 5226 ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base *ab, 5227 struct ath12k_hw_mode_freq_range_arg *freq_range, 5228 enum ath12k_hw_mode hw_mode) 5229 { 5230 u8 i; 5231 5232 for (i = 0; i < MAX_RADIOS; i++) 5233 if (freq_range[i].low_2ghz_freq || freq_range[i].low_5ghz_freq) 5234 ath12k_dbg(ab, ATH12K_DBG_WMI, 5235 "frequency range: %s(%d) mac %d 2 GHz [%d - %d] 5 GHz [%d - %d]", 5236 ath12k_wmi_hw_mode_to_str(hw_mode), 5237 hw_mode, i, 5238 freq_range[i].low_2ghz_freq, 5239 freq_range[i].high_2ghz_freq, 5240 freq_range[i].low_5ghz_freq, 5241 freq_range[i].high_5ghz_freq); 5242 } 5243 5244 static void ath12k_wmi_dump_freq_range(struct ath12k_base *ab) 5245 { 5246 struct ath12k_hw_mode_freq_range_arg *freq_range; 5247 u8 i; 5248 5249 for (i = ATH12K_HW_MODE_SMM; i < ATH12K_HW_MODE_MAX; i++) { 5250 freq_range = ab->wmi_ab.hw_mode_info.freq_range_caps[i]; 5251 ath12k_wmi_dump_freq_range_per_mac(ab, freq_range, i); 5252 } 5253 } 5254 5255 static int ath12k_wmi_modify_sbs_freq(struct ath12k_base *ab, u8 phy_id) 5256 { 5257 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5258 struct ath12k_hw_mode_freq_range_arg *sbs_mac_range, *shared_mac_range; 5259 struct ath12k_hw_mode_freq_range_arg *non_shared_range; 5260 u8 shared_phy_id; 5261 5262 sbs_mac_range = &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][phy_id]; 5263 5264 /* if SBS mac range has both 2.4 and 5 GHz ranges, i.e. shared phy_id 5265 * keep the range as it is in SBS 5266 */ 5267 if (sbs_mac_range->low_2ghz_freq && sbs_mac_range->low_5ghz_freq) 5268 return 0; 5269 5270 if (sbs_mac_range->low_2ghz_freq && !sbs_mac_range->low_5ghz_freq) { 5271 ath12k_err(ab, "Invalid DBS/SBS mode with only 2.4Ghz"); 5272 ath12k_wmi_dump_freq_range_per_mac(ab, sbs_mac_range, ATH12K_HW_MODE_SBS); 5273 return -EINVAL; 5274 } 5275 5276 non_shared_range = sbs_mac_range; 5277 /* if SBS mac range has only 5 GHz then it's the non-shared phy, so 5278 * modify the range as per the shared mac. 5279 */ 5280 shared_phy_id = phy_id ? 0 : 1; 5281 shared_mac_range = 5282 &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][shared_phy_id]; 5283 5284 if (shared_mac_range->low_5ghz_freq > non_shared_range->low_5ghz_freq) { 5285 ath12k_dbg(ab, ATH12K_DBG_WMI, "high 5 GHz shared"); 5286 /* If the shared mac lower 5 GHz frequency is greater than 5287 * non-shared mac lower 5 GHz frequency then the shared mac has 5288 * high 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz high 5289 * freq should be less than the shared mac's low 5 GHz freq. 5290 */ 5291 if (non_shared_range->high_5ghz_freq >= 5292 shared_mac_range->low_5ghz_freq) 5293 non_shared_range->high_5ghz_freq = 5294 max_t(u32, shared_mac_range->low_5ghz_freq - 10, 5295 non_shared_range->low_5ghz_freq); 5296 } else if (shared_mac_range->high_5ghz_freq < 5297 non_shared_range->high_5ghz_freq) { 5298 ath12k_dbg(ab, ATH12K_DBG_WMI, "low 5 GHz shared"); 5299 /* If the shared mac high 5 GHz frequency is less than 5300 * non-shared mac high 5 GHz frequency then the shared mac has 5301 * low 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz low 5302 * freq should be greater than the shared mac's high 5 GHz freq. 5303 */ 5304 if (shared_mac_range->high_5ghz_freq >= 5305 non_shared_range->low_5ghz_freq) 5306 non_shared_range->low_5ghz_freq = 5307 min_t(u32, shared_mac_range->high_5ghz_freq + 10, 5308 non_shared_range->high_5ghz_freq); 5309 } else { 5310 ath12k_warn(ab, "invalid SBS range with all 5 GHz shared"); 5311 return -EINVAL; 5312 } 5313 5314 return 0; 5315 } 5316 5317 static void ath12k_wmi_update_sbs_freq_info(struct ath12k_base *ab) 5318 { 5319 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5320 struct ath12k_hw_mode_freq_range_arg *mac_range; 5321 u16 sbs_range_sep; 5322 u8 phy_id; 5323 int ret; 5324 5325 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS]; 5326 5327 /* If sbs_lower_band_end_freq has a value, then the frequency range 5328 * will be split using that value. 5329 */ 5330 sbs_range_sep = ab->wmi_ab.sbs_lower_band_end_freq; 5331 if (sbs_range_sep) { 5332 ath12k_wmi_fill_upper_share_sbs_freq(ab, sbs_range_sep, 5333 mac_range); 5334 ath12k_wmi_fill_lower_share_sbs_freq(ab, sbs_range_sep, 5335 mac_range); 5336 /* Hardware specifies the range boundary with sbs_range_sep, 5337 * (i.e. the boundary between 5 GHz high and 5 GHz low), 5338 * reset the original one to make sure it will not get used. 5339 */ 5340 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS); 5341 return; 5342 } 5343 5344 /* If sbs_lower_band_end_freq is not set that means firmware will send one 5345 * shared mac range and one non-shared mac range. so update that freq. 5346 */ 5347 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5348 ret = ath12k_wmi_modify_sbs_freq(ab, phy_id); 5349 if (ret) { 5350 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS); 5351 break; 5352 } 5353 } 5354 } 5355 5356 static void 5357 ath12k_wmi_update_mac_freq_info(struct ath12k_base *ab, 5358 enum wmi_host_hw_mode_config_type hw_config_type, 5359 u32 phy_id, 5360 struct ath12k_svc_ext_mac_phy_info *mac_cap) 5361 { 5362 if (phy_id >= MAX_RADIOS) { 5363 ath12k_err(ab, "mac more than two not supported: %d", phy_id); 5364 return; 5365 } 5366 5367 ath12k_dbg(ab, ATH12K_DBG_WMI, 5368 "hw_mode_cfg %d mac %d band 0x%x SBS cutoff freq %d 2 GHz [%d - %d] 5 GHz [%d - %d]", 5369 hw_config_type, phy_id, mac_cap->supported_bands, 5370 ab->wmi_ab.sbs_lower_band_end_freq, 5371 mac_cap->hw_freq_range.low_2ghz_freq, 5372 mac_cap->hw_freq_range.high_2ghz_freq, 5373 mac_cap->hw_freq_range.low_5ghz_freq, 5374 mac_cap->hw_freq_range.high_5ghz_freq); 5375 5376 switch (hw_config_type) { 5377 case WMI_HOST_HW_MODE_SINGLE: 5378 if (phy_id) { 5379 ath12k_dbg(ab, ATH12K_DBG_WMI, "mac phy 1 is not supported"); 5380 break; 5381 } 5382 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SMM, phy_id); 5383 break; 5384 5385 case WMI_HOST_HW_MODE_DBS: 5386 if (!ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS)) 5387 ath12k_wmi_update_freq_info(ab, mac_cap, 5388 ATH12K_HW_MODE_DBS, phy_id); 5389 break; 5390 case WMI_HOST_HW_MODE_DBS_SBS: 5391 case WMI_HOST_HW_MODE_DBS_OR_SBS: 5392 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_DBS, phy_id); 5393 if (ab->wmi_ab.sbs_lower_band_end_freq || 5394 mac_cap->hw_freq_range.low_5ghz_freq || 5395 mac_cap->hw_freq_range.low_2ghz_freq) 5396 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, 5397 phy_id); 5398 5399 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS)) 5400 ath12k_wmi_update_dbs_freq_info(ab); 5401 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS)) 5402 ath12k_wmi_update_sbs_freq_info(ab); 5403 break; 5404 case WMI_HOST_HW_MODE_SBS: 5405 case WMI_HOST_HW_MODE_SBS_PASSIVE: 5406 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, phy_id); 5407 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS)) 5408 ath12k_wmi_update_sbs_freq_info(ab); 5409 5410 break; 5411 default: 5412 break; 5413 } 5414 } 5415 5416 static bool ath12k_wmi_sbs_range_present(struct ath12k_base *ab) 5417 { 5418 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS) || 5419 (ab->wmi_ab.sbs_lower_band_end_freq && 5420 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_LOWER_SHARE) && 5421 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_UPPER_SHARE))) 5422 return true; 5423 5424 return false; 5425 } 5426 5427 static int ath12k_wmi_update_hw_mode_list(struct ath12k_base *ab) 5428 { 5429 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info; 5430 struct ath12k_hw_mode_info *info = &ab->wmi_ab.hw_mode_info; 5431 enum wmi_host_hw_mode_config_type hw_config_type; 5432 struct ath12k_svc_ext_mac_phy_info *tmp; 5433 bool dbs_mode = false, sbs_mode = false; 5434 u32 i, j = 0; 5435 5436 if (!svc_ext_info->num_hw_modes) { 5437 ath12k_err(ab, "invalid number of hw modes"); 5438 return -EINVAL; 5439 } 5440 5441 ath12k_dbg(ab, ATH12K_DBG_WMI, "updated HW mode list: num modes %d", 5442 svc_ext_info->num_hw_modes); 5443 5444 memset(info->freq_range_caps, 0, sizeof(info->freq_range_caps)); 5445 5446 for (i = 0; i < svc_ext_info->num_hw_modes; i++) { 5447 if (j >= ATH12K_MAX_MAC_PHY_CAP) 5448 return -EINVAL; 5449 5450 /* Update for MAC0 */ 5451 tmp = &svc_ext_info->mac_phy_info[j++]; 5452 hw_config_type = tmp->hw_mode_config_type; 5453 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, tmp->phy_id, tmp); 5454 5455 /* SBS and DBS have dual MAC. Up to 2 MACs are considered. */ 5456 if (hw_config_type == WMI_HOST_HW_MODE_DBS || 5457 hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE || 5458 hw_config_type == WMI_HOST_HW_MODE_SBS || 5459 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) { 5460 if (j >= ATH12K_MAX_MAC_PHY_CAP) 5461 return -EINVAL; 5462 /* Update for MAC1 */ 5463 tmp = &svc_ext_info->mac_phy_info[j++]; 5464 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, 5465 tmp->phy_id, tmp); 5466 5467 if (hw_config_type == WMI_HOST_HW_MODE_DBS || 5468 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) 5469 dbs_mode = true; 5470 5471 if (ath12k_wmi_sbs_range_present(ab) && 5472 (hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE || 5473 hw_config_type == WMI_HOST_HW_MODE_SBS || 5474 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS)) 5475 sbs_mode = true; 5476 } 5477 } 5478 5479 info->support_dbs = dbs_mode; 5480 info->support_sbs = sbs_mode; 5481 5482 ath12k_wmi_dump_freq_range(ab); 5483 5484 return 0; 5485 } 5486 5487 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 5488 u16 tag, u16 len, 5489 const void *ptr, void *data) 5490 { 5491 const struct ath12k_wmi_dbs_or_sbs_cap_params *dbs_or_sbs_caps; 5492 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 5493 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 5494 int ret; 5495 5496 switch (tag) { 5497 case WMI_TAG_SERVICE_READY_EXT2_EVENT: 5498 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr, 5499 &parse->arg); 5500 if (ret) { 5501 ath12k_warn(ab, 5502 "failed to extract wmi service ready ext2 parameters: %d\n", 5503 ret); 5504 return ret; 5505 } 5506 break; 5507 5508 case WMI_TAG_ARRAY_STRUCT: 5509 if (!parse->dma_ring_cap_done) { 5510 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 5511 &parse->dma_caps_parse); 5512 if (ret) 5513 return ret; 5514 5515 parse->dma_ring_cap_done = true; 5516 } else if (!parse->spectral_bin_scaling_done) { 5517 /* TODO: This is a place-holder as WMI tag for 5518 * spectral scaling is before 5519 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT 5520 */ 5521 parse->spectral_bin_scaling_done = true; 5522 } else if (!parse->mac_phy_caps_ext_done) { 5523 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 5524 ath12k_wmi_tlv_mac_phy_caps_ext, 5525 parse); 5526 if (ret) { 5527 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n", 5528 ret); 5529 return ret; 5530 } 5531 5532 parse->mac_phy_caps_ext_done = true; 5533 } else if (!parse->hal_reg_caps_ext2_done) { 5534 parse->hal_reg_caps_ext2_done = true; 5535 } else if (!parse->scan_radio_caps_ext2_done) { 5536 parse->scan_radio_caps_ext2_done = true; 5537 } else if (!parse->twt_caps_done) { 5538 parse->twt_caps_done = true; 5539 } else if (!parse->htt_msdu_idx_to_qtype_map_done) { 5540 parse->htt_msdu_idx_to_qtype_map_done = true; 5541 } else if (!parse->dbs_or_sbs_cap_ext_done) { 5542 dbs_or_sbs_caps = ptr; 5543 ab->wmi_ab.sbs_lower_band_end_freq = 5544 __le32_to_cpu(dbs_or_sbs_caps->sbs_lower_band_end_freq); 5545 5546 ath12k_dbg(ab, ATH12K_DBG_WMI, "sbs_lower_band_end_freq %u\n", 5547 ab->wmi_ab.sbs_lower_band_end_freq); 5548 5549 ret = ath12k_wmi_update_hw_mode_list(ab); 5550 if (ret) { 5551 ath12k_warn(ab, "failed to update hw mode list: %d\n", 5552 ret); 5553 return ret; 5554 } 5555 5556 parse->dbs_or_sbs_cap_ext_done = true; 5557 } 5558 5559 break; 5560 default: 5561 break; 5562 } 5563 5564 return 0; 5565 } 5566 5567 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 5568 struct sk_buff *skb) 5569 { 5570 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 5571 int ret; 5572 5573 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5574 ath12k_wmi_svc_rdy_ext2_parse, 5575 &svc_rdy_ext2); 5576 if (ret) { 5577 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 5578 goto err; 5579 } 5580 5581 complete(&ab->wmi_ab.service_ready); 5582 5583 return 0; 5584 5585 err: 5586 ath12k_wmi_free_dbring_caps(ab); 5587 return ret; 5588 } 5589 5590 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 5591 struct wmi_vdev_start_resp_event *vdev_rsp) 5592 { 5593 const void **tb; 5594 const struct wmi_vdev_start_resp_event *ev; 5595 int ret; 5596 5597 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5598 if (IS_ERR(tb)) { 5599 ret = PTR_ERR(tb); 5600 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5601 return ret; 5602 } 5603 5604 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 5605 if (!ev) { 5606 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 5607 kfree(tb); 5608 return -EPROTO; 5609 } 5610 5611 *vdev_rsp = *ev; 5612 5613 kfree(tb); 5614 return 0; 5615 } 5616 5617 static struct ath12k_reg_rule 5618 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 5619 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 5620 { 5621 struct ath12k_reg_rule *reg_rule_ptr; 5622 u32 count; 5623 5624 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 5625 GFP_ATOMIC); 5626 5627 if (!reg_rule_ptr) 5628 return NULL; 5629 5630 for (count = 0; count < num_reg_rules; count++) { 5631 reg_rule_ptr[count].start_freq = 5632 le32_get_bits(wmi_reg_rule[count].freq_info, 5633 REG_RULE_START_FREQ); 5634 reg_rule_ptr[count].end_freq = 5635 le32_get_bits(wmi_reg_rule[count].freq_info, 5636 REG_RULE_END_FREQ); 5637 reg_rule_ptr[count].max_bw = 5638 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5639 REG_RULE_MAX_BW); 5640 reg_rule_ptr[count].reg_power = 5641 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5642 REG_RULE_REG_PWR); 5643 reg_rule_ptr[count].ant_gain = 5644 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5645 REG_RULE_ANT_GAIN); 5646 reg_rule_ptr[count].flags = 5647 le32_get_bits(wmi_reg_rule[count].flag_info, 5648 REG_RULE_FLAGS); 5649 reg_rule_ptr[count].psd_flag = 5650 le32_get_bits(wmi_reg_rule[count].psd_power_info, 5651 REG_RULE_PSD_INFO); 5652 reg_rule_ptr[count].psd_eirp = 5653 le32_get_bits(wmi_reg_rule[count].psd_power_info, 5654 REG_RULE_PSD_EIRP); 5655 } 5656 5657 return reg_rule_ptr; 5658 } 5659 5660 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule, 5661 u32 num_reg_rules) 5662 { 5663 u8 num_invalid_5ghz_rules = 0; 5664 u32 count, start_freq; 5665 5666 for (count = 0; count < num_reg_rules; count++) { 5667 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ); 5668 5669 if (start_freq >= ATH12K_MIN_6GHZ_FREQ) 5670 num_invalid_5ghz_rules++; 5671 } 5672 5673 return num_invalid_5ghz_rules; 5674 } 5675 5676 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 5677 struct sk_buff *skb, 5678 struct ath12k_reg_info *reg_info) 5679 { 5680 const void **tb; 5681 const struct wmi_reg_chan_list_cc_ext_event *ev; 5682 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 5683 u32 num_2g_reg_rules, num_5g_reg_rules; 5684 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 5685 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 5686 u8 num_invalid_5ghz_ext_rules; 5687 u32 total_reg_rules = 0; 5688 int ret, i, j; 5689 5690 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 5691 5692 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5693 if (IS_ERR(tb)) { 5694 ret = PTR_ERR(tb); 5695 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5696 return ret; 5697 } 5698 5699 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 5700 if (!ev) { 5701 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 5702 kfree(tb); 5703 return -EPROTO; 5704 } 5705 5706 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 5707 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 5708 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 5709 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 5710 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 5711 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 5712 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 5713 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 5714 5715 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5716 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 5717 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 5718 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 5719 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 5720 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 5721 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 5722 } 5723 5724 num_2g_reg_rules = reg_info->num_2g_reg_rules; 5725 total_reg_rules += num_2g_reg_rules; 5726 num_5g_reg_rules = reg_info->num_5g_reg_rules; 5727 total_reg_rules += num_5g_reg_rules; 5728 5729 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 5730 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 5731 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 5732 kfree(tb); 5733 return -EINVAL; 5734 } 5735 5736 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 5737 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 5738 5739 if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) { 5740 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 5741 i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES); 5742 kfree(tb); 5743 return -EINVAL; 5744 } 5745 5746 total_reg_rules += num_6g_reg_rules_ap[i]; 5747 } 5748 5749 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5750 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 5751 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 5752 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 5753 5754 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 5755 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 5756 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 5757 5758 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 5759 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 5760 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 5761 5762 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES || 5763 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES || 5764 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6GHZ_REG_RULES) { 5765 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 5766 i); 5767 kfree(tb); 5768 return -EINVAL; 5769 } 5770 } 5771 5772 if (!total_reg_rules) { 5773 ath12k_warn(ab, "No reg rules available\n"); 5774 kfree(tb); 5775 return -EINVAL; 5776 } 5777 5778 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 5779 5780 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 5781 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 5782 reg_info->num_phy = le32_to_cpu(ev->num_phy); 5783 reg_info->phy_id = le32_to_cpu(ev->phy_id); 5784 reg_info->ctry_code = le32_to_cpu(ev->country_id); 5785 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 5786 5787 switch (le32_to_cpu(ev->status_code)) { 5788 case WMI_REG_SET_CC_STATUS_PASS: 5789 reg_info->status_code = REG_SET_CC_STATUS_PASS; 5790 break; 5791 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 5792 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 5793 break; 5794 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 5795 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 5796 break; 5797 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 5798 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 5799 break; 5800 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 5801 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 5802 break; 5803 case WMI_REG_SET_CC_STATUS_FAIL: 5804 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 5805 break; 5806 } 5807 5808 reg_info->is_ext_reg_event = true; 5809 5810 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 5811 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 5812 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 5813 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 5814 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 5815 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 5816 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 5817 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 5818 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 5819 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 5820 5821 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5822 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 5823 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 5824 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 5825 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 5826 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 5827 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 5828 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 5829 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 5830 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 5831 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 5832 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 5833 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 5834 } 5835 5836 ath12k_dbg(ab, ATH12K_DBG_WMI, 5837 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x", 5838 __func__, reg_info->alpha2, reg_info->dfs_region, 5839 reg_info->min_bw_2g, reg_info->max_bw_2g, 5840 reg_info->min_bw_5g, reg_info->max_bw_5g, 5841 reg_info->phybitmap); 5842 5843 ath12k_dbg(ab, ATH12K_DBG_WMI, 5844 "num_2g_reg_rules %d num_5g_reg_rules %d", 5845 num_2g_reg_rules, num_5g_reg_rules); 5846 5847 ath12k_dbg(ab, ATH12K_DBG_WMI, 5848 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 5849 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 5850 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 5851 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 5852 5853 ath12k_dbg(ab, ATH12K_DBG_WMI, 5854 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 5855 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 5856 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 5857 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 5858 5859 ath12k_dbg(ab, ATH12K_DBG_WMI, 5860 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 5861 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 5862 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 5863 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 5864 5865 ext_wmi_reg_rule = 5866 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 5867 + sizeof(*ev) 5868 + sizeof(struct wmi_tlv)); 5869 5870 if (num_2g_reg_rules) { 5871 reg_info->reg_rules_2g_ptr = 5872 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 5873 ext_wmi_reg_rule); 5874 5875 if (!reg_info->reg_rules_2g_ptr) { 5876 kfree(tb); 5877 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 5878 return -ENOMEM; 5879 } 5880 } 5881 5882 ext_wmi_reg_rule += num_2g_reg_rules; 5883 5884 /* Firmware might include 6 GHz reg rule in 5 GHz rule list 5885 * for few countries along with separate 6 GHz rule. 5886 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list 5887 * causes intersect check to be true, and same rules will be 5888 * shown multiple times in iw cmd. 5889 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list 5890 */ 5891 num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule, 5892 num_5g_reg_rules); 5893 5894 if (num_invalid_5ghz_ext_rules) { 5895 ath12k_dbg(ab, ATH12K_DBG_WMI, 5896 "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules", 5897 reg_info->alpha2, reg_info->num_5g_reg_rules, 5898 num_invalid_5ghz_ext_rules); 5899 5900 num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules; 5901 reg_info->num_5g_reg_rules = num_5g_reg_rules; 5902 } 5903 5904 if (num_5g_reg_rules) { 5905 reg_info->reg_rules_5g_ptr = 5906 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 5907 ext_wmi_reg_rule); 5908 5909 if (!reg_info->reg_rules_5g_ptr) { 5910 kfree(tb); 5911 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 5912 return -ENOMEM; 5913 } 5914 } 5915 5916 /* We have adjusted the number of 5 GHz reg rules above. But still those 5917 * many rules needs to be adjusted in ext_wmi_reg_rule. 5918 * 5919 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases. 5920 */ 5921 ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules); 5922 5923 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 5924 reg_info->reg_rules_6g_ap_ptr[i] = 5925 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 5926 ext_wmi_reg_rule); 5927 5928 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 5929 kfree(tb); 5930 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 5931 return -ENOMEM; 5932 } 5933 5934 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 5935 } 5936 5937 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 5938 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5939 reg_info->reg_rules_6g_client_ptr[j][i] = 5940 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 5941 ext_wmi_reg_rule); 5942 5943 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 5944 kfree(tb); 5945 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 5946 return -ENOMEM; 5947 } 5948 5949 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 5950 } 5951 } 5952 5953 reg_info->client_type = le32_to_cpu(ev->client_type); 5954 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 5955 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 5956 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 5957 le32_to_cpu(ev->domain_code_6g_ap_lpi); 5958 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 5959 le32_to_cpu(ev->domain_code_6g_ap_sp); 5960 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 5961 le32_to_cpu(ev->domain_code_6g_ap_vlp); 5962 5963 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5964 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 5965 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 5966 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 5967 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 5968 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 5969 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 5970 } 5971 5972 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 5973 5974 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 5975 reg_info->client_type, reg_info->domain_code_6g_super_id); 5976 5977 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 5978 5979 kfree(tb); 5980 return 0; 5981 } 5982 5983 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 5984 struct wmi_peer_delete_resp_event *peer_del_resp) 5985 { 5986 const void **tb; 5987 const struct wmi_peer_delete_resp_event *ev; 5988 int ret; 5989 5990 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5991 if (IS_ERR(tb)) { 5992 ret = PTR_ERR(tb); 5993 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5994 return ret; 5995 } 5996 5997 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 5998 if (!ev) { 5999 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 6000 kfree(tb); 6001 return -EPROTO; 6002 } 6003 6004 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 6005 6006 peer_del_resp->vdev_id = ev->vdev_id; 6007 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 6008 ev->peer_macaddr.addr); 6009 6010 kfree(tb); 6011 return 0; 6012 } 6013 6014 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 6015 struct sk_buff *skb, 6016 u32 *vdev_id) 6017 { 6018 const void **tb; 6019 const struct wmi_vdev_delete_resp_event *ev; 6020 int ret; 6021 6022 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6023 if (IS_ERR(tb)) { 6024 ret = PTR_ERR(tb); 6025 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6026 return ret; 6027 } 6028 6029 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 6030 if (!ev) { 6031 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 6032 kfree(tb); 6033 return -EPROTO; 6034 } 6035 6036 *vdev_id = le32_to_cpu(ev->vdev_id); 6037 6038 kfree(tb); 6039 return 0; 6040 } 6041 6042 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, 6043 struct sk_buff *skb, 6044 u32 *vdev_id, u32 *tx_status) 6045 { 6046 const void **tb; 6047 const struct wmi_bcn_tx_status_event *ev; 6048 int ret; 6049 6050 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6051 if (IS_ERR(tb)) { 6052 ret = PTR_ERR(tb); 6053 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6054 return ret; 6055 } 6056 6057 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 6058 if (!ev) { 6059 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 6060 kfree(tb); 6061 return -EPROTO; 6062 } 6063 6064 *vdev_id = le32_to_cpu(ev->vdev_id); 6065 *tx_status = le32_to_cpu(ev->tx_status); 6066 6067 kfree(tb); 6068 return 0; 6069 } 6070 6071 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 6072 u32 *vdev_id) 6073 { 6074 const void **tb; 6075 const struct wmi_vdev_stopped_event *ev; 6076 int ret; 6077 6078 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6079 if (IS_ERR(tb)) { 6080 ret = PTR_ERR(tb); 6081 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6082 return ret; 6083 } 6084 6085 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 6086 if (!ev) { 6087 ath12k_warn(ab, "failed to fetch vdev stop ev"); 6088 kfree(tb); 6089 return -EPROTO; 6090 } 6091 6092 *vdev_id = le32_to_cpu(ev->vdev_id); 6093 6094 kfree(tb); 6095 return 0; 6096 } 6097 6098 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 6099 u16 tag, u16 len, 6100 const void *ptr, void *data) 6101 { 6102 struct wmi_tlv_mgmt_rx_parse *parse = data; 6103 6104 switch (tag) { 6105 case WMI_TAG_MGMT_RX_HDR: 6106 parse->fixed = ptr; 6107 break; 6108 case WMI_TAG_ARRAY_BYTE: 6109 if (!parse->frame_buf_done) { 6110 parse->frame_buf = ptr; 6111 parse->frame_buf_done = true; 6112 } 6113 break; 6114 } 6115 return 0; 6116 } 6117 6118 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 6119 struct sk_buff *skb, 6120 struct ath12k_wmi_mgmt_rx_arg *hdr) 6121 { 6122 struct wmi_tlv_mgmt_rx_parse parse = { }; 6123 const struct ath12k_wmi_mgmt_rx_params *ev; 6124 const u8 *frame; 6125 int i, ret; 6126 6127 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6128 ath12k_wmi_tlv_mgmt_rx_parse, 6129 &parse); 6130 if (ret) { 6131 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 6132 return ret; 6133 } 6134 6135 ev = parse.fixed; 6136 frame = parse.frame_buf; 6137 6138 if (!ev || !frame) { 6139 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 6140 return -EPROTO; 6141 } 6142 6143 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 6144 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 6145 hdr->channel = le32_to_cpu(ev->channel); 6146 hdr->snr = le32_to_cpu(ev->snr); 6147 hdr->rate = le32_to_cpu(ev->rate); 6148 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 6149 hdr->buf_len = le32_to_cpu(ev->buf_len); 6150 hdr->status = le32_to_cpu(ev->status); 6151 hdr->flags = le32_to_cpu(ev->flags); 6152 hdr->rssi = a_sle32_to_cpu(ev->rssi); 6153 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 6154 6155 for (i = 0; i < ATH_MAX_ANTENNA; i++) 6156 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 6157 6158 if (skb->len < (frame - skb->data) + hdr->buf_len) { 6159 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 6160 return -EPROTO; 6161 } 6162 6163 /* shift the sk_buff to point to `frame` */ 6164 skb_trim(skb, 0); 6165 skb_put(skb, frame - skb->data); 6166 skb_pull(skb, frame - skb->data); 6167 skb_put(skb, hdr->buf_len); 6168 6169 return 0; 6170 } 6171 6172 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 6173 u32 status, u32 ack_rssi) 6174 { 6175 struct sk_buff *msdu; 6176 struct ieee80211_tx_info *info; 6177 struct ath12k_skb_cb *skb_cb; 6178 int num_mgmt; 6179 6180 spin_lock_bh(&ar->txmgmt_idr_lock); 6181 msdu = idr_find(&ar->txmgmt_idr, desc_id); 6182 6183 if (!msdu) { 6184 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 6185 desc_id); 6186 spin_unlock_bh(&ar->txmgmt_idr_lock); 6187 return -ENOENT; 6188 } 6189 6190 idr_remove(&ar->txmgmt_idr, desc_id); 6191 spin_unlock_bh(&ar->txmgmt_idr_lock); 6192 6193 skb_cb = ATH12K_SKB_CB(msdu); 6194 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 6195 6196 info = IEEE80211_SKB_CB(msdu); 6197 memset(&info->status, 0, sizeof(info->status)); 6198 6199 /* skip tx rate update from ieee80211_status*/ 6200 info->status.rates[0].idx = -1; 6201 6202 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) { 6203 info->flags |= IEEE80211_TX_STAT_ACK; 6204 info->status.ack_signal = ack_rssi; 6205 info->status.flags |= IEEE80211_TX_STATUS_ACK_SIGNAL_VALID; 6206 } 6207 6208 if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status) 6209 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 6210 6211 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu); 6212 6213 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx); 6214 6215 /* WARN when we received this event without doing any mgmt tx */ 6216 if (num_mgmt < 0) 6217 WARN_ON_ONCE(1); 6218 6219 if (!num_mgmt) 6220 wake_up(&ar->txmgmt_empty_waitq); 6221 6222 return 0; 6223 } 6224 6225 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 6226 struct sk_buff *skb, 6227 struct wmi_mgmt_tx_compl_event *param) 6228 { 6229 const void **tb; 6230 const struct wmi_mgmt_tx_compl_event *ev; 6231 int ret; 6232 6233 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6234 if (IS_ERR(tb)) { 6235 ret = PTR_ERR(tb); 6236 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6237 return ret; 6238 } 6239 6240 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 6241 if (!ev) { 6242 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 6243 kfree(tb); 6244 return -EPROTO; 6245 } 6246 6247 param->pdev_id = ev->pdev_id; 6248 param->desc_id = ev->desc_id; 6249 param->status = ev->status; 6250 param->ppdu_id = ev->ppdu_id; 6251 param->ack_rssi = ev->ack_rssi; 6252 6253 kfree(tb); 6254 return 0; 6255 } 6256 6257 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 6258 { 6259 lockdep_assert_held(&ar->data_lock); 6260 6261 switch (ar->scan.state) { 6262 case ATH12K_SCAN_IDLE: 6263 case ATH12K_SCAN_RUNNING: 6264 case ATH12K_SCAN_ABORTING: 6265 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 6266 ath12k_scan_state_str(ar->scan.state), 6267 ar->scan.state); 6268 break; 6269 case ATH12K_SCAN_STARTING: 6270 ar->scan.state = ATH12K_SCAN_RUNNING; 6271 6272 if (ar->scan.is_roc) 6273 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar)); 6274 6275 complete(&ar->scan.started); 6276 break; 6277 } 6278 } 6279 6280 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 6281 { 6282 lockdep_assert_held(&ar->data_lock); 6283 6284 switch (ar->scan.state) { 6285 case ATH12K_SCAN_IDLE: 6286 case ATH12K_SCAN_RUNNING: 6287 case ATH12K_SCAN_ABORTING: 6288 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 6289 ath12k_scan_state_str(ar->scan.state), 6290 ar->scan.state); 6291 break; 6292 case ATH12K_SCAN_STARTING: 6293 complete(&ar->scan.started); 6294 __ath12k_mac_scan_finish(ar); 6295 break; 6296 } 6297 } 6298 6299 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 6300 { 6301 lockdep_assert_held(&ar->data_lock); 6302 6303 switch (ar->scan.state) { 6304 case ATH12K_SCAN_IDLE: 6305 case ATH12K_SCAN_STARTING: 6306 /* One suspected reason scan can be completed while starting is 6307 * if firmware fails to deliver all scan events to the host, 6308 * e.g. when transport pipe is full. This has been observed 6309 * with spectral scan phyerr events starving wmi transport 6310 * pipe. In such case the "scan completed" event should be (and 6311 * is) ignored by the host as it may be just firmware's scan 6312 * state machine recovering. 6313 */ 6314 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 6315 ath12k_scan_state_str(ar->scan.state), 6316 ar->scan.state); 6317 break; 6318 case ATH12K_SCAN_RUNNING: 6319 case ATH12K_SCAN_ABORTING: 6320 __ath12k_mac_scan_finish(ar); 6321 break; 6322 } 6323 } 6324 6325 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 6326 { 6327 lockdep_assert_held(&ar->data_lock); 6328 6329 switch (ar->scan.state) { 6330 case ATH12K_SCAN_IDLE: 6331 case ATH12K_SCAN_STARTING: 6332 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 6333 ath12k_scan_state_str(ar->scan.state), 6334 ar->scan.state); 6335 break; 6336 case ATH12K_SCAN_RUNNING: 6337 case ATH12K_SCAN_ABORTING: 6338 ar->scan_channel = NULL; 6339 break; 6340 } 6341 } 6342 6343 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 6344 { 6345 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 6346 6347 lockdep_assert_held(&ar->data_lock); 6348 6349 switch (ar->scan.state) { 6350 case ATH12K_SCAN_IDLE: 6351 case ATH12K_SCAN_STARTING: 6352 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 6353 ath12k_scan_state_str(ar->scan.state), 6354 ar->scan.state); 6355 break; 6356 case ATH12K_SCAN_RUNNING: 6357 case ATH12K_SCAN_ABORTING: 6358 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq); 6359 6360 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 6361 complete(&ar->scan.on_channel); 6362 6363 break; 6364 } 6365 } 6366 6367 static const char * 6368 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 6369 enum wmi_scan_completion_reason reason) 6370 { 6371 switch (type) { 6372 case WMI_SCAN_EVENT_STARTED: 6373 return "started"; 6374 case WMI_SCAN_EVENT_COMPLETED: 6375 switch (reason) { 6376 case WMI_SCAN_REASON_COMPLETED: 6377 return "completed"; 6378 case WMI_SCAN_REASON_CANCELLED: 6379 return "completed [cancelled]"; 6380 case WMI_SCAN_REASON_PREEMPTED: 6381 return "completed [preempted]"; 6382 case WMI_SCAN_REASON_TIMEDOUT: 6383 return "completed [timedout]"; 6384 case WMI_SCAN_REASON_INTERNAL_FAILURE: 6385 return "completed [internal err]"; 6386 case WMI_SCAN_REASON_MAX: 6387 break; 6388 } 6389 return "completed [unknown]"; 6390 case WMI_SCAN_EVENT_BSS_CHANNEL: 6391 return "bss channel"; 6392 case WMI_SCAN_EVENT_FOREIGN_CHAN: 6393 return "foreign channel"; 6394 case WMI_SCAN_EVENT_DEQUEUED: 6395 return "dequeued"; 6396 case WMI_SCAN_EVENT_PREEMPTED: 6397 return "preempted"; 6398 case WMI_SCAN_EVENT_START_FAILED: 6399 return "start failed"; 6400 case WMI_SCAN_EVENT_RESTARTED: 6401 return "restarted"; 6402 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 6403 return "foreign channel exit"; 6404 default: 6405 return "unknown"; 6406 } 6407 } 6408 6409 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 6410 struct wmi_scan_event *scan_evt_param) 6411 { 6412 const void **tb; 6413 const struct wmi_scan_event *ev; 6414 int ret; 6415 6416 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6417 if (IS_ERR(tb)) { 6418 ret = PTR_ERR(tb); 6419 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6420 return ret; 6421 } 6422 6423 ev = tb[WMI_TAG_SCAN_EVENT]; 6424 if (!ev) { 6425 ath12k_warn(ab, "failed to fetch scan ev"); 6426 kfree(tb); 6427 return -EPROTO; 6428 } 6429 6430 scan_evt_param->event_type = ev->event_type; 6431 scan_evt_param->reason = ev->reason; 6432 scan_evt_param->channel_freq = ev->channel_freq; 6433 scan_evt_param->scan_req_id = ev->scan_req_id; 6434 scan_evt_param->scan_id = ev->scan_id; 6435 scan_evt_param->vdev_id = ev->vdev_id; 6436 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 6437 6438 kfree(tb); 6439 return 0; 6440 } 6441 6442 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 6443 struct wmi_peer_sta_kickout_arg *arg) 6444 { 6445 const void **tb; 6446 const struct wmi_peer_sta_kickout_event *ev; 6447 int ret; 6448 6449 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6450 if (IS_ERR(tb)) { 6451 ret = PTR_ERR(tb); 6452 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6453 return ret; 6454 } 6455 6456 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 6457 if (!ev) { 6458 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 6459 kfree(tb); 6460 return -EPROTO; 6461 } 6462 6463 arg->mac_addr = ev->peer_macaddr.addr; 6464 6465 kfree(tb); 6466 return 0; 6467 } 6468 6469 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 6470 struct wmi_roam_event *roam_ev) 6471 { 6472 const void **tb; 6473 const struct wmi_roam_event *ev; 6474 int ret; 6475 6476 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6477 if (IS_ERR(tb)) { 6478 ret = PTR_ERR(tb); 6479 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6480 return ret; 6481 } 6482 6483 ev = tb[WMI_TAG_ROAM_EVENT]; 6484 if (!ev) { 6485 ath12k_warn(ab, "failed to fetch roam ev"); 6486 kfree(tb); 6487 return -EPROTO; 6488 } 6489 6490 roam_ev->vdev_id = ev->vdev_id; 6491 roam_ev->reason = ev->reason; 6492 roam_ev->rssi = ev->rssi; 6493 6494 kfree(tb); 6495 return 0; 6496 } 6497 6498 static int freq_to_idx(struct ath12k *ar, int freq) 6499 { 6500 struct ieee80211_supported_band *sband; 6501 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 6502 int band, ch, idx = 0; 6503 6504 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 6505 if (!ar->mac.sbands[band].channels) 6506 continue; 6507 6508 sband = hw->wiphy->bands[band]; 6509 if (!sband) 6510 continue; 6511 6512 for (ch = 0; ch < sband->n_channels; ch++, idx++) { 6513 if (sband->channels[ch].center_freq < 6514 KHZ_TO_MHZ(ar->freq_range.start_freq) || 6515 sband->channels[ch].center_freq > 6516 KHZ_TO_MHZ(ar->freq_range.end_freq)) 6517 continue; 6518 6519 if (sband->channels[ch].center_freq == freq) 6520 goto exit; 6521 } 6522 } 6523 6524 exit: 6525 return idx; 6526 } 6527 6528 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 6529 struct wmi_chan_info_event *ch_info_ev) 6530 { 6531 const void **tb; 6532 const struct wmi_chan_info_event *ev; 6533 int ret; 6534 6535 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6536 if (IS_ERR(tb)) { 6537 ret = PTR_ERR(tb); 6538 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6539 return ret; 6540 } 6541 6542 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 6543 if (!ev) { 6544 ath12k_warn(ab, "failed to fetch chan info ev"); 6545 kfree(tb); 6546 return -EPROTO; 6547 } 6548 6549 ch_info_ev->err_code = ev->err_code; 6550 ch_info_ev->freq = ev->freq; 6551 ch_info_ev->cmd_flags = ev->cmd_flags; 6552 ch_info_ev->noise_floor = ev->noise_floor; 6553 ch_info_ev->rx_clear_count = ev->rx_clear_count; 6554 ch_info_ev->cycle_count = ev->cycle_count; 6555 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 6556 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 6557 ch_info_ev->rx_frame_count = ev->rx_frame_count; 6558 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 6559 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 6560 ch_info_ev->vdev_id = ev->vdev_id; 6561 6562 kfree(tb); 6563 return 0; 6564 } 6565 6566 static int 6567 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 6568 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 6569 { 6570 const void **tb; 6571 const struct wmi_pdev_bss_chan_info_event *ev; 6572 int ret; 6573 6574 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6575 if (IS_ERR(tb)) { 6576 ret = PTR_ERR(tb); 6577 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6578 return ret; 6579 } 6580 6581 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 6582 if (!ev) { 6583 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 6584 kfree(tb); 6585 return -EPROTO; 6586 } 6587 6588 bss_ch_info_ev->pdev_id = ev->pdev_id; 6589 bss_ch_info_ev->freq = ev->freq; 6590 bss_ch_info_ev->noise_floor = ev->noise_floor; 6591 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 6592 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 6593 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 6594 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 6595 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 6596 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 6597 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 6598 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 6599 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 6600 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 6601 6602 kfree(tb); 6603 return 0; 6604 } 6605 6606 static int 6607 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 6608 struct wmi_vdev_install_key_complete_arg *arg) 6609 { 6610 const void **tb; 6611 const struct wmi_vdev_install_key_compl_event *ev; 6612 int ret; 6613 6614 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6615 if (IS_ERR(tb)) { 6616 ret = PTR_ERR(tb); 6617 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6618 return ret; 6619 } 6620 6621 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 6622 if (!ev) { 6623 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 6624 kfree(tb); 6625 return -EPROTO; 6626 } 6627 6628 arg->vdev_id = le32_to_cpu(ev->vdev_id); 6629 arg->macaddr = ev->peer_macaddr.addr; 6630 arg->key_idx = le32_to_cpu(ev->key_idx); 6631 arg->key_flags = le32_to_cpu(ev->key_flags); 6632 arg->status = le32_to_cpu(ev->status); 6633 6634 kfree(tb); 6635 return 0; 6636 } 6637 6638 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 6639 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 6640 { 6641 const void **tb; 6642 const struct wmi_peer_assoc_conf_event *ev; 6643 int ret; 6644 6645 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6646 if (IS_ERR(tb)) { 6647 ret = PTR_ERR(tb); 6648 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6649 return ret; 6650 } 6651 6652 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 6653 if (!ev) { 6654 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 6655 kfree(tb); 6656 return -EPROTO; 6657 } 6658 6659 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 6660 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 6661 6662 kfree(tb); 6663 return 0; 6664 } 6665 6666 static int 6667 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb, 6668 const struct wmi_pdev_temperature_event *ev) 6669 { 6670 const void **tb; 6671 int ret; 6672 6673 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6674 if (IS_ERR(tb)) { 6675 ret = PTR_ERR(tb); 6676 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6677 return ret; 6678 } 6679 6680 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 6681 if (!ev) { 6682 ath12k_warn(ab, "failed to fetch pdev temp ev"); 6683 kfree(tb); 6684 return -EPROTO; 6685 } 6686 6687 kfree(tb); 6688 return 0; 6689 } 6690 6691 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 6692 { 6693 /* try to send pending beacons first. they take priority */ 6694 wake_up(&ab->wmi_ab.tx_credits_wq); 6695 } 6696 6697 static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb) 6698 { 6699 const struct wmi_11d_new_cc_event *ev; 6700 struct ath12k *ar; 6701 struct ath12k_pdev *pdev; 6702 const void **tb; 6703 int ret, i; 6704 6705 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6706 if (IS_ERR(tb)) { 6707 ret = PTR_ERR(tb); 6708 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6709 return ret; 6710 } 6711 6712 ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT]; 6713 if (!ev) { 6714 kfree(tb); 6715 ath12k_warn(ab, "failed to fetch 11d new cc ev"); 6716 return -EPROTO; 6717 } 6718 6719 spin_lock_bh(&ab->base_lock); 6720 memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN); 6721 spin_unlock_bh(&ab->base_lock); 6722 6723 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n", 6724 ab->new_alpha2[0], 6725 ab->new_alpha2[1]); 6726 6727 kfree(tb); 6728 6729 for (i = 0; i < ab->num_radios; i++) { 6730 pdev = &ab->pdevs[i]; 6731 ar = pdev->ar; 6732 ar->state_11d = ATH12K_11D_IDLE; 6733 ar->ah->regd_updated = false; 6734 complete(&ar->completed_11d_scan); 6735 } 6736 6737 queue_work(ab->workqueue, &ab->update_11d_work); 6738 6739 return 0; 6740 } 6741 6742 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 6743 struct sk_buff *skb) 6744 { 6745 dev_kfree_skb(skb); 6746 } 6747 6748 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 6749 { 6750 struct ath12k_reg_info *reg_info; 6751 struct ath12k *ar = NULL; 6752 u8 pdev_idx = 255; 6753 int ret; 6754 6755 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC); 6756 if (!reg_info) { 6757 ret = -ENOMEM; 6758 goto fallback; 6759 } 6760 6761 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 6762 if (ret) { 6763 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 6764 goto mem_free; 6765 } 6766 6767 ret = ath12k_reg_validate_reg_info(ab, reg_info); 6768 if (ret == ATH12K_REG_STATUS_FALLBACK) { 6769 ath12k_warn(ab, "failed to validate reg info %d\n", ret); 6770 /* firmware has successfully switches to new regd but host can not 6771 * continue, so free reginfo and fallback to old regd 6772 */ 6773 goto mem_free; 6774 } else if (ret == ATH12K_REG_STATUS_DROP) { 6775 /* reg info is valid but we will not store it and 6776 * not going to create new regd for it 6777 */ 6778 ret = ATH12K_REG_STATUS_VALID; 6779 goto mem_free; 6780 } 6781 6782 /* free old reg_info if it exist */ 6783 pdev_idx = reg_info->phy_id; 6784 if (ab->reg_info[pdev_idx]) { 6785 ath12k_reg_reset_reg_info(ab->reg_info[pdev_idx]); 6786 kfree(ab->reg_info[pdev_idx]); 6787 } 6788 /* reg_info is valid, we store it for later use 6789 * even below regd build failed 6790 */ 6791 ab->reg_info[pdev_idx] = reg_info; 6792 6793 ret = ath12k_reg_handle_chan_list(ab, reg_info, WMI_VDEV_TYPE_UNSPEC, 6794 IEEE80211_REG_UNSET_AP); 6795 if (ret) { 6796 ath12k_warn(ab, "failed to handle chan list %d\n", ret); 6797 goto fallback; 6798 } 6799 6800 goto out; 6801 6802 mem_free: 6803 ath12k_reg_reset_reg_info(reg_info); 6804 kfree(reg_info); 6805 6806 if (ret == ATH12K_REG_STATUS_VALID) 6807 goto out; 6808 6809 fallback: 6810 /* Fallback to older reg (by sending previous country setting 6811 * again if fw has succeeded and we failed to process here. 6812 * The Regdomain should be uniform across driver and fw. Since the 6813 * FW has processed the command and sent a success status, we expect 6814 * this function to succeed as well. If it doesn't, CTRY needs to be 6815 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 6816 */ 6817 /* TODO: This is rare, but still should also be handled */ 6818 WARN_ON(1); 6819 6820 out: 6821 /* In some error cases, even a valid pdev_idx might not be available */ 6822 if (pdev_idx != 255) 6823 ar = ab->pdevs[pdev_idx].ar; 6824 6825 /* During the boot-time update, 'ar' might not be allocated, 6826 * so the completion cannot be marked at that point. 6827 * This boot-time update is handled in ath12k_mac_hw_register() 6828 * before registering the hardware. 6829 */ 6830 if (ar) 6831 complete_all(&ar->regd_update_completed); 6832 6833 return ret; 6834 } 6835 6836 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 6837 const void *ptr, void *data) 6838 { 6839 struct ath12k_wmi_rdy_parse *rdy_parse = data; 6840 struct wmi_ready_event fixed_param; 6841 struct ath12k_wmi_mac_addr_params *addr_list; 6842 struct ath12k_pdev *pdev; 6843 u32 num_mac_addr; 6844 int i; 6845 6846 switch (tag) { 6847 case WMI_TAG_READY_EVENT: 6848 memset(&fixed_param, 0, sizeof(fixed_param)); 6849 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 6850 min_t(u16, sizeof(fixed_param), len)); 6851 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 6852 rdy_parse->num_extra_mac_addr = 6853 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 6854 6855 ether_addr_copy(ab->mac_addr, 6856 fixed_param.ready_event_min.mac_addr.addr); 6857 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 6858 ab->wmi_ready = true; 6859 break; 6860 case WMI_TAG_ARRAY_FIXED_STRUCT: 6861 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 6862 num_mac_addr = rdy_parse->num_extra_mac_addr; 6863 6864 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 6865 break; 6866 6867 for (i = 0; i < ab->num_radios; i++) { 6868 pdev = &ab->pdevs[i]; 6869 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 6870 } 6871 ab->pdevs_macaddr_valid = true; 6872 break; 6873 default: 6874 break; 6875 } 6876 6877 return 0; 6878 } 6879 6880 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 6881 { 6882 struct ath12k_wmi_rdy_parse rdy_parse = { }; 6883 int ret; 6884 6885 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6886 ath12k_wmi_rdy_parse, &rdy_parse); 6887 if (ret) { 6888 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 6889 return ret; 6890 } 6891 6892 complete(&ab->wmi_ab.unified_ready); 6893 return 0; 6894 } 6895 6896 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 6897 { 6898 struct wmi_peer_delete_resp_event peer_del_resp; 6899 struct ath12k *ar; 6900 6901 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 6902 ath12k_warn(ab, "failed to extract peer delete resp"); 6903 return; 6904 } 6905 6906 rcu_read_lock(); 6907 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id)); 6908 if (!ar) { 6909 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d", 6910 peer_del_resp.vdev_id); 6911 rcu_read_unlock(); 6912 return; 6913 } 6914 6915 complete(&ar->peer_delete_done); 6916 rcu_read_unlock(); 6917 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 6918 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr); 6919 } 6920 6921 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 6922 struct sk_buff *skb) 6923 { 6924 struct ath12k *ar; 6925 u32 vdev_id = 0; 6926 6927 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 6928 ath12k_warn(ab, "failed to extract vdev delete resp"); 6929 return; 6930 } 6931 6932 rcu_read_lock(); 6933 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6934 if (!ar) { 6935 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 6936 vdev_id); 6937 rcu_read_unlock(); 6938 return; 6939 } 6940 6941 complete(&ar->vdev_delete_done); 6942 6943 rcu_read_unlock(); 6944 6945 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 6946 vdev_id); 6947 } 6948 6949 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 6950 { 6951 switch (vdev_resp_status) { 6952 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 6953 return "invalid vdev id"; 6954 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 6955 return "not supported"; 6956 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 6957 return "dfs violation"; 6958 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 6959 return "invalid regdomain"; 6960 default: 6961 return "unknown"; 6962 } 6963 } 6964 6965 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 6966 { 6967 struct wmi_vdev_start_resp_event vdev_start_resp; 6968 struct ath12k *ar; 6969 u32 status; 6970 6971 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 6972 ath12k_warn(ab, "failed to extract vdev start resp"); 6973 return; 6974 } 6975 6976 rcu_read_lock(); 6977 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 6978 if (!ar) { 6979 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 6980 vdev_start_resp.vdev_id); 6981 rcu_read_unlock(); 6982 return; 6983 } 6984 6985 ar->last_wmi_vdev_start_status = 0; 6986 6987 status = le32_to_cpu(vdev_start_resp.status); 6988 if (WARN_ON_ONCE(status)) { 6989 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 6990 status, ath12k_wmi_vdev_resp_print(status)); 6991 ar->last_wmi_vdev_start_status = status; 6992 } 6993 6994 ar->max_allowed_tx_power = (s8)le32_to_cpu(vdev_start_resp.max_allowed_tx_power); 6995 6996 complete(&ar->vdev_setup_done); 6997 6998 rcu_read_unlock(); 6999 7000 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 7001 vdev_start_resp.vdev_id); 7002 } 7003 7004 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 7005 { 7006 u32 vdev_id, tx_status; 7007 7008 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) { 7009 ath12k_warn(ab, "failed to extract bcn tx status"); 7010 return; 7011 } 7012 } 7013 7014 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 7015 { 7016 struct ath12k *ar; 7017 u32 vdev_id = 0; 7018 7019 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 7020 ath12k_warn(ab, "failed to extract vdev stopped event"); 7021 return; 7022 } 7023 7024 rcu_read_lock(); 7025 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 7026 if (!ar) { 7027 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 7028 vdev_id); 7029 rcu_read_unlock(); 7030 return; 7031 } 7032 7033 complete(&ar->vdev_setup_done); 7034 7035 rcu_read_unlock(); 7036 7037 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 7038 } 7039 7040 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 7041 { 7042 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0}; 7043 struct ath12k *ar; 7044 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 7045 struct ieee80211_hdr *hdr; 7046 u16 fc; 7047 struct ieee80211_supported_band *sband; 7048 s32 noise_floor; 7049 7050 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 7051 ath12k_warn(ab, "failed to extract mgmt rx event"); 7052 dev_kfree_skb(skb); 7053 return; 7054 } 7055 7056 memset(status, 0, sizeof(*status)); 7057 7058 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 7059 rx_ev.status); 7060 7061 rcu_read_lock(); 7062 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 7063 7064 if (!ar) { 7065 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 7066 rx_ev.pdev_id); 7067 dev_kfree_skb(skb); 7068 goto exit; 7069 } 7070 7071 if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) || 7072 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 7073 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 7074 WMI_RX_STATUS_ERR_CRC))) { 7075 dev_kfree_skb(skb); 7076 goto exit; 7077 } 7078 7079 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 7080 status->flag |= RX_FLAG_MMIC_ERROR; 7081 7082 if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ && 7083 rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) { 7084 status->band = NL80211_BAND_6GHZ; 7085 status->freq = rx_ev.chan_freq; 7086 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 7087 status->band = NL80211_BAND_2GHZ; 7088 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) { 7089 status->band = NL80211_BAND_5GHZ; 7090 } else { 7091 /* Shouldn't happen unless list of advertised channels to 7092 * mac80211 has been changed. 7093 */ 7094 WARN_ON_ONCE(1); 7095 dev_kfree_skb(skb); 7096 goto exit; 7097 } 7098 7099 if (rx_ev.phy_mode == MODE_11B && 7100 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 7101 ath12k_dbg(ab, ATH12K_DBG_WMI, 7102 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 7103 7104 sband = &ar->mac.sbands[status->band]; 7105 7106 if (status->band != NL80211_BAND_6GHZ) 7107 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 7108 status->band); 7109 7110 spin_lock_bh(&ar->data_lock); 7111 noise_floor = ath12k_pdev_get_noise_floor(ar); 7112 spin_unlock_bh(&ar->data_lock); 7113 7114 status->signal = rx_ev.snr + noise_floor; 7115 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 7116 7117 hdr = (struct ieee80211_hdr *)skb->data; 7118 fc = le16_to_cpu(hdr->frame_control); 7119 7120 /* Firmware is guaranteed to report all essential management frames via 7121 * WMI while it can deliver some extra via HTT. Since there can be 7122 * duplicates split the reporting wrt monitor/sniffing. 7123 */ 7124 status->flag |= RX_FLAG_SKIP_MONITOR; 7125 7126 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 7127 * including group privacy action frames. 7128 */ 7129 if (ieee80211_has_protected(hdr->frame_control)) { 7130 status->flag |= RX_FLAG_DECRYPTED; 7131 7132 if (!ieee80211_is_robust_mgmt_frame(skb)) { 7133 status->flag |= RX_FLAG_IV_STRIPPED | 7134 RX_FLAG_MMIC_STRIPPED; 7135 hdr->frame_control = __cpu_to_le16(fc & 7136 ~IEEE80211_FCTL_PROTECTED); 7137 } 7138 } 7139 7140 if (ieee80211_is_beacon(hdr->frame_control)) 7141 ath12k_mac_handle_beacon(ar, skb); 7142 7143 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7144 "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 7145 skb, skb->len, 7146 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 7147 7148 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7149 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 7150 status->freq, status->band, status->signal, 7151 status->rate_idx); 7152 7153 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb); 7154 7155 exit: 7156 rcu_read_unlock(); 7157 } 7158 7159 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 7160 { 7161 struct wmi_mgmt_tx_compl_event tx_compl_param = {0}; 7162 struct ath12k *ar; 7163 7164 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 7165 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 7166 return; 7167 } 7168 7169 rcu_read_lock(); 7170 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 7171 if (!ar) { 7172 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 7173 tx_compl_param.pdev_id); 7174 goto exit; 7175 } 7176 7177 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 7178 le32_to_cpu(tx_compl_param.status), 7179 le32_to_cpu(tx_compl_param.ack_rssi)); 7180 7181 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7182 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 7183 tx_compl_param.pdev_id, tx_compl_param.desc_id, 7184 tx_compl_param.status); 7185 7186 exit: 7187 rcu_read_unlock(); 7188 } 7189 7190 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab, 7191 u32 vdev_id, 7192 enum ath12k_scan_state state) 7193 { 7194 int i; 7195 struct ath12k_pdev *pdev; 7196 struct ath12k *ar; 7197 7198 for (i = 0; i < ab->num_radios; i++) { 7199 pdev = rcu_dereference(ab->pdevs_active[i]); 7200 if (pdev && pdev->ar) { 7201 ar = pdev->ar; 7202 7203 spin_lock_bh(&ar->data_lock); 7204 if (ar->scan.state == state && 7205 ar->scan.arvif && 7206 ar->scan.arvif->vdev_id == vdev_id) { 7207 spin_unlock_bh(&ar->data_lock); 7208 return ar; 7209 } 7210 spin_unlock_bh(&ar->data_lock); 7211 } 7212 } 7213 return NULL; 7214 } 7215 7216 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 7217 { 7218 struct ath12k *ar; 7219 struct wmi_scan_event scan_ev = {0}; 7220 7221 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 7222 ath12k_warn(ab, "failed to extract scan event"); 7223 return; 7224 } 7225 7226 rcu_read_lock(); 7227 7228 /* In case the scan was cancelled, ex. during interface teardown, 7229 * the interface will not be found in active interfaces. 7230 * Rather, in such scenarios, iterate over the active pdev's to 7231 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 7232 * aborting scan's vdev id matches this event info. 7233 */ 7234 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 7235 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) { 7236 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 7237 ATH12K_SCAN_ABORTING); 7238 if (!ar) 7239 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 7240 ATH12K_SCAN_RUNNING); 7241 } else { 7242 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 7243 } 7244 7245 if (!ar) { 7246 ath12k_warn(ab, "Received scan event for unknown vdev"); 7247 rcu_read_unlock(); 7248 return; 7249 } 7250 7251 spin_lock_bh(&ar->data_lock); 7252 7253 ath12k_dbg(ab, ATH12K_DBG_WMI, 7254 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 7255 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 7256 le32_to_cpu(scan_ev.reason)), 7257 le32_to_cpu(scan_ev.event_type), 7258 le32_to_cpu(scan_ev.reason), 7259 le32_to_cpu(scan_ev.channel_freq), 7260 le32_to_cpu(scan_ev.scan_req_id), 7261 le32_to_cpu(scan_ev.scan_id), 7262 le32_to_cpu(scan_ev.vdev_id), 7263 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 7264 7265 switch (le32_to_cpu(scan_ev.event_type)) { 7266 case WMI_SCAN_EVENT_STARTED: 7267 ath12k_wmi_event_scan_started(ar); 7268 break; 7269 case WMI_SCAN_EVENT_COMPLETED: 7270 ath12k_wmi_event_scan_completed(ar); 7271 break; 7272 case WMI_SCAN_EVENT_BSS_CHANNEL: 7273 ath12k_wmi_event_scan_bss_chan(ar); 7274 break; 7275 case WMI_SCAN_EVENT_FOREIGN_CHAN: 7276 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 7277 break; 7278 case WMI_SCAN_EVENT_START_FAILED: 7279 ath12k_warn(ab, "received scan start failure event\n"); 7280 ath12k_wmi_event_scan_start_failed(ar); 7281 break; 7282 case WMI_SCAN_EVENT_DEQUEUED: 7283 __ath12k_mac_scan_finish(ar); 7284 break; 7285 case WMI_SCAN_EVENT_PREEMPTED: 7286 case WMI_SCAN_EVENT_RESTARTED: 7287 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 7288 default: 7289 break; 7290 } 7291 7292 spin_unlock_bh(&ar->data_lock); 7293 7294 rcu_read_unlock(); 7295 } 7296 7297 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 7298 { 7299 struct wmi_peer_sta_kickout_arg arg = {}; 7300 struct ieee80211_sta *sta; 7301 struct ath12k_peer *peer; 7302 struct ath12k *ar; 7303 7304 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 7305 ath12k_warn(ab, "failed to extract peer sta kickout event"); 7306 return; 7307 } 7308 7309 rcu_read_lock(); 7310 7311 spin_lock_bh(&ab->base_lock); 7312 7313 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr); 7314 7315 if (!peer) { 7316 ath12k_warn(ab, "peer not found %pM\n", 7317 arg.mac_addr); 7318 goto exit; 7319 } 7320 7321 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id); 7322 if (!ar) { 7323 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d", 7324 peer->vdev_id); 7325 goto exit; 7326 } 7327 7328 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar), 7329 arg.mac_addr, NULL); 7330 if (!sta) { 7331 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n", 7332 arg.mac_addr); 7333 goto exit; 7334 } 7335 7336 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM", 7337 arg.mac_addr); 7338 7339 ieee80211_report_low_ack(sta, 10); 7340 7341 exit: 7342 spin_unlock_bh(&ab->base_lock); 7343 rcu_read_unlock(); 7344 } 7345 7346 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 7347 { 7348 struct wmi_roam_event roam_ev = {}; 7349 struct ath12k *ar; 7350 u32 vdev_id; 7351 u8 roam_reason; 7352 7353 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 7354 ath12k_warn(ab, "failed to extract roam event"); 7355 return; 7356 } 7357 7358 vdev_id = le32_to_cpu(roam_ev.vdev_id); 7359 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason), 7360 WMI_ROAM_REASON_MASK); 7361 7362 ath12k_dbg(ab, ATH12K_DBG_WMI, 7363 "wmi roam event vdev %u reason %d rssi %d\n", 7364 vdev_id, roam_reason, roam_ev.rssi); 7365 7366 rcu_read_lock(); 7367 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 7368 if (!ar) { 7369 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id); 7370 rcu_read_unlock(); 7371 return; 7372 } 7373 7374 if (roam_reason >= WMI_ROAM_REASON_MAX) 7375 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 7376 roam_reason, vdev_id); 7377 7378 switch (roam_reason) { 7379 case WMI_ROAM_REASON_BEACON_MISS: 7380 ath12k_mac_handle_beacon_miss(ar, vdev_id); 7381 break; 7382 case WMI_ROAM_REASON_BETTER_AP: 7383 case WMI_ROAM_REASON_LOW_RSSI: 7384 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 7385 case WMI_ROAM_REASON_HO_FAILED: 7386 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 7387 roam_reason, vdev_id); 7388 break; 7389 } 7390 7391 rcu_read_unlock(); 7392 } 7393 7394 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 7395 { 7396 struct wmi_chan_info_event ch_info_ev = {0}; 7397 struct ath12k *ar; 7398 struct survey_info *survey; 7399 int idx; 7400 /* HW channel counters frequency value in hertz */ 7401 u32 cc_freq_hz = ab->cc_freq_hz; 7402 7403 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) { 7404 ath12k_warn(ab, "failed to extract chan info event"); 7405 return; 7406 } 7407 7408 ath12k_dbg(ab, ATH12K_DBG_WMI, 7409 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 7410 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 7411 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 7412 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 7413 ch_info_ev.mac_clk_mhz); 7414 7415 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 7416 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 7417 return; 7418 } 7419 7420 rcu_read_lock(); 7421 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 7422 if (!ar) { 7423 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 7424 ch_info_ev.vdev_id); 7425 rcu_read_unlock(); 7426 return; 7427 } 7428 spin_lock_bh(&ar->data_lock); 7429 7430 switch (ar->scan.state) { 7431 case ATH12K_SCAN_IDLE: 7432 case ATH12K_SCAN_STARTING: 7433 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 7434 goto exit; 7435 case ATH12K_SCAN_RUNNING: 7436 case ATH12K_SCAN_ABORTING: 7437 break; 7438 } 7439 7440 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq)); 7441 if (idx >= ARRAY_SIZE(ar->survey)) { 7442 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 7443 ch_info_ev.freq, idx); 7444 goto exit; 7445 } 7446 7447 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 7448 * HW channel counters frequency value 7449 */ 7450 if (ch_info_ev.mac_clk_mhz) 7451 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 7452 7453 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 7454 survey = &ar->survey[idx]; 7455 memset(survey, 0, sizeof(*survey)); 7456 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 7457 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 7458 SURVEY_INFO_TIME_BUSY; 7459 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz); 7460 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 7461 cc_freq_hz); 7462 } 7463 exit: 7464 spin_unlock_bh(&ar->data_lock); 7465 rcu_read_unlock(); 7466 } 7467 7468 static void 7469 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 7470 { 7471 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 7472 struct survey_info *survey; 7473 struct ath12k *ar; 7474 u32 cc_freq_hz = ab->cc_freq_hz; 7475 u64 busy, total, tx, rx, rx_bss; 7476 int idx; 7477 7478 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 7479 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 7480 return; 7481 } 7482 7483 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 7484 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 7485 7486 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 7487 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 7488 7489 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 7490 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 7491 7492 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 7493 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 7494 7495 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 7496 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 7497 7498 ath12k_dbg(ab, ATH12K_DBG_WMI, 7499 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 7500 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 7501 bss_ch_info_ev.noise_floor, busy, total, 7502 tx, rx, rx_bss); 7503 7504 rcu_read_lock(); 7505 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 7506 7507 if (!ar) { 7508 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 7509 bss_ch_info_ev.pdev_id); 7510 rcu_read_unlock(); 7511 return; 7512 } 7513 7514 spin_lock_bh(&ar->data_lock); 7515 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq)); 7516 if (idx >= ARRAY_SIZE(ar->survey)) { 7517 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 7518 bss_ch_info_ev.freq, idx); 7519 goto exit; 7520 } 7521 7522 survey = &ar->survey[idx]; 7523 7524 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 7525 survey->time = div_u64(total, cc_freq_hz); 7526 survey->time_busy = div_u64(busy, cc_freq_hz); 7527 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 7528 survey->time_tx = div_u64(tx, cc_freq_hz); 7529 survey->filled |= (SURVEY_INFO_NOISE_DBM | 7530 SURVEY_INFO_TIME | 7531 SURVEY_INFO_TIME_BUSY | 7532 SURVEY_INFO_TIME_RX | 7533 SURVEY_INFO_TIME_TX); 7534 exit: 7535 spin_unlock_bh(&ar->data_lock); 7536 complete(&ar->bss_survey_done); 7537 7538 rcu_read_unlock(); 7539 } 7540 7541 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 7542 struct sk_buff *skb) 7543 { 7544 struct wmi_vdev_install_key_complete_arg install_key_compl = {0}; 7545 struct ath12k *ar; 7546 7547 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 7548 ath12k_warn(ab, "failed to extract install key compl event"); 7549 return; 7550 } 7551 7552 ath12k_dbg(ab, ATH12K_DBG_WMI, 7553 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 7554 install_key_compl.key_idx, install_key_compl.key_flags, 7555 install_key_compl.macaddr, install_key_compl.status); 7556 7557 rcu_read_lock(); 7558 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 7559 if (!ar) { 7560 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 7561 install_key_compl.vdev_id); 7562 rcu_read_unlock(); 7563 return; 7564 } 7565 7566 ar->install_key_status = 0; 7567 7568 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 7569 ath12k_warn(ab, "install key failed for %pM status %d\n", 7570 install_key_compl.macaddr, install_key_compl.status); 7571 ar->install_key_status = install_key_compl.status; 7572 } 7573 7574 complete(&ar->install_key_done); 7575 rcu_read_unlock(); 7576 } 7577 7578 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab, 7579 u16 tag, u16 len, 7580 const void *ptr, 7581 void *data) 7582 { 7583 const struct wmi_service_available_event *ev; 7584 u32 *wmi_ext2_service_bitmap; 7585 int i, j; 7586 u16 expected_len; 7587 7588 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32); 7589 if (len < expected_len) { 7590 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n", 7591 len, tag); 7592 return -EINVAL; 7593 } 7594 7595 switch (tag) { 7596 case WMI_TAG_SERVICE_AVAILABLE_EVENT: 7597 ev = (struct wmi_service_available_event *)ptr; 7598 for (i = 0, j = WMI_MAX_SERVICE; 7599 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 7600 i++) { 7601 do { 7602 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 7603 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 7604 set_bit(j, ab->wmi_ab.svc_map); 7605 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 7606 } 7607 7608 ath12k_dbg(ab, ATH12K_DBG_WMI, 7609 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x", 7610 ev->wmi_service_segment_bitmap[0], 7611 ev->wmi_service_segment_bitmap[1], 7612 ev->wmi_service_segment_bitmap[2], 7613 ev->wmi_service_segment_bitmap[3]); 7614 break; 7615 case WMI_TAG_ARRAY_UINT32: 7616 wmi_ext2_service_bitmap = (u32 *)ptr; 7617 for (i = 0, j = WMI_MAX_EXT_SERVICE; 7618 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE; 7619 i++) { 7620 do { 7621 if (wmi_ext2_service_bitmap[i] & 7622 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 7623 set_bit(j, ab->wmi_ab.svc_map); 7624 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 7625 } 7626 7627 ath12k_dbg(ab, ATH12K_DBG_WMI, 7628 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x", 7629 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1], 7630 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]); 7631 break; 7632 } 7633 return 0; 7634 } 7635 7636 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 7637 { 7638 int ret; 7639 7640 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 7641 ath12k_wmi_tlv_services_parser, 7642 NULL); 7643 return ret; 7644 } 7645 7646 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 7647 { 7648 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0}; 7649 struct ath12k *ar; 7650 7651 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 7652 ath12k_warn(ab, "failed to extract peer assoc conf event"); 7653 return; 7654 } 7655 7656 ath12k_dbg(ab, ATH12K_DBG_WMI, 7657 "peer assoc conf ev vdev id %d macaddr %pM\n", 7658 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 7659 7660 rcu_read_lock(); 7661 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 7662 7663 if (!ar) { 7664 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 7665 peer_assoc_conf.vdev_id); 7666 rcu_read_unlock(); 7667 return; 7668 } 7669 7670 complete(&ar->peer_assoc_done); 7671 rcu_read_unlock(); 7672 } 7673 7674 static void 7675 ath12k_wmi_fw_vdev_stats_dump(struct ath12k *ar, 7676 struct ath12k_fw_stats *fw_stats, 7677 char *buf, u32 *length) 7678 { 7679 const struct ath12k_fw_stats_vdev *vdev; 7680 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7681 struct ath12k_link_vif *arvif; 7682 u32 len = *length; 7683 u8 *vif_macaddr; 7684 int i; 7685 7686 len += scnprintf(buf + len, buf_len - len, "\n"); 7687 len += scnprintf(buf + len, buf_len - len, "%30s\n", 7688 "ath12k VDEV stats"); 7689 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7690 "================="); 7691 7692 list_for_each_entry(vdev, &fw_stats->vdevs, list) { 7693 arvif = ath12k_mac_get_arvif(ar, vdev->vdev_id); 7694 if (!arvif) 7695 continue; 7696 vif_macaddr = arvif->ahvif->vif->addr; 7697 7698 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7699 "VDEV ID", vdev->vdev_id); 7700 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", 7701 "VDEV MAC address", vif_macaddr); 7702 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7703 "beacon snr", vdev->beacon_snr); 7704 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7705 "data snr", vdev->data_snr); 7706 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7707 "num rx frames", vdev->num_rx_frames); 7708 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7709 "num rts fail", vdev->num_rts_fail); 7710 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7711 "num rts success", vdev->num_rts_success); 7712 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7713 "num rx err", vdev->num_rx_err); 7714 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7715 "num rx discard", vdev->num_rx_discard); 7716 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7717 "num tx not acked", vdev->num_tx_not_acked); 7718 7719 for (i = 0 ; i < WLAN_MAX_AC; i++) 7720 len += scnprintf(buf + len, buf_len - len, 7721 "%25s [%02d] %u\n", 7722 "num tx frames", i, 7723 vdev->num_tx_frames[i]); 7724 7725 for (i = 0 ; i < WLAN_MAX_AC; i++) 7726 len += scnprintf(buf + len, buf_len - len, 7727 "%25s [%02d] %u\n", 7728 "num tx frames retries", i, 7729 vdev->num_tx_frames_retries[i]); 7730 7731 for (i = 0 ; i < WLAN_MAX_AC; i++) 7732 len += scnprintf(buf + len, buf_len - len, 7733 "%25s [%02d] %u\n", 7734 "num tx frames failures", i, 7735 vdev->num_tx_frames_failures[i]); 7736 7737 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++) 7738 len += scnprintf(buf + len, buf_len - len, 7739 "%25s [%02d] 0x%08x\n", 7740 "tx rate history", i, 7741 vdev->tx_rate_history[i]); 7742 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++) 7743 len += scnprintf(buf + len, buf_len - len, 7744 "%25s [%02d] %u\n", 7745 "beacon rssi history", i, 7746 vdev->beacon_rssi_history[i]); 7747 7748 len += scnprintf(buf + len, buf_len - len, "\n"); 7749 *length = len; 7750 } 7751 } 7752 7753 static void 7754 ath12k_wmi_fw_bcn_stats_dump(struct ath12k *ar, 7755 struct ath12k_fw_stats *fw_stats, 7756 char *buf, u32 *length) 7757 { 7758 const struct ath12k_fw_stats_bcn *bcn; 7759 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7760 struct ath12k_link_vif *arvif; 7761 u32 len = *length; 7762 size_t num_bcn; 7763 7764 num_bcn = list_count_nodes(&fw_stats->bcn); 7765 7766 len += scnprintf(buf + len, buf_len - len, "\n"); 7767 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 7768 "ath12k Beacon stats", num_bcn); 7769 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7770 "==================="); 7771 7772 list_for_each_entry(bcn, &fw_stats->bcn, list) { 7773 arvif = ath12k_mac_get_arvif(ar, bcn->vdev_id); 7774 if (!arvif) 7775 continue; 7776 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7777 "VDEV ID", bcn->vdev_id); 7778 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", 7779 "VDEV MAC address", arvif->ahvif->vif->addr); 7780 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7781 "================"); 7782 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7783 "Num of beacon tx success", bcn->tx_bcn_succ_cnt); 7784 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7785 "Num of beacon tx failures", bcn->tx_bcn_outage_cnt); 7786 7787 len += scnprintf(buf + len, buf_len - len, "\n"); 7788 *length = len; 7789 } 7790 } 7791 7792 static void 7793 ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 7794 char *buf, u32 *length, u64 fw_soc_drop_cnt) 7795 { 7796 u32 len = *length; 7797 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7798 7799 len = scnprintf(buf + len, buf_len - len, "\n"); 7800 len += scnprintf(buf + len, buf_len - len, "%30s\n", 7801 "ath12k PDEV stats"); 7802 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7803 "================="); 7804 7805 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7806 "Channel noise floor", pdev->ch_noise_floor); 7807 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7808 "Channel TX power", pdev->chan_tx_power); 7809 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7810 "TX frame count", pdev->tx_frame_count); 7811 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7812 "RX frame count", pdev->rx_frame_count); 7813 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7814 "RX clear count", pdev->rx_clear_count); 7815 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7816 "Cycle count", pdev->cycle_count); 7817 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7818 "PHY error count", pdev->phy_err_count); 7819 len += scnprintf(buf + len, buf_len - len, "%30s %10llu\n", 7820 "soc drop count", fw_soc_drop_cnt); 7821 7822 *length = len; 7823 } 7824 7825 static void 7826 ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 7827 char *buf, u32 *length) 7828 { 7829 u32 len = *length; 7830 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7831 7832 len += scnprintf(buf + len, buf_len - len, "\n%30s\n", 7833 "ath12k PDEV TX stats"); 7834 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7835 "===================="); 7836 7837 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7838 "HTT cookies queued", pdev->comp_queued); 7839 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7840 "HTT cookies disp.", pdev->comp_delivered); 7841 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7842 "MSDU queued", pdev->msdu_enqued); 7843 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7844 "MPDU queued", pdev->mpdu_enqued); 7845 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7846 "MSDUs dropped", pdev->wmm_drop); 7847 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7848 "Local enqued", pdev->local_enqued); 7849 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7850 "Local freed", pdev->local_freed); 7851 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7852 "HW queued", pdev->hw_queued); 7853 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7854 "PPDUs reaped", pdev->hw_reaped); 7855 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7856 "Num underruns", pdev->underrun); 7857 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7858 "PPDUs cleaned", pdev->tx_abort); 7859 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7860 "MPDUs requeued", pdev->mpdus_requed); 7861 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7862 "Excessive retries", pdev->tx_ko); 7863 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7864 "HW rate", pdev->data_rc); 7865 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7866 "Sched self triggers", pdev->self_triggers); 7867 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7868 "Dropped due to SW retries", 7869 pdev->sw_retry_failure); 7870 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7871 "Illegal rate phy errors", 7872 pdev->illgl_rate_phy_err); 7873 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7874 "PDEV continuous xretry", pdev->pdev_cont_xretry); 7875 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7876 "TX timeout", pdev->pdev_tx_timeout); 7877 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7878 "PDEV resets", pdev->pdev_resets); 7879 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7880 "Stateless TIDs alloc failures", 7881 pdev->stateless_tid_alloc_failure); 7882 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7883 "PHY underrun", pdev->phy_underrun); 7884 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7885 "MPDU is more than txop limit", pdev->txop_ovf); 7886 *length = len; 7887 } 7888 7889 static void 7890 ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 7891 char *buf, u32 *length) 7892 { 7893 u32 len = *length; 7894 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7895 7896 len += scnprintf(buf + len, buf_len - len, "\n%30s\n", 7897 "ath12k PDEV RX stats"); 7898 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7899 "===================="); 7900 7901 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7902 "Mid PPDU route change", 7903 pdev->mid_ppdu_route_change); 7904 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7905 "Tot. number of statuses", pdev->status_rcvd); 7906 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7907 "Extra frags on rings 0", pdev->r0_frags); 7908 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7909 "Extra frags on rings 1", pdev->r1_frags); 7910 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7911 "Extra frags on rings 2", pdev->r2_frags); 7912 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7913 "Extra frags on rings 3", pdev->r3_frags); 7914 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7915 "MSDUs delivered to HTT", pdev->htt_msdus); 7916 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7917 "MPDUs delivered to HTT", pdev->htt_mpdus); 7918 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7919 "MSDUs delivered to stack", pdev->loc_msdus); 7920 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7921 "MPDUs delivered to stack", pdev->loc_mpdus); 7922 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7923 "Oversized AMSUs", pdev->oversize_amsdu); 7924 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7925 "PHY errors", pdev->phy_errs); 7926 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7927 "PHY errors drops", pdev->phy_err_drop); 7928 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7929 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs); 7930 *length = len; 7931 } 7932 7933 static void 7934 ath12k_wmi_fw_pdev_stats_dump(struct ath12k *ar, 7935 struct ath12k_fw_stats *fw_stats, 7936 char *buf, u32 *length) 7937 { 7938 const struct ath12k_fw_stats_pdev *pdev; 7939 u32 len = *length; 7940 7941 pdev = list_first_entry_or_null(&fw_stats->pdevs, 7942 struct ath12k_fw_stats_pdev, list); 7943 if (!pdev) { 7944 ath12k_warn(ar->ab, "failed to get pdev stats\n"); 7945 return; 7946 } 7947 7948 ath12k_wmi_fw_pdev_base_stats_dump(pdev, buf, &len, 7949 ar->ab->fw_soc_drop_count); 7950 ath12k_wmi_fw_pdev_tx_stats_dump(pdev, buf, &len); 7951 ath12k_wmi_fw_pdev_rx_stats_dump(pdev, buf, &len); 7952 7953 *length = len; 7954 } 7955 7956 void ath12k_wmi_fw_stats_dump(struct ath12k *ar, 7957 struct ath12k_fw_stats *fw_stats, 7958 u32 stats_id, char *buf) 7959 { 7960 u32 len = 0; 7961 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7962 7963 spin_lock_bh(&ar->data_lock); 7964 7965 switch (stats_id) { 7966 case WMI_REQUEST_VDEV_STAT: 7967 ath12k_wmi_fw_vdev_stats_dump(ar, fw_stats, buf, &len); 7968 break; 7969 case WMI_REQUEST_BCN_STAT: 7970 ath12k_wmi_fw_bcn_stats_dump(ar, fw_stats, buf, &len); 7971 break; 7972 case WMI_REQUEST_PDEV_STAT: 7973 ath12k_wmi_fw_pdev_stats_dump(ar, fw_stats, buf, &len); 7974 break; 7975 default: 7976 break; 7977 } 7978 7979 spin_unlock_bh(&ar->data_lock); 7980 7981 if (len >= buf_len) 7982 buf[len - 1] = 0; 7983 else 7984 buf[len] = 0; 7985 7986 ath12k_fw_stats_reset(ar); 7987 } 7988 7989 static void 7990 ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params *src, 7991 struct ath12k_fw_stats_vdev *dst) 7992 { 7993 int i; 7994 7995 dst->vdev_id = le32_to_cpu(src->vdev_id); 7996 dst->beacon_snr = le32_to_cpu(src->beacon_snr); 7997 dst->data_snr = le32_to_cpu(src->data_snr); 7998 dst->num_rx_frames = le32_to_cpu(src->num_rx_frames); 7999 dst->num_rts_fail = le32_to_cpu(src->num_rts_fail); 8000 dst->num_rts_success = le32_to_cpu(src->num_rts_success); 8001 dst->num_rx_err = le32_to_cpu(src->num_rx_err); 8002 dst->num_rx_discard = le32_to_cpu(src->num_rx_discard); 8003 dst->num_tx_not_acked = le32_to_cpu(src->num_tx_not_acked); 8004 8005 for (i = 0; i < WLAN_MAX_AC; i++) 8006 dst->num_tx_frames[i] = 8007 le32_to_cpu(src->num_tx_frames[i]); 8008 8009 for (i = 0; i < WLAN_MAX_AC; i++) 8010 dst->num_tx_frames_retries[i] = 8011 le32_to_cpu(src->num_tx_frames_retries[i]); 8012 8013 for (i = 0; i < WLAN_MAX_AC; i++) 8014 dst->num_tx_frames_failures[i] = 8015 le32_to_cpu(src->num_tx_frames_failures[i]); 8016 8017 for (i = 0; i < MAX_TX_RATE_VALUES; i++) 8018 dst->tx_rate_history[i] = 8019 le32_to_cpu(src->tx_rate_history[i]); 8020 8021 for (i = 0; i < MAX_TX_RATE_VALUES; i++) 8022 dst->beacon_rssi_history[i] = 8023 le32_to_cpu(src->beacon_rssi_history[i]); 8024 } 8025 8026 static void 8027 ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params *src, 8028 struct ath12k_fw_stats_bcn *dst) 8029 { 8030 dst->vdev_id = le32_to_cpu(src->vdev_id); 8031 dst->tx_bcn_succ_cnt = le32_to_cpu(src->tx_bcn_succ_cnt); 8032 dst->tx_bcn_outage_cnt = le32_to_cpu(src->tx_bcn_outage_cnt); 8033 } 8034 8035 static void 8036 ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params *src, 8037 struct ath12k_fw_stats_pdev *dst) 8038 { 8039 dst->ch_noise_floor = a_sle32_to_cpu(src->chan_nf); 8040 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); 8041 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); 8042 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); 8043 dst->cycle_count = __le32_to_cpu(src->cycle_count); 8044 dst->phy_err_count = __le32_to_cpu(src->phy_err_count); 8045 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); 8046 } 8047 8048 static void 8049 ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params *src, 8050 struct ath12k_fw_stats_pdev *dst) 8051 { 8052 dst->comp_queued = a_sle32_to_cpu(src->comp_queued); 8053 dst->comp_delivered = a_sle32_to_cpu(src->comp_delivered); 8054 dst->msdu_enqued = a_sle32_to_cpu(src->msdu_enqued); 8055 dst->mpdu_enqued = a_sle32_to_cpu(src->mpdu_enqued); 8056 dst->wmm_drop = a_sle32_to_cpu(src->wmm_drop); 8057 dst->local_enqued = a_sle32_to_cpu(src->local_enqued); 8058 dst->local_freed = a_sle32_to_cpu(src->local_freed); 8059 dst->hw_queued = a_sle32_to_cpu(src->hw_queued); 8060 dst->hw_reaped = a_sle32_to_cpu(src->hw_reaped); 8061 dst->underrun = a_sle32_to_cpu(src->underrun); 8062 dst->tx_abort = a_sle32_to_cpu(src->tx_abort); 8063 dst->mpdus_requed = a_sle32_to_cpu(src->mpdus_requed); 8064 dst->tx_ko = __le32_to_cpu(src->tx_ko); 8065 dst->data_rc = __le32_to_cpu(src->data_rc); 8066 dst->self_triggers = __le32_to_cpu(src->self_triggers); 8067 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); 8068 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); 8069 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); 8070 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); 8071 dst->pdev_resets = __le32_to_cpu(src->pdev_resets); 8072 dst->stateless_tid_alloc_failure = 8073 __le32_to_cpu(src->stateless_tid_alloc_failure); 8074 dst->phy_underrun = __le32_to_cpu(src->phy_underrun); 8075 dst->txop_ovf = __le32_to_cpu(src->txop_ovf); 8076 } 8077 8078 static void 8079 ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params *src, 8080 struct ath12k_fw_stats_pdev *dst) 8081 { 8082 dst->mid_ppdu_route_change = 8083 a_sle32_to_cpu(src->mid_ppdu_route_change); 8084 dst->status_rcvd = a_sle32_to_cpu(src->status_rcvd); 8085 dst->r0_frags = a_sle32_to_cpu(src->r0_frags); 8086 dst->r1_frags = a_sle32_to_cpu(src->r1_frags); 8087 dst->r2_frags = a_sle32_to_cpu(src->r2_frags); 8088 dst->r3_frags = a_sle32_to_cpu(src->r3_frags); 8089 dst->htt_msdus = a_sle32_to_cpu(src->htt_msdus); 8090 dst->htt_mpdus = a_sle32_to_cpu(src->htt_mpdus); 8091 dst->loc_msdus = a_sle32_to_cpu(src->loc_msdus); 8092 dst->loc_mpdus = a_sle32_to_cpu(src->loc_mpdus); 8093 dst->oversize_amsdu = a_sle32_to_cpu(src->oversize_amsdu); 8094 dst->phy_errs = a_sle32_to_cpu(src->phy_errs); 8095 dst->phy_err_drop = a_sle32_to_cpu(src->phy_err_drop); 8096 dst->mpdu_errs = a_sle32_to_cpu(src->mpdu_errs); 8097 } 8098 8099 static int ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base *ab, 8100 struct wmi_tlv_fw_stats_parse *parse, 8101 const void *ptr, 8102 u16 len) 8103 { 8104 const struct wmi_stats_event *ev = parse->ev; 8105 struct ath12k_fw_stats *stats = parse->stats; 8106 struct ath12k *ar; 8107 struct ath12k_link_vif *arvif; 8108 struct ieee80211_sta *sta; 8109 struct ath12k_sta *ahsta; 8110 struct ath12k_link_sta *arsta; 8111 int i, ret = 0; 8112 const void *data = ptr; 8113 8114 if (!ev) { 8115 ath12k_warn(ab, "failed to fetch update stats ev"); 8116 return -EPROTO; 8117 } 8118 8119 if (!stats) 8120 return -EINVAL; 8121 8122 rcu_read_lock(); 8123 8124 stats->pdev_id = le32_to_cpu(ev->pdev_id); 8125 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id); 8126 if (!ar) { 8127 ath12k_warn(ab, "invalid pdev id %d in update stats event\n", 8128 le32_to_cpu(ev->pdev_id)); 8129 ret = -EPROTO; 8130 goto exit; 8131 } 8132 8133 for (i = 0; i < le32_to_cpu(ev->num_vdev_stats); i++) { 8134 const struct wmi_vdev_stats_params *src; 8135 struct ath12k_fw_stats_vdev *dst; 8136 8137 src = data; 8138 if (len < sizeof(*src)) { 8139 ret = -EPROTO; 8140 goto exit; 8141 } 8142 8143 arvif = ath12k_mac_get_arvif(ar, le32_to_cpu(src->vdev_id)); 8144 if (arvif) { 8145 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar), 8146 arvif->bssid, 8147 NULL); 8148 if (sta) { 8149 ahsta = ath12k_sta_to_ahsta(sta); 8150 arsta = &ahsta->deflink; 8151 arsta->rssi_beacon = le32_to_cpu(src->beacon_snr); 8152 ath12k_dbg(ab, ATH12K_DBG_WMI, 8153 "wmi stats vdev id %d snr %d\n", 8154 src->vdev_id, src->beacon_snr); 8155 } else { 8156 ath12k_dbg(ab, ATH12K_DBG_WMI, 8157 "not found station bssid %pM for vdev stat\n", 8158 arvif->bssid); 8159 } 8160 } 8161 8162 data += sizeof(*src); 8163 len -= sizeof(*src); 8164 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 8165 if (!dst) 8166 continue; 8167 ath12k_wmi_pull_vdev_stats(src, dst); 8168 stats->stats_id = WMI_REQUEST_VDEV_STAT; 8169 list_add_tail(&dst->list, &stats->vdevs); 8170 } 8171 for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) { 8172 const struct ath12k_wmi_bcn_stats_params *src; 8173 struct ath12k_fw_stats_bcn *dst; 8174 8175 src = data; 8176 if (len < sizeof(*src)) { 8177 ret = -EPROTO; 8178 goto exit; 8179 } 8180 8181 data += sizeof(*src); 8182 len -= sizeof(*src); 8183 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 8184 if (!dst) 8185 continue; 8186 ath12k_wmi_pull_bcn_stats(src, dst); 8187 stats->stats_id = WMI_REQUEST_BCN_STAT; 8188 list_add_tail(&dst->list, &stats->bcn); 8189 } 8190 for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) { 8191 const struct ath12k_wmi_pdev_stats_params *src; 8192 struct ath12k_fw_stats_pdev *dst; 8193 8194 src = data; 8195 if (len < sizeof(*src)) { 8196 ret = -EPROTO; 8197 goto exit; 8198 } 8199 8200 stats->stats_id = WMI_REQUEST_PDEV_STAT; 8201 8202 data += sizeof(*src); 8203 len -= sizeof(*src); 8204 8205 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 8206 if (!dst) 8207 continue; 8208 8209 ath12k_wmi_pull_pdev_stats_base(&src->base, dst); 8210 ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst); 8211 ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst); 8212 list_add_tail(&dst->list, &stats->pdevs); 8213 } 8214 8215 exit: 8216 rcu_read_unlock(); 8217 return ret; 8218 } 8219 8220 static int ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base *ab, 8221 u16 tag, u16 len, 8222 const void *ptr, void *data) 8223 { 8224 struct wmi_tlv_fw_stats_parse *parse = data; 8225 int ret = 0; 8226 8227 switch (tag) { 8228 case WMI_TAG_STATS_EVENT: 8229 parse->ev = ptr; 8230 break; 8231 case WMI_TAG_ARRAY_BYTE: 8232 ret = ath12k_wmi_tlv_fw_stats_data_parse(ab, parse, ptr, len); 8233 break; 8234 default: 8235 break; 8236 } 8237 return ret; 8238 } 8239 8240 static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb, 8241 struct ath12k_fw_stats *stats) 8242 { 8243 struct wmi_tlv_fw_stats_parse parse = {}; 8244 8245 stats->stats_id = 0; 8246 parse.stats = stats; 8247 8248 return ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 8249 ath12k_wmi_tlv_fw_stats_parse, 8250 &parse); 8251 } 8252 8253 static void ath12k_wmi_fw_stats_process(struct ath12k *ar, 8254 struct ath12k_fw_stats *stats) 8255 { 8256 struct ath12k_base *ab = ar->ab; 8257 struct ath12k_pdev *pdev; 8258 bool is_end = true; 8259 size_t total_vdevs_started = 0; 8260 int i; 8261 8262 if (stats->stats_id == WMI_REQUEST_VDEV_STAT) { 8263 if (list_empty(&stats->vdevs)) { 8264 ath12k_warn(ab, "empty vdev stats"); 8265 return; 8266 } 8267 /* FW sends all the active VDEV stats irrespective of PDEV, 8268 * hence limit until the count of all VDEVs started 8269 */ 8270 rcu_read_lock(); 8271 for (i = 0; i < ab->num_radios; i++) { 8272 pdev = rcu_dereference(ab->pdevs_active[i]); 8273 if (pdev && pdev->ar) 8274 total_vdevs_started += pdev->ar->num_started_vdevs; 8275 } 8276 rcu_read_unlock(); 8277 8278 if (total_vdevs_started) 8279 is_end = ((++ar->fw_stats.num_vdev_recvd) == 8280 total_vdevs_started); 8281 8282 list_splice_tail_init(&stats->vdevs, 8283 &ar->fw_stats.vdevs); 8284 8285 if (is_end) 8286 complete(&ar->fw_stats_done); 8287 8288 return; 8289 } 8290 8291 if (stats->stats_id == WMI_REQUEST_BCN_STAT) { 8292 if (list_empty(&stats->bcn)) { 8293 ath12k_warn(ab, "empty beacon stats"); 8294 return; 8295 } 8296 /* Mark end until we reached the count of all started VDEVs 8297 * within the PDEV 8298 */ 8299 if (ar->num_started_vdevs) 8300 is_end = ((++ar->fw_stats.num_bcn_recvd) == 8301 ar->num_started_vdevs); 8302 8303 list_splice_tail_init(&stats->bcn, 8304 &ar->fw_stats.bcn); 8305 8306 if (is_end) 8307 complete(&ar->fw_stats_done); 8308 } 8309 } 8310 8311 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 8312 { 8313 struct ath12k_fw_stats stats = {}; 8314 struct ath12k *ar; 8315 int ret; 8316 8317 INIT_LIST_HEAD(&stats.pdevs); 8318 INIT_LIST_HEAD(&stats.vdevs); 8319 INIT_LIST_HEAD(&stats.bcn); 8320 8321 ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats); 8322 if (ret) { 8323 ath12k_warn(ab, "failed to pull fw stats: %d\n", ret); 8324 goto free; 8325 } 8326 8327 ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats"); 8328 8329 rcu_read_lock(); 8330 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id); 8331 if (!ar) { 8332 rcu_read_unlock(); 8333 ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n", 8334 stats.pdev_id, ret); 8335 goto free; 8336 } 8337 8338 spin_lock_bh(&ar->data_lock); 8339 8340 /* Handle WMI_REQUEST_PDEV_STAT status update */ 8341 if (stats.stats_id == WMI_REQUEST_PDEV_STAT) { 8342 list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs); 8343 complete(&ar->fw_stats_done); 8344 goto complete; 8345 } 8346 8347 /* Handle WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT updates. */ 8348 ath12k_wmi_fw_stats_process(ar, &stats); 8349 8350 complete: 8351 complete(&ar->fw_stats_complete); 8352 spin_unlock_bh(&ar->data_lock); 8353 rcu_read_unlock(); 8354 8355 /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised 8356 * at this point, no need to free the individual list. 8357 */ 8358 return; 8359 8360 free: 8361 ath12k_fw_stats_free(&stats); 8362 } 8363 8364 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 8365 * is not part of BDF CTL(Conformance test limits) table entries. 8366 */ 8367 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 8368 struct sk_buff *skb) 8369 { 8370 const void **tb; 8371 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 8372 int ret; 8373 8374 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8375 if (IS_ERR(tb)) { 8376 ret = PTR_ERR(tb); 8377 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8378 return; 8379 } 8380 8381 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 8382 if (!ev) { 8383 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 8384 kfree(tb); 8385 return; 8386 } 8387 8388 ath12k_dbg(ab, ATH12K_DBG_WMI, 8389 "pdev ctl failsafe check ev status %d\n", 8390 ev->ctl_failsafe_status); 8391 8392 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 8393 * to 10 dBm else the CTL power entry in the BDF would be picked up. 8394 */ 8395 if (ev->ctl_failsafe_status != 0) 8396 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 8397 ev->ctl_failsafe_status); 8398 8399 kfree(tb); 8400 } 8401 8402 static void 8403 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 8404 const struct ath12k_wmi_pdev_csa_event *ev, 8405 const u32 *vdev_ids) 8406 { 8407 u32 current_switch_count = le32_to_cpu(ev->current_switch_count); 8408 u32 num_vdevs = le32_to_cpu(ev->num_vdevs); 8409 struct ieee80211_bss_conf *conf; 8410 struct ath12k_link_vif *arvif; 8411 struct ath12k_vif *ahvif; 8412 int i; 8413 8414 rcu_read_lock(); 8415 for (i = 0; i < num_vdevs; i++) { 8416 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 8417 8418 if (!arvif) { 8419 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 8420 vdev_ids[i]); 8421 continue; 8422 } 8423 ahvif = arvif->ahvif; 8424 8425 if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) { 8426 ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n", 8427 arvif->link_id); 8428 continue; 8429 } 8430 8431 conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]); 8432 if (!conf) { 8433 ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n", 8434 ahvif->vif->addr, arvif->link_id); 8435 continue; 8436 } 8437 8438 if (!arvif->is_up || !conf->csa_active) 8439 continue; 8440 8441 /* Finish CSA when counter reaches zero */ 8442 if (!current_switch_count) { 8443 ieee80211_csa_finish(ahvif->vif, arvif->link_id); 8444 arvif->current_cntdown_counter = 0; 8445 } else if (current_switch_count > 1) { 8446 /* If the count in event is not what we expect, don't update the 8447 * mac80211 count. Since during beacon Tx failure, count in the 8448 * firmware will not decrement and this event will come with the 8449 * previous count value again 8450 */ 8451 if (current_switch_count != arvif->current_cntdown_counter) 8452 continue; 8453 8454 arvif->current_cntdown_counter = 8455 ieee80211_beacon_update_cntdwn(ahvif->vif, 8456 arvif->link_id); 8457 } 8458 } 8459 rcu_read_unlock(); 8460 } 8461 8462 static void 8463 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 8464 struct sk_buff *skb) 8465 { 8466 const void **tb; 8467 const struct ath12k_wmi_pdev_csa_event *ev; 8468 const u32 *vdev_ids; 8469 int ret; 8470 8471 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8472 if (IS_ERR(tb)) { 8473 ret = PTR_ERR(tb); 8474 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8475 return; 8476 } 8477 8478 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 8479 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 8480 8481 if (!ev || !vdev_ids) { 8482 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 8483 kfree(tb); 8484 return; 8485 } 8486 8487 ath12k_dbg(ab, ATH12K_DBG_WMI, 8488 "pdev csa switch count %d for pdev %d, num_vdevs %d", 8489 ev->current_switch_count, ev->pdev_id, 8490 ev->num_vdevs); 8491 8492 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 8493 8494 kfree(tb); 8495 } 8496 8497 static void 8498 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 8499 { 8500 const void **tb; 8501 struct ath12k_mac_get_any_chanctx_conf_arg arg; 8502 const struct ath12k_wmi_pdev_radar_event *ev; 8503 struct ath12k *ar; 8504 int ret; 8505 8506 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8507 if (IS_ERR(tb)) { 8508 ret = PTR_ERR(tb); 8509 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8510 return; 8511 } 8512 8513 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 8514 8515 if (!ev) { 8516 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 8517 kfree(tb); 8518 return; 8519 } 8520 8521 ath12k_dbg(ab, ATH12K_DBG_WMI, 8522 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 8523 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 8524 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 8525 ev->freq_offset, ev->sidx); 8526 8527 rcu_read_lock(); 8528 8529 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 8530 8531 if (!ar) { 8532 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 8533 ev->pdev_id); 8534 goto exit; 8535 } 8536 8537 arg.ar = ar; 8538 arg.chanctx_conf = NULL; 8539 ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar), 8540 ath12k_mac_get_any_chanctx_conf_iter, &arg); 8541 if (!arg.chanctx_conf) { 8542 ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n"); 8543 goto exit; 8544 } 8545 8546 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 8547 ev->pdev_id); 8548 8549 if (ar->dfs_block_radar_events) 8550 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 8551 else 8552 ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf); 8553 8554 exit: 8555 rcu_read_unlock(); 8556 8557 kfree(tb); 8558 } 8559 8560 static void ath12k_tm_wmi_event_segmented(struct ath12k_base *ab, u32 cmd_id, 8561 struct sk_buff *skb) 8562 { 8563 const struct ath12k_wmi_ftm_event *ev; 8564 const void **tb; 8565 int ret; 8566 u16 length; 8567 8568 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8569 8570 if (IS_ERR(tb)) { 8571 ret = PTR_ERR(tb); 8572 ath12k_warn(ab, "failed to parse ftm event tlv: %d\n", ret); 8573 return; 8574 } 8575 8576 ev = tb[WMI_TAG_ARRAY_BYTE]; 8577 if (!ev) { 8578 ath12k_warn(ab, "failed to fetch ftm msg\n"); 8579 kfree(tb); 8580 return; 8581 } 8582 8583 length = skb->len - TLV_HDR_SIZE; 8584 ath12k_tm_process_event(ab, cmd_id, ev, length); 8585 kfree(tb); 8586 tb = NULL; 8587 } 8588 8589 static void 8590 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 8591 struct sk_buff *skb) 8592 { 8593 struct ath12k *ar; 8594 struct wmi_pdev_temperature_event ev = {0}; 8595 8596 if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) { 8597 ath12k_warn(ab, "failed to extract pdev temperature event"); 8598 return; 8599 } 8600 8601 ath12k_dbg(ab, ATH12K_DBG_WMI, 8602 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 8603 8604 rcu_read_lock(); 8605 8606 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id)); 8607 if (!ar) { 8608 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 8609 goto exit; 8610 } 8611 8612 exit: 8613 rcu_read_unlock(); 8614 } 8615 8616 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 8617 struct sk_buff *skb) 8618 { 8619 const void **tb; 8620 const struct wmi_fils_discovery_event *ev; 8621 int ret; 8622 8623 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8624 if (IS_ERR(tb)) { 8625 ret = PTR_ERR(tb); 8626 ath12k_warn(ab, 8627 "failed to parse FILS discovery event tlv %d\n", 8628 ret); 8629 return; 8630 } 8631 8632 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 8633 if (!ev) { 8634 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 8635 kfree(tb); 8636 return; 8637 } 8638 8639 ath12k_warn(ab, 8640 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 8641 ev->vdev_id, ev->fils_tt, ev->tbtt); 8642 8643 kfree(tb); 8644 } 8645 8646 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 8647 struct sk_buff *skb) 8648 { 8649 const void **tb; 8650 const struct wmi_probe_resp_tx_status_event *ev; 8651 int ret; 8652 8653 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8654 if (IS_ERR(tb)) { 8655 ret = PTR_ERR(tb); 8656 ath12k_warn(ab, 8657 "failed to parse probe response transmission status event tlv: %d\n", 8658 ret); 8659 return; 8660 } 8661 8662 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 8663 if (!ev) { 8664 ath12k_warn(ab, 8665 "failed to fetch probe response transmission status event"); 8666 kfree(tb); 8667 return; 8668 } 8669 8670 if (ev->tx_status) 8671 ath12k_warn(ab, 8672 "Probe response transmission failed for vdev_id %u, status %u\n", 8673 ev->vdev_id, ev->tx_status); 8674 8675 kfree(tb); 8676 } 8677 8678 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab, 8679 struct sk_buff *skb) 8680 { 8681 const void **tb; 8682 const struct wmi_p2p_noa_event *ev; 8683 const struct ath12k_wmi_p2p_noa_info *noa; 8684 struct ath12k *ar; 8685 int ret, vdev_id; 8686 8687 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8688 if (IS_ERR(tb)) { 8689 ret = PTR_ERR(tb); 8690 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret); 8691 return ret; 8692 } 8693 8694 ev = tb[WMI_TAG_P2P_NOA_EVENT]; 8695 noa = tb[WMI_TAG_P2P_NOA_INFO]; 8696 8697 if (!ev || !noa) { 8698 ret = -EPROTO; 8699 goto out; 8700 } 8701 8702 vdev_id = __le32_to_cpu(ev->vdev_id); 8703 8704 ath12k_dbg(ab, ATH12K_DBG_WMI, 8705 "wmi tlv p2p noa vdev_id %i descriptors %u\n", 8706 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM)); 8707 8708 rcu_read_lock(); 8709 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 8710 if (!ar) { 8711 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n", 8712 vdev_id); 8713 ret = -EINVAL; 8714 goto unlock; 8715 } 8716 8717 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa); 8718 8719 ret = 0; 8720 8721 unlock: 8722 rcu_read_unlock(); 8723 out: 8724 kfree(tb); 8725 return ret; 8726 } 8727 8728 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab, 8729 struct sk_buff *skb) 8730 { 8731 const struct wmi_rfkill_state_change_event *ev; 8732 const void **tb; 8733 int ret; 8734 8735 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8736 if (IS_ERR(tb)) { 8737 ret = PTR_ERR(tb); 8738 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8739 return; 8740 } 8741 8742 ev = tb[WMI_TAG_RFKILL_EVENT]; 8743 if (!ev) { 8744 kfree(tb); 8745 return; 8746 } 8747 8748 ath12k_dbg(ab, ATH12K_DBG_MAC, 8749 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n", 8750 le32_to_cpu(ev->gpio_pin_num), 8751 le32_to_cpu(ev->int_type), 8752 le32_to_cpu(ev->radio_state)); 8753 8754 spin_lock_bh(&ab->base_lock); 8755 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON)); 8756 spin_unlock_bh(&ab->base_lock); 8757 8758 queue_work(ab->workqueue, &ab->rfkill_work); 8759 kfree(tb); 8760 } 8761 8762 static void 8763 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb) 8764 { 8765 trace_ath12k_wmi_diag(ab, skb->data, skb->len); 8766 } 8767 8768 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab, 8769 struct sk_buff *skb) 8770 { 8771 const void **tb; 8772 const struct wmi_twt_enable_event *ev; 8773 int ret; 8774 8775 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8776 if (IS_ERR(tb)) { 8777 ret = PTR_ERR(tb); 8778 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n", 8779 ret); 8780 return; 8781 } 8782 8783 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT]; 8784 if (!ev) { 8785 ath12k_warn(ab, "failed to fetch twt enable wmi event\n"); 8786 goto exit; 8787 } 8788 8789 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n", 8790 le32_to_cpu(ev->pdev_id), 8791 le32_to_cpu(ev->status)); 8792 8793 exit: 8794 kfree(tb); 8795 } 8796 8797 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab, 8798 struct sk_buff *skb) 8799 { 8800 const void **tb; 8801 const struct wmi_twt_disable_event *ev; 8802 int ret; 8803 8804 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8805 if (IS_ERR(tb)) { 8806 ret = PTR_ERR(tb); 8807 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n", 8808 ret); 8809 return; 8810 } 8811 8812 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT]; 8813 if (!ev) { 8814 ath12k_warn(ab, "failed to fetch twt disable wmi event\n"); 8815 goto exit; 8816 } 8817 8818 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n", 8819 le32_to_cpu(ev->pdev_id), 8820 le32_to_cpu(ev->status)); 8821 8822 exit: 8823 kfree(tb); 8824 } 8825 8826 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab, 8827 u16 tag, u16 len, 8828 const void *ptr, void *data) 8829 { 8830 const struct wmi_wow_ev_pg_fault_param *pf_param; 8831 const struct wmi_wow_ev_param *param; 8832 struct wmi_wow_ev_arg *arg = data; 8833 int pf_len; 8834 8835 switch (tag) { 8836 case WMI_TAG_WOW_EVENT_INFO: 8837 param = ptr; 8838 arg->wake_reason = le32_to_cpu(param->wake_reason); 8839 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n", 8840 arg->wake_reason, wow_reason(arg->wake_reason)); 8841 break; 8842 8843 case WMI_TAG_ARRAY_BYTE: 8844 if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) { 8845 pf_param = ptr; 8846 pf_len = le32_to_cpu(pf_param->len); 8847 if (pf_len > len - sizeof(pf_len) || 8848 pf_len < 0) { 8849 ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n", 8850 pf_len); 8851 return -EINVAL; 8852 } 8853 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n", 8854 pf_len); 8855 ath12k_dbg_dump(ab, ATH12K_DBG_WMI, 8856 "wow_reason_page_fault packet present", 8857 "wow_pg_fault ", 8858 pf_param->data, 8859 pf_len); 8860 } 8861 break; 8862 default: 8863 break; 8864 } 8865 8866 return 0; 8867 } 8868 8869 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb) 8870 { 8871 struct wmi_wow_ev_arg arg = { }; 8872 int ret; 8873 8874 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 8875 ath12k_wmi_wow_wakeup_host_parse, 8876 &arg); 8877 if (ret) { 8878 ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n", 8879 ret); 8880 return; 8881 } 8882 8883 complete(&ab->wow.wakeup_completed); 8884 } 8885 8886 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab, 8887 struct sk_buff *skb) 8888 { 8889 const struct wmi_gtk_offload_status_event *ev; 8890 struct ath12k_link_vif *arvif; 8891 __be64 replay_ctr_be; 8892 u64 replay_ctr; 8893 const void **tb; 8894 int ret; 8895 8896 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8897 if (IS_ERR(tb)) { 8898 ret = PTR_ERR(tb); 8899 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8900 return; 8901 } 8902 8903 ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT]; 8904 if (!ev) { 8905 ath12k_warn(ab, "failed to fetch gtk offload status ev"); 8906 kfree(tb); 8907 return; 8908 } 8909 8910 rcu_read_lock(); 8911 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id)); 8912 if (!arvif) { 8913 rcu_read_unlock(); 8914 ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n", 8915 le32_to_cpu(ev->vdev_id)); 8916 kfree(tb); 8917 return; 8918 } 8919 8920 replay_ctr = le64_to_cpu(ev->replay_ctr); 8921 arvif->rekey_data.replay_ctr = replay_ctr; 8922 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n", 8923 le32_to_cpu(ev->refresh_cnt), replay_ctr); 8924 8925 /* supplicant expects big-endian replay counter */ 8926 replay_ctr_be = cpu_to_be64(replay_ctr); 8927 8928 ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid, 8929 (void *)&replay_ctr_be, GFP_ATOMIC); 8930 8931 rcu_read_unlock(); 8932 8933 kfree(tb); 8934 } 8935 8936 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab, 8937 struct sk_buff *skb) 8938 { 8939 const struct wmi_mlo_setup_complete_event *ev; 8940 struct ath12k *ar = NULL; 8941 struct ath12k_pdev *pdev; 8942 const void **tb; 8943 int ret, i; 8944 8945 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8946 if (IS_ERR(tb)) { 8947 ret = PTR_ERR(tb); 8948 ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n", 8949 ret); 8950 return; 8951 } 8952 8953 ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT]; 8954 if (!ev) { 8955 ath12k_warn(ab, "failed to fetch mlo setup complete event\n"); 8956 kfree(tb); 8957 return; 8958 } 8959 8960 if (le32_to_cpu(ev->pdev_id) > ab->num_radios) 8961 goto skip_lookup; 8962 8963 for (i = 0; i < ab->num_radios; i++) { 8964 pdev = &ab->pdevs[i]; 8965 if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) { 8966 ar = pdev->ar; 8967 break; 8968 } 8969 } 8970 8971 skip_lookup: 8972 if (!ar) { 8973 ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n", 8974 ev->pdev_id, ev->status); 8975 goto out; 8976 } 8977 8978 ar->mlo_setup_status = le32_to_cpu(ev->status); 8979 complete(&ar->mlo_setup_done); 8980 8981 out: 8982 kfree(tb); 8983 } 8984 8985 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab, 8986 struct sk_buff *skb) 8987 { 8988 const struct wmi_mlo_teardown_complete_event *ev; 8989 const void **tb; 8990 int ret; 8991 8992 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8993 if (IS_ERR(tb)) { 8994 ret = PTR_ERR(tb); 8995 ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret); 8996 return; 8997 } 8998 8999 ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE]; 9000 if (!ev) { 9001 ath12k_warn(ab, "failed to fetch teardown complete event\n"); 9002 kfree(tb); 9003 return; 9004 } 9005 9006 kfree(tb); 9007 } 9008 9009 #ifdef CONFIG_ATH12K_DEBUGFS 9010 static int ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base *ab, 9011 const void *ptr, u16 tag, u16 len, 9012 struct wmi_tpc_stats_arg *tpc_stats) 9013 { 9014 u32 len1, len2, len3, len4; 9015 s16 *dst_ptr; 9016 s8 *dst_ptr_ctl; 9017 9018 len1 = le32_to_cpu(tpc_stats->max_reg_allowed_power.tpc_reg_pwr.reg_array_len); 9019 len2 = le32_to_cpu(tpc_stats->rates_array1.tpc_rates_array.rate_array_len); 9020 len3 = le32_to_cpu(tpc_stats->rates_array2.tpc_rates_array.rate_array_len); 9021 len4 = le32_to_cpu(tpc_stats->ctl_array.tpc_ctl_pwr.ctl_array_len); 9022 9023 switch (tpc_stats->event_count) { 9024 case ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT: 9025 if (len1 > len) 9026 return -ENOBUFS; 9027 9028 if (tpc_stats->tlvs_rcvd & WMI_TPC_REG_PWR_ALLOWED) { 9029 dst_ptr = tpc_stats->max_reg_allowed_power.reg_pwr_array; 9030 memcpy(dst_ptr, ptr, len1); 9031 } 9032 break; 9033 case ATH12K_TPC_STATS_RATES_EVENT1: 9034 if (len2 > len) 9035 return -ENOBUFS; 9036 9037 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY1) { 9038 dst_ptr = tpc_stats->rates_array1.rate_array; 9039 memcpy(dst_ptr, ptr, len2); 9040 } 9041 break; 9042 case ATH12K_TPC_STATS_RATES_EVENT2: 9043 if (len3 > len) 9044 return -ENOBUFS; 9045 9046 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY2) { 9047 dst_ptr = tpc_stats->rates_array2.rate_array; 9048 memcpy(dst_ptr, ptr, len3); 9049 } 9050 break; 9051 case ATH12K_TPC_STATS_CTL_TABLE_EVENT: 9052 if (len4 > len) 9053 return -ENOBUFS; 9054 9055 if (tpc_stats->tlvs_rcvd & WMI_TPC_CTL_PWR_ARRAY) { 9056 dst_ptr_ctl = tpc_stats->ctl_array.ctl_pwr_table; 9057 memcpy(dst_ptr_ctl, ptr, len4); 9058 } 9059 break; 9060 } 9061 return 0; 9062 } 9063 9064 static int ath12k_tpc_get_reg_pwr(struct ath12k_base *ab, 9065 struct wmi_tpc_stats_arg *tpc_stats, 9066 struct wmi_max_reg_power_fixed_params *ev) 9067 { 9068 struct wmi_max_reg_power_allowed_arg *reg_pwr; 9069 u32 total_size; 9070 9071 ath12k_dbg(ab, ATH12K_DBG_WMI, 9072 "Received reg power array type %d length %d for tpc stats\n", 9073 ev->reg_power_type, ev->reg_array_len); 9074 9075 switch (le32_to_cpu(ev->reg_power_type)) { 9076 case TPC_STATS_REG_PWR_ALLOWED_TYPE: 9077 reg_pwr = &tpc_stats->max_reg_allowed_power; 9078 break; 9079 default: 9080 return -EINVAL; 9081 } 9082 9083 /* Each entry is 2 byte hence multiplying the indices with 2 */ 9084 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) * 9085 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4) * 2; 9086 if (le32_to_cpu(ev->reg_array_len) != total_size) { 9087 ath12k_warn(ab, 9088 "Total size and reg_array_len doesn't match for tpc stats\n"); 9089 return -EINVAL; 9090 } 9091 9092 memcpy(®_pwr->tpc_reg_pwr, ev, sizeof(struct wmi_max_reg_power_fixed_params)); 9093 9094 reg_pwr->reg_pwr_array = kzalloc(le32_to_cpu(reg_pwr->tpc_reg_pwr.reg_array_len), 9095 GFP_ATOMIC); 9096 if (!reg_pwr->reg_pwr_array) 9097 return -ENOMEM; 9098 9099 tpc_stats->tlvs_rcvd |= WMI_TPC_REG_PWR_ALLOWED; 9100 9101 return 0; 9102 } 9103 9104 static int ath12k_tpc_get_rate_array(struct ath12k_base *ab, 9105 struct wmi_tpc_stats_arg *tpc_stats, 9106 struct wmi_tpc_rates_array_fixed_params *ev) 9107 { 9108 struct wmi_tpc_rates_array_arg *rates_array; 9109 u32 flag = 0, rate_array_len; 9110 9111 ath12k_dbg(ab, ATH12K_DBG_WMI, 9112 "Received rates array type %d length %d for tpc stats\n", 9113 ev->rate_array_type, ev->rate_array_len); 9114 9115 switch (le32_to_cpu(ev->rate_array_type)) { 9116 case ATH12K_TPC_STATS_RATES_ARRAY1: 9117 rates_array = &tpc_stats->rates_array1; 9118 flag = WMI_TPC_RATES_ARRAY1; 9119 break; 9120 case ATH12K_TPC_STATS_RATES_ARRAY2: 9121 rates_array = &tpc_stats->rates_array2; 9122 flag = WMI_TPC_RATES_ARRAY2; 9123 break; 9124 default: 9125 ath12k_warn(ab, 9126 "Received invalid type of rates array for tpc stats\n"); 9127 return -EINVAL; 9128 } 9129 memcpy(&rates_array->tpc_rates_array, ev, 9130 sizeof(struct wmi_tpc_rates_array_fixed_params)); 9131 rate_array_len = le32_to_cpu(rates_array->tpc_rates_array.rate_array_len); 9132 rates_array->rate_array = kzalloc(rate_array_len, GFP_ATOMIC); 9133 if (!rates_array->rate_array) 9134 return -ENOMEM; 9135 9136 tpc_stats->tlvs_rcvd |= flag; 9137 return 0; 9138 } 9139 9140 static int ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base *ab, 9141 struct wmi_tpc_stats_arg *tpc_stats, 9142 struct wmi_tpc_ctl_pwr_fixed_params *ev) 9143 { 9144 struct wmi_tpc_ctl_pwr_table_arg *ctl_array; 9145 u32 total_size, ctl_array_len, flag = 0; 9146 9147 ath12k_dbg(ab, ATH12K_DBG_WMI, 9148 "Received ctl array type %d length %d for tpc stats\n", 9149 ev->ctl_array_type, ev->ctl_array_len); 9150 9151 switch (le32_to_cpu(ev->ctl_array_type)) { 9152 case ATH12K_TPC_STATS_CTL_ARRAY: 9153 ctl_array = &tpc_stats->ctl_array; 9154 flag = WMI_TPC_CTL_PWR_ARRAY; 9155 break; 9156 default: 9157 ath12k_warn(ab, 9158 "Received invalid type of ctl pwr table for tpc stats\n"); 9159 return -EINVAL; 9160 } 9161 9162 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) * 9163 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4); 9164 if (le32_to_cpu(ev->ctl_array_len) != total_size) { 9165 ath12k_warn(ab, 9166 "Total size and ctl_array_len doesn't match for tpc stats\n"); 9167 return -EINVAL; 9168 } 9169 9170 memcpy(&ctl_array->tpc_ctl_pwr, ev, sizeof(struct wmi_tpc_ctl_pwr_fixed_params)); 9171 ctl_array_len = le32_to_cpu(ctl_array->tpc_ctl_pwr.ctl_array_len); 9172 ctl_array->ctl_pwr_table = kzalloc(ctl_array_len, GFP_ATOMIC); 9173 if (!ctl_array->ctl_pwr_table) 9174 return -ENOMEM; 9175 9176 tpc_stats->tlvs_rcvd |= flag; 9177 return 0; 9178 } 9179 9180 static int ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base *ab, 9181 u16 tag, u16 len, 9182 const void *ptr, void *data) 9183 { 9184 struct wmi_tpc_rates_array_fixed_params *tpc_rates_array; 9185 struct wmi_max_reg_power_fixed_params *tpc_reg_pwr; 9186 struct wmi_tpc_ctl_pwr_fixed_params *tpc_ctl_pwr; 9187 struct wmi_tpc_stats_arg *tpc_stats = data; 9188 struct wmi_tpc_config_params *tpc_config; 9189 int ret = 0; 9190 9191 if (!tpc_stats) { 9192 ath12k_warn(ab, "tpc stats memory unavailable\n"); 9193 return -EINVAL; 9194 } 9195 9196 switch (tag) { 9197 case WMI_TAG_TPC_STATS_CONFIG_EVENT: 9198 tpc_config = (struct wmi_tpc_config_params *)ptr; 9199 memcpy(&tpc_stats->tpc_config, tpc_config, 9200 sizeof(struct wmi_tpc_config_params)); 9201 break; 9202 case WMI_TAG_TPC_STATS_REG_PWR_ALLOWED: 9203 tpc_reg_pwr = (struct wmi_max_reg_power_fixed_params *)ptr; 9204 ret = ath12k_tpc_get_reg_pwr(ab, tpc_stats, tpc_reg_pwr); 9205 break; 9206 case WMI_TAG_TPC_STATS_RATES_ARRAY: 9207 tpc_rates_array = (struct wmi_tpc_rates_array_fixed_params *)ptr; 9208 ret = ath12k_tpc_get_rate_array(ab, tpc_stats, tpc_rates_array); 9209 break; 9210 case WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT: 9211 tpc_ctl_pwr = (struct wmi_tpc_ctl_pwr_fixed_params *)ptr; 9212 ret = ath12k_tpc_get_ctl_pwr_tbl(ab, tpc_stats, tpc_ctl_pwr); 9213 break; 9214 default: 9215 ath12k_warn(ab, 9216 "Received invalid tag for tpc stats in subtlvs\n"); 9217 return -EINVAL; 9218 } 9219 return ret; 9220 } 9221 9222 static int ath12k_wmi_tpc_stats_event_parser(struct ath12k_base *ab, 9223 u16 tag, u16 len, 9224 const void *ptr, void *data) 9225 { 9226 struct wmi_tpc_stats_arg *tpc_stats = (struct wmi_tpc_stats_arg *)data; 9227 int ret; 9228 9229 switch (tag) { 9230 case WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM: 9231 ret = 0; 9232 /* Fixed param is already processed*/ 9233 break; 9234 case WMI_TAG_ARRAY_STRUCT: 9235 /* len 0 is expected for array of struct when there 9236 * is no content of that type to pack inside that tlv 9237 */ 9238 if (len == 0) 9239 return 0; 9240 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 9241 ath12k_wmi_tpc_stats_subtlv_parser, 9242 tpc_stats); 9243 break; 9244 case WMI_TAG_ARRAY_INT16: 9245 if (len == 0) 9246 return 0; 9247 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr, 9248 WMI_TAG_ARRAY_INT16, 9249 len, tpc_stats); 9250 break; 9251 case WMI_TAG_ARRAY_BYTE: 9252 if (len == 0) 9253 return 0; 9254 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr, 9255 WMI_TAG_ARRAY_BYTE, 9256 len, tpc_stats); 9257 break; 9258 default: 9259 ath12k_warn(ab, "Received invalid tag for tpc stats\n"); 9260 ret = -EINVAL; 9261 break; 9262 } 9263 return ret; 9264 } 9265 9266 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar) 9267 { 9268 struct wmi_tpc_stats_arg *tpc_stats = ar->debug.tpc_stats; 9269 9270 lockdep_assert_held(&ar->data_lock); 9271 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc stats mem free\n"); 9272 if (tpc_stats) { 9273 kfree(tpc_stats->max_reg_allowed_power.reg_pwr_array); 9274 kfree(tpc_stats->rates_array1.rate_array); 9275 kfree(tpc_stats->rates_array2.rate_array); 9276 kfree(tpc_stats->ctl_array.ctl_pwr_table); 9277 kfree(tpc_stats); 9278 ar->debug.tpc_stats = NULL; 9279 } 9280 } 9281 9282 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab, 9283 struct sk_buff *skb) 9284 { 9285 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *fixed_param; 9286 struct wmi_tpc_stats_arg *tpc_stats; 9287 const struct wmi_tlv *tlv; 9288 void *ptr = skb->data; 9289 struct ath12k *ar; 9290 u16 tlv_tag; 9291 u32 event_count; 9292 int ret; 9293 9294 if (!skb->data) { 9295 ath12k_warn(ab, "No data present in tpc stats event\n"); 9296 return; 9297 } 9298 9299 if (skb->len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) { 9300 ath12k_warn(ab, "TPC stats event size invalid\n"); 9301 return; 9302 } 9303 9304 tlv = (struct wmi_tlv *)ptr; 9305 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 9306 ptr += sizeof(*tlv); 9307 9308 if (tlv_tag != WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM) { 9309 ath12k_warn(ab, "TPC stats without fixed param tlv at start\n"); 9310 return; 9311 } 9312 9313 fixed_param = (struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *)ptr; 9314 rcu_read_lock(); 9315 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(fixed_param->pdev_id) + 1); 9316 if (!ar) { 9317 ath12k_warn(ab, "Failed to get ar for tpc stats\n"); 9318 rcu_read_unlock(); 9319 return; 9320 } 9321 spin_lock_bh(&ar->data_lock); 9322 if (!ar->debug.tpc_request) { 9323 /* Event is received either without request or the 9324 * timeout, if memory is already allocated free it 9325 */ 9326 if (ar->debug.tpc_stats) { 9327 ath12k_warn(ab, "Freeing memory for tpc_stats\n"); 9328 ath12k_wmi_free_tpc_stats_mem(ar); 9329 } 9330 goto unlock; 9331 } 9332 9333 event_count = le32_to_cpu(fixed_param->event_count); 9334 if (event_count == 0) { 9335 if (ar->debug.tpc_stats) { 9336 ath12k_warn(ab, 9337 "Invalid tpc memory present\n"); 9338 goto unlock; 9339 } 9340 ar->debug.tpc_stats = 9341 kzalloc(sizeof(struct wmi_tpc_stats_arg), 9342 GFP_ATOMIC); 9343 if (!ar->debug.tpc_stats) { 9344 ath12k_warn(ab, 9345 "Failed to allocate memory for tpc stats\n"); 9346 goto unlock; 9347 } 9348 } 9349 9350 tpc_stats = ar->debug.tpc_stats; 9351 if (!tpc_stats) { 9352 ath12k_warn(ab, "tpc stats memory unavailable\n"); 9353 goto unlock; 9354 } 9355 9356 if (!(event_count == 0)) { 9357 if (event_count != tpc_stats->event_count + 1) { 9358 ath12k_warn(ab, 9359 "Invalid tpc event received\n"); 9360 goto unlock; 9361 } 9362 } 9363 tpc_stats->pdev_id = le32_to_cpu(fixed_param->pdev_id); 9364 tpc_stats->end_of_event = le32_to_cpu(fixed_param->end_of_event); 9365 tpc_stats->event_count = le32_to_cpu(fixed_param->event_count); 9366 ath12k_dbg(ab, ATH12K_DBG_WMI, 9367 "tpc stats event_count %d\n", 9368 tpc_stats->event_count); 9369 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 9370 ath12k_wmi_tpc_stats_event_parser, 9371 tpc_stats); 9372 if (ret) { 9373 ath12k_wmi_free_tpc_stats_mem(ar); 9374 ath12k_warn(ab, "failed to parse tpc_stats tlv: %d\n", ret); 9375 goto unlock; 9376 } 9377 9378 if (tpc_stats->end_of_event) 9379 complete(&ar->debug.tpc_complete); 9380 9381 unlock: 9382 spin_unlock_bh(&ar->data_lock); 9383 rcu_read_unlock(); 9384 } 9385 #else 9386 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab, 9387 struct sk_buff *skb) 9388 { 9389 } 9390 #endif 9391 9392 static int 9393 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base *ab, 9394 u16 tag, u16 len, 9395 const void *ptr, void *data) 9396 { 9397 const struct ath12k_wmi_rssi_dbm_conv_temp_info_params *temp_info; 9398 const struct ath12k_wmi_rssi_dbm_conv_info_params *param_info; 9399 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info = data; 9400 struct ath12k_wmi_rssi_dbm_conv_param_arg param_arg; 9401 s32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM]; 9402 u8 num_20mhz_segments; 9403 s8 min_nf, *nf_ptr; 9404 int i, j; 9405 9406 switch (tag) { 9407 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO: 9408 if (len < sizeof(*param_info)) { 9409 ath12k_warn(ab, 9410 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd", 9411 tag, len); 9412 return -EINVAL; 9413 } 9414 9415 param_info = ptr; 9416 9417 param_arg.curr_bw = le32_to_cpu(param_info->curr_bw); 9418 param_arg.curr_rx_chainmask = le32_to_cpu(param_info->curr_rx_chainmask); 9419 9420 /* The received array is actually a 2D byte-array for per chain, 9421 * per 20MHz subband. Convert to 2D byte-array 9422 */ 9423 nf_ptr = ¶m_arg.nf_hw_dbm[0][0]; 9424 9425 for (i = 0; i < ATH12K_MAX_NUM_NF_HW_DBM; i++) { 9426 nf_hw_dbm[i] = a_sle32_to_cpu(param_info->nf_hw_dbm[i]); 9427 9428 for (j = 0; j < 4; j++) { 9429 *nf_ptr = (nf_hw_dbm[i] >> (j * 8)) & 0xFF; 9430 nf_ptr++; 9431 } 9432 } 9433 9434 switch (param_arg.curr_bw) { 9435 case WMI_CHAN_WIDTH_20: 9436 num_20mhz_segments = 1; 9437 break; 9438 case WMI_CHAN_WIDTH_40: 9439 num_20mhz_segments = 2; 9440 break; 9441 case WMI_CHAN_WIDTH_80: 9442 num_20mhz_segments = 4; 9443 break; 9444 case WMI_CHAN_WIDTH_160: 9445 num_20mhz_segments = 8; 9446 break; 9447 case WMI_CHAN_WIDTH_320: 9448 num_20mhz_segments = 16; 9449 break; 9450 default: 9451 ath12k_warn(ab, "Invalid current bandwidth %d in RSSI dbm event", 9452 param_arg.curr_bw); 9453 /* In error case, still consider the primary 20 MHz segment since 9454 * that would be much better than instead of dropping the whole 9455 * event 9456 */ 9457 num_20mhz_segments = 1; 9458 } 9459 9460 min_nf = ATH12K_DEFAULT_NOISE_FLOOR; 9461 9462 for (i = 0; i < ATH12K_MAX_NUM_ANTENNA; i++) { 9463 if (!(param_arg.curr_rx_chainmask & BIT(i))) 9464 continue; 9465 9466 for (j = 0; j < num_20mhz_segments; j++) { 9467 if (param_arg.nf_hw_dbm[i][j] < min_nf) 9468 min_nf = param_arg.nf_hw_dbm[i][j]; 9469 } 9470 } 9471 9472 rssi_info->min_nf_dbm = min_nf; 9473 rssi_info->nf_dbm_present = true; 9474 break; 9475 case WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO: 9476 if (len < sizeof(*temp_info)) { 9477 ath12k_warn(ab, 9478 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd", 9479 tag, len); 9480 return -EINVAL; 9481 } 9482 9483 temp_info = ptr; 9484 rssi_info->temp_offset = a_sle32_to_cpu(temp_info->offset); 9485 rssi_info->temp_offset_present = true; 9486 break; 9487 default: 9488 ath12k_dbg(ab, ATH12K_DBG_WMI, 9489 "Unknown subtlv 0x%x in RSSI dbm conversion event\n", tag); 9490 } 9491 9492 return 0; 9493 } 9494 9495 static int 9496 ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base *ab, 9497 u16 tag, u16 len, 9498 const void *ptr, void *data) 9499 { 9500 int ret = 0; 9501 9502 switch (tag) { 9503 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM: 9504 /* Fixed param is already processed*/ 9505 break; 9506 case WMI_TAG_ARRAY_STRUCT: 9507 /* len 0 is expected for array of struct when there 9508 * is no content of that type inside that tlv 9509 */ 9510 if (len == 0) 9511 return 0; 9512 9513 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 9514 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser, 9515 data); 9516 break; 9517 default: 9518 ath12k_dbg(ab, ATH12K_DBG_WMI, 9519 "Received invalid tag 0x%x for RSSI dbm conv info event\n", 9520 tag); 9521 break; 9522 } 9523 9524 return ret; 9525 } 9526 9527 static int 9528 ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base *ab, u8 *ptr, 9529 size_t len, int *pdev_id) 9530 { 9531 struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *fixed_param; 9532 const struct wmi_tlv *tlv; 9533 u16 tlv_tag; 9534 9535 if (len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) { 9536 ath12k_warn(ab, "invalid RSSI dbm conv event size %zu\n", len); 9537 return -EINVAL; 9538 } 9539 9540 tlv = (struct wmi_tlv *)ptr; 9541 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 9542 ptr += sizeof(*tlv); 9543 9544 if (tlv_tag != WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM) { 9545 ath12k_warn(ab, "RSSI dbm conv event received without fixed param tlv\n"); 9546 return -EINVAL; 9547 } 9548 9549 fixed_param = (struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *)ptr; 9550 *pdev_id = le32_to_cpu(fixed_param->pdev_id); 9551 9552 return 0; 9553 } 9554 9555 static void 9556 ath12k_wmi_update_rssi_offsets(struct ath12k *ar, 9557 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info) 9558 { 9559 struct ath12k_pdev_rssi_offsets *info = &ar->rssi_info; 9560 9561 lockdep_assert_held(&ar->data_lock); 9562 9563 if (rssi_info->temp_offset_present) 9564 info->temp_offset = rssi_info->temp_offset; 9565 9566 if (rssi_info->nf_dbm_present) 9567 info->min_nf_dbm = rssi_info->min_nf_dbm; 9568 9569 info->noise_floor = info->min_nf_dbm + info->temp_offset; 9570 } 9571 9572 static void 9573 ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base *ab, 9574 struct sk_buff *skb) 9575 { 9576 struct ath12k_wmi_rssi_dbm_conv_info_arg rssi_info; 9577 struct ath12k *ar; 9578 s32 noise_floor; 9579 u32 pdev_id; 9580 int ret; 9581 9582 ret = ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(ab, skb->data, skb->len, 9583 &pdev_id); 9584 if (ret) { 9585 ath12k_warn(ab, "failed to parse fixed param in RSSI dbm conv event: %d\n", 9586 ret); 9587 return; 9588 } 9589 9590 rcu_read_lock(); 9591 ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id); 9592 /* If pdev is not active, ignore the event */ 9593 if (!ar) 9594 goto out_unlock; 9595 9596 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 9597 ath12k_wmi_rssi_dbm_conv_info_event_parser, 9598 &rssi_info); 9599 if (ret) { 9600 ath12k_warn(ab, "unable to parse RSSI dbm conversion event\n"); 9601 goto out_unlock; 9602 } 9603 9604 spin_lock_bh(&ar->data_lock); 9605 ath12k_wmi_update_rssi_offsets(ar, &rssi_info); 9606 noise_floor = ath12k_pdev_get_noise_floor(ar); 9607 spin_unlock_bh(&ar->data_lock); 9608 9609 ath12k_dbg(ab, ATH12K_DBG_WMI, 9610 "RSSI noise floor updated, new value is %d dbm\n", noise_floor); 9611 out_unlock: 9612 rcu_read_unlock(); 9613 } 9614 9615 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 9616 { 9617 struct wmi_cmd_hdr *cmd_hdr; 9618 enum wmi_tlv_event_id id; 9619 9620 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 9621 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 9622 9623 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 9624 goto out; 9625 9626 switch (id) { 9627 /* Process all the WMI events here */ 9628 case WMI_SERVICE_READY_EVENTID: 9629 ath12k_service_ready_event(ab, skb); 9630 break; 9631 case WMI_SERVICE_READY_EXT_EVENTID: 9632 ath12k_service_ready_ext_event(ab, skb); 9633 break; 9634 case WMI_SERVICE_READY_EXT2_EVENTID: 9635 ath12k_service_ready_ext2_event(ab, skb); 9636 break; 9637 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 9638 ath12k_reg_chan_list_event(ab, skb); 9639 break; 9640 case WMI_READY_EVENTID: 9641 ath12k_ready_event(ab, skb); 9642 break; 9643 case WMI_PEER_DELETE_RESP_EVENTID: 9644 ath12k_peer_delete_resp_event(ab, skb); 9645 break; 9646 case WMI_VDEV_START_RESP_EVENTID: 9647 ath12k_vdev_start_resp_event(ab, skb); 9648 break; 9649 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 9650 ath12k_bcn_tx_status_event(ab, skb); 9651 break; 9652 case WMI_VDEV_STOPPED_EVENTID: 9653 ath12k_vdev_stopped_event(ab, skb); 9654 break; 9655 case WMI_MGMT_RX_EVENTID: 9656 ath12k_mgmt_rx_event(ab, skb); 9657 /* mgmt_rx_event() owns the skb now! */ 9658 return; 9659 case WMI_MGMT_TX_COMPLETION_EVENTID: 9660 ath12k_mgmt_tx_compl_event(ab, skb); 9661 break; 9662 case WMI_SCAN_EVENTID: 9663 ath12k_scan_event(ab, skb); 9664 break; 9665 case WMI_PEER_STA_KICKOUT_EVENTID: 9666 ath12k_peer_sta_kickout_event(ab, skb); 9667 break; 9668 case WMI_ROAM_EVENTID: 9669 ath12k_roam_event(ab, skb); 9670 break; 9671 case WMI_CHAN_INFO_EVENTID: 9672 ath12k_chan_info_event(ab, skb); 9673 break; 9674 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 9675 ath12k_pdev_bss_chan_info_event(ab, skb); 9676 break; 9677 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 9678 ath12k_vdev_install_key_compl_event(ab, skb); 9679 break; 9680 case WMI_SERVICE_AVAILABLE_EVENTID: 9681 ath12k_service_available_event(ab, skb); 9682 break; 9683 case WMI_PEER_ASSOC_CONF_EVENTID: 9684 ath12k_peer_assoc_conf_event(ab, skb); 9685 break; 9686 case WMI_UPDATE_STATS_EVENTID: 9687 ath12k_update_stats_event(ab, skb); 9688 break; 9689 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 9690 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 9691 break; 9692 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 9693 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 9694 break; 9695 case WMI_PDEV_TEMPERATURE_EVENTID: 9696 ath12k_wmi_pdev_temperature_event(ab, skb); 9697 break; 9698 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 9699 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 9700 break; 9701 case WMI_HOST_FILS_DISCOVERY_EVENTID: 9702 ath12k_fils_discovery_event(ab, skb); 9703 break; 9704 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 9705 ath12k_probe_resp_tx_status_event(ab, skb); 9706 break; 9707 case WMI_RFKILL_STATE_CHANGE_EVENTID: 9708 ath12k_rfkill_state_change_event(ab, skb); 9709 break; 9710 case WMI_TWT_ENABLE_EVENTID: 9711 ath12k_wmi_twt_enable_event(ab, skb); 9712 break; 9713 case WMI_TWT_DISABLE_EVENTID: 9714 ath12k_wmi_twt_disable_event(ab, skb); 9715 break; 9716 case WMI_P2P_NOA_EVENTID: 9717 ath12k_wmi_p2p_noa_event(ab, skb); 9718 break; 9719 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 9720 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 9721 break; 9722 case WMI_VDEV_DELETE_RESP_EVENTID: 9723 ath12k_vdev_delete_resp_event(ab, skb); 9724 break; 9725 case WMI_DIAG_EVENTID: 9726 ath12k_wmi_diag_event(ab, skb); 9727 break; 9728 case WMI_WOW_WAKEUP_HOST_EVENTID: 9729 ath12k_wmi_event_wow_wakeup_host(ab, skb); 9730 break; 9731 case WMI_GTK_OFFLOAD_STATUS_EVENTID: 9732 ath12k_wmi_gtk_offload_status_event(ab, skb); 9733 break; 9734 case WMI_MLO_SETUP_COMPLETE_EVENTID: 9735 ath12k_wmi_event_mlo_setup_complete(ab, skb); 9736 break; 9737 case WMI_MLO_TEARDOWN_COMPLETE_EVENTID: 9738 ath12k_wmi_event_teardown_complete(ab, skb); 9739 break; 9740 case WMI_HALPHY_STATS_CTRL_PATH_EVENTID: 9741 ath12k_wmi_process_tpc_stats(ab, skb); 9742 break; 9743 case WMI_11D_NEW_COUNTRY_EVENTID: 9744 ath12k_reg_11d_new_cc_event(ab, skb); 9745 break; 9746 case WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID: 9747 ath12k_wmi_rssi_dbm_conversion_params_info_event(ab, skb); 9748 break; 9749 /* add Unsupported events (rare) here */ 9750 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 9751 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 9752 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 9753 ath12k_dbg(ab, ATH12K_DBG_WMI, 9754 "ignoring unsupported event 0x%x\n", id); 9755 break; 9756 /* add Unsupported events (frequent) here */ 9757 case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID: 9758 case WMI_MGMT_RX_FW_CONSUMED_EVENTID: 9759 case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID: 9760 /* debug might flood hence silently ignore (no-op) */ 9761 break; 9762 case WMI_PDEV_UTF_EVENTID: 9763 if (test_bit(ATH12K_FLAG_FTM_SEGMENTED, &ab->dev_flags)) 9764 ath12k_tm_wmi_event_segmented(ab, id, skb); 9765 else 9766 ath12k_tm_wmi_event_unsegmented(ab, id, skb); 9767 break; 9768 default: 9769 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 9770 break; 9771 } 9772 9773 out: 9774 dev_kfree_skb(skb); 9775 } 9776 9777 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 9778 u32 pdev_idx) 9779 { 9780 int status; 9781 static const u32 svc_id[] = { 9782 ATH12K_HTC_SVC_ID_WMI_CONTROL, 9783 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 9784 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 9785 }; 9786 struct ath12k_htc_svc_conn_req conn_req = {}; 9787 struct ath12k_htc_svc_conn_resp conn_resp = {}; 9788 9789 /* these fields are the same for all service endpoints */ 9790 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 9791 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 9792 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 9793 9794 /* connect to control service */ 9795 conn_req.service_id = svc_id[pdev_idx]; 9796 9797 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 9798 if (status) { 9799 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 9800 status); 9801 return status; 9802 } 9803 9804 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 9805 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 9806 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 9807 9808 return 0; 9809 } 9810 9811 static int 9812 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 9813 struct wmi_unit_test_cmd ut_cmd, 9814 u32 *test_args) 9815 { 9816 struct ath12k_wmi_pdev *wmi = ar->wmi; 9817 struct wmi_unit_test_cmd *cmd; 9818 struct sk_buff *skb; 9819 struct wmi_tlv *tlv; 9820 void *ptr; 9821 u32 *ut_cmd_args; 9822 int buf_len, arg_len; 9823 int ret; 9824 int i; 9825 9826 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args); 9827 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE; 9828 9829 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 9830 if (!skb) 9831 return -ENOMEM; 9832 9833 cmd = (struct wmi_unit_test_cmd *)skb->data; 9834 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 9835 sizeof(ut_cmd)); 9836 9837 cmd->vdev_id = ut_cmd.vdev_id; 9838 cmd->module_id = ut_cmd.module_id; 9839 cmd->num_args = ut_cmd.num_args; 9840 cmd->diag_token = ut_cmd.diag_token; 9841 9842 ptr = skb->data + sizeof(ut_cmd); 9843 9844 tlv = ptr; 9845 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 9846 9847 ptr += TLV_HDR_SIZE; 9848 9849 ut_cmd_args = ptr; 9850 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++) 9851 ut_cmd_args[i] = test_args[i]; 9852 9853 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 9854 "WMI unit test : module %d vdev %d n_args %d token %d\n", 9855 cmd->module_id, cmd->vdev_id, cmd->num_args, 9856 cmd->diag_token); 9857 9858 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 9859 9860 if (ret) { 9861 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 9862 ret); 9863 dev_kfree_skb(skb); 9864 } 9865 9866 return ret; 9867 } 9868 9869 int ath12k_wmi_simulate_radar(struct ath12k *ar) 9870 { 9871 struct ath12k_link_vif *arvif; 9872 u32 dfs_args[DFS_MAX_TEST_ARGS]; 9873 struct wmi_unit_test_cmd wmi_ut; 9874 bool arvif_found = false; 9875 9876 list_for_each_entry(arvif, &ar->arvifs, list) { 9877 if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) { 9878 arvif_found = true; 9879 break; 9880 } 9881 } 9882 9883 if (!arvif_found) 9884 return -EINVAL; 9885 9886 dfs_args[DFS_TEST_CMDID] = 0; 9887 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 9888 /* Currently we could pass segment_id(b0 - b1), chirp(b2) 9889 * freq offset (b3 - b10) to unit test. For simulation 9890 * purpose this can be set to 0 which is valid. 9891 */ 9892 dfs_args[DFS_TEST_RADAR_PARAM] = 0; 9893 9894 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id); 9895 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE); 9896 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS); 9897 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN); 9898 9899 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 9900 9901 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); 9902 } 9903 9904 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar, 9905 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type) 9906 { 9907 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *cmd; 9908 struct ath12k_wmi_pdev *wmi = ar->wmi; 9909 struct sk_buff *skb; 9910 struct wmi_tlv *tlv; 9911 __le32 *pdev_id; 9912 u32 buf_len; 9913 void *ptr; 9914 int ret; 9915 9916 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(u32) + TLV_HDR_SIZE + TLV_HDR_SIZE; 9917 9918 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 9919 if (!skb) 9920 return -ENOMEM; 9921 cmd = (struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *)skb->data; 9922 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM, 9923 sizeof(*cmd)); 9924 9925 cmd->stats_id_mask = cpu_to_le32(WMI_REQ_CTRL_PATH_PDEV_TX_STAT); 9926 cmd->action = cpu_to_le32(WMI_REQUEST_CTRL_PATH_STAT_GET); 9927 cmd->subid = cpu_to_le32(tpc_stats_type); 9928 9929 ptr = skb->data + sizeof(*cmd); 9930 9931 /* The below TLV arrays optionally follow this fixed param TLV structure 9932 * 1. ARRAY_UINT32 pdev_ids[] 9933 * If this array is present and non-zero length, stats should only 9934 * be provided from the pdevs identified in the array. 9935 * 2. ARRAY_UNIT32 vdev_ids[] 9936 * If this array is present and non-zero length, stats should only 9937 * be provided from the vdevs identified in the array. 9938 * 3. ath12k_wmi_mac_addr_params peer_macaddr[]; 9939 * If this array is present and non-zero length, stats should only 9940 * be provided from the peers with the MAC addresses specified 9941 * in the array 9942 */ 9943 tlv = ptr; 9944 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32)); 9945 ptr += TLV_HDR_SIZE; 9946 9947 pdev_id = ptr; 9948 *pdev_id = cpu_to_le32(ath12k_mac_get_target_pdev_id(ar)); 9949 ptr += sizeof(*pdev_id); 9950 9951 tlv = ptr; 9952 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 9953 ptr += TLV_HDR_SIZE; 9954 9955 tlv = ptr; 9956 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, 0); 9957 ptr += TLV_HDR_SIZE; 9958 9959 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID); 9960 if (ret) { 9961 ath12k_warn(ar->ab, 9962 "failed to submit WMI_REQUEST_STATS_CTRL_PATH_CMDID\n"); 9963 dev_kfree_skb(skb); 9964 return ret; 9965 } 9966 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI get TPC STATS sent on pdev %d\n", 9967 ar->pdev->pdev_id); 9968 9969 return ret; 9970 } 9971 9972 int ath12k_wmi_connect(struct ath12k_base *ab) 9973 { 9974 u32 i; 9975 u8 wmi_ep_count; 9976 9977 wmi_ep_count = ab->htc.wmi_ep_count; 9978 if (wmi_ep_count > ab->hw_params->max_radios) 9979 return -1; 9980 9981 for (i = 0; i < wmi_ep_count; i++) 9982 ath12k_connect_pdev_htc_service(ab, i); 9983 9984 return 0; 9985 } 9986 9987 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 9988 { 9989 if (WARN_ON(pdev_id >= MAX_RADIOS)) 9990 return; 9991 9992 /* TODO: Deinit any pdev specific wmi resource */ 9993 } 9994 9995 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 9996 u8 pdev_id) 9997 { 9998 struct ath12k_wmi_pdev *wmi_handle; 9999 10000 if (pdev_id >= ab->hw_params->max_radios) 10001 return -EINVAL; 10002 10003 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 10004 10005 wmi_handle->wmi_ab = &ab->wmi_ab; 10006 10007 ab->wmi_ab.ab = ab; 10008 /* TODO: Init remaining resource specific to pdev */ 10009 10010 return 0; 10011 } 10012 10013 int ath12k_wmi_attach(struct ath12k_base *ab) 10014 { 10015 int ret; 10016 10017 ret = ath12k_wmi_pdev_attach(ab, 0); 10018 if (ret) 10019 return ret; 10020 10021 ab->wmi_ab.ab = ab; 10022 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 10023 10024 /* It's overwritten when service_ext_ready is handled */ 10025 if (ab->hw_params->single_pdev_only) 10026 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 10027 10028 /* TODO: Init remaining wmi soc resources required */ 10029 init_completion(&ab->wmi_ab.service_ready); 10030 init_completion(&ab->wmi_ab.unified_ready); 10031 10032 return 0; 10033 } 10034 10035 void ath12k_wmi_detach(struct ath12k_base *ab) 10036 { 10037 int i; 10038 10039 /* TODO: Deinit wmi resource specific to SOC as required */ 10040 10041 for (i = 0; i < ab->htc.wmi_ep_count; i++) 10042 ath12k_wmi_pdev_detach(ab, i); 10043 10044 ath12k_wmi_free_dbring_caps(ab); 10045 } 10046 10047 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg) 10048 { 10049 struct wmi_hw_data_filter_cmd *cmd; 10050 struct sk_buff *skb; 10051 int len; 10052 10053 len = sizeof(*cmd); 10054 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10055 10056 if (!skb) 10057 return -ENOMEM; 10058 10059 cmd = (struct wmi_hw_data_filter_cmd *)skb->data; 10060 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD, 10061 sizeof(*cmd)); 10062 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 10063 cmd->enable = cpu_to_le32(arg->enable ? 1 : 0); 10064 10065 /* Set all modes in case of disable */ 10066 if (arg->enable) 10067 cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap); 10068 else 10069 cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U); 10070 10071 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10072 "wmi hw data filter enable %d filter_bitmap 0x%x\n", 10073 arg->enable, arg->hw_filter_bitmap); 10074 10075 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID); 10076 } 10077 10078 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar) 10079 { 10080 struct wmi_wow_host_wakeup_cmd *cmd; 10081 struct sk_buff *skb; 10082 size_t len; 10083 10084 len = sizeof(*cmd); 10085 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10086 if (!skb) 10087 return -ENOMEM; 10088 10089 cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data; 10090 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 10091 sizeof(*cmd)); 10092 10093 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n"); 10094 10095 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID); 10096 } 10097 10098 int ath12k_wmi_wow_enable(struct ath12k *ar) 10099 { 10100 struct wmi_wow_enable_cmd *cmd; 10101 struct sk_buff *skb; 10102 int len; 10103 10104 len = sizeof(*cmd); 10105 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10106 if (!skb) 10107 return -ENOMEM; 10108 10109 cmd = (struct wmi_wow_enable_cmd *)skb->data; 10110 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD, 10111 sizeof(*cmd)); 10112 10113 cmd->enable = cpu_to_le32(1); 10114 cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED); 10115 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n"); 10116 10117 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID); 10118 } 10119 10120 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 10121 enum wmi_wow_wakeup_event event, 10122 u32 enable) 10123 { 10124 struct wmi_wow_add_del_event_cmd *cmd; 10125 struct sk_buff *skb; 10126 size_t len; 10127 10128 len = sizeof(*cmd); 10129 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10130 if (!skb) 10131 return -ENOMEM; 10132 10133 cmd = (struct wmi_wow_add_del_event_cmd *)skb->data; 10134 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD, 10135 sizeof(*cmd)); 10136 cmd->vdev_id = cpu_to_le32(vdev_id); 10137 cmd->is_add = cpu_to_le32(enable); 10138 cmd->event_bitmap = cpu_to_le32((1 << event)); 10139 10140 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n", 10141 wow_wakeup_event(event), enable, vdev_id); 10142 10143 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID); 10144 } 10145 10146 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 10147 const u8 *pattern, const u8 *mask, 10148 int pattern_len, int pattern_offset) 10149 { 10150 struct wmi_wow_add_pattern_cmd *cmd; 10151 struct wmi_wow_bitmap_pattern_params *bitmap; 10152 struct wmi_tlv *tlv; 10153 struct sk_buff *skb; 10154 void *ptr; 10155 size_t len; 10156 10157 len = sizeof(*cmd) + 10158 sizeof(*tlv) + /* array struct */ 10159 sizeof(*bitmap) + /* bitmap */ 10160 sizeof(*tlv) + /* empty ipv4 sync */ 10161 sizeof(*tlv) + /* empty ipv6 sync */ 10162 sizeof(*tlv) + /* empty magic */ 10163 sizeof(*tlv) + /* empty info timeout */ 10164 sizeof(*tlv) + sizeof(u32); /* ratelimit interval */ 10165 10166 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10167 if (!skb) 10168 return -ENOMEM; 10169 10170 /* cmd */ 10171 ptr = skb->data; 10172 cmd = ptr; 10173 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD, 10174 sizeof(*cmd)); 10175 cmd->vdev_id = cpu_to_le32(vdev_id); 10176 cmd->pattern_id = cpu_to_le32(pattern_id); 10177 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN); 10178 10179 ptr += sizeof(*cmd); 10180 10181 /* bitmap */ 10182 tlv = ptr; 10183 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap)); 10184 10185 ptr += sizeof(*tlv); 10186 10187 bitmap = ptr; 10188 bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T, 10189 sizeof(*bitmap)); 10190 memcpy(bitmap->patternbuf, pattern, pattern_len); 10191 memcpy(bitmap->bitmaskbuf, mask, pattern_len); 10192 bitmap->pattern_offset = cpu_to_le32(pattern_offset); 10193 bitmap->pattern_len = cpu_to_le32(pattern_len); 10194 bitmap->bitmask_len = cpu_to_le32(pattern_len); 10195 bitmap->pattern_id = cpu_to_le32(pattern_id); 10196 10197 ptr += sizeof(*bitmap); 10198 10199 /* ipv4 sync */ 10200 tlv = ptr; 10201 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 10202 10203 ptr += sizeof(*tlv); 10204 10205 /* ipv6 sync */ 10206 tlv = ptr; 10207 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 10208 10209 ptr += sizeof(*tlv); 10210 10211 /* magic */ 10212 tlv = ptr; 10213 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 10214 10215 ptr += sizeof(*tlv); 10216 10217 /* pattern info timeout */ 10218 tlv = ptr; 10219 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 10220 10221 ptr += sizeof(*tlv); 10222 10223 /* ratelimit interval */ 10224 tlv = ptr; 10225 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32)); 10226 10227 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n", 10228 vdev_id, pattern_id, pattern_offset, pattern_len); 10229 10230 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ", 10231 bitmap->patternbuf, pattern_len); 10232 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ", 10233 bitmap->bitmaskbuf, pattern_len); 10234 10235 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID); 10236 } 10237 10238 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id) 10239 { 10240 struct wmi_wow_del_pattern_cmd *cmd; 10241 struct sk_buff *skb; 10242 size_t len; 10243 10244 len = sizeof(*cmd); 10245 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10246 if (!skb) 10247 return -ENOMEM; 10248 10249 cmd = (struct wmi_wow_del_pattern_cmd *)skb->data; 10250 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD, 10251 sizeof(*cmd)); 10252 cmd->vdev_id = cpu_to_le32(vdev_id); 10253 cmd->pattern_id = cpu_to_le32(pattern_id); 10254 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN); 10255 10256 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n", 10257 vdev_id, pattern_id); 10258 10259 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID); 10260 } 10261 10262 static struct sk_buff * 10263 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id, 10264 struct wmi_pno_scan_req_arg *pno) 10265 { 10266 struct nlo_configured_params *nlo_list; 10267 size_t len, nlo_list_len, channel_list_len; 10268 struct wmi_wow_nlo_config_cmd *cmd; 10269 __le32 *channel_list; 10270 struct wmi_tlv *tlv; 10271 struct sk_buff *skb; 10272 void *ptr; 10273 u32 i; 10274 10275 len = sizeof(*cmd) + 10276 sizeof(*tlv) + 10277 /* TLV place holder for array of structures 10278 * nlo_configured_params(nlo_list) 10279 */ 10280 sizeof(*tlv); 10281 /* TLV place holder for array of uint32 channel_list */ 10282 10283 channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count; 10284 len += channel_list_len; 10285 10286 nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count; 10287 len += nlo_list_len; 10288 10289 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10290 if (!skb) 10291 return ERR_PTR(-ENOMEM); 10292 10293 ptr = skb->data; 10294 cmd = ptr; 10295 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd)); 10296 10297 cmd->vdev_id = cpu_to_le32(pno->vdev_id); 10298 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN); 10299 10300 /* current FW does not support min-max range for dwell time */ 10301 cmd->active_dwell_time = cpu_to_le32(pno->active_max_time); 10302 cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time); 10303 10304 if (pno->do_passive_scan) 10305 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE); 10306 10307 cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period); 10308 cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period); 10309 cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles); 10310 cmd->delay_start_time = cpu_to_le32(pno->delay_start_time); 10311 10312 if (pno->enable_pno_scan_randomization) { 10313 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ | 10314 WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ); 10315 ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr); 10316 ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask); 10317 } 10318 10319 ptr += sizeof(*cmd); 10320 10321 /* nlo_configured_params(nlo_list) */ 10322 cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count); 10323 tlv = ptr; 10324 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len); 10325 10326 ptr += sizeof(*tlv); 10327 nlo_list = ptr; 10328 for (i = 0; i < pno->uc_networks_count; i++) { 10329 tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header); 10330 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 10331 sizeof(*nlo_list)); 10332 10333 nlo_list[i].ssid.valid = cpu_to_le32(1); 10334 nlo_list[i].ssid.ssid.ssid_len = 10335 cpu_to_le32(pno->a_networks[i].ssid.ssid_len); 10336 memcpy(nlo_list[i].ssid.ssid.ssid, 10337 pno->a_networks[i].ssid.ssid, 10338 le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len)); 10339 10340 if (pno->a_networks[i].rssi_threshold && 10341 pno->a_networks[i].rssi_threshold > -300) { 10342 nlo_list[i].rssi_cond.valid = cpu_to_le32(1); 10343 nlo_list[i].rssi_cond.rssi = 10344 cpu_to_le32(pno->a_networks[i].rssi_threshold); 10345 } 10346 10347 nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1); 10348 nlo_list[i].bcast_nw_type.bcast_nw_type = 10349 cpu_to_le32(pno->a_networks[i].bcast_nw_type); 10350 } 10351 10352 ptr += nlo_list_len; 10353 cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count); 10354 tlv = ptr; 10355 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len); 10356 ptr += sizeof(*tlv); 10357 channel_list = ptr; 10358 10359 for (i = 0; i < pno->a_networks[0].channel_count; i++) 10360 channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]); 10361 10362 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n", 10363 vdev_id); 10364 10365 return skb; 10366 } 10367 10368 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar, 10369 u32 vdev_id) 10370 { 10371 struct wmi_wow_nlo_config_cmd *cmd; 10372 struct sk_buff *skb; 10373 size_t len; 10374 10375 len = sizeof(*cmd); 10376 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10377 if (!skb) 10378 return ERR_PTR(-ENOMEM); 10379 10380 cmd = (struct wmi_wow_nlo_config_cmd *)skb->data; 10381 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len); 10382 10383 cmd->vdev_id = cpu_to_le32(vdev_id); 10384 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP); 10385 10386 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10387 "wmi tlv stop pno config vdev_id %d\n", vdev_id); 10388 return skb; 10389 } 10390 10391 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 10392 struct wmi_pno_scan_req_arg *pno_scan) 10393 { 10394 struct sk_buff *skb; 10395 10396 if (pno_scan->enable) 10397 skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan); 10398 else 10399 skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id); 10400 10401 if (IS_ERR_OR_NULL(skb)) 10402 return -ENOMEM; 10403 10404 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID); 10405 } 10406 10407 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar, 10408 struct wmi_arp_ns_offload_arg *offload, 10409 void **ptr, 10410 bool enable, 10411 bool ext) 10412 { 10413 struct wmi_ns_offload_params *ns; 10414 struct wmi_tlv *tlv; 10415 void *buf_ptr = *ptr; 10416 u32 ns_cnt, ns_ext_tuples; 10417 int i, max_offloads; 10418 10419 ns_cnt = offload->ipv6_count; 10420 10421 tlv = buf_ptr; 10422 10423 if (ext) { 10424 ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS; 10425 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10426 ns_ext_tuples * sizeof(*ns)); 10427 i = WMI_MAX_NS_OFFLOADS; 10428 max_offloads = offload->ipv6_count; 10429 } else { 10430 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10431 WMI_MAX_NS_OFFLOADS * sizeof(*ns)); 10432 i = 0; 10433 max_offloads = WMI_MAX_NS_OFFLOADS; 10434 } 10435 10436 buf_ptr += sizeof(*tlv); 10437 10438 for (; i < max_offloads; i++) { 10439 ns = buf_ptr; 10440 ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE, 10441 sizeof(*ns)); 10442 10443 if (enable) { 10444 if (i < ns_cnt) 10445 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID); 10446 10447 memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16); 10448 memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16); 10449 10450 if (offload->ipv6_type[i]) 10451 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST); 10452 10453 memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN); 10454 10455 if (!is_zero_ether_addr(ns->target_mac.addr)) 10456 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID); 10457 10458 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10459 "wmi index %d ns_solicited %pI6 target %pI6", 10460 i, ns->solicitation_ipaddr, 10461 ns->target_ipaddr[0]); 10462 } 10463 10464 buf_ptr += sizeof(*ns); 10465 } 10466 10467 *ptr = buf_ptr; 10468 } 10469 10470 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar, 10471 struct wmi_arp_ns_offload_arg *offload, 10472 void **ptr, 10473 bool enable) 10474 { 10475 struct wmi_arp_offload_params *arp; 10476 struct wmi_tlv *tlv; 10477 void *buf_ptr = *ptr; 10478 int i; 10479 10480 /* fill arp tuple */ 10481 tlv = buf_ptr; 10482 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10483 WMI_MAX_ARP_OFFLOADS * sizeof(*arp)); 10484 buf_ptr += sizeof(*tlv); 10485 10486 for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) { 10487 arp = buf_ptr; 10488 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE, 10489 sizeof(*arp)); 10490 10491 if (enable && i < offload->ipv4_count) { 10492 /* Copy the target ip addr and flags */ 10493 arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID); 10494 memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4); 10495 10496 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4", 10497 arp->target_ipaddr); 10498 } 10499 10500 buf_ptr += sizeof(*arp); 10501 } 10502 10503 *ptr = buf_ptr; 10504 } 10505 10506 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 10507 struct ath12k_link_vif *arvif, 10508 struct wmi_arp_ns_offload_arg *offload, 10509 bool enable) 10510 { 10511 struct wmi_set_arp_ns_offload_cmd *cmd; 10512 struct wmi_tlv *tlv; 10513 struct sk_buff *skb; 10514 void *buf_ptr; 10515 size_t len; 10516 u8 ns_cnt, ns_ext_tuples = 0; 10517 10518 ns_cnt = offload->ipv6_count; 10519 10520 len = sizeof(*cmd) + 10521 sizeof(*tlv) + 10522 WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) + 10523 sizeof(*tlv) + 10524 WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params); 10525 10526 if (ns_cnt > WMI_MAX_NS_OFFLOADS) { 10527 ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS; 10528 len += sizeof(*tlv) + 10529 ns_ext_tuples * sizeof(struct wmi_ns_offload_params); 10530 } 10531 10532 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10533 if (!skb) 10534 return -ENOMEM; 10535 10536 buf_ptr = skb->data; 10537 cmd = buf_ptr; 10538 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 10539 sizeof(*cmd)); 10540 cmd->flags = cpu_to_le32(0); 10541 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 10542 cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples); 10543 10544 buf_ptr += sizeof(*cmd); 10545 10546 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0); 10547 ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable); 10548 10549 if (ns_ext_tuples) 10550 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1); 10551 10552 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID); 10553 } 10554 10555 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 10556 struct ath12k_link_vif *arvif, bool enable) 10557 { 10558 struct ath12k_rekey_data *rekey_data = &arvif->rekey_data; 10559 struct wmi_gtk_rekey_offload_cmd *cmd; 10560 struct sk_buff *skb; 10561 __le64 replay_ctr; 10562 int len; 10563 10564 len = sizeof(*cmd); 10565 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10566 if (!skb) 10567 return -ENOMEM; 10568 10569 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data; 10570 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd)); 10571 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 10572 10573 if (enable) { 10574 cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE); 10575 10576 /* the length in rekey_data and cmd is equal */ 10577 memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck)); 10578 memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek)); 10579 10580 replay_ctr = cpu_to_le64(rekey_data->replay_ctr); 10581 memcpy(cmd->replay_ctr, &replay_ctr, 10582 sizeof(replay_ctr)); 10583 } else { 10584 cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE); 10585 } 10586 10587 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n", 10588 arvif->vdev_id, enable); 10589 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID); 10590 } 10591 10592 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 10593 struct ath12k_link_vif *arvif) 10594 { 10595 struct wmi_gtk_rekey_offload_cmd *cmd; 10596 struct sk_buff *skb; 10597 int len; 10598 10599 len = sizeof(*cmd); 10600 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10601 if (!skb) 10602 return -ENOMEM; 10603 10604 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data; 10605 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd)); 10606 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 10607 cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE); 10608 10609 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n", 10610 arvif->vdev_id); 10611 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID); 10612 } 10613 10614 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 10615 const struct wmi_sta_keepalive_arg *arg) 10616 { 10617 struct wmi_sta_keepalive_arp_resp_params *arp; 10618 struct ath12k_wmi_pdev *wmi = ar->wmi; 10619 struct wmi_sta_keepalive_cmd *cmd; 10620 struct sk_buff *skb; 10621 size_t len; 10622 10623 len = sizeof(*cmd) + sizeof(*arp); 10624 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 10625 if (!skb) 10626 return -ENOMEM; 10627 10628 cmd = (struct wmi_sta_keepalive_cmd *)skb->data; 10629 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd)); 10630 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 10631 cmd->enabled = cpu_to_le32(arg->enabled); 10632 cmd->interval = cpu_to_le32(arg->interval); 10633 cmd->method = cpu_to_le32(arg->method); 10634 10635 arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1); 10636 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 10637 sizeof(*arp)); 10638 if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE || 10639 arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) { 10640 arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr); 10641 arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr); 10642 ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr); 10643 } 10644 10645 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10646 "wmi sta keepalive vdev %d enabled %d method %d interval %d\n", 10647 arg->vdev_id, arg->enabled, arg->method, arg->interval); 10648 10649 return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID); 10650 } 10651 10652 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params) 10653 { 10654 struct wmi_mlo_setup_cmd *cmd; 10655 struct ath12k_wmi_pdev *wmi = ar->wmi; 10656 u32 *partner_links, num_links; 10657 int i, ret, buf_len, arg_len; 10658 struct sk_buff *skb; 10659 struct wmi_tlv *tlv; 10660 void *ptr; 10661 10662 num_links = mlo_params->num_partner_links; 10663 arg_len = num_links * sizeof(u32); 10664 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len; 10665 10666 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 10667 if (!skb) 10668 return -ENOMEM; 10669 10670 cmd = (struct wmi_mlo_setup_cmd *)skb->data; 10671 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD, 10672 sizeof(*cmd)); 10673 cmd->mld_group_id = mlo_params->group_id; 10674 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 10675 ptr = skb->data + sizeof(*cmd); 10676 10677 tlv = ptr; 10678 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 10679 ptr += TLV_HDR_SIZE; 10680 10681 partner_links = ptr; 10682 for (i = 0; i < num_links; i++) 10683 partner_links[i] = mlo_params->partner_link_id[i]; 10684 10685 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID); 10686 if (ret) { 10687 ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n", 10688 ret); 10689 dev_kfree_skb(skb); 10690 return ret; 10691 } 10692 10693 return 0; 10694 } 10695 10696 int ath12k_wmi_mlo_ready(struct ath12k *ar) 10697 { 10698 struct wmi_mlo_ready_cmd *cmd; 10699 struct ath12k_wmi_pdev *wmi = ar->wmi; 10700 struct sk_buff *skb; 10701 int ret, len; 10702 10703 len = sizeof(*cmd); 10704 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 10705 if (!skb) 10706 return -ENOMEM; 10707 10708 cmd = (struct wmi_mlo_ready_cmd *)skb->data; 10709 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD, 10710 sizeof(*cmd)); 10711 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 10712 10713 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID); 10714 if (ret) { 10715 ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n", 10716 ret); 10717 dev_kfree_skb(skb); 10718 return ret; 10719 } 10720 10721 return 0; 10722 } 10723 10724 int ath12k_wmi_mlo_teardown(struct ath12k *ar) 10725 { 10726 struct wmi_mlo_teardown_cmd *cmd; 10727 struct ath12k_wmi_pdev *wmi = ar->wmi; 10728 struct sk_buff *skb; 10729 int ret, len; 10730 10731 len = sizeof(*cmd); 10732 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 10733 if (!skb) 10734 return -ENOMEM; 10735 10736 cmd = (struct wmi_mlo_teardown_cmd *)skb->data; 10737 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD, 10738 sizeof(*cmd)); 10739 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 10740 cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON; 10741 10742 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID); 10743 if (ret) { 10744 ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n", 10745 ret); 10746 dev_kfree_skb(skb); 10747 return ret; 10748 } 10749 10750 return 0; 10751 } 10752 10753 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar) 10754 { 10755 return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 10756 ar->ab->wmi_ab.svc_map) && ar->supports_6ghz; 10757 } 10758 10759 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar, 10760 u32 vdev_id, 10761 struct ath12k_reg_tpc_power_info *param) 10762 { 10763 struct wmi_vdev_set_tpc_power_cmd *cmd; 10764 struct ath12k_wmi_pdev *wmi = ar->wmi; 10765 struct wmi_vdev_ch_power_params *ch; 10766 int i, ret, len, array_len; 10767 struct sk_buff *skb; 10768 struct wmi_tlv *tlv; 10769 u8 *ptr; 10770 10771 array_len = sizeof(*ch) * param->num_pwr_levels; 10772 len = sizeof(*cmd) + TLV_HDR_SIZE + array_len; 10773 10774 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 10775 if (!skb) 10776 return -ENOMEM; 10777 10778 ptr = skb->data; 10779 10780 cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr; 10781 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD, 10782 sizeof(*cmd)); 10783 cmd->vdev_id = cpu_to_le32(vdev_id); 10784 cmd->psd_power = cpu_to_le32(param->is_psd_power); 10785 cmd->eirp_power = cpu_to_le32(param->eirp_power); 10786 cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type); 10787 10788 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10789 "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n", 10790 vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type); 10791 10792 ptr += sizeof(*cmd); 10793 tlv = (struct wmi_tlv *)ptr; 10794 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len); 10795 10796 ptr += TLV_HDR_SIZE; 10797 ch = (struct wmi_vdev_ch_power_params *)ptr; 10798 10799 for (i = 0; i < param->num_pwr_levels; i++, ch++) { 10800 ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO, 10801 sizeof(*ch)); 10802 ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq); 10803 ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power); 10804 10805 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n", 10806 ch->chan_cfreq, ch->tx_power); 10807 } 10808 10809 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID); 10810 if (ret) { 10811 ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n"); 10812 dev_kfree_skb(skb); 10813 return ret; 10814 } 10815 10816 return 0; 10817 } 10818 10819 static int 10820 ath12k_wmi_fill_disallowed_bmap(struct ath12k_base *ab, 10821 struct wmi_disallowed_mlo_mode_bitmap_params *dislw_bmap, 10822 struct wmi_mlo_link_set_active_arg *arg) 10823 { 10824 struct wmi_ml_disallow_mode_bmap_arg *dislw_bmap_arg; 10825 u8 i; 10826 10827 if (arg->num_disallow_mode_comb > 10828 ARRAY_SIZE(arg->disallow_bmap)) { 10829 ath12k_warn(ab, "invalid num_disallow_mode_comb: %d", 10830 arg->num_disallow_mode_comb); 10831 return -EINVAL; 10832 } 10833 10834 dislw_bmap_arg = &arg->disallow_bmap[0]; 10835 for (i = 0; i < arg->num_disallow_mode_comb; i++) { 10836 dislw_bmap->tlv_header = 10837 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*dislw_bmap)); 10838 dislw_bmap->disallowed_mode_bitmap = 10839 cpu_to_le32(dislw_bmap_arg->disallowed_mode); 10840 dislw_bmap->ieee_link_id_comb = 10841 le32_encode_bits(dislw_bmap_arg->ieee_link_id[0], 10842 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1) | 10843 le32_encode_bits(dislw_bmap_arg->ieee_link_id[1], 10844 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2) | 10845 le32_encode_bits(dislw_bmap_arg->ieee_link_id[2], 10846 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3) | 10847 le32_encode_bits(dislw_bmap_arg->ieee_link_id[3], 10848 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4); 10849 10850 ath12k_dbg(ab, ATH12K_DBG_WMI, 10851 "entry %d disallowed_mode %d ieee_link_id_comb 0x%x", 10852 i, dislw_bmap_arg->disallowed_mode, 10853 dislw_bmap_arg->ieee_link_id_comb); 10854 dislw_bmap++; 10855 dislw_bmap_arg++; 10856 } 10857 10858 return 0; 10859 } 10860 10861 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab, 10862 struct wmi_mlo_link_set_active_arg *arg) 10863 { 10864 struct wmi_disallowed_mlo_mode_bitmap_params *disallowed_mode_bmap; 10865 struct wmi_mlo_set_active_link_number_params *link_num_param; 10866 u32 num_link_num_param = 0, num_vdev_bitmap = 0; 10867 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 10868 struct wmi_mlo_link_set_active_cmd *cmd; 10869 u32 num_inactive_vdev_bitmap = 0; 10870 u32 num_disallow_mode_comb = 0; 10871 struct wmi_tlv *tlv; 10872 struct sk_buff *skb; 10873 __le32 *vdev_bitmap; 10874 void *buf_ptr; 10875 int i, ret; 10876 u32 len; 10877 10878 if (!arg->num_vdev_bitmap && !arg->num_link_entry) { 10879 ath12k_warn(ab, "Invalid num_vdev_bitmap and num_link_entry"); 10880 return -EINVAL; 10881 } 10882 10883 switch (arg->force_mode) { 10884 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM: 10885 case WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM: 10886 num_link_num_param = arg->num_link_entry; 10887 fallthrough; 10888 case WMI_MLO_LINK_FORCE_MODE_ACTIVE: 10889 case WMI_MLO_LINK_FORCE_MODE_INACTIVE: 10890 case WMI_MLO_LINK_FORCE_MODE_NO_FORCE: 10891 num_vdev_bitmap = arg->num_vdev_bitmap; 10892 break; 10893 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE: 10894 num_vdev_bitmap = arg->num_vdev_bitmap; 10895 num_inactive_vdev_bitmap = arg->num_inactive_vdev_bitmap; 10896 break; 10897 default: 10898 ath12k_warn(ab, "Invalid force mode: %u", arg->force_mode); 10899 return -EINVAL; 10900 } 10901 10902 num_disallow_mode_comb = arg->num_disallow_mode_comb; 10903 len = sizeof(*cmd) + 10904 TLV_HDR_SIZE + sizeof(*link_num_param) * num_link_num_param + 10905 TLV_HDR_SIZE + sizeof(*vdev_bitmap) * num_vdev_bitmap + 10906 TLV_HDR_SIZE + TLV_HDR_SIZE + TLV_HDR_SIZE + 10907 TLV_HDR_SIZE + sizeof(*disallowed_mode_bmap) * num_disallow_mode_comb; 10908 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) 10909 len += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap; 10910 10911 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 10912 if (!skb) 10913 return -ENOMEM; 10914 10915 cmd = (struct wmi_mlo_link_set_active_cmd *)skb->data; 10916 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_LINK_SET_ACTIVE_CMD, 10917 sizeof(*cmd)); 10918 cmd->force_mode = cpu_to_le32(arg->force_mode); 10919 cmd->reason = cpu_to_le32(arg->reason); 10920 ath12k_dbg(ab, ATH12K_DBG_WMI, 10921 "mode %d reason %d num_link_num_param %d num_vdev_bitmap %d inactive %d num_disallow_mode_comb %d", 10922 arg->force_mode, arg->reason, num_link_num_param, 10923 num_vdev_bitmap, num_inactive_vdev_bitmap, 10924 num_disallow_mode_comb); 10925 10926 buf_ptr = skb->data + sizeof(*cmd); 10927 tlv = buf_ptr; 10928 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10929 sizeof(*link_num_param) * num_link_num_param); 10930 buf_ptr += TLV_HDR_SIZE; 10931 10932 if (num_link_num_param) { 10933 cmd->ctrl_flags = 10934 le32_encode_bits(arg->ctrl_flags.dync_force_link_num ? 1 : 0, 10935 CRTL_F_DYNC_FORCE_LINK_NUM); 10936 10937 link_num_param = buf_ptr; 10938 for (i = 0; i < num_link_num_param; i++) { 10939 link_num_param->tlv_header = 10940 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*link_num_param)); 10941 link_num_param->num_of_link = 10942 cpu_to_le32(arg->link_num[i].num_of_link); 10943 link_num_param->vdev_type = 10944 cpu_to_le32(arg->link_num[i].vdev_type); 10945 link_num_param->vdev_subtype = 10946 cpu_to_le32(arg->link_num[i].vdev_subtype); 10947 link_num_param->home_freq = 10948 cpu_to_le32(arg->link_num[i].home_freq); 10949 ath12k_dbg(ab, ATH12K_DBG_WMI, 10950 "entry %d num_of_link %d vdev type %d subtype %d freq %d control_flags %d", 10951 i, arg->link_num[i].num_of_link, 10952 arg->link_num[i].vdev_type, 10953 arg->link_num[i].vdev_subtype, 10954 arg->link_num[i].home_freq, 10955 __le32_to_cpu(cmd->ctrl_flags)); 10956 link_num_param++; 10957 } 10958 10959 buf_ptr += sizeof(*link_num_param) * num_link_num_param; 10960 } 10961 10962 tlv = buf_ptr; 10963 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 10964 sizeof(*vdev_bitmap) * num_vdev_bitmap); 10965 buf_ptr += TLV_HDR_SIZE; 10966 10967 if (num_vdev_bitmap) { 10968 vdev_bitmap = buf_ptr; 10969 for (i = 0; i < num_vdev_bitmap; i++) { 10970 vdev_bitmap[i] = cpu_to_le32(arg->vdev_bitmap[i]); 10971 ath12k_dbg(ab, ATH12K_DBG_WMI, "entry %d vdev_id_bitmap 0x%x", 10972 i, arg->vdev_bitmap[i]); 10973 } 10974 10975 buf_ptr += sizeof(*vdev_bitmap) * num_vdev_bitmap; 10976 } 10977 10978 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) { 10979 tlv = buf_ptr; 10980 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 10981 sizeof(*vdev_bitmap) * 10982 num_inactive_vdev_bitmap); 10983 buf_ptr += TLV_HDR_SIZE; 10984 10985 if (num_inactive_vdev_bitmap) { 10986 vdev_bitmap = buf_ptr; 10987 for (i = 0; i < num_inactive_vdev_bitmap; i++) { 10988 vdev_bitmap[i] = 10989 cpu_to_le32(arg->inactive_vdev_bitmap[i]); 10990 ath12k_dbg(ab, ATH12K_DBG_WMI, 10991 "entry %d inactive_vdev_id_bitmap 0x%x", 10992 i, arg->inactive_vdev_bitmap[i]); 10993 } 10994 10995 buf_ptr += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap; 10996 } 10997 } else { 10998 /* add empty vdev bitmap2 tlv */ 10999 tlv = buf_ptr; 11000 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 11001 buf_ptr += TLV_HDR_SIZE; 11002 } 11003 11004 /* add empty ieee_link_id_bitmap tlv */ 11005 tlv = buf_ptr; 11006 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 11007 buf_ptr += TLV_HDR_SIZE; 11008 11009 /* add empty ieee_link_id_bitmap2 tlv */ 11010 tlv = buf_ptr; 11011 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 11012 buf_ptr += TLV_HDR_SIZE; 11013 11014 tlv = buf_ptr; 11015 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 11016 sizeof(*disallowed_mode_bmap) * 11017 arg->num_disallow_mode_comb); 11018 buf_ptr += TLV_HDR_SIZE; 11019 11020 ret = ath12k_wmi_fill_disallowed_bmap(ab, buf_ptr, arg); 11021 if (ret) 11022 goto free_skb; 11023 11024 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_MLO_LINK_SET_ACTIVE_CMDID); 11025 if (ret) { 11026 ath12k_warn(ab, 11027 "failed to send WMI_MLO_LINK_SET_ACTIVE_CMDID: %d\n", ret); 11028 goto free_skb; 11029 } 11030 11031 ath12k_dbg(ab, ATH12K_DBG_WMI, "WMI mlo link set active cmd"); 11032 11033 return ret; 11034 11035 free_skb: 11036 dev_kfree_skb(skb); 11037 return ret; 11038 } 11039