1 // SPDX-License-Identifier: BSD-3-Clause-Clear 2 /* 3 * Copyright (c) 2018-2021 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 #include <linux/skbuff.h> 7 #include <linux/ctype.h> 8 #include <net/mac80211.h> 9 #include <net/cfg80211.h> 10 #include <linux/completion.h> 11 #include <linux/if_ether.h> 12 #include <linux/types.h> 13 #include <linux/pci.h> 14 #include <linux/uuid.h> 15 #include <linux/time.h> 16 #include <linux/of.h> 17 #include "core.h" 18 #include "debugfs.h" 19 #include "debug.h" 20 #include "mac.h" 21 #include "hw.h" 22 #include "peer.h" 23 #include "p2p.h" 24 #include "testmode.h" 25 26 struct ath12k_wmi_svc_ready_parse { 27 bool wmi_svc_bitmap_done; 28 }; 29 30 struct wmi_tlv_fw_stats_parse { 31 const struct wmi_stats_event *ev; 32 struct ath12k_fw_stats *stats; 33 }; 34 35 struct ath12k_wmi_dma_ring_caps_parse { 36 struct ath12k_wmi_dma_ring_caps_params *dma_ring_caps; 37 u32 n_dma_ring_caps; 38 }; 39 40 struct ath12k_wmi_service_ext_arg { 41 u32 default_conc_scan_config_bits; 42 u32 default_fw_config_bits; 43 struct ath12k_wmi_ppe_threshold_arg ppet; 44 u32 he_cap_info; 45 u32 mpdu_density; 46 u32 max_bssid_rx_filters; 47 u32 num_hw_modes; 48 u32 num_phy; 49 }; 50 51 struct ath12k_wmi_svc_rdy_ext_parse { 52 struct ath12k_wmi_service_ext_arg arg; 53 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps; 54 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 55 u32 n_hw_mode_caps; 56 u32 tot_phy_id; 57 struct ath12k_wmi_hw_mode_cap_params pref_hw_mode_caps; 58 struct ath12k_wmi_mac_phy_caps_params *mac_phy_caps; 59 u32 n_mac_phy_caps; 60 const struct ath12k_wmi_soc_hal_reg_caps_params *soc_hal_reg_caps; 61 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_hal_reg_caps; 62 u32 n_ext_hal_reg_caps; 63 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 64 bool hw_mode_done; 65 bool mac_phy_done; 66 bool ext_hal_reg_done; 67 bool mac_phy_chainmask_combo_done; 68 bool mac_phy_chainmask_cap_done; 69 bool oem_dma_ring_cap_done; 70 bool dma_ring_cap_done; 71 }; 72 73 struct ath12k_wmi_svc_rdy_ext2_arg { 74 u32 reg_db_version; 75 u32 hw_min_max_tx_power_2ghz; 76 u32 hw_min_max_tx_power_5ghz; 77 u32 chwidth_num_peer_caps; 78 u32 preamble_puncture_bw; 79 u32 max_user_per_ppdu_ofdma; 80 u32 max_user_per_ppdu_mumimo; 81 u32 target_cap_flags; 82 u32 eht_cap_mac_info[WMI_MAX_EHTCAP_MAC_SIZE]; 83 u32 max_num_linkview_peers; 84 u32 max_num_msduq_supported_per_tid; 85 u32 default_num_msduq_supported_per_tid; 86 }; 87 88 struct ath12k_wmi_svc_rdy_ext2_parse { 89 struct ath12k_wmi_svc_rdy_ext2_arg arg; 90 struct ath12k_wmi_dma_ring_caps_parse dma_caps_parse; 91 bool dma_ring_cap_done; 92 bool spectral_bin_scaling_done; 93 bool mac_phy_caps_ext_done; 94 bool hal_reg_caps_ext2_done; 95 bool scan_radio_caps_ext2_done; 96 bool twt_caps_done; 97 bool htt_msdu_idx_to_qtype_map_done; 98 bool dbs_or_sbs_cap_ext_done; 99 }; 100 101 struct ath12k_wmi_rdy_parse { 102 u32 num_extra_mac_addr; 103 }; 104 105 struct ath12k_wmi_dma_buf_release_arg { 106 struct ath12k_wmi_dma_buf_release_fixed_params fixed; 107 const struct ath12k_wmi_dma_buf_release_entry_params *buf_entry; 108 const struct ath12k_wmi_dma_buf_release_meta_data_params *meta_data; 109 u32 num_buf_entry; 110 u32 num_meta; 111 bool buf_entry_done; 112 bool meta_data_done; 113 }; 114 115 struct ath12k_wmi_tlv_policy { 116 size_t min_len; 117 }; 118 119 struct wmi_tlv_mgmt_rx_parse { 120 const struct ath12k_wmi_mgmt_rx_params *fixed; 121 const u8 *frame_buf; 122 bool frame_buf_done; 123 }; 124 125 static const struct ath12k_wmi_tlv_policy ath12k_wmi_tlv_policies[] = { 126 [WMI_TAG_ARRAY_BYTE] = { .min_len = 0 }, 127 [WMI_TAG_ARRAY_UINT32] = { .min_len = 0 }, 128 [WMI_TAG_SERVICE_READY_EVENT] = { 129 .min_len = sizeof(struct wmi_service_ready_event) }, 130 [WMI_TAG_SERVICE_READY_EXT_EVENT] = { 131 .min_len = sizeof(struct wmi_service_ready_ext_event) }, 132 [WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS] = { 133 .min_len = sizeof(struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params) }, 134 [WMI_TAG_SOC_HAL_REG_CAPABILITIES] = { 135 .min_len = sizeof(struct ath12k_wmi_soc_hal_reg_caps_params) }, 136 [WMI_TAG_VDEV_START_RESPONSE_EVENT] = { 137 .min_len = sizeof(struct wmi_vdev_start_resp_event) }, 138 [WMI_TAG_PEER_DELETE_RESP_EVENT] = { 139 .min_len = sizeof(struct wmi_peer_delete_resp_event) }, 140 [WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT] = { 141 .min_len = sizeof(struct wmi_bcn_tx_status_event) }, 142 [WMI_TAG_VDEV_STOPPED_EVENT] = { 143 .min_len = sizeof(struct wmi_vdev_stopped_event) }, 144 [WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT] = { 145 .min_len = sizeof(struct wmi_reg_chan_list_cc_ext_event) }, 146 [WMI_TAG_MGMT_RX_HDR] = { 147 .min_len = sizeof(struct ath12k_wmi_mgmt_rx_params) }, 148 [WMI_TAG_MGMT_TX_COMPL_EVENT] = { 149 .min_len = sizeof(struct wmi_mgmt_tx_compl_event) }, 150 [WMI_TAG_SCAN_EVENT] = { 151 .min_len = sizeof(struct wmi_scan_event) }, 152 [WMI_TAG_PEER_STA_KICKOUT_EVENT] = { 153 .min_len = sizeof(struct wmi_peer_sta_kickout_event) }, 154 [WMI_TAG_ROAM_EVENT] = { 155 .min_len = sizeof(struct wmi_roam_event) }, 156 [WMI_TAG_CHAN_INFO_EVENT] = { 157 .min_len = sizeof(struct wmi_chan_info_event) }, 158 [WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT] = { 159 .min_len = sizeof(struct wmi_pdev_bss_chan_info_event) }, 160 [WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT] = { 161 .min_len = sizeof(struct wmi_vdev_install_key_compl_event) }, 162 [WMI_TAG_READY_EVENT] = { 163 .min_len = sizeof(struct ath12k_wmi_ready_event_min_params) }, 164 [WMI_TAG_SERVICE_AVAILABLE_EVENT] = { 165 .min_len = sizeof(struct wmi_service_available_event) }, 166 [WMI_TAG_PEER_ASSOC_CONF_EVENT] = { 167 .min_len = sizeof(struct wmi_peer_assoc_conf_event) }, 168 [WMI_TAG_RFKILL_EVENT] = { 169 .min_len = sizeof(struct wmi_rfkill_state_change_event) }, 170 [WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT] = { 171 .min_len = sizeof(struct wmi_pdev_ctl_failsafe_chk_event) }, 172 [WMI_TAG_HOST_SWFDA_EVENT] = { 173 .min_len = sizeof(struct wmi_fils_discovery_event) }, 174 [WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT] = { 175 .min_len = sizeof(struct wmi_probe_resp_tx_status_event) }, 176 [WMI_TAG_VDEV_DELETE_RESP_EVENT] = { 177 .min_len = sizeof(struct wmi_vdev_delete_resp_event) }, 178 [WMI_TAG_TWT_ENABLE_COMPLETE_EVENT] = { 179 .min_len = sizeof(struct wmi_twt_enable_event) }, 180 [WMI_TAG_TWT_DISABLE_COMPLETE_EVENT] = { 181 .min_len = sizeof(struct wmi_twt_disable_event) }, 182 [WMI_TAG_P2P_NOA_INFO] = { 183 .min_len = sizeof(struct ath12k_wmi_p2p_noa_info) }, 184 [WMI_TAG_P2P_NOA_EVENT] = { 185 .min_len = sizeof(struct wmi_p2p_noa_event) }, 186 [WMI_TAG_11D_NEW_COUNTRY_EVENT] = { 187 .min_len = sizeof(struct wmi_11d_new_cc_event) }, 188 }; 189 190 __le32 ath12k_wmi_tlv_hdr(u32 cmd, u32 len) 191 { 192 return le32_encode_bits(cmd, WMI_TLV_TAG) | 193 le32_encode_bits(len, WMI_TLV_LEN); 194 } 195 196 static __le32 ath12k_wmi_tlv_cmd_hdr(u32 cmd, u32 len) 197 { 198 return ath12k_wmi_tlv_hdr(cmd, len - TLV_HDR_SIZE); 199 } 200 201 void ath12k_wmi_init_qcn9274(struct ath12k_base *ab, 202 struct ath12k_wmi_resource_config_arg *config) 203 { 204 config->num_vdevs = ab->num_radios * TARGET_NUM_VDEVS; 205 config->num_peers = ab->num_radios * 206 ath12k_core_get_max_peers_per_radio(ab); 207 config->num_tids = ath12k_core_get_max_num_tids(ab); 208 config->num_offload_peers = TARGET_NUM_OFFLD_PEERS; 209 config->num_offload_reorder_buffs = TARGET_NUM_OFFLD_REORDER_BUFFS; 210 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 211 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 212 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 213 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 214 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 215 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 216 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 217 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 218 219 if (test_bit(ATH12K_FLAG_RAW_MODE, &ab->dev_flags)) 220 config->rx_decap_mode = TARGET_DECAP_MODE_RAW; 221 else 222 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 223 224 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 225 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 226 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 227 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 228 config->num_mcast_groups = TARGET_NUM_MCAST_GROUPS; 229 config->num_mcast_table_elems = TARGET_NUM_MCAST_TABLE_ELEMS; 230 config->mcast2ucast_mode = TARGET_MCAST2UCAST_MODE; 231 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 232 config->num_wds_entries = TARGET_NUM_WDS_ENTRIES; 233 config->dma_burst_size = TARGET_DMA_BURST_SIZE; 234 config->rx_skip_defrag_timeout_dup_detection_check = 235 TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 236 config->vow_config = TARGET_VOW_CONFIG; 237 config->gtk_offload_max_vdev = TARGET_GTK_OFFLOAD_MAX_VDEV; 238 config->num_msdu_desc = TARGET_NUM_MSDU_DESC; 239 config->beacon_tx_offload_max_vdev = ab->num_radios * TARGET_MAX_BCN_OFFLD; 240 config->rx_batchmode = TARGET_RX_BATCHMODE; 241 /* Indicates host supports peer map v3 and unmap v2 support */ 242 config->peer_map_unmap_version = 0x32; 243 config->twt_ap_pdev_count = ab->num_radios; 244 config->twt_ap_sta_count = 1000; 245 config->ema_max_vap_cnt = ab->num_radios; 246 config->ema_max_profile_period = TARGET_EMA_MAX_PROFILE_PERIOD; 247 config->beacon_tx_offload_max_vdev += config->ema_max_vap_cnt; 248 249 if (test_bit(WMI_TLV_SERVICE_PEER_METADATA_V1A_V1B_SUPPORT, ab->wmi_ab.svc_map)) 250 config->peer_metadata_ver = ATH12K_PEER_METADATA_V1B; 251 } 252 253 void ath12k_wmi_init_wcn7850(struct ath12k_base *ab, 254 struct ath12k_wmi_resource_config_arg *config) 255 { 256 config->num_vdevs = 4; 257 config->num_peers = 16; 258 config->num_tids = 32; 259 260 config->num_offload_peers = 3; 261 config->num_offload_reorder_buffs = 3; 262 config->num_peer_keys = TARGET_NUM_PEER_KEYS; 263 config->ast_skid_limit = TARGET_AST_SKID_LIMIT; 264 config->tx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 265 config->rx_chain_mask = (1 << ab->target_caps.num_rf_chains) - 1; 266 config->rx_timeout_pri[0] = TARGET_RX_TIMEOUT_LO_PRI; 267 config->rx_timeout_pri[1] = TARGET_RX_TIMEOUT_LO_PRI; 268 config->rx_timeout_pri[2] = TARGET_RX_TIMEOUT_LO_PRI; 269 config->rx_timeout_pri[3] = TARGET_RX_TIMEOUT_HI_PRI; 270 config->rx_decap_mode = TARGET_DECAP_MODE_NATIVE_WIFI; 271 config->scan_max_pending_req = TARGET_SCAN_MAX_PENDING_REQS; 272 config->bmiss_offload_max_vdev = TARGET_BMISS_OFFLOAD_MAX_VDEV; 273 config->roam_offload_max_vdev = TARGET_ROAM_OFFLOAD_MAX_VDEV; 274 config->roam_offload_max_ap_profiles = TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES; 275 config->num_mcast_groups = 0; 276 config->num_mcast_table_elems = 0; 277 config->mcast2ucast_mode = 0; 278 config->tx_dbg_log_size = TARGET_TX_DBG_LOG_SIZE; 279 config->num_wds_entries = 0; 280 config->dma_burst_size = 0; 281 config->rx_skip_defrag_timeout_dup_detection_check = 0; 282 config->vow_config = TARGET_VOW_CONFIG; 283 config->gtk_offload_max_vdev = 2; 284 config->num_msdu_desc = 0x400; 285 config->beacon_tx_offload_max_vdev = 2; 286 config->rx_batchmode = TARGET_RX_BATCHMODE; 287 288 config->peer_map_unmap_version = 0x1; 289 config->use_pdev_id = 1; 290 config->max_frag_entries = 0xa; 291 config->num_tdls_vdevs = 0x1; 292 config->num_tdls_conn_table_entries = 8; 293 config->beacon_tx_offload_max_vdev = 0x2; 294 config->num_multicast_filter_entries = 0x20; 295 config->num_wow_filters = 0x16; 296 config->num_keep_alive_pattern = 0; 297 } 298 299 #define PRIMAP(_hw_mode_) \ 300 [_hw_mode_] = _hw_mode_##_PRI 301 302 static const int ath12k_hw_mode_pri_map[] = { 303 PRIMAP(WMI_HOST_HW_MODE_SINGLE), 304 PRIMAP(WMI_HOST_HW_MODE_DBS), 305 PRIMAP(WMI_HOST_HW_MODE_SBS_PASSIVE), 306 PRIMAP(WMI_HOST_HW_MODE_SBS), 307 PRIMAP(WMI_HOST_HW_MODE_DBS_SBS), 308 PRIMAP(WMI_HOST_HW_MODE_DBS_OR_SBS), 309 /* keep last */ 310 PRIMAP(WMI_HOST_HW_MODE_MAX), 311 }; 312 313 static int 314 ath12k_wmi_tlv_iter(struct ath12k_base *ab, const void *ptr, size_t len, 315 int (*iter)(struct ath12k_base *ab, u16 tag, u16 len, 316 const void *ptr, void *data), 317 void *data) 318 { 319 const void *begin = ptr; 320 const struct wmi_tlv *tlv; 321 u16 tlv_tag, tlv_len; 322 int ret; 323 324 while (len > 0) { 325 if (len < sizeof(*tlv)) { 326 ath12k_err(ab, "wmi tlv parse failure at byte %zd (%zu bytes left, %zu expected)\n", 327 ptr - begin, len, sizeof(*tlv)); 328 return -EINVAL; 329 } 330 331 tlv = ptr; 332 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 333 tlv_len = le32_get_bits(tlv->header, WMI_TLV_LEN); 334 ptr += sizeof(*tlv); 335 len -= sizeof(*tlv); 336 337 if (tlv_len > len) { 338 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%zu bytes left, %u expected)\n", 339 tlv_tag, ptr - begin, len, tlv_len); 340 return -EINVAL; 341 } 342 343 if (tlv_tag < ARRAY_SIZE(ath12k_wmi_tlv_policies) && 344 ath12k_wmi_tlv_policies[tlv_tag].min_len && 345 ath12k_wmi_tlv_policies[tlv_tag].min_len > tlv_len) { 346 ath12k_err(ab, "wmi tlv parse failure of tag %u at byte %zd (%u bytes is less than min length %zu)\n", 347 tlv_tag, ptr - begin, tlv_len, 348 ath12k_wmi_tlv_policies[tlv_tag].min_len); 349 return -EINVAL; 350 } 351 352 ret = iter(ab, tlv_tag, tlv_len, ptr, data); 353 if (ret) 354 return ret; 355 356 ptr += tlv_len; 357 len -= tlv_len; 358 } 359 360 return 0; 361 } 362 363 static int ath12k_wmi_tlv_iter_parse(struct ath12k_base *ab, u16 tag, u16 len, 364 const void *ptr, void *data) 365 { 366 const void **tb = data; 367 368 if (tag < WMI_TAG_MAX) 369 tb[tag] = ptr; 370 371 return 0; 372 } 373 374 static int ath12k_wmi_tlv_parse(struct ath12k_base *ar, const void **tb, 375 const void *ptr, size_t len) 376 { 377 return ath12k_wmi_tlv_iter(ar, ptr, len, ath12k_wmi_tlv_iter_parse, 378 (void *)tb); 379 } 380 381 static const void ** 382 ath12k_wmi_tlv_parse_alloc(struct ath12k_base *ab, 383 struct sk_buff *skb, gfp_t gfp) 384 { 385 const void **tb; 386 int ret; 387 388 tb = kcalloc(WMI_TAG_MAX, sizeof(*tb), gfp); 389 if (!tb) 390 return ERR_PTR(-ENOMEM); 391 392 ret = ath12k_wmi_tlv_parse(ab, tb, skb->data, skb->len); 393 if (ret) { 394 kfree(tb); 395 return ERR_PTR(ret); 396 } 397 398 return tb; 399 } 400 401 static int ath12k_wmi_cmd_send_nowait(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 402 u32 cmd_id) 403 { 404 struct ath12k_skb_cb *skb_cb = ATH12K_SKB_CB(skb); 405 struct ath12k_base *ab = wmi->wmi_ab->ab; 406 struct wmi_cmd_hdr *cmd_hdr; 407 int ret; 408 409 if (!skb_push(skb, sizeof(struct wmi_cmd_hdr))) 410 return -ENOMEM; 411 412 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 413 cmd_hdr->cmd_id = le32_encode_bits(cmd_id, WMI_CMD_HDR_CMD_ID); 414 415 memset(skb_cb, 0, sizeof(*skb_cb)); 416 ret = ath12k_htc_send(&ab->htc, wmi->eid, skb); 417 418 if (ret) 419 goto err_pull; 420 421 return 0; 422 423 err_pull: 424 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 425 return ret; 426 } 427 428 int ath12k_wmi_cmd_send(struct ath12k_wmi_pdev *wmi, struct sk_buff *skb, 429 u32 cmd_id) 430 { 431 struct ath12k_wmi_base *wmi_ab = wmi->wmi_ab; 432 int ret = -EOPNOTSUPP; 433 434 might_sleep(); 435 436 wait_event_timeout(wmi_ab->tx_credits_wq, ({ 437 ret = ath12k_wmi_cmd_send_nowait(wmi, skb, cmd_id); 438 439 if (ret && test_bit(ATH12K_FLAG_CRASH_FLUSH, &wmi_ab->ab->dev_flags)) 440 ret = -ESHUTDOWN; 441 442 (ret != -EAGAIN); 443 }), WMI_SEND_TIMEOUT_HZ); 444 445 if (ret == -EAGAIN) 446 ath12k_warn(wmi_ab->ab, "wmi command %d timeout\n", cmd_id); 447 448 return ret; 449 } 450 451 static int ath12k_pull_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 452 const void *ptr, 453 struct ath12k_wmi_service_ext_arg *arg) 454 { 455 const struct wmi_service_ready_ext_event *ev = ptr; 456 int i; 457 458 if (!ev) 459 return -EINVAL; 460 461 /* Move this to host based bitmap */ 462 arg->default_conc_scan_config_bits = 463 le32_to_cpu(ev->default_conc_scan_config_bits); 464 arg->default_fw_config_bits = le32_to_cpu(ev->default_fw_config_bits); 465 arg->he_cap_info = le32_to_cpu(ev->he_cap_info); 466 arg->mpdu_density = le32_to_cpu(ev->mpdu_density); 467 arg->max_bssid_rx_filters = le32_to_cpu(ev->max_bssid_rx_filters); 468 arg->ppet.numss_m1 = le32_to_cpu(ev->ppet.numss_m1); 469 arg->ppet.ru_bit_mask = le32_to_cpu(ev->ppet.ru_info); 470 471 for (i = 0; i < WMI_MAX_NUM_SS; i++) 472 arg->ppet.ppet16_ppet8_ru3_ru0[i] = 473 le32_to_cpu(ev->ppet.ppet16_ppet8_ru3_ru0[i]); 474 475 return 0; 476 } 477 478 static int 479 ath12k_pull_mac_phy_cap_svc_ready_ext(struct ath12k_wmi_pdev *wmi_handle, 480 struct ath12k_wmi_svc_rdy_ext_parse *svc, 481 u8 hw_mode_id, u8 phy_id, 482 struct ath12k_pdev *pdev) 483 { 484 const struct ath12k_wmi_mac_phy_caps_params *mac_caps; 485 const struct ath12k_wmi_soc_mac_phy_hw_mode_caps_params *hw_caps = svc->hw_caps; 486 const struct ath12k_wmi_hw_mode_cap_params *wmi_hw_mode_caps = svc->hw_mode_caps; 487 const struct ath12k_wmi_mac_phy_caps_params *wmi_mac_phy_caps = svc->mac_phy_caps; 488 struct ath12k_base *ab = wmi_handle->wmi_ab->ab; 489 struct ath12k_band_cap *cap_band; 490 struct ath12k_pdev_cap *pdev_cap = &pdev->cap; 491 struct ath12k_fw_pdev *fw_pdev; 492 u32 phy_map; 493 u32 hw_idx, phy_idx = 0; 494 int i; 495 496 if (!hw_caps || !wmi_hw_mode_caps || !svc->soc_hal_reg_caps) 497 return -EINVAL; 498 499 for (hw_idx = 0; hw_idx < le32_to_cpu(hw_caps->num_hw_modes); hw_idx++) { 500 if (hw_mode_id == le32_to_cpu(wmi_hw_mode_caps[hw_idx].hw_mode_id)) 501 break; 502 503 phy_map = le32_to_cpu(wmi_hw_mode_caps[hw_idx].phy_id_map); 504 phy_idx = fls(phy_map); 505 } 506 507 if (hw_idx == le32_to_cpu(hw_caps->num_hw_modes)) 508 return -EINVAL; 509 510 phy_idx += phy_id; 511 if (phy_id >= le32_to_cpu(svc->soc_hal_reg_caps->num_phy)) 512 return -EINVAL; 513 514 mac_caps = wmi_mac_phy_caps + phy_idx; 515 516 pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 517 pdev->hw_link_id = ath12k_wmi_mac_phy_get_hw_link_id(mac_caps); 518 pdev_cap->supported_bands |= le32_to_cpu(mac_caps->supported_bands); 519 pdev_cap->ampdu_density = le32_to_cpu(mac_caps->ampdu_density); 520 521 fw_pdev = &ab->fw_pdev[ab->fw_pdev_count]; 522 fw_pdev->supported_bands = le32_to_cpu(mac_caps->supported_bands); 523 fw_pdev->pdev_id = ath12k_wmi_mac_phy_get_pdev_id(mac_caps); 524 fw_pdev->phy_id = le32_to_cpu(mac_caps->phy_id); 525 ab->fw_pdev_count++; 526 527 /* Take non-zero tx/rx chainmask. If tx/rx chainmask differs from 528 * band to band for a single radio, need to see how this should be 529 * handled. 530 */ 531 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) { 532 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_2g); 533 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_2g); 534 } else if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) { 535 pdev_cap->vht_cap = le32_to_cpu(mac_caps->vht_cap_info_5g); 536 pdev_cap->vht_mcs = le32_to_cpu(mac_caps->vht_supp_mcs_5g); 537 pdev_cap->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 538 pdev_cap->tx_chain_mask = le32_to_cpu(mac_caps->tx_chain_mask_5g); 539 pdev_cap->rx_chain_mask = le32_to_cpu(mac_caps->rx_chain_mask_5g); 540 pdev_cap->nss_ratio_enabled = 541 WMI_NSS_RATIO_EN_DIS_GET(mac_caps->nss_ratio); 542 pdev_cap->nss_ratio_info = 543 WMI_NSS_RATIO_INFO_GET(mac_caps->nss_ratio); 544 } else { 545 return -EINVAL; 546 } 547 548 /* tx/rx chainmask reported from fw depends on the actual hw chains used, 549 * For example, for 4x4 capable macphys, first 4 chains can be used for first 550 * mac and the remaining 4 chains can be used for the second mac or vice-versa. 551 * In this case, tx/rx chainmask 0xf will be advertised for first mac and 0xf0 552 * will be advertised for second mac or vice-versa. Compute the shift value 553 * for tx/rx chainmask which will be used to advertise supported ht/vht rates to 554 * mac80211. 555 */ 556 pdev_cap->tx_chain_mask_shift = 557 find_first_bit((unsigned long *)&pdev_cap->tx_chain_mask, 32); 558 pdev_cap->rx_chain_mask_shift = 559 find_first_bit((unsigned long *)&pdev_cap->rx_chain_mask, 32); 560 561 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_2GHZ_CAP) { 562 cap_band = &pdev_cap->band[NL80211_BAND_2GHZ]; 563 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 564 cap_band->max_bw_supported = le32_to_cpu(mac_caps->max_bw_supported_2g); 565 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_2g); 566 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_2g); 567 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_2g_ext); 568 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_2g); 569 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 570 cap_band->he_cap_phy_info[i] = 571 le32_to_cpu(mac_caps->he_cap_phy_info_2g[i]); 572 573 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet2g.numss_m1); 574 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet2g.ru_info); 575 576 for (i = 0; i < WMI_MAX_NUM_SS; i++) 577 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 578 le32_to_cpu(mac_caps->he_ppet2g.ppet16_ppet8_ru3_ru0[i]); 579 } 580 581 if (le32_to_cpu(mac_caps->supported_bands) & WMI_HOST_WLAN_5GHZ_CAP) { 582 cap_band = &pdev_cap->band[NL80211_BAND_5GHZ]; 583 cap_band->phy_id = le32_to_cpu(mac_caps->phy_id); 584 cap_band->max_bw_supported = 585 le32_to_cpu(mac_caps->max_bw_supported_5g); 586 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 587 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 588 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 589 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 590 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 591 cap_band->he_cap_phy_info[i] = 592 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 593 594 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 595 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 596 597 for (i = 0; i < WMI_MAX_NUM_SS; i++) 598 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 599 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 600 601 cap_band = &pdev_cap->band[NL80211_BAND_6GHZ]; 602 cap_band->max_bw_supported = 603 le32_to_cpu(mac_caps->max_bw_supported_5g); 604 cap_band->ht_cap_info = le32_to_cpu(mac_caps->ht_cap_info_5g); 605 cap_band->he_cap_info[0] = le32_to_cpu(mac_caps->he_cap_info_5g); 606 cap_band->he_cap_info[1] = le32_to_cpu(mac_caps->he_cap_info_5g_ext); 607 cap_band->he_mcs = le32_to_cpu(mac_caps->he_supp_mcs_5g); 608 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 609 cap_band->he_cap_phy_info[i] = 610 le32_to_cpu(mac_caps->he_cap_phy_info_5g[i]); 611 612 cap_band->he_ppet.numss_m1 = le32_to_cpu(mac_caps->he_ppet5g.numss_m1); 613 cap_band->he_ppet.ru_bit_mask = le32_to_cpu(mac_caps->he_ppet5g.ru_info); 614 615 for (i = 0; i < WMI_MAX_NUM_SS; i++) 616 cap_band->he_ppet.ppet16_ppet8_ru3_ru0[i] = 617 le32_to_cpu(mac_caps->he_ppet5g.ppet16_ppet8_ru3_ru0[i]); 618 } 619 620 return 0; 621 } 622 623 static int 624 ath12k_pull_reg_cap_svc_rdy_ext(struct ath12k_wmi_pdev *wmi_handle, 625 const struct ath12k_wmi_soc_hal_reg_caps_params *reg_caps, 626 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_caps, 627 u8 phy_idx, 628 struct ath12k_wmi_hal_reg_capabilities_ext_arg *param) 629 { 630 const struct ath12k_wmi_hal_reg_caps_ext_params *ext_reg_cap; 631 632 if (!reg_caps || !ext_caps) 633 return -EINVAL; 634 635 if (phy_idx >= le32_to_cpu(reg_caps->num_phy)) 636 return -EINVAL; 637 638 ext_reg_cap = &ext_caps[phy_idx]; 639 640 param->phy_id = le32_to_cpu(ext_reg_cap->phy_id); 641 param->eeprom_reg_domain = le32_to_cpu(ext_reg_cap->eeprom_reg_domain); 642 param->eeprom_reg_domain_ext = 643 le32_to_cpu(ext_reg_cap->eeprom_reg_domain_ext); 644 param->regcap1 = le32_to_cpu(ext_reg_cap->regcap1); 645 param->regcap2 = le32_to_cpu(ext_reg_cap->regcap2); 646 /* check if param->wireless_mode is needed */ 647 param->low_2ghz_chan = le32_to_cpu(ext_reg_cap->low_2ghz_chan); 648 param->high_2ghz_chan = le32_to_cpu(ext_reg_cap->high_2ghz_chan); 649 param->low_5ghz_chan = le32_to_cpu(ext_reg_cap->low_5ghz_chan); 650 param->high_5ghz_chan = le32_to_cpu(ext_reg_cap->high_5ghz_chan); 651 652 return 0; 653 } 654 655 static int ath12k_pull_service_ready_tlv(struct ath12k_base *ab, 656 const void *evt_buf, 657 struct ath12k_wmi_target_cap_arg *cap) 658 { 659 const struct wmi_service_ready_event *ev = evt_buf; 660 661 if (!ev) { 662 ath12k_err(ab, "%s: failed by NULL param\n", 663 __func__); 664 return -EINVAL; 665 } 666 667 cap->phy_capability = le32_to_cpu(ev->phy_capability); 668 cap->max_frag_entry = le32_to_cpu(ev->max_frag_entry); 669 cap->num_rf_chains = le32_to_cpu(ev->num_rf_chains); 670 cap->ht_cap_info = le32_to_cpu(ev->ht_cap_info); 671 cap->vht_cap_info = le32_to_cpu(ev->vht_cap_info); 672 cap->vht_supp_mcs = le32_to_cpu(ev->vht_supp_mcs); 673 cap->hw_min_tx_power = le32_to_cpu(ev->hw_min_tx_power); 674 cap->hw_max_tx_power = le32_to_cpu(ev->hw_max_tx_power); 675 cap->sys_cap_info = le32_to_cpu(ev->sys_cap_info); 676 cap->min_pkt_size_enable = le32_to_cpu(ev->min_pkt_size_enable); 677 cap->max_bcn_ie_size = le32_to_cpu(ev->max_bcn_ie_size); 678 cap->max_num_scan_channels = le32_to_cpu(ev->max_num_scan_channels); 679 cap->max_supported_macs = le32_to_cpu(ev->max_supported_macs); 680 cap->wmi_fw_sub_feat_caps = le32_to_cpu(ev->wmi_fw_sub_feat_caps); 681 cap->txrx_chainmask = le32_to_cpu(ev->txrx_chainmask); 682 cap->default_dbs_hw_mode_index = le32_to_cpu(ev->default_dbs_hw_mode_index); 683 cap->num_msdu_desc = le32_to_cpu(ev->num_msdu_desc); 684 685 return 0; 686 } 687 688 /* Save the wmi_service_bitmap into a linear bitmap. The wmi_services in 689 * wmi_service ready event are advertised in b0-b3 (LSB 4-bits) of each 690 * 4-byte word. 691 */ 692 static void ath12k_wmi_service_bitmap_copy(struct ath12k_wmi_pdev *wmi, 693 const u32 *wmi_svc_bm) 694 { 695 int i, j; 696 697 for (i = 0, j = 0; i < WMI_SERVICE_BM_SIZE && j < WMI_MAX_SERVICE; i++) { 698 do { 699 if (wmi_svc_bm[i] & BIT(j % WMI_SERVICE_BITS_IN_SIZE32)) 700 set_bit(j, wmi->wmi_ab->svc_map); 701 } while (++j % WMI_SERVICE_BITS_IN_SIZE32); 702 } 703 } 704 705 static int ath12k_wmi_svc_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 706 const void *ptr, void *data) 707 { 708 struct ath12k_wmi_svc_ready_parse *svc_ready = data; 709 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 710 u16 expect_len; 711 712 switch (tag) { 713 case WMI_TAG_SERVICE_READY_EVENT: 714 if (ath12k_pull_service_ready_tlv(ab, ptr, &ab->target_caps)) 715 return -EINVAL; 716 break; 717 718 case WMI_TAG_ARRAY_UINT32: 719 if (!svc_ready->wmi_svc_bitmap_done) { 720 expect_len = WMI_SERVICE_BM_SIZE * sizeof(u32); 721 if (len < expect_len) { 722 ath12k_warn(ab, "invalid len %d for the tag 0x%x\n", 723 len, tag); 724 return -EINVAL; 725 } 726 727 ath12k_wmi_service_bitmap_copy(wmi_handle, ptr); 728 729 svc_ready->wmi_svc_bitmap_done = true; 730 } 731 break; 732 default: 733 break; 734 } 735 736 return 0; 737 } 738 739 static int ath12k_service_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 740 { 741 struct ath12k_wmi_svc_ready_parse svc_ready = { }; 742 int ret; 743 744 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 745 ath12k_wmi_svc_rdy_parse, 746 &svc_ready); 747 if (ret) { 748 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 749 return ret; 750 } 751 752 return 0; 753 } 754 755 static u32 ath12k_wmi_mgmt_get_freq(struct ath12k *ar, 756 struct ieee80211_tx_info *info) 757 { 758 struct ath12k_base *ab = ar->ab; 759 u32 freq = 0; 760 761 if (ab->hw_params->single_pdev_only && 762 ar->scan.is_roc && 763 (info->flags & IEEE80211_TX_CTL_TX_OFFCHAN)) 764 freq = ar->scan.roc_freq; 765 766 return freq; 767 } 768 769 struct sk_buff *ath12k_wmi_alloc_skb(struct ath12k_wmi_base *wmi_ab, u32 len) 770 { 771 struct sk_buff *skb; 772 struct ath12k_base *ab = wmi_ab->ab; 773 u32 round_len = roundup(len, 4); 774 775 skb = ath12k_htc_alloc_skb(ab, WMI_SKB_HEADROOM + round_len); 776 if (!skb) 777 return NULL; 778 779 skb_reserve(skb, WMI_SKB_HEADROOM); 780 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 781 ath12k_warn(ab, "unaligned WMI skb data\n"); 782 783 skb_put(skb, round_len); 784 memset(skb->data, 0, round_len); 785 786 return skb; 787 } 788 789 int ath12k_wmi_mgmt_send(struct ath12k *ar, u32 vdev_id, u32 buf_id, 790 struct sk_buff *frame) 791 { 792 struct ath12k_wmi_pdev *wmi = ar->wmi; 793 struct wmi_mgmt_send_cmd *cmd; 794 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(frame); 795 struct wmi_tlv *frame_tlv; 796 struct sk_buff *skb; 797 u32 buf_len; 798 int ret, len; 799 800 buf_len = min_t(int, frame->len, WMI_MGMT_SEND_DOWNLD_LEN); 801 802 len = sizeof(*cmd) + sizeof(*frame_tlv) + roundup(buf_len, 4); 803 804 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 805 if (!skb) 806 return -ENOMEM; 807 808 cmd = (struct wmi_mgmt_send_cmd *)skb->data; 809 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MGMT_TX_SEND_CMD, 810 sizeof(*cmd)); 811 cmd->vdev_id = cpu_to_le32(vdev_id); 812 cmd->desc_id = cpu_to_le32(buf_id); 813 cmd->chanfreq = cpu_to_le32(ath12k_wmi_mgmt_get_freq(ar, info)); 814 cmd->paddr_lo = cpu_to_le32(lower_32_bits(ATH12K_SKB_CB(frame)->paddr)); 815 cmd->paddr_hi = cpu_to_le32(upper_32_bits(ATH12K_SKB_CB(frame)->paddr)); 816 cmd->frame_len = cpu_to_le32(frame->len); 817 cmd->buf_len = cpu_to_le32(buf_len); 818 cmd->tx_params_valid = 0; 819 820 frame_tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 821 frame_tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, buf_len); 822 823 memcpy(frame_tlv->value, frame->data, buf_len); 824 825 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MGMT_TX_SEND_CMDID); 826 if (ret) { 827 ath12k_warn(ar->ab, 828 "failed to submit WMI_MGMT_TX_SEND_CMDID cmd\n"); 829 dev_kfree_skb(skb); 830 } 831 832 return ret; 833 } 834 835 int ath12k_wmi_send_stats_request_cmd(struct ath12k *ar, u32 stats_id, 836 u32 vdev_id, u32 pdev_id) 837 { 838 struct ath12k_wmi_pdev *wmi = ar->wmi; 839 struct wmi_request_stats_cmd *cmd; 840 struct sk_buff *skb; 841 int ret; 842 843 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 844 if (!skb) 845 return -ENOMEM; 846 847 cmd = (struct wmi_request_stats_cmd *)skb->data; 848 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REQUEST_STATS_CMD, 849 sizeof(*cmd)); 850 851 cmd->stats_id = cpu_to_le32(stats_id); 852 cmd->vdev_id = cpu_to_le32(vdev_id); 853 cmd->pdev_id = cpu_to_le32(pdev_id); 854 855 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_STATS_CMDID); 856 if (ret) { 857 ath12k_warn(ar->ab, "failed to send WMI_REQUEST_STATS cmd\n"); 858 dev_kfree_skb(skb); 859 } 860 861 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 862 "WMI request stats 0x%x vdev id %d pdev id %d\n", 863 stats_id, vdev_id, pdev_id); 864 865 return ret; 866 } 867 868 int ath12k_wmi_vdev_create(struct ath12k *ar, u8 *macaddr, 869 struct ath12k_wmi_vdev_create_arg *args) 870 { 871 struct ath12k_wmi_pdev *wmi = ar->wmi; 872 struct wmi_vdev_create_cmd *cmd; 873 struct sk_buff *skb; 874 struct ath12k_wmi_vdev_txrx_streams_params *txrx_streams; 875 bool is_ml_vdev = is_valid_ether_addr(args->mld_addr); 876 struct wmi_vdev_create_mlo_params *ml_params; 877 struct wmi_tlv *tlv; 878 int ret, len; 879 void *ptr; 880 881 /* It can be optimized my sending tx/rx chain configuration 882 * only for supported bands instead of always sending it for 883 * both the bands. 884 */ 885 len = sizeof(*cmd) + TLV_HDR_SIZE + 886 (WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams)) + 887 (is_ml_vdev ? TLV_HDR_SIZE + sizeof(*ml_params) : 0); 888 889 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 890 if (!skb) 891 return -ENOMEM; 892 893 cmd = (struct wmi_vdev_create_cmd *)skb->data; 894 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CREATE_CMD, 895 sizeof(*cmd)); 896 897 cmd->vdev_id = cpu_to_le32(args->if_id); 898 cmd->vdev_type = cpu_to_le32(args->type); 899 cmd->vdev_subtype = cpu_to_le32(args->subtype); 900 cmd->num_cfg_txrx_streams = cpu_to_le32(WMI_NUM_SUPPORTED_BAND_MAX); 901 cmd->pdev_id = cpu_to_le32(args->pdev_id); 902 cmd->mbssid_flags = cpu_to_le32(args->mbssid_flags); 903 cmd->mbssid_tx_vdev_id = cpu_to_le32(args->mbssid_tx_vdev_id); 904 cmd->vdev_stats_id = cpu_to_le32(args->if_stats_id); 905 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 906 907 if (args->if_stats_id != ATH12K_INVAL_VDEV_STATS_ID) 908 cmd->vdev_stats_id_valid = cpu_to_le32(BIT(0)); 909 910 ptr = skb->data + sizeof(*cmd); 911 len = WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 912 913 tlv = ptr; 914 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 915 916 ptr += TLV_HDR_SIZE; 917 txrx_streams = ptr; 918 len = sizeof(*txrx_streams); 919 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 920 len); 921 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_2G); 922 txrx_streams->supported_tx_streams = 923 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].tx); 924 txrx_streams->supported_rx_streams = 925 cpu_to_le32(args->chains[NL80211_BAND_2GHZ].rx); 926 927 txrx_streams++; 928 txrx_streams->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_TXRX_STREAMS, 929 len); 930 txrx_streams->band = cpu_to_le32(WMI_TPC_CHAINMASK_CONFIG_BAND_5G); 931 txrx_streams->supported_tx_streams = 932 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].tx); 933 txrx_streams->supported_rx_streams = 934 cpu_to_le32(args->chains[NL80211_BAND_5GHZ].rx); 935 936 ptr += WMI_NUM_SUPPORTED_BAND_MAX * sizeof(*txrx_streams); 937 938 if (is_ml_vdev) { 939 tlv = ptr; 940 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 941 sizeof(*ml_params)); 942 ptr += TLV_HDR_SIZE; 943 ml_params = ptr; 944 945 ml_params->tlv_header = 946 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_CREATE_PARAMS, 947 sizeof(*ml_params)); 948 ether_addr_copy(ml_params->mld_macaddr.addr, args->mld_addr); 949 } 950 951 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 952 "WMI vdev create: id %d type %d subtype %d macaddr %pM pdevid %d\n", 953 args->if_id, args->type, args->subtype, 954 macaddr, args->pdev_id); 955 956 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_CREATE_CMDID); 957 if (ret) { 958 ath12k_warn(ar->ab, 959 "failed to submit WMI_VDEV_CREATE_CMDID\n"); 960 dev_kfree_skb(skb); 961 } 962 963 return ret; 964 } 965 966 int ath12k_wmi_vdev_delete(struct ath12k *ar, u8 vdev_id) 967 { 968 struct ath12k_wmi_pdev *wmi = ar->wmi; 969 struct wmi_vdev_delete_cmd *cmd; 970 struct sk_buff *skb; 971 int ret; 972 973 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 974 if (!skb) 975 return -ENOMEM; 976 977 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 978 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DELETE_CMD, 979 sizeof(*cmd)); 980 cmd->vdev_id = cpu_to_le32(vdev_id); 981 982 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev delete id %d\n", vdev_id); 983 984 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DELETE_CMDID); 985 if (ret) { 986 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DELETE_CMDID\n"); 987 dev_kfree_skb(skb); 988 } 989 990 return ret; 991 } 992 993 int ath12k_wmi_vdev_stop(struct ath12k *ar, u8 vdev_id) 994 { 995 struct ath12k_wmi_pdev *wmi = ar->wmi; 996 struct wmi_vdev_stop_cmd *cmd; 997 struct sk_buff *skb; 998 int ret; 999 1000 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1001 if (!skb) 1002 return -ENOMEM; 1003 1004 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 1005 1006 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_STOP_CMD, 1007 sizeof(*cmd)); 1008 cmd->vdev_id = cpu_to_le32(vdev_id); 1009 1010 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev stop id 0x%x\n", vdev_id); 1011 1012 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_STOP_CMDID); 1013 if (ret) { 1014 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_STOP cmd\n"); 1015 dev_kfree_skb(skb); 1016 } 1017 1018 return ret; 1019 } 1020 1021 int ath12k_wmi_vdev_down(struct ath12k *ar, u8 vdev_id) 1022 { 1023 struct ath12k_wmi_pdev *wmi = ar->wmi; 1024 struct wmi_vdev_down_cmd *cmd; 1025 struct sk_buff *skb; 1026 int ret; 1027 1028 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1029 if (!skb) 1030 return -ENOMEM; 1031 1032 cmd = (struct wmi_vdev_down_cmd *)skb->data; 1033 1034 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_DOWN_CMD, 1035 sizeof(*cmd)); 1036 cmd->vdev_id = cpu_to_le32(vdev_id); 1037 1038 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI vdev down id 0x%x\n", vdev_id); 1039 1040 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_DOWN_CMDID); 1041 if (ret) { 1042 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_DOWN cmd\n"); 1043 dev_kfree_skb(skb); 1044 } 1045 1046 return ret; 1047 } 1048 1049 static void ath12k_wmi_put_wmi_channel(struct ath12k_wmi_channel_params *chan, 1050 struct wmi_vdev_start_req_arg *arg) 1051 { 1052 u32 center_freq1 = arg->band_center_freq1; 1053 1054 memset(chan, 0, sizeof(*chan)); 1055 1056 chan->mhz = cpu_to_le32(arg->freq); 1057 chan->band_center_freq1 = cpu_to_le32(center_freq1); 1058 if (arg->mode == MODE_11BE_EHT320) { 1059 if (arg->freq > center_freq1) 1060 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 80); 1061 else 1062 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 80); 1063 1064 chan->band_center_freq2 = cpu_to_le32(center_freq1); 1065 1066 } else if (arg->mode == MODE_11BE_EHT160 || 1067 arg->mode == MODE_11AX_HE160) { 1068 if (arg->freq > center_freq1) 1069 chan->band_center_freq1 = cpu_to_le32(center_freq1 + 40); 1070 else 1071 chan->band_center_freq1 = cpu_to_le32(center_freq1 - 40); 1072 1073 chan->band_center_freq2 = cpu_to_le32(center_freq1); 1074 } else { 1075 chan->band_center_freq2 = 0; 1076 } 1077 1078 chan->info |= le32_encode_bits(arg->mode, WMI_CHAN_INFO_MODE); 1079 if (arg->passive) 1080 chan->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 1081 if (arg->allow_ibss) 1082 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ADHOC_ALLOWED); 1083 if (arg->allow_ht) 1084 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 1085 if (arg->allow_vht) 1086 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 1087 if (arg->allow_he) 1088 chan->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 1089 if (arg->ht40plus) 1090 chan->info |= cpu_to_le32(WMI_CHAN_INFO_HT40_PLUS); 1091 if (arg->chan_radar) 1092 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 1093 if (arg->freq2_radar) 1094 chan->info |= cpu_to_le32(WMI_CHAN_INFO_DFS_FREQ2); 1095 1096 chan->reg_info_1 = le32_encode_bits(arg->max_power, 1097 WMI_CHAN_REG_INFO1_MAX_PWR) | 1098 le32_encode_bits(arg->max_reg_power, 1099 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 1100 1101 chan->reg_info_2 = le32_encode_bits(arg->max_antenna_gain, 1102 WMI_CHAN_REG_INFO2_ANT_MAX) | 1103 le32_encode_bits(arg->max_power, WMI_CHAN_REG_INFO2_MAX_TX_PWR); 1104 } 1105 1106 int ath12k_wmi_vdev_start(struct ath12k *ar, struct wmi_vdev_start_req_arg *arg, 1107 bool restart) 1108 { 1109 struct wmi_vdev_start_mlo_params *ml_params; 1110 struct wmi_partner_link_info *partner_info; 1111 struct ath12k_wmi_pdev *wmi = ar->wmi; 1112 struct wmi_vdev_start_request_cmd *cmd; 1113 struct sk_buff *skb; 1114 struct ath12k_wmi_channel_params *chan; 1115 struct wmi_tlv *tlv; 1116 void *ptr; 1117 int ret, len, i, ml_arg_size = 0; 1118 1119 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 1120 return -EINVAL; 1121 1122 len = sizeof(*cmd) + sizeof(*chan) + TLV_HDR_SIZE; 1123 1124 if (!restart && arg->ml.enabled) { 1125 ml_arg_size = TLV_HDR_SIZE + sizeof(*ml_params) + 1126 TLV_HDR_SIZE + (arg->ml.num_partner_links * 1127 sizeof(*partner_info)); 1128 len += ml_arg_size; 1129 } 1130 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1131 if (!skb) 1132 return -ENOMEM; 1133 1134 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 1135 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_START_REQUEST_CMD, 1136 sizeof(*cmd)); 1137 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1138 cmd->beacon_interval = cpu_to_le32(arg->bcn_intval); 1139 cmd->bcn_tx_rate = cpu_to_le32(arg->bcn_tx_rate); 1140 cmd->dtim_period = cpu_to_le32(arg->dtim_period); 1141 cmd->num_noa_descriptors = cpu_to_le32(arg->num_noa_descriptors); 1142 cmd->preferred_rx_streams = cpu_to_le32(arg->pref_rx_streams); 1143 cmd->preferred_tx_streams = cpu_to_le32(arg->pref_tx_streams); 1144 cmd->cac_duration_ms = cpu_to_le32(arg->cac_duration_ms); 1145 cmd->regdomain = cpu_to_le32(arg->regdomain); 1146 cmd->he_ops = cpu_to_le32(arg->he_ops); 1147 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 1148 cmd->mbssid_flags = cpu_to_le32(arg->mbssid_flags); 1149 cmd->mbssid_tx_vdev_id = cpu_to_le32(arg->mbssid_tx_vdev_id); 1150 1151 if (!restart) { 1152 if (arg->ssid) { 1153 cmd->ssid.ssid_len = cpu_to_le32(arg->ssid_len); 1154 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 1155 } 1156 if (arg->hidden_ssid) 1157 cmd->flags |= cpu_to_le32(WMI_VDEV_START_HIDDEN_SSID); 1158 if (arg->pmf_enabled) 1159 cmd->flags |= cpu_to_le32(WMI_VDEV_START_PMF_ENABLED); 1160 } 1161 1162 cmd->flags |= cpu_to_le32(WMI_VDEV_START_LDPC_RX_ENABLED); 1163 1164 ptr = skb->data + sizeof(*cmd); 1165 chan = ptr; 1166 1167 ath12k_wmi_put_wmi_channel(chan, arg); 1168 1169 chan->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 1170 sizeof(*chan)); 1171 ptr += sizeof(*chan); 1172 1173 tlv = ptr; 1174 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 1175 1176 /* Note: This is a nested TLV containing: 1177 * [wmi_tlv][ath12k_wmi_p2p_noa_descriptor][wmi_tlv].. 1178 */ 1179 1180 ptr += sizeof(*tlv); 1181 1182 if (ml_arg_size) { 1183 tlv = ptr; 1184 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1185 sizeof(*ml_params)); 1186 ptr += TLV_HDR_SIZE; 1187 1188 ml_params = ptr; 1189 1190 ml_params->tlv_header = 1191 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_VDEV_START_PARAMS, 1192 sizeof(*ml_params)); 1193 1194 ml_params->flags = le32_encode_bits(arg->ml.enabled, 1195 ATH12K_WMI_FLAG_MLO_ENABLED) | 1196 le32_encode_bits(arg->ml.assoc_link, 1197 ATH12K_WMI_FLAG_MLO_ASSOC_LINK) | 1198 le32_encode_bits(arg->ml.mcast_link, 1199 ATH12K_WMI_FLAG_MLO_MCAST_VDEV) | 1200 le32_encode_bits(arg->ml.link_add, 1201 ATH12K_WMI_FLAG_MLO_LINK_ADD); 1202 1203 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %d start ml flags 0x%x\n", 1204 arg->vdev_id, ml_params->flags); 1205 1206 ptr += sizeof(*ml_params); 1207 1208 tlv = ptr; 1209 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1210 arg->ml.num_partner_links * 1211 sizeof(*partner_info)); 1212 ptr += TLV_HDR_SIZE; 1213 1214 partner_info = ptr; 1215 1216 for (i = 0; i < arg->ml.num_partner_links; i++) { 1217 partner_info->tlv_header = 1218 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PARTNER_LINK_PARAMS, 1219 sizeof(*partner_info)); 1220 partner_info->vdev_id = 1221 cpu_to_le32(arg->ml.partner_info[i].vdev_id); 1222 partner_info->hw_link_id = 1223 cpu_to_le32(arg->ml.partner_info[i].hw_link_id); 1224 ether_addr_copy(partner_info->vdev_addr.addr, 1225 arg->ml.partner_info[i].addr); 1226 1227 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "partner vdev %d hw_link_id %d macaddr%pM\n", 1228 partner_info->vdev_id, partner_info->hw_link_id, 1229 partner_info->vdev_addr.addr); 1230 1231 partner_info++; 1232 } 1233 1234 ptr = partner_info; 1235 } 1236 1237 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "vdev %s id 0x%x freq 0x%x mode 0x%x\n", 1238 restart ? "restart" : "start", arg->vdev_id, 1239 arg->freq, arg->mode); 1240 1241 if (restart) 1242 ret = ath12k_wmi_cmd_send(wmi, skb, 1243 WMI_VDEV_RESTART_REQUEST_CMDID); 1244 else 1245 ret = ath12k_wmi_cmd_send(wmi, skb, 1246 WMI_VDEV_START_REQUEST_CMDID); 1247 if (ret) { 1248 ath12k_warn(ar->ab, "failed to submit vdev_%s cmd\n", 1249 restart ? "restart" : "start"); 1250 dev_kfree_skb(skb); 1251 } 1252 1253 return ret; 1254 } 1255 1256 int ath12k_wmi_vdev_up(struct ath12k *ar, struct ath12k_wmi_vdev_up_params *params) 1257 { 1258 struct ath12k_wmi_pdev *wmi = ar->wmi; 1259 struct wmi_vdev_up_cmd *cmd; 1260 struct sk_buff *skb; 1261 int ret; 1262 1263 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1264 if (!skb) 1265 return -ENOMEM; 1266 1267 cmd = (struct wmi_vdev_up_cmd *)skb->data; 1268 1269 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_UP_CMD, 1270 sizeof(*cmd)); 1271 cmd->vdev_id = cpu_to_le32(params->vdev_id); 1272 cmd->vdev_assoc_id = cpu_to_le32(params->aid); 1273 1274 ether_addr_copy(cmd->vdev_bssid.addr, params->bssid); 1275 1276 if (params->tx_bssid) { 1277 ether_addr_copy(cmd->tx_vdev_bssid.addr, params->tx_bssid); 1278 cmd->nontx_profile_idx = cpu_to_le32(params->nontx_profile_idx); 1279 cmd->nontx_profile_cnt = cpu_to_le32(params->nontx_profile_cnt); 1280 } 1281 1282 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1283 "WMI mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 1284 params->vdev_id, params->aid, params->bssid); 1285 1286 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_UP_CMDID); 1287 if (ret) { 1288 ath12k_warn(ar->ab, "failed to submit WMI_VDEV_UP cmd\n"); 1289 dev_kfree_skb(skb); 1290 } 1291 1292 return ret; 1293 } 1294 1295 int ath12k_wmi_send_peer_create_cmd(struct ath12k *ar, 1296 struct ath12k_wmi_peer_create_arg *arg) 1297 { 1298 struct ath12k_wmi_pdev *wmi = ar->wmi; 1299 struct wmi_peer_create_cmd *cmd; 1300 struct sk_buff *skb; 1301 int ret, len; 1302 struct wmi_peer_create_mlo_params *ml_param; 1303 void *ptr; 1304 struct wmi_tlv *tlv; 1305 1306 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*ml_param); 1307 1308 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1309 if (!skb) 1310 return -ENOMEM; 1311 1312 cmd = (struct wmi_peer_create_cmd *)skb->data; 1313 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_CREATE_CMD, 1314 sizeof(*cmd)); 1315 1316 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_addr); 1317 cmd->peer_type = cpu_to_le32(arg->peer_type); 1318 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1319 1320 ptr = skb->data + sizeof(*cmd); 1321 tlv = ptr; 1322 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 1323 sizeof(*ml_param)); 1324 ptr += TLV_HDR_SIZE; 1325 ml_param = ptr; 1326 ml_param->tlv_header = 1327 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_CREATE_PARAMS, 1328 sizeof(*ml_param)); 1329 if (arg->ml_enabled) 1330 ml_param->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 1331 1332 ptr += sizeof(*ml_param); 1333 1334 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1335 "WMI peer create vdev_id %d peer_addr %pM ml_flags 0x%x\n", 1336 arg->vdev_id, arg->peer_addr, ml_param->flags); 1337 1338 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_CREATE_CMDID); 1339 if (ret) { 1340 ath12k_warn(ar->ab, "failed to submit WMI_PEER_CREATE cmd\n"); 1341 dev_kfree_skb(skb); 1342 } 1343 1344 return ret; 1345 } 1346 1347 int ath12k_wmi_send_peer_delete_cmd(struct ath12k *ar, 1348 const u8 *peer_addr, u8 vdev_id) 1349 { 1350 struct ath12k_wmi_pdev *wmi = ar->wmi; 1351 struct wmi_peer_delete_cmd *cmd; 1352 struct sk_buff *skb; 1353 int ret; 1354 1355 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1356 if (!skb) 1357 return -ENOMEM; 1358 1359 cmd = (struct wmi_peer_delete_cmd *)skb->data; 1360 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_DELETE_CMD, 1361 sizeof(*cmd)); 1362 1363 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1364 cmd->vdev_id = cpu_to_le32(vdev_id); 1365 1366 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1367 "WMI peer delete vdev_id %d peer_addr %pM\n", 1368 vdev_id, peer_addr); 1369 1370 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_DELETE_CMDID); 1371 if (ret) { 1372 ath12k_warn(ar->ab, "failed to send WMI_PEER_DELETE cmd\n"); 1373 dev_kfree_skb(skb); 1374 } 1375 1376 return ret; 1377 } 1378 1379 int ath12k_wmi_send_pdev_set_regdomain(struct ath12k *ar, 1380 struct ath12k_wmi_pdev_set_regdomain_arg *arg) 1381 { 1382 struct ath12k_wmi_pdev *wmi = ar->wmi; 1383 struct wmi_pdev_set_regdomain_cmd *cmd; 1384 struct sk_buff *skb; 1385 int ret; 1386 1387 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1388 if (!skb) 1389 return -ENOMEM; 1390 1391 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 1392 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_REGDOMAIN_CMD, 1393 sizeof(*cmd)); 1394 1395 cmd->reg_domain = cpu_to_le32(arg->current_rd_in_use); 1396 cmd->reg_domain_2g = cpu_to_le32(arg->current_rd_2g); 1397 cmd->reg_domain_5g = cpu_to_le32(arg->current_rd_5g); 1398 cmd->conformance_test_limit_2g = cpu_to_le32(arg->ctl_2g); 1399 cmd->conformance_test_limit_5g = cpu_to_le32(arg->ctl_5g); 1400 cmd->dfs_domain = cpu_to_le32(arg->dfs_domain); 1401 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 1402 1403 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1404 "WMI pdev regd rd %d rd2g %d rd5g %d domain %d pdev id %d\n", 1405 arg->current_rd_in_use, arg->current_rd_2g, 1406 arg->current_rd_5g, arg->dfs_domain, arg->pdev_id); 1407 1408 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_REGDOMAIN_CMDID); 1409 if (ret) { 1410 ath12k_warn(ar->ab, 1411 "failed to send WMI_PDEV_SET_REGDOMAIN cmd\n"); 1412 dev_kfree_skb(skb); 1413 } 1414 1415 return ret; 1416 } 1417 1418 int ath12k_wmi_set_peer_param(struct ath12k *ar, const u8 *peer_addr, 1419 u32 vdev_id, u32 param_id, u32 param_val) 1420 { 1421 struct ath12k_wmi_pdev *wmi = ar->wmi; 1422 struct wmi_peer_set_param_cmd *cmd; 1423 struct sk_buff *skb; 1424 int ret; 1425 1426 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1427 if (!skb) 1428 return -ENOMEM; 1429 1430 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 1431 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_SET_PARAM_CMD, 1432 sizeof(*cmd)); 1433 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1434 cmd->vdev_id = cpu_to_le32(vdev_id); 1435 cmd->param_id = cpu_to_le32(param_id); 1436 cmd->param_value = cpu_to_le32(param_val); 1437 1438 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1439 "WMI vdev %d peer 0x%pM set param %d value %d\n", 1440 vdev_id, peer_addr, param_id, param_val); 1441 1442 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_SET_PARAM_CMDID); 1443 if (ret) { 1444 ath12k_warn(ar->ab, "failed to send WMI_PEER_SET_PARAM cmd\n"); 1445 dev_kfree_skb(skb); 1446 } 1447 1448 return ret; 1449 } 1450 1451 int ath12k_wmi_send_peer_flush_tids_cmd(struct ath12k *ar, 1452 u8 peer_addr[ETH_ALEN], 1453 u32 peer_tid_bitmap, 1454 u8 vdev_id) 1455 { 1456 struct ath12k_wmi_pdev *wmi = ar->wmi; 1457 struct wmi_peer_flush_tids_cmd *cmd; 1458 struct sk_buff *skb; 1459 int ret; 1460 1461 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1462 if (!skb) 1463 return -ENOMEM; 1464 1465 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 1466 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_FLUSH_TIDS_CMD, 1467 sizeof(*cmd)); 1468 1469 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1470 cmd->peer_tid_bitmap = cpu_to_le32(peer_tid_bitmap); 1471 cmd->vdev_id = cpu_to_le32(vdev_id); 1472 1473 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1474 "WMI peer flush vdev_id %d peer_addr %pM tids %08x\n", 1475 vdev_id, peer_addr, peer_tid_bitmap); 1476 1477 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_FLUSH_TIDS_CMDID); 1478 if (ret) { 1479 ath12k_warn(ar->ab, 1480 "failed to send WMI_PEER_FLUSH_TIDS cmd\n"); 1481 dev_kfree_skb(skb); 1482 } 1483 1484 return ret; 1485 } 1486 1487 int ath12k_wmi_peer_rx_reorder_queue_setup(struct ath12k *ar, 1488 int vdev_id, const u8 *addr, 1489 dma_addr_t paddr, u8 tid, 1490 u8 ba_window_size_valid, 1491 u32 ba_window_size) 1492 { 1493 struct wmi_peer_reorder_queue_setup_cmd *cmd; 1494 struct sk_buff *skb; 1495 int ret; 1496 1497 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 1498 if (!skb) 1499 return -ENOMEM; 1500 1501 cmd = (struct wmi_peer_reorder_queue_setup_cmd *)skb->data; 1502 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_SETUP_CMD, 1503 sizeof(*cmd)); 1504 1505 ether_addr_copy(cmd->peer_macaddr.addr, addr); 1506 cmd->vdev_id = cpu_to_le32(vdev_id); 1507 cmd->tid = cpu_to_le32(tid); 1508 cmd->queue_ptr_lo = cpu_to_le32(lower_32_bits(paddr)); 1509 cmd->queue_ptr_hi = cpu_to_le32(upper_32_bits(paddr)); 1510 cmd->queue_no = cpu_to_le32(tid); 1511 cmd->ba_window_size_valid = cpu_to_le32(ba_window_size_valid); 1512 cmd->ba_window_size = cpu_to_le32(ba_window_size); 1513 1514 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1515 "wmi rx reorder queue setup addr %pM vdev_id %d tid %d\n", 1516 addr, vdev_id, tid); 1517 1518 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 1519 WMI_PEER_REORDER_QUEUE_SETUP_CMDID); 1520 if (ret) { 1521 ath12k_warn(ar->ab, 1522 "failed to send WMI_PEER_REORDER_QUEUE_SETUP\n"); 1523 dev_kfree_skb(skb); 1524 } 1525 1526 return ret; 1527 } 1528 1529 int 1530 ath12k_wmi_rx_reord_queue_remove(struct ath12k *ar, 1531 struct ath12k_wmi_rx_reorder_queue_remove_arg *arg) 1532 { 1533 struct ath12k_wmi_pdev *wmi = ar->wmi; 1534 struct wmi_peer_reorder_queue_remove_cmd *cmd; 1535 struct sk_buff *skb; 1536 int ret; 1537 1538 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1539 if (!skb) 1540 return -ENOMEM; 1541 1542 cmd = (struct wmi_peer_reorder_queue_remove_cmd *)skb->data; 1543 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_REORDER_QUEUE_REMOVE_CMD, 1544 sizeof(*cmd)); 1545 1546 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr); 1547 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1548 cmd->tid_mask = cpu_to_le32(arg->peer_tid_bitmap); 1549 1550 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1551 "%s: peer_macaddr %pM vdev_id %d, tid_map %d", __func__, 1552 arg->peer_macaddr, arg->vdev_id, arg->peer_tid_bitmap); 1553 1554 ret = ath12k_wmi_cmd_send(wmi, skb, 1555 WMI_PEER_REORDER_QUEUE_REMOVE_CMDID); 1556 if (ret) { 1557 ath12k_warn(ar->ab, 1558 "failed to send WMI_PEER_REORDER_QUEUE_REMOVE_CMDID"); 1559 dev_kfree_skb(skb); 1560 } 1561 1562 return ret; 1563 } 1564 1565 int ath12k_wmi_pdev_set_param(struct ath12k *ar, u32 param_id, 1566 u32 param_value, u8 pdev_id) 1567 { 1568 struct ath12k_wmi_pdev *wmi = ar->wmi; 1569 struct wmi_pdev_set_param_cmd *cmd; 1570 struct sk_buff *skb; 1571 int ret; 1572 1573 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1574 if (!skb) 1575 return -ENOMEM; 1576 1577 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 1578 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_PARAM_CMD, 1579 sizeof(*cmd)); 1580 cmd->pdev_id = cpu_to_le32(pdev_id); 1581 cmd->param_id = cpu_to_le32(param_id); 1582 cmd->param_value = cpu_to_le32(param_value); 1583 1584 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1585 "WMI pdev set param %d pdev id %d value %d\n", 1586 param_id, pdev_id, param_value); 1587 1588 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SET_PARAM_CMDID); 1589 if (ret) { 1590 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1591 dev_kfree_skb(skb); 1592 } 1593 1594 return ret; 1595 } 1596 1597 int ath12k_wmi_pdev_set_ps_mode(struct ath12k *ar, int vdev_id, u32 enable) 1598 { 1599 struct ath12k_wmi_pdev *wmi = ar->wmi; 1600 struct wmi_pdev_set_ps_mode_cmd *cmd; 1601 struct sk_buff *skb; 1602 int ret; 1603 1604 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1605 if (!skb) 1606 return -ENOMEM; 1607 1608 cmd = (struct wmi_pdev_set_ps_mode_cmd *)skb->data; 1609 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_MODE_CMD, 1610 sizeof(*cmd)); 1611 cmd->vdev_id = cpu_to_le32(vdev_id); 1612 cmd->sta_ps_mode = cpu_to_le32(enable); 1613 1614 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1615 "WMI vdev set psmode %d vdev id %d\n", 1616 enable, vdev_id); 1617 1618 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_MODE_CMDID); 1619 if (ret) { 1620 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SET_PARAM cmd\n"); 1621 dev_kfree_skb(skb); 1622 } 1623 1624 return ret; 1625 } 1626 1627 int ath12k_wmi_pdev_suspend(struct ath12k *ar, u32 suspend_opt, 1628 u32 pdev_id) 1629 { 1630 struct ath12k_wmi_pdev *wmi = ar->wmi; 1631 struct wmi_pdev_suspend_cmd *cmd; 1632 struct sk_buff *skb; 1633 int ret; 1634 1635 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1636 if (!skb) 1637 return -ENOMEM; 1638 1639 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 1640 1641 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SUSPEND_CMD, 1642 sizeof(*cmd)); 1643 1644 cmd->suspend_opt = cpu_to_le32(suspend_opt); 1645 cmd->pdev_id = cpu_to_le32(pdev_id); 1646 1647 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1648 "WMI pdev suspend pdev_id %d\n", pdev_id); 1649 1650 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_SUSPEND_CMDID); 1651 if (ret) { 1652 ath12k_warn(ar->ab, "failed to send WMI_PDEV_SUSPEND cmd\n"); 1653 dev_kfree_skb(skb); 1654 } 1655 1656 return ret; 1657 } 1658 1659 int ath12k_wmi_pdev_resume(struct ath12k *ar, u32 pdev_id) 1660 { 1661 struct ath12k_wmi_pdev *wmi = ar->wmi; 1662 struct wmi_pdev_resume_cmd *cmd; 1663 struct sk_buff *skb; 1664 int ret; 1665 1666 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1667 if (!skb) 1668 return -ENOMEM; 1669 1670 cmd = (struct wmi_pdev_resume_cmd *)skb->data; 1671 1672 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_RESUME_CMD, 1673 sizeof(*cmd)); 1674 cmd->pdev_id = cpu_to_le32(pdev_id); 1675 1676 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1677 "WMI pdev resume pdev id %d\n", pdev_id); 1678 1679 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_RESUME_CMDID); 1680 if (ret) { 1681 ath12k_warn(ar->ab, "failed to send WMI_PDEV_RESUME cmd\n"); 1682 dev_kfree_skb(skb); 1683 } 1684 1685 return ret; 1686 } 1687 1688 /* TODO FW Support for the cmd is not available yet. 1689 * Can be tested once the command and corresponding 1690 * event is implemented in FW 1691 */ 1692 int ath12k_wmi_pdev_bss_chan_info_request(struct ath12k *ar, 1693 enum wmi_bss_chan_info_req_type type) 1694 { 1695 struct ath12k_wmi_pdev *wmi = ar->wmi; 1696 struct wmi_pdev_bss_chan_info_req_cmd *cmd; 1697 struct sk_buff *skb; 1698 int ret; 1699 1700 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1701 if (!skb) 1702 return -ENOMEM; 1703 1704 cmd = (struct wmi_pdev_bss_chan_info_req_cmd *)skb->data; 1705 1706 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BSS_CHAN_INFO_REQUEST, 1707 sizeof(*cmd)); 1708 cmd->req_type = cpu_to_le32(type); 1709 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1710 1711 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1712 "WMI bss chan info req type %d\n", type); 1713 1714 ret = ath12k_wmi_cmd_send(wmi, skb, 1715 WMI_PDEV_BSS_CHAN_INFO_REQUEST_CMDID); 1716 if (ret) { 1717 ath12k_warn(ar->ab, 1718 "failed to send WMI_PDEV_BSS_CHAN_INFO_REQUEST cmd\n"); 1719 dev_kfree_skb(skb); 1720 } 1721 1722 return ret; 1723 } 1724 1725 int ath12k_wmi_send_set_ap_ps_param_cmd(struct ath12k *ar, u8 *peer_addr, 1726 struct ath12k_wmi_ap_ps_arg *arg) 1727 { 1728 struct ath12k_wmi_pdev *wmi = ar->wmi; 1729 struct wmi_ap_ps_peer_cmd *cmd; 1730 struct sk_buff *skb; 1731 int ret; 1732 1733 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1734 if (!skb) 1735 return -ENOMEM; 1736 1737 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 1738 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_AP_PS_PEER_CMD, 1739 sizeof(*cmd)); 1740 1741 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 1742 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 1743 cmd->param = cpu_to_le32(arg->param); 1744 cmd->value = cpu_to_le32(arg->value); 1745 1746 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1747 "WMI set ap ps vdev id %d peer %pM param %d value %d\n", 1748 arg->vdev_id, peer_addr, arg->param, arg->value); 1749 1750 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_AP_PS_PEER_PARAM_CMDID); 1751 if (ret) { 1752 ath12k_warn(ar->ab, 1753 "failed to send WMI_AP_PS_PEER_PARAM_CMDID\n"); 1754 dev_kfree_skb(skb); 1755 } 1756 1757 return ret; 1758 } 1759 1760 int ath12k_wmi_set_sta_ps_param(struct ath12k *ar, u32 vdev_id, 1761 u32 param, u32 param_value) 1762 { 1763 struct ath12k_wmi_pdev *wmi = ar->wmi; 1764 struct wmi_sta_powersave_param_cmd *cmd; 1765 struct sk_buff *skb; 1766 int ret; 1767 1768 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1769 if (!skb) 1770 return -ENOMEM; 1771 1772 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 1773 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_POWERSAVE_PARAM_CMD, 1774 sizeof(*cmd)); 1775 1776 cmd->vdev_id = cpu_to_le32(vdev_id); 1777 cmd->param = cpu_to_le32(param); 1778 cmd->value = cpu_to_le32(param_value); 1779 1780 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1781 "WMI set sta ps vdev_id %d param %d value %d\n", 1782 vdev_id, param, param_value); 1783 1784 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_STA_POWERSAVE_PARAM_CMDID); 1785 if (ret) { 1786 ath12k_warn(ar->ab, "failed to send WMI_STA_POWERSAVE_PARAM_CMDID"); 1787 dev_kfree_skb(skb); 1788 } 1789 1790 return ret; 1791 } 1792 1793 int ath12k_wmi_force_fw_hang_cmd(struct ath12k *ar, u32 type, u32 delay_time_ms) 1794 { 1795 struct ath12k_wmi_pdev *wmi = ar->wmi; 1796 struct wmi_force_fw_hang_cmd *cmd; 1797 struct sk_buff *skb; 1798 int ret, len; 1799 1800 len = sizeof(*cmd); 1801 1802 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1803 if (!skb) 1804 return -ENOMEM; 1805 1806 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 1807 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FORCE_FW_HANG_CMD, 1808 len); 1809 1810 cmd->type = cpu_to_le32(type); 1811 cmd->delay_time_ms = cpu_to_le32(delay_time_ms); 1812 1813 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_FORCE_FW_HANG_CMDID); 1814 1815 if (ret) { 1816 ath12k_warn(ar->ab, "Failed to send WMI_FORCE_FW_HANG_CMDID"); 1817 dev_kfree_skb(skb); 1818 } 1819 return ret; 1820 } 1821 1822 int ath12k_wmi_vdev_set_param_cmd(struct ath12k *ar, u32 vdev_id, 1823 u32 param_id, u32 param_value) 1824 { 1825 struct ath12k_wmi_pdev *wmi = ar->wmi; 1826 struct wmi_vdev_set_param_cmd *cmd; 1827 struct sk_buff *skb; 1828 int ret; 1829 1830 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1831 if (!skb) 1832 return -ENOMEM; 1833 1834 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 1835 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_PARAM_CMD, 1836 sizeof(*cmd)); 1837 1838 cmd->vdev_id = cpu_to_le32(vdev_id); 1839 cmd->param_id = cpu_to_le32(param_id); 1840 cmd->param_value = cpu_to_le32(param_value); 1841 1842 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1843 "WMI vdev id 0x%x set param %d value %d\n", 1844 vdev_id, param_id, param_value); 1845 1846 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_PARAM_CMDID); 1847 if (ret) { 1848 ath12k_warn(ar->ab, 1849 "failed to send WMI_VDEV_SET_PARAM_CMDID\n"); 1850 dev_kfree_skb(skb); 1851 } 1852 1853 return ret; 1854 } 1855 1856 int ath12k_wmi_send_pdev_temperature_cmd(struct ath12k *ar) 1857 { 1858 struct ath12k_wmi_pdev *wmi = ar->wmi; 1859 struct wmi_get_pdev_temperature_cmd *cmd; 1860 struct sk_buff *skb; 1861 int ret; 1862 1863 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1864 if (!skb) 1865 return -ENOMEM; 1866 1867 cmd = (struct wmi_get_pdev_temperature_cmd *)skb->data; 1868 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_GET_TEMPERATURE_CMD, 1869 sizeof(*cmd)); 1870 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 1871 1872 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1873 "WMI pdev get temperature for pdev_id %d\n", ar->pdev->pdev_id); 1874 1875 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PDEV_GET_TEMPERATURE_CMDID); 1876 if (ret) { 1877 ath12k_warn(ar->ab, "failed to send WMI_PDEV_GET_TEMPERATURE cmd\n"); 1878 dev_kfree_skb(skb); 1879 } 1880 1881 return ret; 1882 } 1883 1884 int ath12k_wmi_send_bcn_offload_control_cmd(struct ath12k *ar, 1885 u32 vdev_id, u32 bcn_ctrl_op) 1886 { 1887 struct ath12k_wmi_pdev *wmi = ar->wmi; 1888 struct wmi_bcn_offload_ctrl_cmd *cmd; 1889 struct sk_buff *skb; 1890 int ret; 1891 1892 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 1893 if (!skb) 1894 return -ENOMEM; 1895 1896 cmd = (struct wmi_bcn_offload_ctrl_cmd *)skb->data; 1897 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_OFFLOAD_CTRL_CMD, 1898 sizeof(*cmd)); 1899 1900 cmd->vdev_id = cpu_to_le32(vdev_id); 1901 cmd->bcn_ctrl_op = cpu_to_le32(bcn_ctrl_op); 1902 1903 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 1904 "WMI bcn ctrl offload vdev id %d ctrl_op %d\n", 1905 vdev_id, bcn_ctrl_op); 1906 1907 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_OFFLOAD_CTRL_CMDID); 1908 if (ret) { 1909 ath12k_warn(ar->ab, 1910 "failed to send WMI_BCN_OFFLOAD_CTRL_CMDID\n"); 1911 dev_kfree_skb(skb); 1912 } 1913 1914 return ret; 1915 } 1916 1917 int ath12k_wmi_p2p_go_bcn_ie(struct ath12k *ar, u32 vdev_id, 1918 const u8 *p2p_ie) 1919 { 1920 struct ath12k_wmi_pdev *wmi = ar->wmi; 1921 struct wmi_p2p_go_set_beacon_ie_cmd *cmd; 1922 size_t p2p_ie_len, aligned_len; 1923 struct wmi_tlv *tlv; 1924 struct sk_buff *skb; 1925 void *ptr; 1926 int ret, len; 1927 1928 p2p_ie_len = p2p_ie[1] + 2; 1929 aligned_len = roundup(p2p_ie_len, sizeof(u32)); 1930 1931 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 1932 1933 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1934 if (!skb) 1935 return -ENOMEM; 1936 1937 ptr = skb->data; 1938 cmd = ptr; 1939 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_P2P_GO_SET_BEACON_IE, 1940 sizeof(*cmd)); 1941 cmd->vdev_id = cpu_to_le32(vdev_id); 1942 cmd->ie_buf_len = cpu_to_le32(p2p_ie_len); 1943 1944 ptr += sizeof(*cmd); 1945 tlv = ptr; 1946 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 1947 aligned_len); 1948 memcpy(tlv->value, p2p_ie, p2p_ie_len); 1949 1950 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_P2P_GO_SET_BEACON_IE); 1951 if (ret) { 1952 ath12k_warn(ar->ab, "failed to send WMI_P2P_GO_SET_BEACON_IE\n"); 1953 dev_kfree_skb(skb); 1954 } 1955 1956 return ret; 1957 } 1958 1959 int ath12k_wmi_bcn_tmpl(struct ath12k_link_vif *arvif, 1960 struct ieee80211_mutable_offsets *offs, 1961 struct sk_buff *bcn, 1962 struct ath12k_wmi_bcn_tmpl_ema_arg *ema_args) 1963 { 1964 struct ath12k *ar = arvif->ar; 1965 struct ath12k_wmi_pdev *wmi = ar->wmi; 1966 struct ath12k_base *ab = ar->ab; 1967 struct wmi_bcn_tmpl_cmd *cmd; 1968 struct ath12k_wmi_bcn_prb_info_params *bcn_prb_info; 1969 struct ath12k_vif *ahvif = arvif->ahvif; 1970 struct ieee80211_bss_conf *conf; 1971 u32 vdev_id = arvif->vdev_id; 1972 struct wmi_tlv *tlv; 1973 struct sk_buff *skb; 1974 u32 ema_params = 0; 1975 void *ptr; 1976 int ret, len; 1977 size_t aligned_len = roundup(bcn->len, 4); 1978 1979 conf = ath12k_mac_get_link_bss_conf(arvif); 1980 if (!conf) { 1981 ath12k_warn(ab, 1982 "unable to access bss link conf in beacon template command for vif %pM link %u\n", 1983 ahvif->vif->addr, arvif->link_id); 1984 return -EINVAL; 1985 } 1986 1987 len = sizeof(*cmd) + sizeof(*bcn_prb_info) + TLV_HDR_SIZE + aligned_len; 1988 1989 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 1990 if (!skb) 1991 return -ENOMEM; 1992 1993 cmd = (struct wmi_bcn_tmpl_cmd *)skb->data; 1994 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_TMPL_CMD, 1995 sizeof(*cmd)); 1996 cmd->vdev_id = cpu_to_le32(vdev_id); 1997 cmd->tim_ie_offset = cpu_to_le32(offs->tim_offset); 1998 1999 if (conf->csa_active) { 2000 cmd->csa_switch_count_offset = 2001 cpu_to_le32(offs->cntdwn_counter_offs[0]); 2002 cmd->ext_csa_switch_count_offset = 2003 cpu_to_le32(offs->cntdwn_counter_offs[1]); 2004 cmd->csa_event_bitmap = cpu_to_le32(0xFFFFFFFF); 2005 arvif->current_cntdown_counter = bcn->data[offs->cntdwn_counter_offs[0]]; 2006 } 2007 2008 cmd->buf_len = cpu_to_le32(bcn->len); 2009 cmd->mbssid_ie_offset = cpu_to_le32(offs->mbssid_off); 2010 if (ema_args) { 2011 u32p_replace_bits(&ema_params, ema_args->bcn_cnt, WMI_EMA_BEACON_CNT); 2012 u32p_replace_bits(&ema_params, ema_args->bcn_index, WMI_EMA_BEACON_IDX); 2013 if (ema_args->bcn_index == 0) 2014 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_FIRST); 2015 if (ema_args->bcn_index + 1 == ema_args->bcn_cnt) 2016 u32p_replace_bits(&ema_params, 1, WMI_EMA_BEACON_LAST); 2017 cmd->ema_params = cpu_to_le32(ema_params); 2018 } 2019 2020 ptr = skb->data + sizeof(*cmd); 2021 2022 bcn_prb_info = ptr; 2023 len = sizeof(*bcn_prb_info); 2024 bcn_prb_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 2025 len); 2026 bcn_prb_info->caps = 0; 2027 bcn_prb_info->erp = 0; 2028 2029 ptr += sizeof(*bcn_prb_info); 2030 2031 tlv = ptr; 2032 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 2033 memcpy(tlv->value, bcn->data, bcn->len); 2034 2035 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_BCN_TMPL_CMDID); 2036 if (ret) { 2037 ath12k_warn(ab, "failed to send WMI_BCN_TMPL_CMDID\n"); 2038 dev_kfree_skb(skb); 2039 } 2040 2041 return ret; 2042 } 2043 2044 int ath12k_wmi_vdev_install_key(struct ath12k *ar, 2045 struct wmi_vdev_install_key_arg *arg) 2046 { 2047 struct ath12k_wmi_pdev *wmi = ar->wmi; 2048 struct wmi_vdev_install_key_cmd *cmd; 2049 struct wmi_tlv *tlv; 2050 struct sk_buff *skb; 2051 int ret, len, key_len_aligned; 2052 2053 /* WMI_TAG_ARRAY_BYTE needs to be aligned with 4, the actual key 2054 * length is specified in cmd->key_len. 2055 */ 2056 key_len_aligned = roundup(arg->key_len, 4); 2057 2058 len = sizeof(*cmd) + TLV_HDR_SIZE + key_len_aligned; 2059 2060 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2061 if (!skb) 2062 return -ENOMEM; 2063 2064 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 2065 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_INSTALL_KEY_CMD, 2066 sizeof(*cmd)); 2067 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2068 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 2069 cmd->key_idx = cpu_to_le32(arg->key_idx); 2070 cmd->key_flags = cpu_to_le32(arg->key_flags); 2071 cmd->key_cipher = cpu_to_le32(arg->key_cipher); 2072 cmd->key_len = cpu_to_le32(arg->key_len); 2073 cmd->key_txmic_len = cpu_to_le32(arg->key_txmic_len); 2074 cmd->key_rxmic_len = cpu_to_le32(arg->key_rxmic_len); 2075 2076 if (arg->key_rsc_counter) 2077 cmd->key_rsc_counter = cpu_to_le64(arg->key_rsc_counter); 2078 2079 tlv = (struct wmi_tlv *)(skb->data + sizeof(*cmd)); 2080 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, key_len_aligned); 2081 memcpy(tlv->value, arg->key_data, arg->key_len); 2082 2083 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2084 "WMI vdev install key idx %d cipher %d len %d\n", 2085 arg->key_idx, arg->key_cipher, arg->key_len); 2086 2087 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_INSTALL_KEY_CMDID); 2088 if (ret) { 2089 ath12k_warn(ar->ab, 2090 "failed to send WMI_VDEV_INSTALL_KEY cmd\n"); 2091 dev_kfree_skb(skb); 2092 } 2093 2094 return ret; 2095 } 2096 2097 static void ath12k_wmi_copy_peer_flags(struct wmi_peer_assoc_complete_cmd *cmd, 2098 struct ath12k_wmi_peer_assoc_arg *arg, 2099 bool hw_crypto_disabled) 2100 { 2101 cmd->peer_flags = 0; 2102 cmd->peer_flags_ext = 0; 2103 2104 if (arg->is_wme_set) { 2105 if (arg->qos_flag) 2106 cmd->peer_flags |= cpu_to_le32(WMI_PEER_QOS); 2107 if (arg->apsd_flag) 2108 cmd->peer_flags |= cpu_to_le32(WMI_PEER_APSD); 2109 if (arg->ht_flag) 2110 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HT); 2111 if (arg->bw_40) 2112 cmd->peer_flags |= cpu_to_le32(WMI_PEER_40MHZ); 2113 if (arg->bw_80) 2114 cmd->peer_flags |= cpu_to_le32(WMI_PEER_80MHZ); 2115 if (arg->bw_160) 2116 cmd->peer_flags |= cpu_to_le32(WMI_PEER_160MHZ); 2117 if (arg->bw_320) 2118 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_320MHZ); 2119 2120 /* Typically if STBC is enabled for VHT it should be enabled 2121 * for HT as well 2122 **/ 2123 if (arg->stbc_flag) 2124 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STBC); 2125 2126 /* Typically if LDPC is enabled for VHT it should be enabled 2127 * for HT as well 2128 **/ 2129 if (arg->ldpc_flag) 2130 cmd->peer_flags |= cpu_to_le32(WMI_PEER_LDPC); 2131 2132 if (arg->static_mimops_flag) 2133 cmd->peer_flags |= cpu_to_le32(WMI_PEER_STATIC_MIMOPS); 2134 if (arg->dynamic_mimops_flag) 2135 cmd->peer_flags |= cpu_to_le32(WMI_PEER_DYN_MIMOPS); 2136 if (arg->spatial_mux_flag) 2137 cmd->peer_flags |= cpu_to_le32(WMI_PEER_SPATIAL_MUX); 2138 if (arg->vht_flag) 2139 cmd->peer_flags |= cpu_to_le32(WMI_PEER_VHT); 2140 if (arg->he_flag) 2141 cmd->peer_flags |= cpu_to_le32(WMI_PEER_HE); 2142 if (arg->twt_requester) 2143 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_REQ); 2144 if (arg->twt_responder) 2145 cmd->peer_flags |= cpu_to_le32(WMI_PEER_TWT_RESP); 2146 if (arg->eht_flag) 2147 cmd->peer_flags_ext |= cpu_to_le32(WMI_PEER_EXT_EHT); 2148 } 2149 2150 /* Suppress authorization for all AUTH modes that need 4-way handshake 2151 * (during re-association). 2152 * Authorization will be done for these modes on key installation. 2153 */ 2154 if (arg->auth_flag) 2155 cmd->peer_flags |= cpu_to_le32(WMI_PEER_AUTH); 2156 if (arg->need_ptk_4_way) { 2157 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_PTK_4_WAY); 2158 if (!hw_crypto_disabled && arg->is_assoc) 2159 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_AUTH); 2160 } 2161 if (arg->need_gtk_2_way) 2162 cmd->peer_flags |= cpu_to_le32(WMI_PEER_NEED_GTK_2_WAY); 2163 /* safe mode bypass the 4-way handshake */ 2164 if (arg->safe_mode_enabled) 2165 cmd->peer_flags &= cpu_to_le32(~(WMI_PEER_NEED_PTK_4_WAY | 2166 WMI_PEER_NEED_GTK_2_WAY)); 2167 2168 if (arg->is_pmf_enabled) 2169 cmd->peer_flags |= cpu_to_le32(WMI_PEER_PMF); 2170 2171 /* Disable AMSDU for station transmit, if user configures it */ 2172 /* Disable AMSDU for AP transmit to 11n Stations, if user configures 2173 * it 2174 * if (arg->amsdu_disable) Add after FW support 2175 **/ 2176 2177 /* Target asserts if node is marked HT and all MCS is set to 0. 2178 * Mark the node as non-HT if all the mcs rates are disabled through 2179 * iwpriv 2180 **/ 2181 if (arg->peer_ht_rates.num_rates == 0) 2182 cmd->peer_flags &= cpu_to_le32(~WMI_PEER_HT); 2183 } 2184 2185 int ath12k_wmi_send_peer_assoc_cmd(struct ath12k *ar, 2186 struct ath12k_wmi_peer_assoc_arg *arg) 2187 { 2188 struct ath12k_wmi_pdev *wmi = ar->wmi; 2189 struct wmi_peer_assoc_complete_cmd *cmd; 2190 struct ath12k_wmi_vht_rate_set_params *mcs; 2191 struct ath12k_wmi_he_rate_set_params *he_mcs; 2192 struct ath12k_wmi_eht_rate_set_params *eht_mcs; 2193 struct wmi_peer_assoc_mlo_params *ml_params; 2194 struct wmi_peer_assoc_mlo_partner_info_params *partner_info; 2195 struct sk_buff *skb; 2196 struct wmi_tlv *tlv; 2197 void *ptr; 2198 u32 peer_legacy_rates_align, eml_pad_delay, eml_trans_delay; 2199 u32 peer_ht_rates_align, eml_trans_timeout; 2200 int i, ret, len; 2201 u16 eml_cap; 2202 __le32 v; 2203 2204 peer_legacy_rates_align = roundup(arg->peer_legacy_rates.num_rates, 2205 sizeof(u32)); 2206 peer_ht_rates_align = roundup(arg->peer_ht_rates.num_rates, 2207 sizeof(u32)); 2208 2209 len = sizeof(*cmd) + 2210 TLV_HDR_SIZE + (peer_legacy_rates_align * sizeof(u8)) + 2211 TLV_HDR_SIZE + (peer_ht_rates_align * sizeof(u8)) + 2212 sizeof(*mcs) + TLV_HDR_SIZE + 2213 (sizeof(*he_mcs) * arg->peer_he_mcs_count) + 2214 TLV_HDR_SIZE + (sizeof(*eht_mcs) * arg->peer_eht_mcs_count); 2215 2216 if (arg->ml.enabled) 2217 len += TLV_HDR_SIZE + sizeof(*ml_params) + 2218 TLV_HDR_SIZE + (arg->ml.num_partner_links * sizeof(*partner_info)); 2219 else 2220 len += (2 * TLV_HDR_SIZE); 2221 2222 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2223 if (!skb) 2224 return -ENOMEM; 2225 2226 ptr = skb->data; 2227 2228 cmd = ptr; 2229 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PEER_ASSOC_COMPLETE_CMD, 2230 sizeof(*cmd)); 2231 2232 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2233 2234 cmd->peer_new_assoc = cpu_to_le32(arg->peer_new_assoc); 2235 cmd->peer_associd = cpu_to_le32(arg->peer_associd); 2236 cmd->punct_bitmap = cpu_to_le32(arg->punct_bitmap); 2237 2238 ath12k_wmi_copy_peer_flags(cmd, arg, 2239 test_bit(ATH12K_FLAG_HW_CRYPTO_DISABLED, 2240 &ar->ab->dev_flags)); 2241 2242 ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_mac); 2243 2244 cmd->peer_rate_caps = cpu_to_le32(arg->peer_rate_caps); 2245 cmd->peer_caps = cpu_to_le32(arg->peer_caps); 2246 cmd->peer_listen_intval = cpu_to_le32(arg->peer_listen_intval); 2247 cmd->peer_ht_caps = cpu_to_le32(arg->peer_ht_caps); 2248 cmd->peer_max_mpdu = cpu_to_le32(arg->peer_max_mpdu); 2249 cmd->peer_mpdu_density = cpu_to_le32(arg->peer_mpdu_density); 2250 cmd->peer_vht_caps = cpu_to_le32(arg->peer_vht_caps); 2251 cmd->peer_phymode = cpu_to_le32(arg->peer_phymode); 2252 2253 /* Update 11ax capabilities */ 2254 cmd->peer_he_cap_info = cpu_to_le32(arg->peer_he_cap_macinfo[0]); 2255 cmd->peer_he_cap_info_ext = cpu_to_le32(arg->peer_he_cap_macinfo[1]); 2256 cmd->peer_he_cap_info_internal = cpu_to_le32(arg->peer_he_cap_macinfo_internal); 2257 cmd->peer_he_caps_6ghz = cpu_to_le32(arg->peer_he_caps_6ghz); 2258 cmd->peer_he_ops = cpu_to_le32(arg->peer_he_ops); 2259 for (i = 0; i < WMI_MAX_HECAP_PHY_SIZE; i++) 2260 cmd->peer_he_cap_phy[i] = 2261 cpu_to_le32(arg->peer_he_cap_phyinfo[i]); 2262 cmd->peer_ppet.numss_m1 = cpu_to_le32(arg->peer_ppet.numss_m1); 2263 cmd->peer_ppet.ru_info = cpu_to_le32(arg->peer_ppet.ru_bit_mask); 2264 for (i = 0; i < WMI_MAX_NUM_SS; i++) 2265 cmd->peer_ppet.ppet16_ppet8_ru3_ru0[i] = 2266 cpu_to_le32(arg->peer_ppet.ppet16_ppet8_ru3_ru0[i]); 2267 2268 /* Update 11be capabilities */ 2269 memcpy_and_pad(cmd->peer_eht_cap_mac, sizeof(cmd->peer_eht_cap_mac), 2270 arg->peer_eht_cap_mac, sizeof(arg->peer_eht_cap_mac), 2271 0); 2272 memcpy_and_pad(cmd->peer_eht_cap_phy, sizeof(cmd->peer_eht_cap_phy), 2273 arg->peer_eht_cap_phy, sizeof(arg->peer_eht_cap_phy), 2274 0); 2275 memcpy_and_pad(&cmd->peer_eht_ppet, sizeof(cmd->peer_eht_ppet), 2276 &arg->peer_eht_ppet, sizeof(arg->peer_eht_ppet), 0); 2277 2278 /* Update peer legacy rate information */ 2279 ptr += sizeof(*cmd); 2280 2281 tlv = ptr; 2282 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_legacy_rates_align); 2283 2284 ptr += TLV_HDR_SIZE; 2285 2286 cmd->num_peer_legacy_rates = cpu_to_le32(arg->peer_legacy_rates.num_rates); 2287 memcpy(ptr, arg->peer_legacy_rates.rates, 2288 arg->peer_legacy_rates.num_rates); 2289 2290 /* Update peer HT rate information */ 2291 ptr += peer_legacy_rates_align; 2292 2293 tlv = ptr; 2294 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, peer_ht_rates_align); 2295 ptr += TLV_HDR_SIZE; 2296 cmd->num_peer_ht_rates = cpu_to_le32(arg->peer_ht_rates.num_rates); 2297 memcpy(ptr, arg->peer_ht_rates.rates, 2298 arg->peer_ht_rates.num_rates); 2299 2300 /* VHT Rates */ 2301 ptr += peer_ht_rates_align; 2302 2303 mcs = ptr; 2304 2305 mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VHT_RATE_SET, 2306 sizeof(*mcs)); 2307 2308 cmd->peer_nss = cpu_to_le32(arg->peer_nss); 2309 2310 /* Update bandwidth-NSS mapping */ 2311 cmd->peer_bw_rxnss_override = 0; 2312 cmd->peer_bw_rxnss_override |= cpu_to_le32(arg->peer_bw_rxnss_override); 2313 2314 if (arg->vht_capable) { 2315 mcs->rx_max_rate = cpu_to_le32(arg->rx_max_rate); 2316 mcs->rx_mcs_set = cpu_to_le32(arg->rx_mcs_set); 2317 mcs->tx_max_rate = cpu_to_le32(arg->tx_max_rate); 2318 mcs->tx_mcs_set = cpu_to_le32(arg->tx_mcs_set); 2319 } 2320 2321 /* HE Rates */ 2322 cmd->peer_he_mcs = cpu_to_le32(arg->peer_he_mcs_count); 2323 cmd->min_data_rate = cpu_to_le32(arg->min_data_rate); 2324 2325 ptr += sizeof(*mcs); 2326 2327 len = arg->peer_he_mcs_count * sizeof(*he_mcs); 2328 2329 tlv = ptr; 2330 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2331 ptr += TLV_HDR_SIZE; 2332 2333 /* Loop through the HE rate set */ 2334 for (i = 0; i < arg->peer_he_mcs_count; i++) { 2335 he_mcs = ptr; 2336 he_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HE_RATE_SET, 2337 sizeof(*he_mcs)); 2338 2339 he_mcs->rx_mcs_set = cpu_to_le32(arg->peer_he_rx_mcs_set[i]); 2340 he_mcs->tx_mcs_set = cpu_to_le32(arg->peer_he_tx_mcs_set[i]); 2341 ptr += sizeof(*he_mcs); 2342 } 2343 2344 tlv = ptr; 2345 len = arg->ml.enabled ? sizeof(*ml_params) : 0; 2346 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2347 ptr += TLV_HDR_SIZE; 2348 if (!len) 2349 goto skip_ml_params; 2350 2351 ml_params = ptr; 2352 ml_params->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_PEER_ASSOC_PARAMS, 2353 len); 2354 ml_params->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 2355 2356 if (arg->ml.assoc_link) 2357 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK); 2358 2359 if (arg->ml.primary_umac) 2360 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC); 2361 2362 if (arg->ml.logical_link_idx_valid) 2363 ml_params->flags |= 2364 cpu_to_le32(ATH12K_WMI_FLAG_MLO_LOGICAL_LINK_IDX_VALID); 2365 2366 if (arg->ml.peer_id_valid) 2367 ml_params->flags |= cpu_to_le32(ATH12K_WMI_FLAG_MLO_PEER_ID_VALID); 2368 2369 ether_addr_copy(ml_params->mld_addr.addr, arg->ml.mld_addr); 2370 ml_params->logical_link_idx = cpu_to_le32(arg->ml.logical_link_idx); 2371 ml_params->ml_peer_id = cpu_to_le32(arg->ml.ml_peer_id); 2372 ml_params->ieee_link_id = cpu_to_le32(arg->ml.ieee_link_id); 2373 2374 eml_cap = arg->ml.eml_cap; 2375 if (u16_get_bits(eml_cap, IEEE80211_EML_CAP_EMLSR_SUPP)) { 2376 /* Padding delay */ 2377 eml_pad_delay = ieee80211_emlsr_pad_delay_in_us(eml_cap); 2378 ml_params->emlsr_padding_delay_us = cpu_to_le32(eml_pad_delay); 2379 /* Transition delay */ 2380 eml_trans_delay = ieee80211_emlsr_trans_delay_in_us(eml_cap); 2381 ml_params->emlsr_trans_delay_us = cpu_to_le32(eml_trans_delay); 2382 /* Transition timeout */ 2383 eml_trans_timeout = ieee80211_eml_trans_timeout_in_us(eml_cap); 2384 ml_params->emlsr_trans_timeout_us = 2385 cpu_to_le32(eml_trans_timeout); 2386 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi peer %pM emlsr padding delay %u, trans delay %u trans timeout %u", 2387 arg->peer_mac, eml_pad_delay, eml_trans_delay, 2388 eml_trans_timeout); 2389 } 2390 2391 ptr += sizeof(*ml_params); 2392 2393 skip_ml_params: 2394 /* Loop through the EHT rate set */ 2395 len = arg->peer_eht_mcs_count * sizeof(*eht_mcs); 2396 tlv = ptr; 2397 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2398 ptr += TLV_HDR_SIZE; 2399 2400 for (i = 0; i < arg->peer_eht_mcs_count; i++) { 2401 eht_mcs = ptr; 2402 eht_mcs->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_EHT_RATE_SET, 2403 sizeof(*eht_mcs)); 2404 2405 eht_mcs->rx_mcs_set = cpu_to_le32(arg->peer_eht_rx_mcs_set[i]); 2406 eht_mcs->tx_mcs_set = cpu_to_le32(arg->peer_eht_tx_mcs_set[i]); 2407 ptr += sizeof(*eht_mcs); 2408 } 2409 2410 /* Update MCS15 capability */ 2411 if (arg->eht_disable_mcs15) 2412 cmd->peer_eht_ops = cpu_to_le32(IEEE80211_EHT_OPER_MCS15_DISABLE); 2413 2414 tlv = ptr; 2415 len = arg->ml.enabled ? arg->ml.num_partner_links * sizeof(*partner_info) : 0; 2416 /* fill ML Partner links */ 2417 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 2418 ptr += TLV_HDR_SIZE; 2419 2420 if (len == 0) 2421 goto send; 2422 2423 for (i = 0; i < arg->ml.num_partner_links; i++) { 2424 u32 cmd = WMI_TAG_MLO_PARTNER_LINK_PARAMS_PEER_ASSOC; 2425 2426 partner_info = ptr; 2427 partner_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(cmd, 2428 sizeof(*partner_info)); 2429 partner_info->vdev_id = cpu_to_le32(arg->ml.partner_info[i].vdev_id); 2430 partner_info->hw_link_id = 2431 cpu_to_le32(arg->ml.partner_info[i].hw_link_id); 2432 partner_info->flags = cpu_to_le32(ATH12K_WMI_FLAG_MLO_ENABLED); 2433 2434 if (arg->ml.partner_info[i].assoc_link) 2435 partner_info->flags |= 2436 cpu_to_le32(ATH12K_WMI_FLAG_MLO_ASSOC_LINK); 2437 2438 if (arg->ml.partner_info[i].primary_umac) 2439 partner_info->flags |= 2440 cpu_to_le32(ATH12K_WMI_FLAG_MLO_PRIMARY_UMAC); 2441 2442 if (arg->ml.partner_info[i].logical_link_idx_valid) { 2443 v = cpu_to_le32(ATH12K_WMI_FLAG_MLO_LINK_ID_VALID); 2444 partner_info->flags |= v; 2445 } 2446 2447 partner_info->logical_link_idx = 2448 cpu_to_le32(arg->ml.partner_info[i].logical_link_idx); 2449 ptr += sizeof(*partner_info); 2450 } 2451 2452 send: 2453 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2454 "wmi peer assoc vdev id %d assoc id %d peer mac %pM peer_flags %x rate_caps %x peer_caps %x listen_intval %d ht_caps %x max_mpdu %d nss %d phymode %d peer_mpdu_density %d vht_caps %x he cap_info %x he ops %x he cap_info_ext %x he phy %x %x %x peer_bw_rxnss_override %x peer_flags_ext %x eht mac_cap %x %x eht phy_cap %x %x %x peer_eht_ops %x\n", 2455 cmd->vdev_id, cmd->peer_associd, arg->peer_mac, 2456 cmd->peer_flags, cmd->peer_rate_caps, cmd->peer_caps, 2457 cmd->peer_listen_intval, cmd->peer_ht_caps, 2458 cmd->peer_max_mpdu, cmd->peer_nss, cmd->peer_phymode, 2459 cmd->peer_mpdu_density, 2460 cmd->peer_vht_caps, cmd->peer_he_cap_info, 2461 cmd->peer_he_ops, cmd->peer_he_cap_info_ext, 2462 cmd->peer_he_cap_phy[0], cmd->peer_he_cap_phy[1], 2463 cmd->peer_he_cap_phy[2], 2464 cmd->peer_bw_rxnss_override, cmd->peer_flags_ext, 2465 cmd->peer_eht_cap_mac[0], cmd->peer_eht_cap_mac[1], 2466 cmd->peer_eht_cap_phy[0], cmd->peer_eht_cap_phy[1], 2467 cmd->peer_eht_cap_phy[2], cmd->peer_eht_ops); 2468 2469 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_PEER_ASSOC_CMDID); 2470 if (ret) { 2471 ath12k_warn(ar->ab, 2472 "failed to send WMI_PEER_ASSOC_CMDID\n"); 2473 dev_kfree_skb(skb); 2474 } 2475 2476 return ret; 2477 } 2478 2479 void ath12k_wmi_start_scan_init(struct ath12k *ar, 2480 struct ath12k_wmi_scan_req_arg *arg) 2481 { 2482 /* setup commonly used values */ 2483 arg->scan_req_id = 1; 2484 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2485 arg->dwell_time_active = 50; 2486 arg->dwell_time_active_2g = 0; 2487 arg->dwell_time_passive = 150; 2488 arg->dwell_time_active_6g = 70; 2489 arg->dwell_time_passive_6g = 70; 2490 arg->min_rest_time = 50; 2491 arg->max_rest_time = 500; 2492 arg->repeat_probe_time = 0; 2493 arg->probe_spacing_time = 0; 2494 arg->idle_time = 0; 2495 arg->max_scan_time = 20000; 2496 arg->probe_delay = 5; 2497 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED | 2498 WMI_SCAN_EVENT_COMPLETED | 2499 WMI_SCAN_EVENT_BSS_CHANNEL | 2500 WMI_SCAN_EVENT_FOREIGN_CHAN | 2501 WMI_SCAN_EVENT_DEQUEUED; 2502 arg->scan_f_chan_stat_evnt = 1; 2503 arg->num_bssid = 1; 2504 2505 /* fill bssid_list[0] with 0xff, otherwise bssid and RA will be 2506 * ZEROs in probe request 2507 */ 2508 eth_broadcast_addr(arg->bssid_list[0].addr); 2509 } 2510 2511 static void ath12k_wmi_copy_scan_event_cntrl_flags(struct wmi_start_scan_cmd *cmd, 2512 struct ath12k_wmi_scan_req_arg *arg) 2513 { 2514 /* Scan events subscription */ 2515 if (arg->scan_ev_started) 2516 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_STARTED); 2517 if (arg->scan_ev_completed) 2518 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_COMPLETED); 2519 if (arg->scan_ev_bss_chan) 2520 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_BSS_CHANNEL); 2521 if (arg->scan_ev_foreign_chan) 2522 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN); 2523 if (arg->scan_ev_dequeued) 2524 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_DEQUEUED); 2525 if (arg->scan_ev_preempted) 2526 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_PREEMPTED); 2527 if (arg->scan_ev_start_failed) 2528 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_START_FAILED); 2529 if (arg->scan_ev_restarted) 2530 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESTARTED); 2531 if (arg->scan_ev_foreign_chn_exit) 2532 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT); 2533 if (arg->scan_ev_suspended) 2534 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_SUSPENDED); 2535 if (arg->scan_ev_resumed) 2536 cmd->notify_scan_events |= cpu_to_le32(WMI_SCAN_EVENT_RESUMED); 2537 2538 /** Set scan control flags */ 2539 cmd->scan_ctrl_flags = 0; 2540 if (arg->scan_f_passive) 2541 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_PASSIVE); 2542 if (arg->scan_f_strict_passive_pch) 2543 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_STRICT_PASSIVE_ON_PCHN); 2544 if (arg->scan_f_promisc_mode) 2545 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROMISCUOS); 2546 if (arg->scan_f_capture_phy_err) 2547 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CAPTURE_PHY_ERROR); 2548 if (arg->scan_f_half_rate) 2549 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_HALF_RATE_SUPPORT); 2550 if (arg->scan_f_quarter_rate) 2551 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_QUARTER_RATE_SUPPORT); 2552 if (arg->scan_f_cck_rates) 2553 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_CCK_RATES); 2554 if (arg->scan_f_ofdm_rates) 2555 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_OFDM_RATES); 2556 if (arg->scan_f_chan_stat_evnt) 2557 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_CHAN_STAT_EVENT); 2558 if (arg->scan_f_filter_prb_req) 2559 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FILTER_PROBE_REQ); 2560 if (arg->scan_f_bcast_probe) 2561 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_BCAST_PROBE_REQ); 2562 if (arg->scan_f_offchan_mgmt_tx) 2563 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_MGMT_TX); 2564 if (arg->scan_f_offchan_data_tx) 2565 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_OFFCHAN_DATA_TX); 2566 if (arg->scan_f_force_active_dfs_chn) 2567 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_FLAG_FORCE_ACTIVE_ON_DFS); 2568 if (arg->scan_f_add_tpc_ie_in_probe) 2569 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_TPC_IE_IN_PROBE_REQ); 2570 if (arg->scan_f_add_ds_ie_in_probe) 2571 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_DS_IE_IN_PROBE_REQ); 2572 if (arg->scan_f_add_spoofed_mac_in_probe) 2573 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_ADD_SPOOF_MAC_IN_PROBE_REQ); 2574 if (arg->scan_f_add_rand_seq_in_probe) 2575 cmd->scan_ctrl_flags |= cpu_to_le32(WMI_SCAN_RANDOM_SEQ_NO_IN_PROBE_REQ); 2576 if (arg->scan_f_en_ie_whitelist_in_probe) 2577 cmd->scan_ctrl_flags |= 2578 cpu_to_le32(WMI_SCAN_ENABLE_IE_WHTELIST_IN_PROBE_REQ); 2579 2580 cmd->scan_ctrl_flags |= le32_encode_bits(arg->adaptive_dwell_time_mode, 2581 WMI_SCAN_DWELL_MODE_MASK); 2582 } 2583 2584 int ath12k_wmi_send_scan_start_cmd(struct ath12k *ar, 2585 struct ath12k_wmi_scan_req_arg *arg) 2586 { 2587 struct ath12k_wmi_pdev *wmi = ar->wmi; 2588 struct wmi_start_scan_cmd *cmd; 2589 struct ath12k_wmi_ssid_params *ssid = NULL; 2590 struct ath12k_wmi_mac_addr_params *bssid; 2591 struct sk_buff *skb; 2592 struct wmi_tlv *tlv; 2593 void *ptr; 2594 int i, ret, len; 2595 u32 *tmp_ptr, extraie_len_with_pad = 0; 2596 struct ath12k_wmi_hint_short_ssid_arg *s_ssid = NULL; 2597 struct ath12k_wmi_hint_bssid_arg *hint_bssid = NULL; 2598 2599 len = sizeof(*cmd); 2600 2601 len += TLV_HDR_SIZE; 2602 if (arg->num_chan) 2603 len += arg->num_chan * sizeof(u32); 2604 2605 len += TLV_HDR_SIZE; 2606 if (arg->num_ssids) 2607 len += arg->num_ssids * sizeof(*ssid); 2608 2609 len += TLV_HDR_SIZE; 2610 if (arg->num_bssid) 2611 len += sizeof(*bssid) * arg->num_bssid; 2612 2613 if (arg->num_hint_bssid) 2614 len += TLV_HDR_SIZE + 2615 arg->num_hint_bssid * sizeof(*hint_bssid); 2616 2617 if (arg->num_hint_s_ssid) 2618 len += TLV_HDR_SIZE + 2619 arg->num_hint_s_ssid * sizeof(*s_ssid); 2620 2621 len += TLV_HDR_SIZE; 2622 if (arg->extraie.len) 2623 extraie_len_with_pad = 2624 roundup(arg->extraie.len, sizeof(u32)); 2625 if (extraie_len_with_pad <= (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len)) { 2626 len += extraie_len_with_pad; 2627 } else { 2628 ath12k_warn(ar->ab, "discard large size %d bytes extraie for scan start\n", 2629 arg->extraie.len); 2630 extraie_len_with_pad = 0; 2631 } 2632 2633 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2634 if (!skb) 2635 return -ENOMEM; 2636 2637 ptr = skb->data; 2638 2639 cmd = ptr; 2640 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_START_SCAN_CMD, 2641 sizeof(*cmd)); 2642 2643 cmd->scan_id = cpu_to_le32(arg->scan_id); 2644 cmd->scan_req_id = cpu_to_le32(arg->scan_req_id); 2645 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2646 if (ar->state_11d == ATH12K_11D_PREPARING) 2647 arg->scan_priority = WMI_SCAN_PRIORITY_MEDIUM; 2648 else 2649 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 2650 cmd->notify_scan_events = cpu_to_le32(arg->notify_scan_events); 2651 2652 ath12k_wmi_copy_scan_event_cntrl_flags(cmd, arg); 2653 2654 cmd->dwell_time_active = cpu_to_le32(arg->dwell_time_active); 2655 cmd->dwell_time_active_2g = cpu_to_le32(arg->dwell_time_active_2g); 2656 cmd->dwell_time_passive = cpu_to_le32(arg->dwell_time_passive); 2657 cmd->dwell_time_active_6g = cpu_to_le32(arg->dwell_time_active_6g); 2658 cmd->dwell_time_passive_6g = cpu_to_le32(arg->dwell_time_passive_6g); 2659 cmd->min_rest_time = cpu_to_le32(arg->min_rest_time); 2660 cmd->max_rest_time = cpu_to_le32(arg->max_rest_time); 2661 cmd->repeat_probe_time = cpu_to_le32(arg->repeat_probe_time); 2662 cmd->probe_spacing_time = cpu_to_le32(arg->probe_spacing_time); 2663 cmd->idle_time = cpu_to_le32(arg->idle_time); 2664 cmd->max_scan_time = cpu_to_le32(arg->max_scan_time); 2665 cmd->probe_delay = cpu_to_le32(arg->probe_delay); 2666 cmd->burst_duration = cpu_to_le32(arg->burst_duration); 2667 cmd->num_chan = cpu_to_le32(arg->num_chan); 2668 cmd->num_bssid = cpu_to_le32(arg->num_bssid); 2669 cmd->num_ssids = cpu_to_le32(arg->num_ssids); 2670 cmd->ie_len = cpu_to_le32(arg->extraie.len); 2671 cmd->n_probes = cpu_to_le32(arg->n_probes); 2672 2673 ptr += sizeof(*cmd); 2674 2675 len = arg->num_chan * sizeof(u32); 2676 2677 tlv = ptr; 2678 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, len); 2679 ptr += TLV_HDR_SIZE; 2680 tmp_ptr = (u32 *)ptr; 2681 2682 memcpy(tmp_ptr, arg->chan_list, arg->num_chan * 4); 2683 2684 ptr += len; 2685 2686 len = arg->num_ssids * sizeof(*ssid); 2687 tlv = ptr; 2688 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2689 2690 ptr += TLV_HDR_SIZE; 2691 2692 if (arg->num_ssids) { 2693 ssid = ptr; 2694 for (i = 0; i < arg->num_ssids; ++i) { 2695 ssid->ssid_len = cpu_to_le32(arg->ssid[i].ssid_len); 2696 memcpy(ssid->ssid, arg->ssid[i].ssid, 2697 arg->ssid[i].ssid_len); 2698 ssid++; 2699 } 2700 } 2701 2702 ptr += (arg->num_ssids * sizeof(*ssid)); 2703 len = arg->num_bssid * sizeof(*bssid); 2704 tlv = ptr; 2705 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2706 2707 ptr += TLV_HDR_SIZE; 2708 bssid = ptr; 2709 2710 if (arg->num_bssid) { 2711 for (i = 0; i < arg->num_bssid; ++i) { 2712 ether_addr_copy(bssid->addr, 2713 arg->bssid_list[i].addr); 2714 bssid++; 2715 } 2716 } 2717 2718 ptr += arg->num_bssid * sizeof(*bssid); 2719 2720 len = extraie_len_with_pad; 2721 tlv = ptr; 2722 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len); 2723 ptr += TLV_HDR_SIZE; 2724 2725 if (extraie_len_with_pad) 2726 memcpy(ptr, arg->extraie.ptr, 2727 arg->extraie.len); 2728 2729 ptr += extraie_len_with_pad; 2730 2731 if (arg->num_hint_s_ssid) { 2732 len = arg->num_hint_s_ssid * sizeof(*s_ssid); 2733 tlv = ptr; 2734 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2735 ptr += TLV_HDR_SIZE; 2736 s_ssid = ptr; 2737 for (i = 0; i < arg->num_hint_s_ssid; ++i) { 2738 s_ssid->freq_flags = arg->hint_s_ssid[i].freq_flags; 2739 s_ssid->short_ssid = arg->hint_s_ssid[i].short_ssid; 2740 s_ssid++; 2741 } 2742 ptr += len; 2743 } 2744 2745 if (arg->num_hint_bssid) { 2746 len = arg->num_hint_bssid * sizeof(struct ath12k_wmi_hint_bssid_arg); 2747 tlv = ptr; 2748 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, len); 2749 ptr += TLV_HDR_SIZE; 2750 hint_bssid = ptr; 2751 for (i = 0; i < arg->num_hint_bssid; ++i) { 2752 hint_bssid->freq_flags = 2753 arg->hint_bssid[i].freq_flags; 2754 ether_addr_copy(&arg->hint_bssid[i].bssid.addr[0], 2755 &hint_bssid->bssid.addr[0]); 2756 hint_bssid++; 2757 } 2758 } 2759 2760 ret = ath12k_wmi_cmd_send(wmi, skb, 2761 WMI_START_SCAN_CMDID); 2762 if (ret) { 2763 ath12k_warn(ar->ab, "failed to send WMI_START_SCAN_CMDID\n"); 2764 dev_kfree_skb(skb); 2765 } 2766 2767 return ret; 2768 } 2769 2770 int ath12k_wmi_send_scan_stop_cmd(struct ath12k *ar, 2771 struct ath12k_wmi_scan_cancel_arg *arg) 2772 { 2773 struct ath12k_wmi_pdev *wmi = ar->wmi; 2774 struct wmi_stop_scan_cmd *cmd; 2775 struct sk_buff *skb; 2776 int ret; 2777 2778 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2779 if (!skb) 2780 return -ENOMEM; 2781 2782 cmd = (struct wmi_stop_scan_cmd *)skb->data; 2783 2784 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STOP_SCAN_CMD, 2785 sizeof(*cmd)); 2786 2787 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 2788 cmd->requestor = cpu_to_le32(arg->requester); 2789 cmd->scan_id = cpu_to_le32(arg->scan_id); 2790 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2791 /* stop the scan with the corresponding scan_id */ 2792 if (arg->req_type == WLAN_SCAN_CANCEL_PDEV_ALL) { 2793 /* Cancelling all scans */ 2794 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_ALL); 2795 } else if (arg->req_type == WLAN_SCAN_CANCEL_VDEV_ALL) { 2796 /* Cancelling VAP scans */ 2797 cmd->req_type = cpu_to_le32(WMI_SCAN_STOP_VAP_ALL); 2798 } else if (arg->req_type == WLAN_SCAN_CANCEL_SINGLE) { 2799 /* Cancelling specific scan */ 2800 cmd->req_type = WMI_SCAN_STOP_ONE; 2801 } else { 2802 ath12k_warn(ar->ab, "invalid scan cancel req_type %d", 2803 arg->req_type); 2804 dev_kfree_skb(skb); 2805 return -EINVAL; 2806 } 2807 2808 ret = ath12k_wmi_cmd_send(wmi, skb, 2809 WMI_STOP_SCAN_CMDID); 2810 if (ret) { 2811 ath12k_warn(ar->ab, "failed to send WMI_STOP_SCAN_CMDID\n"); 2812 dev_kfree_skb(skb); 2813 } 2814 2815 return ret; 2816 } 2817 2818 int ath12k_wmi_send_scan_chan_list_cmd(struct ath12k *ar, 2819 struct ath12k_wmi_scan_chan_list_arg *arg) 2820 { 2821 struct ath12k_wmi_pdev *wmi = ar->wmi; 2822 struct wmi_scan_chan_list_cmd *cmd; 2823 struct sk_buff *skb; 2824 struct ath12k_wmi_channel_params *chan_info; 2825 struct ath12k_wmi_channel_arg *channel_arg; 2826 struct wmi_tlv *tlv; 2827 void *ptr; 2828 int i, ret, len; 2829 u16 num_send_chans, num_sends = 0, max_chan_limit = 0; 2830 __le32 *reg1, *reg2; 2831 2832 channel_arg = &arg->channel[0]; 2833 while (arg->nallchans) { 2834 len = sizeof(*cmd) + TLV_HDR_SIZE; 2835 max_chan_limit = (wmi->wmi_ab->max_msg_len[ar->pdev_idx] - len) / 2836 sizeof(*chan_info); 2837 2838 num_send_chans = min(arg->nallchans, max_chan_limit); 2839 2840 arg->nallchans -= num_send_chans; 2841 len += sizeof(*chan_info) * num_send_chans; 2842 2843 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 2844 if (!skb) 2845 return -ENOMEM; 2846 2847 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 2848 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SCAN_CHAN_LIST_CMD, 2849 sizeof(*cmd)); 2850 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 2851 cmd->num_scan_chans = cpu_to_le32(num_send_chans); 2852 if (num_sends) 2853 cmd->flags |= cpu_to_le32(WMI_APPEND_TO_EXISTING_CHAN_LIST_FLAG); 2854 2855 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2856 "WMI no.of chan = %d len = %d pdev_id = %d num_sends = %d\n", 2857 num_send_chans, len, cmd->pdev_id, num_sends); 2858 2859 ptr = skb->data + sizeof(*cmd); 2860 2861 len = sizeof(*chan_info) * num_send_chans; 2862 tlv = ptr; 2863 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_STRUCT, 2864 len); 2865 ptr += TLV_HDR_SIZE; 2866 2867 for (i = 0; i < num_send_chans; ++i) { 2868 chan_info = ptr; 2869 memset(chan_info, 0, sizeof(*chan_info)); 2870 len = sizeof(*chan_info); 2871 chan_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_CHANNEL, 2872 len); 2873 2874 reg1 = &chan_info->reg_info_1; 2875 reg2 = &chan_info->reg_info_2; 2876 chan_info->mhz = cpu_to_le32(channel_arg->mhz); 2877 chan_info->band_center_freq1 = cpu_to_le32(channel_arg->cfreq1); 2878 chan_info->band_center_freq2 = cpu_to_le32(channel_arg->cfreq2); 2879 2880 if (channel_arg->is_chan_passive) 2881 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PASSIVE); 2882 if (channel_arg->allow_he) 2883 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HE); 2884 else if (channel_arg->allow_vht) 2885 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_VHT); 2886 else if (channel_arg->allow_ht) 2887 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_ALLOW_HT); 2888 if (channel_arg->half_rate) 2889 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_HALF_RATE); 2890 if (channel_arg->quarter_rate) 2891 chan_info->info |= 2892 cpu_to_le32(WMI_CHAN_INFO_QUARTER_RATE); 2893 2894 if (channel_arg->psc_channel) 2895 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_PSC); 2896 2897 if (channel_arg->dfs_set) 2898 chan_info->info |= cpu_to_le32(WMI_CHAN_INFO_DFS); 2899 2900 chan_info->info |= le32_encode_bits(channel_arg->phy_mode, 2901 WMI_CHAN_INFO_MODE); 2902 *reg1 |= le32_encode_bits(channel_arg->minpower, 2903 WMI_CHAN_REG_INFO1_MIN_PWR); 2904 *reg1 |= le32_encode_bits(channel_arg->maxpower, 2905 WMI_CHAN_REG_INFO1_MAX_PWR); 2906 *reg1 |= le32_encode_bits(channel_arg->maxregpower, 2907 WMI_CHAN_REG_INFO1_MAX_REG_PWR); 2908 *reg1 |= le32_encode_bits(channel_arg->reg_class_id, 2909 WMI_CHAN_REG_INFO1_REG_CLS); 2910 *reg2 |= le32_encode_bits(channel_arg->antennamax, 2911 WMI_CHAN_REG_INFO2_ANT_MAX); 2912 *reg2 |= le32_encode_bits(channel_arg->maxregpower, 2913 WMI_CHAN_REG_INFO2_MAX_TX_PWR); 2914 2915 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2916 "WMI chan scan list chan[%d] = %u, chan_info->info %8x\n", 2917 i, chan_info->mhz, chan_info->info); 2918 2919 ptr += sizeof(*chan_info); 2920 2921 channel_arg++; 2922 } 2923 2924 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SCAN_CHAN_LIST_CMDID); 2925 if (ret) { 2926 ath12k_warn(ar->ab, "failed to send WMI_SCAN_CHAN_LIST cmd\n"); 2927 dev_kfree_skb(skb); 2928 return ret; 2929 } 2930 2931 num_sends++; 2932 } 2933 2934 return 0; 2935 } 2936 2937 int ath12k_wmi_send_wmm_update_cmd(struct ath12k *ar, u32 vdev_id, 2938 struct wmi_wmm_params_all_arg *param) 2939 { 2940 struct ath12k_wmi_pdev *wmi = ar->wmi; 2941 struct wmi_vdev_set_wmm_params_cmd *cmd; 2942 struct wmi_wmm_params *wmm_param; 2943 struct wmi_wmm_params_arg *wmi_wmm_arg; 2944 struct sk_buff *skb; 2945 int ret, ac; 2946 2947 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 2948 if (!skb) 2949 return -ENOMEM; 2950 2951 cmd = (struct wmi_vdev_set_wmm_params_cmd *)skb->data; 2952 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2953 sizeof(*cmd)); 2954 2955 cmd->vdev_id = cpu_to_le32(vdev_id); 2956 cmd->wmm_param_type = 0; 2957 2958 for (ac = 0; ac < WME_NUM_AC; ac++) { 2959 switch (ac) { 2960 case WME_AC_BE: 2961 wmi_wmm_arg = ¶m->ac_be; 2962 break; 2963 case WME_AC_BK: 2964 wmi_wmm_arg = ¶m->ac_bk; 2965 break; 2966 case WME_AC_VI: 2967 wmi_wmm_arg = ¶m->ac_vi; 2968 break; 2969 case WME_AC_VO: 2970 wmi_wmm_arg = ¶m->ac_vo; 2971 break; 2972 } 2973 2974 wmm_param = (struct wmi_wmm_params *)&cmd->wmm_params[ac]; 2975 wmm_param->tlv_header = 2976 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_WMM_PARAMS_CMD, 2977 sizeof(*wmm_param)); 2978 2979 wmm_param->aifs = cpu_to_le32(wmi_wmm_arg->aifs); 2980 wmm_param->cwmin = cpu_to_le32(wmi_wmm_arg->cwmin); 2981 wmm_param->cwmax = cpu_to_le32(wmi_wmm_arg->cwmax); 2982 wmm_param->txoplimit = cpu_to_le32(wmi_wmm_arg->txop); 2983 wmm_param->acm = cpu_to_le32(wmi_wmm_arg->acm); 2984 wmm_param->no_ack = cpu_to_le32(wmi_wmm_arg->no_ack); 2985 2986 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 2987 "wmi wmm set ac %d aifs %d cwmin %d cwmax %d txop %d acm %d no_ack %d\n", 2988 ac, wmm_param->aifs, wmm_param->cwmin, 2989 wmm_param->cwmax, wmm_param->txoplimit, 2990 wmm_param->acm, wmm_param->no_ack); 2991 } 2992 ret = ath12k_wmi_cmd_send(wmi, skb, 2993 WMI_VDEV_SET_WMM_PARAMS_CMDID); 2994 if (ret) { 2995 ath12k_warn(ar->ab, 2996 "failed to send WMI_VDEV_SET_WMM_PARAMS_CMDID"); 2997 dev_kfree_skb(skb); 2998 } 2999 3000 return ret; 3001 } 3002 3003 int ath12k_wmi_send_dfs_phyerr_offload_enable_cmd(struct ath12k *ar, 3004 u32 pdev_id) 3005 { 3006 struct ath12k_wmi_pdev *wmi = ar->wmi; 3007 struct wmi_dfs_phyerr_offload_cmd *cmd; 3008 struct sk_buff *skb; 3009 int ret; 3010 3011 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3012 if (!skb) 3013 return -ENOMEM; 3014 3015 cmd = (struct wmi_dfs_phyerr_offload_cmd *)skb->data; 3016 cmd->tlv_header = 3017 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMD, 3018 sizeof(*cmd)); 3019 3020 cmd->pdev_id = cpu_to_le32(pdev_id); 3021 3022 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3023 "WMI dfs phy err offload enable pdev id %d\n", pdev_id); 3024 3025 ret = ath12k_wmi_cmd_send(wmi, skb, 3026 WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE_CMDID); 3027 if (ret) { 3028 ath12k_warn(ar->ab, 3029 "failed to send WMI_PDEV_DFS_PHYERR_OFFLOAD_ENABLE cmd\n"); 3030 dev_kfree_skb(skb); 3031 } 3032 3033 return ret; 3034 } 3035 3036 int ath12k_wmi_set_bios_cmd(struct ath12k_base *ab, u32 param_id, 3037 const u8 *buf, size_t buf_len) 3038 { 3039 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3040 struct wmi_pdev_set_bios_interface_cmd *cmd; 3041 struct wmi_tlv *tlv; 3042 struct sk_buff *skb; 3043 u8 *ptr; 3044 u32 len, len_aligned; 3045 int ret; 3046 3047 len_aligned = roundup(buf_len, sizeof(u32)); 3048 len = sizeof(*cmd) + TLV_HDR_SIZE + len_aligned; 3049 3050 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3051 if (!skb) 3052 return -ENOMEM; 3053 3054 cmd = (struct wmi_pdev_set_bios_interface_cmd *)skb->data; 3055 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_INTERFACE_CMD, 3056 sizeof(*cmd)); 3057 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3058 cmd->param_type_id = cpu_to_le32(param_id); 3059 cmd->length = cpu_to_le32(buf_len); 3060 3061 ptr = skb->data + sizeof(*cmd); 3062 tlv = (struct wmi_tlv *)ptr; 3063 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, len_aligned); 3064 ptr += TLV_HDR_SIZE; 3065 memcpy(ptr, buf, buf_len); 3066 3067 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3068 skb, 3069 WMI_PDEV_SET_BIOS_INTERFACE_CMDID); 3070 if (ret) { 3071 ath12k_warn(ab, 3072 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID parameter id %d: %d\n", 3073 param_id, ret); 3074 dev_kfree_skb(skb); 3075 } 3076 3077 return 0; 3078 } 3079 3080 int ath12k_wmi_set_bios_sar_cmd(struct ath12k_base *ab, const u8 *psar_table) 3081 { 3082 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3083 struct wmi_pdev_set_bios_sar_table_cmd *cmd; 3084 struct wmi_tlv *tlv; 3085 struct sk_buff *skb; 3086 int ret; 3087 u8 *buf_ptr; 3088 u32 len, sar_table_len_aligned, sar_dbs_backoff_len_aligned; 3089 const u8 *psar_value = psar_table + ATH12K_ACPI_POWER_LIMIT_DATA_OFFSET; 3090 const u8 *pdbs_value = psar_table + ATH12K_ACPI_DBS_BACKOFF_DATA_OFFSET; 3091 3092 sar_table_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_TABLE_LEN, sizeof(u32)); 3093 sar_dbs_backoff_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN, 3094 sizeof(u32)); 3095 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_table_len_aligned + 3096 TLV_HDR_SIZE + sar_dbs_backoff_len_aligned; 3097 3098 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3099 if (!skb) 3100 return -ENOMEM; 3101 3102 cmd = (struct wmi_pdev_set_bios_sar_table_cmd *)skb->data; 3103 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_SAR_TABLE_CMD, 3104 sizeof(*cmd)); 3105 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3106 cmd->sar_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 3107 cmd->dbs_backoff_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 3108 3109 buf_ptr = skb->data + sizeof(*cmd); 3110 tlv = (struct wmi_tlv *)buf_ptr; 3111 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 3112 sar_table_len_aligned); 3113 buf_ptr += TLV_HDR_SIZE; 3114 memcpy(buf_ptr, psar_value, ATH12K_ACPI_BIOS_SAR_TABLE_LEN); 3115 3116 buf_ptr += sar_table_len_aligned; 3117 tlv = (struct wmi_tlv *)buf_ptr; 3118 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, 3119 sar_dbs_backoff_len_aligned); 3120 buf_ptr += TLV_HDR_SIZE; 3121 memcpy(buf_ptr, pdbs_value, ATH12K_ACPI_BIOS_SAR_DBS_BACKOFF_LEN); 3122 3123 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3124 skb, 3125 WMI_PDEV_SET_BIOS_SAR_TABLE_CMDID); 3126 if (ret) { 3127 ath12k_warn(ab, 3128 "failed to send WMI_PDEV_SET_BIOS_INTERFACE_CMDID %d\n", 3129 ret); 3130 dev_kfree_skb(skb); 3131 } 3132 3133 return ret; 3134 } 3135 3136 int ath12k_wmi_set_bios_geo_cmd(struct ath12k_base *ab, const u8 *pgeo_table) 3137 { 3138 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 3139 struct wmi_pdev_set_bios_geo_table_cmd *cmd; 3140 struct wmi_tlv *tlv; 3141 struct sk_buff *skb; 3142 int ret; 3143 u8 *buf_ptr; 3144 u32 len, sar_geo_len_aligned; 3145 const u8 *pgeo_value = pgeo_table + ATH12K_ACPI_GEO_OFFSET_DATA_OFFSET; 3146 3147 sar_geo_len_aligned = roundup(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN, sizeof(u32)); 3148 len = sizeof(*cmd) + TLV_HDR_SIZE + sar_geo_len_aligned; 3149 3150 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 3151 if (!skb) 3152 return -ENOMEM; 3153 3154 cmd = (struct wmi_pdev_set_bios_geo_table_cmd *)skb->data; 3155 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_BIOS_GEO_TABLE_CMD, 3156 sizeof(*cmd)); 3157 cmd->pdev_id = cpu_to_le32(WMI_PDEV_ID_SOC); 3158 cmd->geo_len = cpu_to_le32(ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 3159 3160 buf_ptr = skb->data + sizeof(*cmd); 3161 tlv = (struct wmi_tlv *)buf_ptr; 3162 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, sar_geo_len_aligned); 3163 buf_ptr += TLV_HDR_SIZE; 3164 memcpy(buf_ptr, pgeo_value, ATH12K_ACPI_BIOS_SAR_GEO_OFFSET_LEN); 3165 3166 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], 3167 skb, 3168 WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID); 3169 if (ret) { 3170 ath12k_warn(ab, 3171 "failed to send WMI_PDEV_SET_BIOS_GEO_TABLE_CMDID %d\n", 3172 ret); 3173 dev_kfree_skb(skb); 3174 } 3175 3176 return ret; 3177 } 3178 3179 int ath12k_wmi_delba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3180 u32 tid, u32 initiator, u32 reason) 3181 { 3182 struct ath12k_wmi_pdev *wmi = ar->wmi; 3183 struct wmi_delba_send_cmd *cmd; 3184 struct sk_buff *skb; 3185 int ret; 3186 3187 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3188 if (!skb) 3189 return -ENOMEM; 3190 3191 cmd = (struct wmi_delba_send_cmd *)skb->data; 3192 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DELBA_SEND_CMD, 3193 sizeof(*cmd)); 3194 cmd->vdev_id = cpu_to_le32(vdev_id); 3195 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3196 cmd->tid = cpu_to_le32(tid); 3197 cmd->initiator = cpu_to_le32(initiator); 3198 cmd->reasoncode = cpu_to_le32(reason); 3199 3200 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3201 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 3202 vdev_id, mac, tid, initiator, reason); 3203 3204 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_DELBA_SEND_CMDID); 3205 3206 if (ret) { 3207 ath12k_warn(ar->ab, 3208 "failed to send WMI_DELBA_SEND_CMDID cmd\n"); 3209 dev_kfree_skb(skb); 3210 } 3211 3212 return ret; 3213 } 3214 3215 int ath12k_wmi_addba_set_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3216 u32 tid, u32 status) 3217 { 3218 struct ath12k_wmi_pdev *wmi = ar->wmi; 3219 struct wmi_addba_setresponse_cmd *cmd; 3220 struct sk_buff *skb; 3221 int ret; 3222 3223 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3224 if (!skb) 3225 return -ENOMEM; 3226 3227 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 3228 cmd->tlv_header = 3229 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SETRESPONSE_CMD, 3230 sizeof(*cmd)); 3231 cmd->vdev_id = cpu_to_le32(vdev_id); 3232 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3233 cmd->tid = cpu_to_le32(tid); 3234 cmd->statuscode = cpu_to_le32(status); 3235 3236 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3237 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 3238 vdev_id, mac, tid, status); 3239 3240 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SET_RESP_CMDID); 3241 3242 if (ret) { 3243 ath12k_warn(ar->ab, 3244 "failed to send WMI_ADDBA_SET_RESP_CMDID cmd\n"); 3245 dev_kfree_skb(skb); 3246 } 3247 3248 return ret; 3249 } 3250 3251 int ath12k_wmi_addba_send(struct ath12k *ar, u32 vdev_id, const u8 *mac, 3252 u32 tid, u32 buf_size) 3253 { 3254 struct ath12k_wmi_pdev *wmi = ar->wmi; 3255 struct wmi_addba_send_cmd *cmd; 3256 struct sk_buff *skb; 3257 int ret; 3258 3259 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3260 if (!skb) 3261 return -ENOMEM; 3262 3263 cmd = (struct wmi_addba_send_cmd *)skb->data; 3264 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_SEND_CMD, 3265 sizeof(*cmd)); 3266 cmd->vdev_id = cpu_to_le32(vdev_id); 3267 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3268 cmd->tid = cpu_to_le32(tid); 3269 cmd->buffersize = cpu_to_le32(buf_size); 3270 3271 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3272 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 3273 vdev_id, mac, tid, buf_size); 3274 3275 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_SEND_CMDID); 3276 3277 if (ret) { 3278 ath12k_warn(ar->ab, 3279 "failed to send WMI_ADDBA_SEND_CMDID cmd\n"); 3280 dev_kfree_skb(skb); 3281 } 3282 3283 return ret; 3284 } 3285 3286 int ath12k_wmi_addba_clear_resp(struct ath12k *ar, u32 vdev_id, const u8 *mac) 3287 { 3288 struct ath12k_wmi_pdev *wmi = ar->wmi; 3289 struct wmi_addba_clear_resp_cmd *cmd; 3290 struct sk_buff *skb; 3291 int ret; 3292 3293 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3294 if (!skb) 3295 return -ENOMEM; 3296 3297 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 3298 cmd->tlv_header = 3299 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ADDBA_CLEAR_RESP_CMD, 3300 sizeof(*cmd)); 3301 cmd->vdev_id = cpu_to_le32(vdev_id); 3302 ether_addr_copy(cmd->peer_macaddr.addr, mac); 3303 3304 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3305 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 3306 vdev_id, mac); 3307 3308 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_ADDBA_CLEAR_RESP_CMDID); 3309 3310 if (ret) { 3311 ath12k_warn(ar->ab, 3312 "failed to send WMI_ADDBA_CLEAR_RESP_CMDID cmd\n"); 3313 dev_kfree_skb(skb); 3314 } 3315 3316 return ret; 3317 } 3318 3319 int ath12k_wmi_send_init_country_cmd(struct ath12k *ar, 3320 struct ath12k_wmi_init_country_arg *arg) 3321 { 3322 struct ath12k_wmi_pdev *wmi = ar->wmi; 3323 struct wmi_init_country_cmd *cmd; 3324 struct sk_buff *skb; 3325 int ret; 3326 3327 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3328 if (!skb) 3329 return -ENOMEM; 3330 3331 cmd = (struct wmi_init_country_cmd *)skb->data; 3332 cmd->tlv_header = 3333 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_INIT_COUNTRY_CMD, 3334 sizeof(*cmd)); 3335 3336 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3337 3338 switch (arg->flags) { 3339 case ALPHA_IS_SET: 3340 cmd->init_cc_type = WMI_COUNTRY_INFO_TYPE_ALPHA; 3341 memcpy(&cmd->cc_info.alpha2, arg->cc_info.alpha2, 3); 3342 break; 3343 case CC_IS_SET: 3344 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_COUNTRY_CODE); 3345 cmd->cc_info.country_code = 3346 cpu_to_le32(arg->cc_info.country_code); 3347 break; 3348 case REGDMN_IS_SET: 3349 cmd->init_cc_type = cpu_to_le32(WMI_COUNTRY_INFO_TYPE_REGDOMAIN); 3350 cmd->cc_info.regdom_id = cpu_to_le32(arg->cc_info.regdom_id); 3351 break; 3352 default: 3353 ret = -EINVAL; 3354 goto out; 3355 } 3356 3357 ret = ath12k_wmi_cmd_send(wmi, skb, 3358 WMI_SET_INIT_COUNTRY_CMDID); 3359 3360 out: 3361 if (ret) { 3362 ath12k_warn(ar->ab, 3363 "failed to send WMI_SET_INIT_COUNTRY CMD :%d\n", 3364 ret); 3365 dev_kfree_skb(skb); 3366 } 3367 3368 return ret; 3369 } 3370 3371 int ath12k_wmi_send_set_current_country_cmd(struct ath12k *ar, 3372 struct wmi_set_current_country_arg *arg) 3373 { 3374 struct ath12k_wmi_pdev *wmi = ar->wmi; 3375 struct wmi_set_current_country_cmd *cmd; 3376 struct sk_buff *skb; 3377 int ret; 3378 3379 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3380 if (!skb) 3381 return -ENOMEM; 3382 3383 cmd = (struct wmi_set_current_country_cmd *)skb->data; 3384 cmd->tlv_header = 3385 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_CURRENT_COUNTRY_CMD, 3386 sizeof(*cmd)); 3387 3388 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 3389 memcpy(&cmd->new_alpha2, &arg->alpha2, sizeof(arg->alpha2)); 3390 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_SET_CURRENT_COUNTRY_CMDID); 3391 3392 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3393 "set current country pdev id %d alpha2 %c%c\n", 3394 ar->pdev->pdev_id, 3395 arg->alpha2[0], 3396 arg->alpha2[1]); 3397 3398 if (ret) { 3399 ath12k_warn(ar->ab, 3400 "failed to send WMI_SET_CURRENT_COUNTRY_CMDID: %d\n", ret); 3401 dev_kfree_skb(skb); 3402 } 3403 3404 return ret; 3405 } 3406 3407 int ath12k_wmi_send_11d_scan_start_cmd(struct ath12k *ar, 3408 struct wmi_11d_scan_start_arg *arg) 3409 { 3410 struct ath12k_wmi_pdev *wmi = ar->wmi; 3411 struct wmi_11d_scan_start_cmd *cmd; 3412 struct sk_buff *skb; 3413 int ret; 3414 3415 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3416 if (!skb) 3417 return -ENOMEM; 3418 3419 cmd = (struct wmi_11d_scan_start_cmd *)skb->data; 3420 cmd->tlv_header = 3421 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_START_CMD, 3422 sizeof(*cmd)); 3423 3424 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 3425 cmd->scan_period_msec = cpu_to_le32(arg->scan_period_msec); 3426 cmd->start_interval_msec = cpu_to_le32(arg->start_interval_msec); 3427 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_START_CMDID); 3428 3429 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3430 "send 11d scan start vdev id %d period %d ms internal %d ms\n", 3431 arg->vdev_id, arg->scan_period_msec, 3432 arg->start_interval_msec); 3433 3434 if (ret) { 3435 ath12k_warn(ar->ab, 3436 "failed to send WMI_11D_SCAN_START_CMDID: %d\n", ret); 3437 dev_kfree_skb(skb); 3438 } 3439 3440 return ret; 3441 } 3442 3443 int ath12k_wmi_send_11d_scan_stop_cmd(struct ath12k *ar, u32 vdev_id) 3444 { 3445 struct ath12k_wmi_pdev *wmi = ar->wmi; 3446 struct wmi_11d_scan_stop_cmd *cmd; 3447 struct sk_buff *skb; 3448 int ret; 3449 3450 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, sizeof(*cmd)); 3451 if (!skb) 3452 return -ENOMEM; 3453 3454 cmd = (struct wmi_11d_scan_stop_cmd *)skb->data; 3455 cmd->tlv_header = 3456 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_11D_SCAN_STOP_CMD, 3457 sizeof(*cmd)); 3458 3459 cmd->vdev_id = cpu_to_le32(vdev_id); 3460 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_11D_SCAN_STOP_CMDID); 3461 3462 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3463 "send 11d scan stop vdev id %d\n", 3464 cmd->vdev_id); 3465 3466 if (ret) { 3467 ath12k_warn(ar->ab, 3468 "failed to send WMI_11D_SCAN_STOP_CMDID: %d\n", ret); 3469 dev_kfree_skb(skb); 3470 } 3471 3472 return ret; 3473 } 3474 3475 int 3476 ath12k_wmi_send_twt_enable_cmd(struct ath12k *ar, u32 pdev_id) 3477 { 3478 struct ath12k_wmi_pdev *wmi = ar->wmi; 3479 struct ath12k_base *ab = wmi->wmi_ab->ab; 3480 struct wmi_twt_enable_params_cmd *cmd; 3481 struct sk_buff *skb; 3482 int ret, len; 3483 3484 len = sizeof(*cmd); 3485 3486 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3487 if (!skb) 3488 return -ENOMEM; 3489 3490 cmd = (struct wmi_twt_enable_params_cmd *)skb->data; 3491 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_ENABLE_CMD, 3492 len); 3493 cmd->pdev_id = cpu_to_le32(pdev_id); 3494 cmd->sta_cong_timer_ms = cpu_to_le32(ATH12K_TWT_DEF_STA_CONG_TIMER_MS); 3495 cmd->default_slot_size = cpu_to_le32(ATH12K_TWT_DEF_DEFAULT_SLOT_SIZE); 3496 cmd->congestion_thresh_setup = 3497 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_SETUP); 3498 cmd->congestion_thresh_teardown = 3499 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_TEARDOWN); 3500 cmd->congestion_thresh_critical = 3501 cpu_to_le32(ATH12K_TWT_DEF_CONGESTION_THRESH_CRITICAL); 3502 cmd->interference_thresh_teardown = 3503 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_TEARDOWN); 3504 cmd->interference_thresh_setup = 3505 cpu_to_le32(ATH12K_TWT_DEF_INTERFERENCE_THRESH_SETUP); 3506 cmd->min_no_sta_setup = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_SETUP); 3507 cmd->min_no_sta_teardown = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_STA_TEARDOWN); 3508 cmd->no_of_bcast_mcast_slots = 3509 cpu_to_le32(ATH12K_TWT_DEF_NO_OF_BCAST_MCAST_SLOTS); 3510 cmd->min_no_twt_slots = cpu_to_le32(ATH12K_TWT_DEF_MIN_NO_TWT_SLOTS); 3511 cmd->max_no_sta_twt = cpu_to_le32(ATH12K_TWT_DEF_MAX_NO_STA_TWT); 3512 cmd->mode_check_interval = cpu_to_le32(ATH12K_TWT_DEF_MODE_CHECK_INTERVAL); 3513 cmd->add_sta_slot_interval = cpu_to_le32(ATH12K_TWT_DEF_ADD_STA_SLOT_INTERVAL); 3514 cmd->remove_sta_slot_interval = 3515 cpu_to_le32(ATH12K_TWT_DEF_REMOVE_STA_SLOT_INTERVAL); 3516 /* TODO add MBSSID support */ 3517 cmd->mbss_support = 0; 3518 3519 ret = ath12k_wmi_cmd_send(wmi, skb, 3520 WMI_TWT_ENABLE_CMDID); 3521 if (ret) { 3522 ath12k_warn(ab, "Failed to send WMI_TWT_ENABLE_CMDID"); 3523 dev_kfree_skb(skb); 3524 } 3525 return ret; 3526 } 3527 3528 int 3529 ath12k_wmi_send_twt_disable_cmd(struct ath12k *ar, u32 pdev_id) 3530 { 3531 struct ath12k_wmi_pdev *wmi = ar->wmi; 3532 struct ath12k_base *ab = wmi->wmi_ab->ab; 3533 struct wmi_twt_disable_params_cmd *cmd; 3534 struct sk_buff *skb; 3535 int ret, len; 3536 3537 len = sizeof(*cmd); 3538 3539 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3540 if (!skb) 3541 return -ENOMEM; 3542 3543 cmd = (struct wmi_twt_disable_params_cmd *)skb->data; 3544 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_TWT_DISABLE_CMD, 3545 len); 3546 cmd->pdev_id = cpu_to_le32(pdev_id); 3547 3548 ret = ath12k_wmi_cmd_send(wmi, skb, 3549 WMI_TWT_DISABLE_CMDID); 3550 if (ret) { 3551 ath12k_warn(ab, "Failed to send WMI_TWT_DISABLE_CMDID"); 3552 dev_kfree_skb(skb); 3553 } 3554 return ret; 3555 } 3556 3557 int 3558 ath12k_wmi_send_obss_spr_cmd(struct ath12k *ar, u32 vdev_id, 3559 struct ieee80211_he_obss_pd *he_obss_pd) 3560 { 3561 struct ath12k_wmi_pdev *wmi = ar->wmi; 3562 struct ath12k_base *ab = wmi->wmi_ab->ab; 3563 struct wmi_obss_spatial_reuse_params_cmd *cmd; 3564 struct sk_buff *skb; 3565 int ret, len; 3566 3567 len = sizeof(*cmd); 3568 3569 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3570 if (!skb) 3571 return -ENOMEM; 3572 3573 cmd = (struct wmi_obss_spatial_reuse_params_cmd *)skb->data; 3574 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_SPATIAL_REUSE_SET_CMD, 3575 len); 3576 cmd->vdev_id = cpu_to_le32(vdev_id); 3577 cmd->enable = cpu_to_le32(he_obss_pd->enable); 3578 cmd->obss_min = a_cpu_to_sle32(he_obss_pd->min_offset); 3579 cmd->obss_max = a_cpu_to_sle32(he_obss_pd->max_offset); 3580 3581 ret = ath12k_wmi_cmd_send(wmi, skb, 3582 WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID); 3583 if (ret) { 3584 ath12k_warn(ab, 3585 "Failed to send WMI_PDEV_OBSS_PD_SPATIAL_REUSE_CMDID"); 3586 dev_kfree_skb(skb); 3587 } 3588 return ret; 3589 } 3590 3591 int ath12k_wmi_obss_color_cfg_cmd(struct ath12k *ar, u32 vdev_id, 3592 u8 bss_color, u32 period, 3593 bool enable) 3594 { 3595 struct ath12k_wmi_pdev *wmi = ar->wmi; 3596 struct ath12k_base *ab = wmi->wmi_ab->ab; 3597 struct wmi_obss_color_collision_cfg_params_cmd *cmd; 3598 struct sk_buff *skb; 3599 int ret, len; 3600 3601 len = sizeof(*cmd); 3602 3603 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3604 if (!skb) 3605 return -ENOMEM; 3606 3607 cmd = (struct wmi_obss_color_collision_cfg_params_cmd *)skb->data; 3608 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_OBSS_COLOR_COLLISION_DET_CONFIG, 3609 len); 3610 cmd->vdev_id = cpu_to_le32(vdev_id); 3611 cmd->evt_type = enable ? cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION) : 3612 cpu_to_le32(ATH12K_OBSS_COLOR_COLLISION_DETECTION_DISABLE); 3613 cmd->current_bss_color = cpu_to_le32(bss_color); 3614 cmd->detection_period_ms = cpu_to_le32(period); 3615 cmd->scan_period_ms = cpu_to_le32(ATH12K_BSS_COLOR_COLLISION_SCAN_PERIOD_MS); 3616 cmd->free_slot_expiry_time_ms = 0; 3617 cmd->flags = 0; 3618 3619 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3620 "wmi_send_obss_color_collision_cfg id %d type %d bss_color %d detect_period %d scan_period %d\n", 3621 cmd->vdev_id, cmd->evt_type, cmd->current_bss_color, 3622 cmd->detection_period_ms, cmd->scan_period_ms); 3623 3624 ret = ath12k_wmi_cmd_send(wmi, skb, 3625 WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID); 3626 if (ret) { 3627 ath12k_warn(ab, "Failed to send WMI_OBSS_COLOR_COLLISION_DET_CONFIG_CMDID"); 3628 dev_kfree_skb(skb); 3629 } 3630 return ret; 3631 } 3632 3633 int ath12k_wmi_send_bss_color_change_enable_cmd(struct ath12k *ar, u32 vdev_id, 3634 bool enable) 3635 { 3636 struct ath12k_wmi_pdev *wmi = ar->wmi; 3637 struct ath12k_base *ab = wmi->wmi_ab->ab; 3638 struct wmi_bss_color_change_enable_params_cmd *cmd; 3639 struct sk_buff *skb; 3640 int ret, len; 3641 3642 len = sizeof(*cmd); 3643 3644 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3645 if (!skb) 3646 return -ENOMEM; 3647 3648 cmd = (struct wmi_bss_color_change_enable_params_cmd *)skb->data; 3649 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BSS_COLOR_CHANGE_ENABLE, 3650 len); 3651 cmd->vdev_id = cpu_to_le32(vdev_id); 3652 cmd->enable = enable ? cpu_to_le32(1) : 0; 3653 3654 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3655 "wmi_send_bss_color_change_enable id %d enable %d\n", 3656 cmd->vdev_id, cmd->enable); 3657 3658 ret = ath12k_wmi_cmd_send(wmi, skb, 3659 WMI_BSS_COLOR_CHANGE_ENABLE_CMDID); 3660 if (ret) { 3661 ath12k_warn(ab, "Failed to send WMI_BSS_COLOR_CHANGE_ENABLE_CMDID"); 3662 dev_kfree_skb(skb); 3663 } 3664 return ret; 3665 } 3666 3667 int ath12k_wmi_fils_discovery_tmpl(struct ath12k *ar, u32 vdev_id, 3668 struct sk_buff *tmpl) 3669 { 3670 struct wmi_tlv *tlv; 3671 struct sk_buff *skb; 3672 void *ptr; 3673 int ret, len; 3674 size_t aligned_len; 3675 struct wmi_fils_discovery_tmpl_cmd *cmd; 3676 3677 aligned_len = roundup(tmpl->len, 4); 3678 len = sizeof(*cmd) + TLV_HDR_SIZE + aligned_len; 3679 3680 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3681 "WMI vdev %i set FILS discovery template\n", vdev_id); 3682 3683 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3684 if (!skb) 3685 return -ENOMEM; 3686 3687 cmd = (struct wmi_fils_discovery_tmpl_cmd *)skb->data; 3688 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_FILS_DISCOVERY_TMPL_CMD, 3689 sizeof(*cmd)); 3690 cmd->vdev_id = cpu_to_le32(vdev_id); 3691 cmd->buf_len = cpu_to_le32(tmpl->len); 3692 ptr = skb->data + sizeof(*cmd); 3693 3694 tlv = ptr; 3695 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3696 memcpy(tlv->value, tmpl->data, tmpl->len); 3697 3698 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_FILS_DISCOVERY_TMPL_CMDID); 3699 if (ret) { 3700 ath12k_warn(ar->ab, 3701 "WMI vdev %i failed to send FILS discovery template command\n", 3702 vdev_id); 3703 dev_kfree_skb(skb); 3704 } 3705 return ret; 3706 } 3707 3708 int ath12k_wmi_probe_resp_tmpl(struct ath12k *ar, u32 vdev_id, 3709 struct sk_buff *tmpl) 3710 { 3711 struct wmi_probe_tmpl_cmd *cmd; 3712 struct ath12k_wmi_bcn_prb_info_params *probe_info; 3713 struct wmi_tlv *tlv; 3714 struct sk_buff *skb; 3715 void *ptr; 3716 int ret, len; 3717 size_t aligned_len = roundup(tmpl->len, 4); 3718 3719 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3720 "WMI vdev %i set probe response template\n", vdev_id); 3721 3722 len = sizeof(*cmd) + sizeof(*probe_info) + TLV_HDR_SIZE + aligned_len; 3723 3724 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3725 if (!skb) 3726 return -ENOMEM; 3727 3728 cmd = (struct wmi_probe_tmpl_cmd *)skb->data; 3729 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PRB_TMPL_CMD, 3730 sizeof(*cmd)); 3731 cmd->vdev_id = cpu_to_le32(vdev_id); 3732 cmd->buf_len = cpu_to_le32(tmpl->len); 3733 3734 ptr = skb->data + sizeof(*cmd); 3735 3736 probe_info = ptr; 3737 len = sizeof(*probe_info); 3738 probe_info->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_BCN_PRB_INFO, 3739 len); 3740 probe_info->caps = 0; 3741 probe_info->erp = 0; 3742 3743 ptr += sizeof(*probe_info); 3744 3745 tlv = ptr; 3746 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_BYTE, aligned_len); 3747 memcpy(tlv->value, tmpl->data, tmpl->len); 3748 3749 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_PRB_TMPL_CMDID); 3750 if (ret) { 3751 ath12k_warn(ar->ab, 3752 "WMI vdev %i failed to send probe response template command\n", 3753 vdev_id); 3754 dev_kfree_skb(skb); 3755 } 3756 return ret; 3757 } 3758 3759 int ath12k_wmi_fils_discovery(struct ath12k *ar, u32 vdev_id, u32 interval, 3760 bool unsol_bcast_probe_resp_enabled) 3761 { 3762 struct sk_buff *skb; 3763 int ret, len; 3764 struct wmi_fils_discovery_cmd *cmd; 3765 3766 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 3767 "WMI vdev %i set %s interval to %u TU\n", 3768 vdev_id, unsol_bcast_probe_resp_enabled ? 3769 "unsolicited broadcast probe response" : "FILS discovery", 3770 interval); 3771 3772 len = sizeof(*cmd); 3773 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 3774 if (!skb) 3775 return -ENOMEM; 3776 3777 cmd = (struct wmi_fils_discovery_cmd *)skb->data; 3778 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ENABLE_FILS_CMD, 3779 len); 3780 cmd->vdev_id = cpu_to_le32(vdev_id); 3781 cmd->interval = cpu_to_le32(interval); 3782 cmd->config = cpu_to_le32(unsol_bcast_probe_resp_enabled); 3783 3784 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_ENABLE_FILS_CMDID); 3785 if (ret) { 3786 ath12k_warn(ar->ab, 3787 "WMI vdev %i failed to send FILS discovery enable/disable command\n", 3788 vdev_id); 3789 dev_kfree_skb(skb); 3790 } 3791 return ret; 3792 } 3793 3794 static void 3795 ath12k_fill_band_to_mac_param(struct ath12k_base *soc, 3796 struct ath12k_wmi_pdev_band_arg *arg) 3797 { 3798 u8 i; 3799 struct ath12k_wmi_hal_reg_capabilities_ext_arg *hal_reg_cap; 3800 struct ath12k_pdev *pdev; 3801 3802 for (i = 0; i < soc->num_radios; i++) { 3803 pdev = &soc->pdevs[i]; 3804 hal_reg_cap = &soc->hal_reg_cap[i]; 3805 arg[i].pdev_id = pdev->pdev_id; 3806 3807 switch (pdev->cap.supported_bands) { 3808 case WMI_HOST_WLAN_2GHZ_5GHZ_CAP: 3809 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3810 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3811 break; 3812 case WMI_HOST_WLAN_2GHZ_CAP: 3813 arg[i].start_freq = hal_reg_cap->low_2ghz_chan; 3814 arg[i].end_freq = hal_reg_cap->high_2ghz_chan; 3815 break; 3816 case WMI_HOST_WLAN_5GHZ_CAP: 3817 arg[i].start_freq = hal_reg_cap->low_5ghz_chan; 3818 arg[i].end_freq = hal_reg_cap->high_5ghz_chan; 3819 break; 3820 default: 3821 break; 3822 } 3823 } 3824 } 3825 3826 static void 3827 ath12k_wmi_copy_resource_config(struct ath12k_base *ab, 3828 struct ath12k_wmi_resource_config_params *wmi_cfg, 3829 struct ath12k_wmi_resource_config_arg *tg_cfg) 3830 { 3831 wmi_cfg->num_vdevs = cpu_to_le32(tg_cfg->num_vdevs); 3832 wmi_cfg->num_peers = cpu_to_le32(tg_cfg->num_peers); 3833 wmi_cfg->num_offload_peers = cpu_to_le32(tg_cfg->num_offload_peers); 3834 wmi_cfg->num_offload_reorder_buffs = 3835 cpu_to_le32(tg_cfg->num_offload_reorder_buffs); 3836 wmi_cfg->num_peer_keys = cpu_to_le32(tg_cfg->num_peer_keys); 3837 wmi_cfg->num_tids = cpu_to_le32(tg_cfg->num_tids); 3838 wmi_cfg->ast_skid_limit = cpu_to_le32(tg_cfg->ast_skid_limit); 3839 wmi_cfg->tx_chain_mask = cpu_to_le32(tg_cfg->tx_chain_mask); 3840 wmi_cfg->rx_chain_mask = cpu_to_le32(tg_cfg->rx_chain_mask); 3841 wmi_cfg->rx_timeout_pri[0] = cpu_to_le32(tg_cfg->rx_timeout_pri[0]); 3842 wmi_cfg->rx_timeout_pri[1] = cpu_to_le32(tg_cfg->rx_timeout_pri[1]); 3843 wmi_cfg->rx_timeout_pri[2] = cpu_to_le32(tg_cfg->rx_timeout_pri[2]); 3844 wmi_cfg->rx_timeout_pri[3] = cpu_to_le32(tg_cfg->rx_timeout_pri[3]); 3845 wmi_cfg->rx_decap_mode = cpu_to_le32(tg_cfg->rx_decap_mode); 3846 wmi_cfg->scan_max_pending_req = cpu_to_le32(tg_cfg->scan_max_pending_req); 3847 wmi_cfg->bmiss_offload_max_vdev = cpu_to_le32(tg_cfg->bmiss_offload_max_vdev); 3848 wmi_cfg->roam_offload_max_vdev = cpu_to_le32(tg_cfg->roam_offload_max_vdev); 3849 wmi_cfg->roam_offload_max_ap_profiles = 3850 cpu_to_le32(tg_cfg->roam_offload_max_ap_profiles); 3851 wmi_cfg->num_mcast_groups = cpu_to_le32(tg_cfg->num_mcast_groups); 3852 wmi_cfg->num_mcast_table_elems = cpu_to_le32(tg_cfg->num_mcast_table_elems); 3853 wmi_cfg->mcast2ucast_mode = cpu_to_le32(tg_cfg->mcast2ucast_mode); 3854 wmi_cfg->tx_dbg_log_size = cpu_to_le32(tg_cfg->tx_dbg_log_size); 3855 wmi_cfg->num_wds_entries = cpu_to_le32(tg_cfg->num_wds_entries); 3856 wmi_cfg->dma_burst_size = cpu_to_le32(tg_cfg->dma_burst_size); 3857 wmi_cfg->mac_aggr_delim = cpu_to_le32(tg_cfg->mac_aggr_delim); 3858 wmi_cfg->rx_skip_defrag_timeout_dup_detection_check = 3859 cpu_to_le32(tg_cfg->rx_skip_defrag_timeout_dup_detection_check); 3860 wmi_cfg->vow_config = cpu_to_le32(tg_cfg->vow_config); 3861 wmi_cfg->gtk_offload_max_vdev = cpu_to_le32(tg_cfg->gtk_offload_max_vdev); 3862 wmi_cfg->num_msdu_desc = cpu_to_le32(tg_cfg->num_msdu_desc); 3863 wmi_cfg->max_frag_entries = cpu_to_le32(tg_cfg->max_frag_entries); 3864 wmi_cfg->num_tdls_vdevs = cpu_to_le32(tg_cfg->num_tdls_vdevs); 3865 wmi_cfg->num_tdls_conn_table_entries = 3866 cpu_to_le32(tg_cfg->num_tdls_conn_table_entries); 3867 wmi_cfg->beacon_tx_offload_max_vdev = 3868 cpu_to_le32(tg_cfg->beacon_tx_offload_max_vdev); 3869 wmi_cfg->num_multicast_filter_entries = 3870 cpu_to_le32(tg_cfg->num_multicast_filter_entries); 3871 wmi_cfg->num_wow_filters = cpu_to_le32(tg_cfg->num_wow_filters); 3872 wmi_cfg->num_keep_alive_pattern = cpu_to_le32(tg_cfg->num_keep_alive_pattern); 3873 wmi_cfg->keep_alive_pattern_size = cpu_to_le32(tg_cfg->keep_alive_pattern_size); 3874 wmi_cfg->max_tdls_concurrent_sleep_sta = 3875 cpu_to_le32(tg_cfg->max_tdls_concurrent_sleep_sta); 3876 wmi_cfg->max_tdls_concurrent_buffer_sta = 3877 cpu_to_le32(tg_cfg->max_tdls_concurrent_buffer_sta); 3878 wmi_cfg->wmi_send_separate = cpu_to_le32(tg_cfg->wmi_send_separate); 3879 wmi_cfg->num_ocb_vdevs = cpu_to_le32(tg_cfg->num_ocb_vdevs); 3880 wmi_cfg->num_ocb_channels = cpu_to_le32(tg_cfg->num_ocb_channels); 3881 wmi_cfg->num_ocb_schedules = cpu_to_le32(tg_cfg->num_ocb_schedules); 3882 wmi_cfg->bpf_instruction_size = cpu_to_le32(tg_cfg->bpf_instruction_size); 3883 wmi_cfg->max_bssid_rx_filters = cpu_to_le32(tg_cfg->max_bssid_rx_filters); 3884 wmi_cfg->use_pdev_id = cpu_to_le32(tg_cfg->use_pdev_id); 3885 wmi_cfg->flag1 = cpu_to_le32(tg_cfg->atf_config | 3886 WMI_RSRC_CFG_FLAG1_BSS_CHANNEL_INFO_64); 3887 wmi_cfg->peer_map_unmap_version = cpu_to_le32(tg_cfg->peer_map_unmap_version); 3888 wmi_cfg->sched_params = cpu_to_le32(tg_cfg->sched_params); 3889 wmi_cfg->twt_ap_pdev_count = cpu_to_le32(tg_cfg->twt_ap_pdev_count); 3890 wmi_cfg->twt_ap_sta_count = cpu_to_le32(tg_cfg->twt_ap_sta_count); 3891 wmi_cfg->flags2 = le32_encode_bits(tg_cfg->peer_metadata_ver, 3892 WMI_RSRC_CFG_FLAGS2_RX_PEER_METADATA_VERSION); 3893 wmi_cfg->host_service_flags = cpu_to_le32(tg_cfg->is_reg_cc_ext_event_supported << 3894 WMI_RSRC_CFG_HOST_SVC_FLAG_REG_CC_EXT_SUPPORT_BIT); 3895 if (ab->hw_params->reoq_lut_support) 3896 wmi_cfg->host_service_flags |= 3897 cpu_to_le32(1 << WMI_RSRC_CFG_HOST_SVC_FLAG_REO_QREF_SUPPORT_BIT); 3898 wmi_cfg->ema_max_vap_cnt = cpu_to_le32(tg_cfg->ema_max_vap_cnt); 3899 wmi_cfg->ema_max_profile_period = cpu_to_le32(tg_cfg->ema_max_profile_period); 3900 wmi_cfg->flags2 |= cpu_to_le32(WMI_RSRC_CFG_FLAGS2_CALC_NEXT_DTIM_COUNT_SET); 3901 } 3902 3903 static int ath12k_init_cmd_send(struct ath12k_wmi_pdev *wmi, 3904 struct ath12k_wmi_init_cmd_arg *arg) 3905 { 3906 struct ath12k_base *ab = wmi->wmi_ab->ab; 3907 struct sk_buff *skb; 3908 struct wmi_init_cmd *cmd; 3909 struct ath12k_wmi_resource_config_params *cfg; 3910 struct ath12k_wmi_pdev_set_hw_mode_cmd *hw_mode; 3911 struct ath12k_wmi_pdev_band_to_mac_params *band_to_mac; 3912 struct ath12k_wmi_host_mem_chunk_params *host_mem_chunks; 3913 struct wmi_tlv *tlv; 3914 size_t ret, len; 3915 void *ptr; 3916 u32 hw_mode_len = 0; 3917 u16 idx; 3918 3919 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) 3920 hw_mode_len = sizeof(*hw_mode) + TLV_HDR_SIZE + 3921 (arg->num_band_to_mac * sizeof(*band_to_mac)); 3922 3923 len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(*cfg) + hw_mode_len + 3924 (arg->num_mem_chunks ? (sizeof(*host_mem_chunks) * WMI_MAX_MEM_REQS) : 0); 3925 3926 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 3927 if (!skb) 3928 return -ENOMEM; 3929 3930 cmd = (struct wmi_init_cmd *)skb->data; 3931 3932 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_INIT_CMD, 3933 sizeof(*cmd)); 3934 3935 ptr = skb->data + sizeof(*cmd); 3936 cfg = ptr; 3937 3938 ath12k_wmi_copy_resource_config(ab, cfg, &arg->res_cfg); 3939 3940 cfg->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_RESOURCE_CONFIG, 3941 sizeof(*cfg)); 3942 3943 ptr += sizeof(*cfg); 3944 host_mem_chunks = ptr + TLV_HDR_SIZE; 3945 len = sizeof(struct ath12k_wmi_host_mem_chunk_params); 3946 3947 for (idx = 0; idx < arg->num_mem_chunks; ++idx) { 3948 host_mem_chunks[idx].tlv_header = 3949 ath12k_wmi_tlv_hdr(WMI_TAG_WLAN_HOST_MEMORY_CHUNK, 3950 len); 3951 3952 host_mem_chunks[idx].ptr = cpu_to_le32(arg->mem_chunks[idx].paddr); 3953 host_mem_chunks[idx].size = cpu_to_le32(arg->mem_chunks[idx].len); 3954 host_mem_chunks[idx].req_id = cpu_to_le32(arg->mem_chunks[idx].req_id); 3955 3956 ath12k_dbg(ab, ATH12K_DBG_WMI, 3957 "WMI host mem chunk req_id %d paddr 0x%llx len %d\n", 3958 arg->mem_chunks[idx].req_id, 3959 (u64)arg->mem_chunks[idx].paddr, 3960 arg->mem_chunks[idx].len); 3961 } 3962 cmd->num_host_mem_chunks = cpu_to_le32(arg->num_mem_chunks); 3963 len = sizeof(struct ath12k_wmi_host_mem_chunk_params) * arg->num_mem_chunks; 3964 3965 /* num_mem_chunks is zero */ 3966 tlv = ptr; 3967 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3968 ptr += TLV_HDR_SIZE + len; 3969 3970 if (arg->hw_mode_id != WMI_HOST_HW_MODE_MAX) { 3971 hw_mode = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)ptr; 3972 hw_mode->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 3973 sizeof(*hw_mode)); 3974 3975 hw_mode->hw_mode_index = cpu_to_le32(arg->hw_mode_id); 3976 hw_mode->num_band_to_mac = cpu_to_le32(arg->num_band_to_mac); 3977 3978 ptr += sizeof(*hw_mode); 3979 3980 len = arg->num_band_to_mac * sizeof(*band_to_mac); 3981 tlv = ptr; 3982 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, len); 3983 3984 ptr += TLV_HDR_SIZE; 3985 len = sizeof(*band_to_mac); 3986 3987 for (idx = 0; idx < arg->num_band_to_mac; idx++) { 3988 band_to_mac = (void *)ptr; 3989 3990 band_to_mac->tlv_header = 3991 ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_BAND_TO_MAC, 3992 len); 3993 band_to_mac->pdev_id = cpu_to_le32(arg->band_to_mac[idx].pdev_id); 3994 band_to_mac->start_freq = 3995 cpu_to_le32(arg->band_to_mac[idx].start_freq); 3996 band_to_mac->end_freq = 3997 cpu_to_le32(arg->band_to_mac[idx].end_freq); 3998 ptr += sizeof(*band_to_mac); 3999 } 4000 } 4001 4002 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_INIT_CMDID); 4003 if (ret) { 4004 ath12k_warn(ab, "failed to send WMI_INIT_CMDID\n"); 4005 dev_kfree_skb(skb); 4006 } 4007 4008 return ret; 4009 } 4010 4011 int ath12k_wmi_pdev_lro_cfg(struct ath12k *ar, 4012 int pdev_id) 4013 { 4014 struct ath12k_wmi_pdev_lro_config_cmd *cmd; 4015 struct sk_buff *skb; 4016 int ret; 4017 4018 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4019 if (!skb) 4020 return -ENOMEM; 4021 4022 cmd = (struct ath12k_wmi_pdev_lro_config_cmd *)skb->data; 4023 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_LRO_INFO_CMD, 4024 sizeof(*cmd)); 4025 4026 get_random_bytes(cmd->th_4, sizeof(cmd->th_4)); 4027 get_random_bytes(cmd->th_6, sizeof(cmd->th_6)); 4028 4029 cmd->pdev_id = cpu_to_le32(pdev_id); 4030 4031 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4032 "WMI lro cfg cmd pdev_id 0x%x\n", pdev_id); 4033 4034 ret = ath12k_wmi_cmd_send(ar->wmi, skb, WMI_LRO_CONFIG_CMDID); 4035 if (ret) { 4036 ath12k_warn(ar->ab, 4037 "failed to send lro cfg req wmi cmd\n"); 4038 goto err; 4039 } 4040 4041 return 0; 4042 err: 4043 dev_kfree_skb(skb); 4044 return ret; 4045 } 4046 4047 int ath12k_wmi_wait_for_service_ready(struct ath12k_base *ab) 4048 { 4049 unsigned long time_left; 4050 4051 time_left = wait_for_completion_timeout(&ab->wmi_ab.service_ready, 4052 WMI_SERVICE_READY_TIMEOUT_HZ); 4053 if (!time_left) 4054 return -ETIMEDOUT; 4055 4056 return 0; 4057 } 4058 4059 int ath12k_wmi_wait_for_unified_ready(struct ath12k_base *ab) 4060 { 4061 unsigned long time_left; 4062 4063 time_left = wait_for_completion_timeout(&ab->wmi_ab.unified_ready, 4064 WMI_SERVICE_READY_TIMEOUT_HZ); 4065 if (!time_left) 4066 return -ETIMEDOUT; 4067 4068 return 0; 4069 } 4070 4071 int ath12k_wmi_set_hw_mode(struct ath12k_base *ab, 4072 enum wmi_host_hw_mode_config_type mode) 4073 { 4074 struct ath12k_wmi_pdev_set_hw_mode_cmd *cmd; 4075 struct sk_buff *skb; 4076 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 4077 int len; 4078 int ret; 4079 4080 len = sizeof(*cmd); 4081 4082 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 4083 if (!skb) 4084 return -ENOMEM; 4085 4086 cmd = (struct ath12k_wmi_pdev_set_hw_mode_cmd *)skb->data; 4087 4088 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_PDEV_SET_HW_MODE_CMD, 4089 sizeof(*cmd)); 4090 4091 cmd->pdev_id = WMI_PDEV_ID_SOC; 4092 cmd->hw_mode_index = cpu_to_le32(mode); 4093 4094 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_PDEV_SET_HW_MODE_CMDID); 4095 if (ret) { 4096 ath12k_warn(ab, "failed to send WMI_PDEV_SET_HW_MODE_CMDID\n"); 4097 dev_kfree_skb(skb); 4098 } 4099 4100 return ret; 4101 } 4102 4103 int ath12k_wmi_cmd_init(struct ath12k_base *ab) 4104 { 4105 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 4106 struct ath12k_wmi_init_cmd_arg arg = {}; 4107 4108 if (test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 4109 ab->wmi_ab.svc_map)) 4110 arg.res_cfg.is_reg_cc_ext_event_supported = true; 4111 4112 ab->hw_params->wmi_init(ab, &arg.res_cfg); 4113 ab->wow.wmi_conf_rx_decap_mode = arg.res_cfg.rx_decap_mode; 4114 4115 arg.num_mem_chunks = wmi_ab->num_mem_chunks; 4116 arg.hw_mode_id = wmi_ab->preferred_hw_mode; 4117 arg.mem_chunks = wmi_ab->mem_chunks; 4118 4119 if (ab->hw_params->single_pdev_only) 4120 arg.hw_mode_id = WMI_HOST_HW_MODE_MAX; 4121 4122 arg.num_band_to_mac = ab->num_radios; 4123 ath12k_fill_band_to_mac_param(ab, arg.band_to_mac); 4124 4125 ab->dp.peer_metadata_ver = arg.res_cfg.peer_metadata_ver; 4126 4127 return ath12k_init_cmd_send(&wmi_ab->wmi[0], &arg); 4128 } 4129 4130 int ath12k_wmi_vdev_spectral_conf(struct ath12k *ar, 4131 struct ath12k_wmi_vdev_spectral_conf_arg *arg) 4132 { 4133 struct ath12k_wmi_vdev_spectral_conf_cmd *cmd; 4134 struct sk_buff *skb; 4135 int ret; 4136 4137 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4138 if (!skb) 4139 return -ENOMEM; 4140 4141 cmd = (struct ath12k_wmi_vdev_spectral_conf_cmd *)skb->data; 4142 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_CONFIGURE_CMD, 4143 sizeof(*cmd)); 4144 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 4145 cmd->scan_count = cpu_to_le32(arg->scan_count); 4146 cmd->scan_period = cpu_to_le32(arg->scan_period); 4147 cmd->scan_priority = cpu_to_le32(arg->scan_priority); 4148 cmd->scan_fft_size = cpu_to_le32(arg->scan_fft_size); 4149 cmd->scan_gc_ena = cpu_to_le32(arg->scan_gc_ena); 4150 cmd->scan_restart_ena = cpu_to_le32(arg->scan_restart_ena); 4151 cmd->scan_noise_floor_ref = cpu_to_le32(arg->scan_noise_floor_ref); 4152 cmd->scan_init_delay = cpu_to_le32(arg->scan_init_delay); 4153 cmd->scan_nb_tone_thr = cpu_to_le32(arg->scan_nb_tone_thr); 4154 cmd->scan_str_bin_thr = cpu_to_le32(arg->scan_str_bin_thr); 4155 cmd->scan_wb_rpt_mode = cpu_to_le32(arg->scan_wb_rpt_mode); 4156 cmd->scan_rssi_rpt_mode = cpu_to_le32(arg->scan_rssi_rpt_mode); 4157 cmd->scan_rssi_thr = cpu_to_le32(arg->scan_rssi_thr); 4158 cmd->scan_pwr_format = cpu_to_le32(arg->scan_pwr_format); 4159 cmd->scan_rpt_mode = cpu_to_le32(arg->scan_rpt_mode); 4160 cmd->scan_bin_scale = cpu_to_le32(arg->scan_bin_scale); 4161 cmd->scan_dbm_adj = cpu_to_le32(arg->scan_dbm_adj); 4162 cmd->scan_chn_mask = cpu_to_le32(arg->scan_chn_mask); 4163 4164 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4165 "WMI spectral scan config cmd vdev_id 0x%x\n", 4166 arg->vdev_id); 4167 4168 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4169 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID); 4170 if (ret) { 4171 ath12k_warn(ar->ab, 4172 "failed to send spectral scan config wmi cmd\n"); 4173 goto err; 4174 } 4175 4176 return 0; 4177 err: 4178 dev_kfree_skb(skb); 4179 return ret; 4180 } 4181 4182 int ath12k_wmi_vdev_spectral_enable(struct ath12k *ar, u32 vdev_id, 4183 u32 trigger, u32 enable) 4184 { 4185 struct ath12k_wmi_vdev_spectral_enable_cmd *cmd; 4186 struct sk_buff *skb; 4187 int ret; 4188 4189 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4190 if (!skb) 4191 return -ENOMEM; 4192 4193 cmd = (struct ath12k_wmi_vdev_spectral_enable_cmd *)skb->data; 4194 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SPECTRAL_ENABLE_CMD, 4195 sizeof(*cmd)); 4196 4197 cmd->vdev_id = cpu_to_le32(vdev_id); 4198 cmd->trigger_cmd = cpu_to_le32(trigger); 4199 cmd->enable_cmd = cpu_to_le32(enable); 4200 4201 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4202 "WMI spectral enable cmd vdev id 0x%x\n", 4203 vdev_id); 4204 4205 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4206 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID); 4207 if (ret) { 4208 ath12k_warn(ar->ab, 4209 "failed to send spectral enable wmi cmd\n"); 4210 goto err; 4211 } 4212 4213 return 0; 4214 err: 4215 dev_kfree_skb(skb); 4216 return ret; 4217 } 4218 4219 int ath12k_wmi_pdev_dma_ring_cfg(struct ath12k *ar, 4220 struct ath12k_wmi_pdev_dma_ring_cfg_arg *arg) 4221 { 4222 struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *cmd; 4223 struct sk_buff *skb; 4224 int ret; 4225 4226 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, sizeof(*cmd)); 4227 if (!skb) 4228 return -ENOMEM; 4229 4230 cmd = (struct ath12k_wmi_pdev_dma_ring_cfg_req_cmd *)skb->data; 4231 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_DMA_RING_CFG_REQ, 4232 sizeof(*cmd)); 4233 4234 cmd->pdev_id = cpu_to_le32(arg->pdev_id); 4235 cmd->module_id = cpu_to_le32(arg->module_id); 4236 cmd->base_paddr_lo = cpu_to_le32(arg->base_paddr_lo); 4237 cmd->base_paddr_hi = cpu_to_le32(arg->base_paddr_hi); 4238 cmd->head_idx_paddr_lo = cpu_to_le32(arg->head_idx_paddr_lo); 4239 cmd->head_idx_paddr_hi = cpu_to_le32(arg->head_idx_paddr_hi); 4240 cmd->tail_idx_paddr_lo = cpu_to_le32(arg->tail_idx_paddr_lo); 4241 cmd->tail_idx_paddr_hi = cpu_to_le32(arg->tail_idx_paddr_hi); 4242 cmd->num_elems = cpu_to_le32(arg->num_elems); 4243 cmd->buf_size = cpu_to_le32(arg->buf_size); 4244 cmd->num_resp_per_event = cpu_to_le32(arg->num_resp_per_event); 4245 cmd->event_timeout_ms = cpu_to_le32(arg->event_timeout_ms); 4246 4247 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 4248 "WMI DMA ring cfg req cmd pdev_id 0x%x\n", 4249 arg->pdev_id); 4250 4251 ret = ath12k_wmi_cmd_send(ar->wmi, skb, 4252 WMI_PDEV_DMA_RING_CFG_REQ_CMDID); 4253 if (ret) { 4254 ath12k_warn(ar->ab, 4255 "failed to send dma ring cfg req wmi cmd\n"); 4256 goto err; 4257 } 4258 4259 return 0; 4260 err: 4261 dev_kfree_skb(skb); 4262 return ret; 4263 } 4264 4265 static int ath12k_wmi_dma_buf_entry_parse(struct ath12k_base *soc, 4266 u16 tag, u16 len, 4267 const void *ptr, void *data) 4268 { 4269 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4270 4271 if (tag != WMI_TAG_DMA_BUF_RELEASE_ENTRY) 4272 return -EPROTO; 4273 4274 if (arg->num_buf_entry >= le32_to_cpu(arg->fixed.num_buf_release_entry)) 4275 return -ENOBUFS; 4276 4277 arg->num_buf_entry++; 4278 return 0; 4279 } 4280 4281 static int ath12k_wmi_dma_buf_meta_parse(struct ath12k_base *soc, 4282 u16 tag, u16 len, 4283 const void *ptr, void *data) 4284 { 4285 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4286 4287 if (tag != WMI_TAG_DMA_BUF_RELEASE_SPECTRAL_META_DATA) 4288 return -EPROTO; 4289 4290 if (arg->num_meta >= le32_to_cpu(arg->fixed.num_meta_data_entry)) 4291 return -ENOBUFS; 4292 4293 arg->num_meta++; 4294 4295 return 0; 4296 } 4297 4298 static int ath12k_wmi_dma_buf_parse(struct ath12k_base *ab, 4299 u16 tag, u16 len, 4300 const void *ptr, void *data) 4301 { 4302 struct ath12k_wmi_dma_buf_release_arg *arg = data; 4303 const struct ath12k_wmi_dma_buf_release_fixed_params *fixed; 4304 u32 pdev_id; 4305 int ret; 4306 4307 switch (tag) { 4308 case WMI_TAG_DMA_BUF_RELEASE: 4309 fixed = ptr; 4310 arg->fixed = *fixed; 4311 pdev_id = DP_HW2SW_MACID(le32_to_cpu(fixed->pdev_id)); 4312 arg->fixed.pdev_id = cpu_to_le32(pdev_id); 4313 break; 4314 case WMI_TAG_ARRAY_STRUCT: 4315 if (!arg->buf_entry_done) { 4316 arg->num_buf_entry = 0; 4317 arg->buf_entry = ptr; 4318 4319 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4320 ath12k_wmi_dma_buf_entry_parse, 4321 arg); 4322 if (ret) { 4323 ath12k_warn(ab, "failed to parse dma buf entry tlv %d\n", 4324 ret); 4325 return ret; 4326 } 4327 4328 arg->buf_entry_done = true; 4329 } else if (!arg->meta_data_done) { 4330 arg->num_meta = 0; 4331 arg->meta_data = ptr; 4332 4333 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4334 ath12k_wmi_dma_buf_meta_parse, 4335 arg); 4336 if (ret) { 4337 ath12k_warn(ab, "failed to parse dma buf meta tlv %d\n", 4338 ret); 4339 return ret; 4340 } 4341 4342 arg->meta_data_done = true; 4343 } 4344 break; 4345 default: 4346 break; 4347 } 4348 return 0; 4349 } 4350 4351 static void ath12k_wmi_pdev_dma_ring_buf_release_event(struct ath12k_base *ab, 4352 struct sk_buff *skb) 4353 { 4354 struct ath12k_wmi_dma_buf_release_arg arg = {}; 4355 struct ath12k_dbring_buf_release_event param; 4356 int ret; 4357 4358 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4359 ath12k_wmi_dma_buf_parse, 4360 &arg); 4361 if (ret) { 4362 ath12k_warn(ab, "failed to parse dma buf release tlv %d\n", ret); 4363 return; 4364 } 4365 4366 param.fixed = arg.fixed; 4367 param.buf_entry = arg.buf_entry; 4368 param.num_buf_entry = arg.num_buf_entry; 4369 param.meta_data = arg.meta_data; 4370 param.num_meta = arg.num_meta; 4371 4372 ret = ath12k_dbring_buffer_release_event(ab, ¶m); 4373 if (ret) { 4374 ath12k_warn(ab, "failed to handle dma buf release event %d\n", ret); 4375 return; 4376 } 4377 } 4378 4379 static int ath12k_wmi_hw_mode_caps_parse(struct ath12k_base *soc, 4380 u16 tag, u16 len, 4381 const void *ptr, void *data) 4382 { 4383 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4384 struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 4385 u32 phy_map = 0; 4386 4387 if (tag != WMI_TAG_HW_MODE_CAPABILITIES) 4388 return -EPROTO; 4389 4390 if (svc_rdy_ext->n_hw_mode_caps >= svc_rdy_ext->arg.num_hw_modes) 4391 return -ENOBUFS; 4392 4393 hw_mode_cap = container_of(ptr, struct ath12k_wmi_hw_mode_cap_params, 4394 hw_mode_id); 4395 svc_rdy_ext->n_hw_mode_caps++; 4396 4397 phy_map = le32_to_cpu(hw_mode_cap->phy_id_map); 4398 svc_rdy_ext->tot_phy_id += fls(phy_map); 4399 4400 return 0; 4401 } 4402 4403 static int ath12k_wmi_hw_mode_caps(struct ath12k_base *soc, 4404 u16 len, const void *ptr, void *data) 4405 { 4406 struct ath12k_svc_ext_info *svc_ext_info = &soc->wmi_ab.svc_ext_info; 4407 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4408 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_caps; 4409 enum wmi_host_hw_mode_config_type mode, pref; 4410 u32 i; 4411 int ret; 4412 4413 svc_rdy_ext->n_hw_mode_caps = 0; 4414 svc_rdy_ext->hw_mode_caps = ptr; 4415 4416 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4417 ath12k_wmi_hw_mode_caps_parse, 4418 svc_rdy_ext); 4419 if (ret) { 4420 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4421 return ret; 4422 } 4423 4424 for (i = 0 ; i < svc_rdy_ext->n_hw_mode_caps; i++) { 4425 hw_mode_caps = &svc_rdy_ext->hw_mode_caps[i]; 4426 mode = le32_to_cpu(hw_mode_caps->hw_mode_id); 4427 4428 if (mode >= WMI_HOST_HW_MODE_MAX) 4429 continue; 4430 4431 pref = soc->wmi_ab.preferred_hw_mode; 4432 4433 if (ath12k_hw_mode_pri_map[mode] < ath12k_hw_mode_pri_map[pref]) { 4434 svc_rdy_ext->pref_hw_mode_caps = *hw_mode_caps; 4435 soc->wmi_ab.preferred_hw_mode = mode; 4436 } 4437 } 4438 4439 svc_ext_info->num_hw_modes = svc_rdy_ext->n_hw_mode_caps; 4440 4441 ath12k_dbg(soc, ATH12K_DBG_WMI, "num hw modes %u preferred_hw_mode %d\n", 4442 svc_ext_info->num_hw_modes, soc->wmi_ab.preferred_hw_mode); 4443 4444 if (soc->wmi_ab.preferred_hw_mode == WMI_HOST_HW_MODE_MAX) 4445 return -EINVAL; 4446 4447 return 0; 4448 } 4449 4450 static int ath12k_wmi_mac_phy_caps_parse(struct ath12k_base *soc, 4451 u16 tag, u16 len, 4452 const void *ptr, void *data) 4453 { 4454 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4455 4456 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES) 4457 return -EPROTO; 4458 4459 if (svc_rdy_ext->n_mac_phy_caps >= svc_rdy_ext->tot_phy_id) 4460 return -ENOBUFS; 4461 4462 len = min_t(u16, len, sizeof(struct ath12k_wmi_mac_phy_caps_params)); 4463 if (!svc_rdy_ext->n_mac_phy_caps) { 4464 svc_rdy_ext->mac_phy_caps = kzalloc((svc_rdy_ext->tot_phy_id) * len, 4465 GFP_ATOMIC); 4466 if (!svc_rdy_ext->mac_phy_caps) 4467 return -ENOMEM; 4468 } 4469 4470 memcpy(svc_rdy_ext->mac_phy_caps + svc_rdy_ext->n_mac_phy_caps, ptr, len); 4471 svc_rdy_ext->n_mac_phy_caps++; 4472 return 0; 4473 } 4474 4475 static int ath12k_wmi_ext_hal_reg_caps_parse(struct ath12k_base *soc, 4476 u16 tag, u16 len, 4477 const void *ptr, void *data) 4478 { 4479 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4480 4481 if (tag != WMI_TAG_HAL_REG_CAPABILITIES_EXT) 4482 return -EPROTO; 4483 4484 if (svc_rdy_ext->n_ext_hal_reg_caps >= svc_rdy_ext->arg.num_phy) 4485 return -ENOBUFS; 4486 4487 svc_rdy_ext->n_ext_hal_reg_caps++; 4488 return 0; 4489 } 4490 4491 static int ath12k_wmi_ext_hal_reg_caps(struct ath12k_base *soc, 4492 u16 len, const void *ptr, void *data) 4493 { 4494 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4495 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4496 struct ath12k_wmi_hal_reg_capabilities_ext_arg reg_cap; 4497 int ret; 4498 u32 i; 4499 4500 svc_rdy_ext->n_ext_hal_reg_caps = 0; 4501 svc_rdy_ext->ext_hal_reg_caps = ptr; 4502 ret = ath12k_wmi_tlv_iter(soc, ptr, len, 4503 ath12k_wmi_ext_hal_reg_caps_parse, 4504 svc_rdy_ext); 4505 if (ret) { 4506 ath12k_warn(soc, "failed to parse tlv %d\n", ret); 4507 return ret; 4508 } 4509 4510 for (i = 0; i < svc_rdy_ext->arg.num_phy; i++) { 4511 ret = ath12k_pull_reg_cap_svc_rdy_ext(wmi_handle, 4512 svc_rdy_ext->soc_hal_reg_caps, 4513 svc_rdy_ext->ext_hal_reg_caps, i, 4514 ®_cap); 4515 if (ret) { 4516 ath12k_warn(soc, "failed to extract reg cap %d\n", i); 4517 return ret; 4518 } 4519 4520 if (reg_cap.phy_id >= MAX_RADIOS) { 4521 ath12k_warn(soc, "unexpected phy id %u\n", reg_cap.phy_id); 4522 return -EINVAL; 4523 } 4524 4525 soc->hal_reg_cap[reg_cap.phy_id] = reg_cap; 4526 } 4527 return 0; 4528 } 4529 4530 static int ath12k_wmi_ext_soc_hal_reg_caps_parse(struct ath12k_base *soc, 4531 u16 len, const void *ptr, 4532 void *data) 4533 { 4534 struct ath12k_wmi_pdev *wmi_handle = &soc->wmi_ab.wmi[0]; 4535 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4536 u8 hw_mode_id = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.hw_mode_id); 4537 u32 phy_id_map; 4538 int pdev_index = 0; 4539 int ret; 4540 4541 svc_rdy_ext->soc_hal_reg_caps = ptr; 4542 svc_rdy_ext->arg.num_phy = le32_to_cpu(svc_rdy_ext->soc_hal_reg_caps->num_phy); 4543 4544 soc->num_radios = 0; 4545 phy_id_map = le32_to_cpu(svc_rdy_ext->pref_hw_mode_caps.phy_id_map); 4546 soc->fw_pdev_count = 0; 4547 4548 while (phy_id_map && soc->num_radios < MAX_RADIOS) { 4549 ret = ath12k_pull_mac_phy_cap_svc_ready_ext(wmi_handle, 4550 svc_rdy_ext, 4551 hw_mode_id, soc->num_radios, 4552 &soc->pdevs[pdev_index]); 4553 if (ret) { 4554 ath12k_warn(soc, "failed to extract mac caps, idx :%d\n", 4555 soc->num_radios); 4556 return ret; 4557 } 4558 4559 soc->num_radios++; 4560 4561 /* For single_pdev_only targets, 4562 * save mac_phy capability in the same pdev 4563 */ 4564 if (soc->hw_params->single_pdev_only) 4565 pdev_index = 0; 4566 else 4567 pdev_index = soc->num_radios; 4568 4569 /* TODO: mac_phy_cap prints */ 4570 phy_id_map >>= 1; 4571 } 4572 4573 if (soc->hw_params->single_pdev_only) { 4574 soc->num_radios = 1; 4575 soc->pdevs[0].pdev_id = 0; 4576 } 4577 4578 return 0; 4579 } 4580 4581 static int ath12k_wmi_dma_ring_caps_parse(struct ath12k_base *soc, 4582 u16 tag, u16 len, 4583 const void *ptr, void *data) 4584 { 4585 struct ath12k_wmi_dma_ring_caps_parse *parse = data; 4586 4587 if (tag != WMI_TAG_DMA_RING_CAPABILITIES) 4588 return -EPROTO; 4589 4590 parse->n_dma_ring_caps++; 4591 return 0; 4592 } 4593 4594 static int ath12k_wmi_alloc_dbring_caps(struct ath12k_base *ab, 4595 u32 num_cap) 4596 { 4597 size_t sz; 4598 void *ptr; 4599 4600 sz = num_cap * sizeof(struct ath12k_dbring_cap); 4601 ptr = kzalloc(sz, GFP_ATOMIC); 4602 if (!ptr) 4603 return -ENOMEM; 4604 4605 ab->db_caps = ptr; 4606 ab->num_db_cap = num_cap; 4607 4608 return 0; 4609 } 4610 4611 static void ath12k_wmi_free_dbring_caps(struct ath12k_base *ab) 4612 { 4613 kfree(ab->db_caps); 4614 ab->db_caps = NULL; 4615 ab->num_db_cap = 0; 4616 } 4617 4618 static int ath12k_wmi_dma_ring_caps(struct ath12k_base *ab, 4619 u16 len, const void *ptr, void *data) 4620 { 4621 struct ath12k_wmi_dma_ring_caps_parse *dma_caps_parse = data; 4622 struct ath12k_wmi_dma_ring_caps_params *dma_caps; 4623 struct ath12k_dbring_cap *dir_buff_caps; 4624 int ret; 4625 u32 i; 4626 4627 dma_caps_parse->n_dma_ring_caps = 0; 4628 dma_caps = (struct ath12k_wmi_dma_ring_caps_params *)ptr; 4629 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4630 ath12k_wmi_dma_ring_caps_parse, 4631 dma_caps_parse); 4632 if (ret) { 4633 ath12k_warn(ab, "failed to parse dma ring caps tlv %d\n", ret); 4634 return ret; 4635 } 4636 4637 if (!dma_caps_parse->n_dma_ring_caps) 4638 return 0; 4639 4640 if (ab->num_db_cap) { 4641 ath12k_warn(ab, "Already processed, so ignoring dma ring caps\n"); 4642 return 0; 4643 } 4644 4645 ret = ath12k_wmi_alloc_dbring_caps(ab, dma_caps_parse->n_dma_ring_caps); 4646 if (ret) 4647 return ret; 4648 4649 dir_buff_caps = ab->db_caps; 4650 for (i = 0; i < dma_caps_parse->n_dma_ring_caps; i++) { 4651 if (le32_to_cpu(dma_caps[i].module_id) >= WMI_DIRECT_BUF_MAX) { 4652 ath12k_warn(ab, "Invalid module id %d\n", 4653 le32_to_cpu(dma_caps[i].module_id)); 4654 ret = -EINVAL; 4655 goto free_dir_buff; 4656 } 4657 4658 dir_buff_caps[i].id = le32_to_cpu(dma_caps[i].module_id); 4659 dir_buff_caps[i].pdev_id = 4660 DP_HW2SW_MACID(le32_to_cpu(dma_caps[i].pdev_id)); 4661 dir_buff_caps[i].min_elem = le32_to_cpu(dma_caps[i].min_elem); 4662 dir_buff_caps[i].min_buf_sz = le32_to_cpu(dma_caps[i].min_buf_sz); 4663 dir_buff_caps[i].min_buf_align = le32_to_cpu(dma_caps[i].min_buf_align); 4664 } 4665 4666 return 0; 4667 4668 free_dir_buff: 4669 ath12k_wmi_free_dbring_caps(ab); 4670 return ret; 4671 } 4672 4673 static void 4674 ath12k_wmi_save_mac_phy_info(struct ath12k_base *ab, 4675 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap, 4676 struct ath12k_svc_ext_mac_phy_info *mac_phy_info) 4677 { 4678 mac_phy_info->phy_id = __le32_to_cpu(mac_phy_cap->phy_id); 4679 mac_phy_info->supported_bands = __le32_to_cpu(mac_phy_cap->supported_bands); 4680 mac_phy_info->hw_freq_range.low_2ghz_freq = 4681 __le32_to_cpu(mac_phy_cap->low_2ghz_chan_freq); 4682 mac_phy_info->hw_freq_range.high_2ghz_freq = 4683 __le32_to_cpu(mac_phy_cap->high_2ghz_chan_freq); 4684 mac_phy_info->hw_freq_range.low_5ghz_freq = 4685 __le32_to_cpu(mac_phy_cap->low_5ghz_chan_freq); 4686 mac_phy_info->hw_freq_range.high_5ghz_freq = 4687 __le32_to_cpu(mac_phy_cap->high_5ghz_chan_freq); 4688 } 4689 4690 static void 4691 ath12k_wmi_save_all_mac_phy_info(struct ath12k_base *ab, 4692 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext) 4693 { 4694 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info; 4695 const struct ath12k_wmi_mac_phy_caps_params *mac_phy_cap; 4696 const struct ath12k_wmi_hw_mode_cap_params *hw_mode_cap; 4697 struct ath12k_svc_ext_mac_phy_info *mac_phy_info; 4698 u32 hw_mode_id, phy_bit_map; 4699 u8 hw_idx; 4700 4701 mac_phy_info = &svc_ext_info->mac_phy_info[0]; 4702 mac_phy_cap = svc_rdy_ext->mac_phy_caps; 4703 4704 for (hw_idx = 0; hw_idx < svc_ext_info->num_hw_modes; hw_idx++) { 4705 hw_mode_cap = &svc_rdy_ext->hw_mode_caps[hw_idx]; 4706 hw_mode_id = __le32_to_cpu(hw_mode_cap->hw_mode_id); 4707 phy_bit_map = __le32_to_cpu(hw_mode_cap->phy_id_map); 4708 4709 while (phy_bit_map) { 4710 ath12k_wmi_save_mac_phy_info(ab, mac_phy_cap, mac_phy_info); 4711 mac_phy_info->hw_mode_config_type = 4712 le32_get_bits(hw_mode_cap->hw_mode_config_type, 4713 WMI_HW_MODE_CAP_CFG_TYPE); 4714 ath12k_dbg(ab, ATH12K_DBG_WMI, 4715 "hw_idx %u hw_mode_id %u hw_mode_config_type %u supported_bands %u phy_id %u 2 GHz [%u - %u] 5 GHz [%u - %u]\n", 4716 hw_idx, hw_mode_id, 4717 mac_phy_info->hw_mode_config_type, 4718 mac_phy_info->supported_bands, mac_phy_info->phy_id, 4719 mac_phy_info->hw_freq_range.low_2ghz_freq, 4720 mac_phy_info->hw_freq_range.high_2ghz_freq, 4721 mac_phy_info->hw_freq_range.low_5ghz_freq, 4722 mac_phy_info->hw_freq_range.high_5ghz_freq); 4723 4724 mac_phy_cap++; 4725 mac_phy_info++; 4726 4727 phy_bit_map >>= 1; 4728 } 4729 } 4730 } 4731 4732 static int ath12k_wmi_svc_rdy_ext_parse(struct ath12k_base *ab, 4733 u16 tag, u16 len, 4734 const void *ptr, void *data) 4735 { 4736 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 4737 struct ath12k_wmi_svc_rdy_ext_parse *svc_rdy_ext = data; 4738 int ret; 4739 4740 switch (tag) { 4741 case WMI_TAG_SERVICE_READY_EXT_EVENT: 4742 ret = ath12k_pull_svc_ready_ext(wmi_handle, ptr, 4743 &svc_rdy_ext->arg); 4744 if (ret) { 4745 ath12k_warn(ab, "unable to extract ext params\n"); 4746 return ret; 4747 } 4748 break; 4749 4750 case WMI_TAG_SOC_MAC_PHY_HW_MODE_CAPS: 4751 svc_rdy_ext->hw_caps = ptr; 4752 svc_rdy_ext->arg.num_hw_modes = 4753 le32_to_cpu(svc_rdy_ext->hw_caps->num_hw_modes); 4754 break; 4755 4756 case WMI_TAG_SOC_HAL_REG_CAPABILITIES: 4757 ret = ath12k_wmi_ext_soc_hal_reg_caps_parse(ab, len, ptr, 4758 svc_rdy_ext); 4759 if (ret) 4760 return ret; 4761 break; 4762 4763 case WMI_TAG_ARRAY_STRUCT: 4764 if (!svc_rdy_ext->hw_mode_done) { 4765 ret = ath12k_wmi_hw_mode_caps(ab, len, ptr, svc_rdy_ext); 4766 if (ret) 4767 return ret; 4768 4769 svc_rdy_ext->hw_mode_done = true; 4770 } else if (!svc_rdy_ext->mac_phy_done) { 4771 svc_rdy_ext->n_mac_phy_caps = 0; 4772 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 4773 ath12k_wmi_mac_phy_caps_parse, 4774 svc_rdy_ext); 4775 if (ret) { 4776 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4777 return ret; 4778 } 4779 4780 ath12k_wmi_save_all_mac_phy_info(ab, svc_rdy_ext); 4781 4782 svc_rdy_ext->mac_phy_done = true; 4783 } else if (!svc_rdy_ext->ext_hal_reg_done) { 4784 ret = ath12k_wmi_ext_hal_reg_caps(ab, len, ptr, svc_rdy_ext); 4785 if (ret) 4786 return ret; 4787 4788 svc_rdy_ext->ext_hal_reg_done = true; 4789 } else if (!svc_rdy_ext->mac_phy_chainmask_combo_done) { 4790 svc_rdy_ext->mac_phy_chainmask_combo_done = true; 4791 } else if (!svc_rdy_ext->mac_phy_chainmask_cap_done) { 4792 svc_rdy_ext->mac_phy_chainmask_cap_done = true; 4793 } else if (!svc_rdy_ext->oem_dma_ring_cap_done) { 4794 svc_rdy_ext->oem_dma_ring_cap_done = true; 4795 } else if (!svc_rdy_ext->dma_ring_cap_done) { 4796 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 4797 &svc_rdy_ext->dma_caps_parse); 4798 if (ret) 4799 return ret; 4800 4801 svc_rdy_ext->dma_ring_cap_done = true; 4802 } 4803 break; 4804 4805 default: 4806 break; 4807 } 4808 return 0; 4809 } 4810 4811 static int ath12k_service_ready_ext_event(struct ath12k_base *ab, 4812 struct sk_buff *skb) 4813 { 4814 struct ath12k_wmi_svc_rdy_ext_parse svc_rdy_ext = { }; 4815 int ret; 4816 4817 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 4818 ath12k_wmi_svc_rdy_ext_parse, 4819 &svc_rdy_ext); 4820 if (ret) { 4821 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 4822 goto err; 4823 } 4824 4825 if (!test_bit(WMI_TLV_SERVICE_EXT2_MSG, ab->wmi_ab.svc_map)) 4826 complete(&ab->wmi_ab.service_ready); 4827 4828 kfree(svc_rdy_ext.mac_phy_caps); 4829 return 0; 4830 4831 err: 4832 kfree(svc_rdy_ext.mac_phy_caps); 4833 ath12k_wmi_free_dbring_caps(ab); 4834 return ret; 4835 } 4836 4837 static int ath12k_pull_svc_ready_ext2(struct ath12k_wmi_pdev *wmi_handle, 4838 const void *ptr, 4839 struct ath12k_wmi_svc_rdy_ext2_arg *arg) 4840 { 4841 const struct wmi_service_ready_ext2_event *ev = ptr; 4842 4843 if (!ev) 4844 return -EINVAL; 4845 4846 arg->reg_db_version = le32_to_cpu(ev->reg_db_version); 4847 arg->hw_min_max_tx_power_2ghz = le32_to_cpu(ev->hw_min_max_tx_power_2ghz); 4848 arg->hw_min_max_tx_power_5ghz = le32_to_cpu(ev->hw_min_max_tx_power_5ghz); 4849 arg->chwidth_num_peer_caps = le32_to_cpu(ev->chwidth_num_peer_caps); 4850 arg->preamble_puncture_bw = le32_to_cpu(ev->preamble_puncture_bw); 4851 arg->max_user_per_ppdu_ofdma = le32_to_cpu(ev->max_user_per_ppdu_ofdma); 4852 arg->max_user_per_ppdu_mumimo = le32_to_cpu(ev->max_user_per_ppdu_mumimo); 4853 arg->target_cap_flags = le32_to_cpu(ev->target_cap_flags); 4854 return 0; 4855 } 4856 4857 static void ath12k_wmi_eht_caps_parse(struct ath12k_pdev *pdev, u32 band, 4858 const __le32 cap_mac_info[], 4859 const __le32 cap_phy_info[], 4860 const __le32 supp_mcs[], 4861 const struct ath12k_wmi_ppe_threshold_params *ppet, 4862 __le32 cap_info_internal) 4863 { 4864 struct ath12k_band_cap *cap_band = &pdev->cap.band[band]; 4865 u32 support_320mhz; 4866 u8 i; 4867 4868 if (band == NL80211_BAND_6GHZ) 4869 support_320mhz = cap_band->eht_cap_phy_info[0] & 4870 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4871 4872 for (i = 0; i < WMI_MAX_EHTCAP_MAC_SIZE; i++) 4873 cap_band->eht_cap_mac_info[i] = le32_to_cpu(cap_mac_info[i]); 4874 4875 for (i = 0; i < WMI_MAX_EHTCAP_PHY_SIZE; i++) 4876 cap_band->eht_cap_phy_info[i] = le32_to_cpu(cap_phy_info[i]); 4877 4878 if (band == NL80211_BAND_6GHZ) 4879 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4880 4881 cap_band->eht_mcs_20_only = le32_to_cpu(supp_mcs[0]); 4882 cap_band->eht_mcs_80 = le32_to_cpu(supp_mcs[1]); 4883 if (band != NL80211_BAND_2GHZ) { 4884 cap_band->eht_mcs_160 = le32_to_cpu(supp_mcs[2]); 4885 cap_band->eht_mcs_320 = le32_to_cpu(supp_mcs[3]); 4886 } 4887 4888 cap_band->eht_ppet.numss_m1 = le32_to_cpu(ppet->numss_m1); 4889 cap_band->eht_ppet.ru_bit_mask = le32_to_cpu(ppet->ru_info); 4890 for (i = 0; i < WMI_MAX_NUM_SS; i++) 4891 cap_band->eht_ppet.ppet16_ppet8_ru3_ru0[i] = 4892 le32_to_cpu(ppet->ppet16_ppet8_ru3_ru0[i]); 4893 4894 cap_band->eht_cap_info_internal = le32_to_cpu(cap_info_internal); 4895 } 4896 4897 static int 4898 ath12k_wmi_tlv_mac_phy_caps_ext_parse(struct ath12k_base *ab, 4899 const struct ath12k_wmi_caps_ext_params *caps, 4900 struct ath12k_pdev *pdev) 4901 { 4902 struct ath12k_band_cap *cap_band; 4903 u32 bands, support_320mhz; 4904 int i; 4905 4906 if (ab->hw_params->single_pdev_only) { 4907 if (caps->hw_mode_id == WMI_HOST_HW_MODE_SINGLE) { 4908 support_320mhz = le32_to_cpu(caps->eht_cap_phy_info_5ghz[0]) & 4909 IEEE80211_EHT_PHY_CAP0_320MHZ_IN_6GHZ; 4910 cap_band = &pdev->cap.band[NL80211_BAND_6GHZ]; 4911 cap_band->eht_cap_phy_info[0] |= support_320mhz; 4912 return 0; 4913 } 4914 4915 for (i = 0; i < ab->fw_pdev_count; i++) { 4916 struct ath12k_fw_pdev *fw_pdev = &ab->fw_pdev[i]; 4917 4918 if (fw_pdev->pdev_id == ath12k_wmi_caps_ext_get_pdev_id(caps) && 4919 fw_pdev->phy_id == le32_to_cpu(caps->phy_id)) { 4920 bands = fw_pdev->supported_bands; 4921 break; 4922 } 4923 } 4924 4925 if (i == ab->fw_pdev_count) 4926 return -EINVAL; 4927 } else { 4928 bands = pdev->cap.supported_bands; 4929 } 4930 4931 if (bands & WMI_HOST_WLAN_2GHZ_CAP) { 4932 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_2GHZ, 4933 caps->eht_cap_mac_info_2ghz, 4934 caps->eht_cap_phy_info_2ghz, 4935 caps->eht_supp_mcs_ext_2ghz, 4936 &caps->eht_ppet_2ghz, 4937 caps->eht_cap_info_internal); 4938 } 4939 4940 if (bands & WMI_HOST_WLAN_5GHZ_CAP) { 4941 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_5GHZ, 4942 caps->eht_cap_mac_info_5ghz, 4943 caps->eht_cap_phy_info_5ghz, 4944 caps->eht_supp_mcs_ext_5ghz, 4945 &caps->eht_ppet_5ghz, 4946 caps->eht_cap_info_internal); 4947 4948 ath12k_wmi_eht_caps_parse(pdev, NL80211_BAND_6GHZ, 4949 caps->eht_cap_mac_info_5ghz, 4950 caps->eht_cap_phy_info_5ghz, 4951 caps->eht_supp_mcs_ext_5ghz, 4952 &caps->eht_ppet_5ghz, 4953 caps->eht_cap_info_internal); 4954 } 4955 4956 pdev->cap.eml_cap = le32_to_cpu(caps->eml_capability); 4957 pdev->cap.mld_cap = le32_to_cpu(caps->mld_capability); 4958 4959 return 0; 4960 } 4961 4962 static int ath12k_wmi_tlv_mac_phy_caps_ext(struct ath12k_base *ab, u16 tag, 4963 u16 len, const void *ptr, 4964 void *data) 4965 { 4966 const struct ath12k_wmi_caps_ext_params *caps = ptr; 4967 int i = 0, ret; 4968 4969 if (tag != WMI_TAG_MAC_PHY_CAPABILITIES_EXT) 4970 return -EPROTO; 4971 4972 if (ab->hw_params->single_pdev_only) { 4973 if (ab->wmi_ab.preferred_hw_mode != le32_to_cpu(caps->hw_mode_id) && 4974 caps->hw_mode_id != WMI_HOST_HW_MODE_SINGLE) 4975 return 0; 4976 } else { 4977 for (i = 0; i < ab->num_radios; i++) { 4978 if (ab->pdevs[i].pdev_id == 4979 ath12k_wmi_caps_ext_get_pdev_id(caps)) 4980 break; 4981 } 4982 4983 if (i == ab->num_radios) 4984 return -EINVAL; 4985 } 4986 4987 ret = ath12k_wmi_tlv_mac_phy_caps_ext_parse(ab, caps, &ab->pdevs[i]); 4988 if (ret) { 4989 ath12k_warn(ab, 4990 "failed to parse extended MAC PHY capabilities for pdev %d: %d\n", 4991 ret, ab->pdevs[i].pdev_id); 4992 return ret; 4993 } 4994 4995 return 0; 4996 } 4997 4998 static void 4999 ath12k_wmi_update_freq_info(struct ath12k_base *ab, 5000 struct ath12k_svc_ext_mac_phy_info *mac_cap, 5001 enum ath12k_hw_mode mode, 5002 u32 phy_id) 5003 { 5004 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5005 struct ath12k_hw_mode_freq_range_arg *mac_range; 5006 5007 mac_range = &hw_mode_info->freq_range_caps[mode][phy_id]; 5008 5009 if (mac_cap->supported_bands & WMI_HOST_WLAN_2GHZ_CAP) { 5010 mac_range->low_2ghz_freq = max_t(u32, 5011 mac_cap->hw_freq_range.low_2ghz_freq, 5012 ATH12K_MIN_2GHZ_FREQ); 5013 mac_range->high_2ghz_freq = mac_cap->hw_freq_range.high_2ghz_freq ? 5014 min_t(u32, 5015 mac_cap->hw_freq_range.high_2ghz_freq, 5016 ATH12K_MAX_2GHZ_FREQ) : 5017 ATH12K_MAX_2GHZ_FREQ; 5018 } 5019 5020 if (mac_cap->supported_bands & WMI_HOST_WLAN_5GHZ_CAP) { 5021 mac_range->low_5ghz_freq = max_t(u32, 5022 mac_cap->hw_freq_range.low_5ghz_freq, 5023 ATH12K_MIN_5GHZ_FREQ); 5024 mac_range->high_5ghz_freq = mac_cap->hw_freq_range.high_5ghz_freq ? 5025 min_t(u32, 5026 mac_cap->hw_freq_range.high_5ghz_freq, 5027 ATH12K_MAX_6GHZ_FREQ) : 5028 ATH12K_MAX_6GHZ_FREQ; 5029 } 5030 } 5031 5032 static bool 5033 ath12k_wmi_all_phy_range_updated(struct ath12k_base *ab, 5034 enum ath12k_hw_mode hwmode) 5035 { 5036 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5037 struct ath12k_hw_mode_freq_range_arg *mac_range; 5038 u8 phy_id; 5039 5040 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5041 mac_range = &hw_mode_info->freq_range_caps[hwmode][phy_id]; 5042 /* modify SBS/DBS range only when both phy for DBS are filled */ 5043 if (!mac_range->low_2ghz_freq && !mac_range->low_5ghz_freq) 5044 return false; 5045 } 5046 5047 return true; 5048 } 5049 5050 static void ath12k_wmi_update_dbs_freq_info(struct ath12k_base *ab) 5051 { 5052 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5053 struct ath12k_hw_mode_freq_range_arg *mac_range; 5054 u8 phy_id; 5055 5056 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_DBS]; 5057 /* Reset 5 GHz range for shared mac for DBS */ 5058 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5059 if (mac_range[phy_id].low_2ghz_freq && 5060 mac_range[phy_id].low_5ghz_freq) { 5061 mac_range[phy_id].low_5ghz_freq = 0; 5062 mac_range[phy_id].high_5ghz_freq = 0; 5063 } 5064 } 5065 } 5066 5067 static u32 5068 ath12k_wmi_get_highest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range) 5069 { 5070 u32 highest_freq = 0; 5071 u8 phy_id; 5072 5073 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5074 if (range[phy_id].high_5ghz_freq > highest_freq) 5075 highest_freq = range[phy_id].high_5ghz_freq; 5076 } 5077 5078 return highest_freq ? highest_freq : ATH12K_MAX_6GHZ_FREQ; 5079 } 5080 5081 static u32 5082 ath12k_wmi_get_lowest_5ghz_freq_from_range(struct ath12k_hw_mode_freq_range_arg *range) 5083 { 5084 u32 lowest_freq = 0; 5085 u8 phy_id; 5086 5087 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5088 if ((!lowest_freq && range[phy_id].low_5ghz_freq) || 5089 range[phy_id].low_5ghz_freq < lowest_freq) 5090 lowest_freq = range[phy_id].low_5ghz_freq; 5091 } 5092 5093 return lowest_freq ? lowest_freq : ATH12K_MIN_5GHZ_FREQ; 5094 } 5095 5096 static void 5097 ath12k_wmi_fill_upper_share_sbs_freq(struct ath12k_base *ab, 5098 u16 sbs_range_sep, 5099 struct ath12k_hw_mode_freq_range_arg *ref_freq) 5100 { 5101 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5102 struct ath12k_hw_mode_freq_range_arg *upper_sbs_freq_range; 5103 u8 phy_id; 5104 5105 upper_sbs_freq_range = 5106 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_UPPER_SHARE]; 5107 5108 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5109 upper_sbs_freq_range[phy_id].low_2ghz_freq = 5110 ref_freq[phy_id].low_2ghz_freq; 5111 upper_sbs_freq_range[phy_id].high_2ghz_freq = 5112 ref_freq[phy_id].high_2ghz_freq; 5113 5114 /* update for shared mac */ 5115 if (upper_sbs_freq_range[phy_id].low_2ghz_freq) { 5116 upper_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10; 5117 upper_sbs_freq_range[phy_id].high_5ghz_freq = 5118 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq); 5119 } else { 5120 upper_sbs_freq_range[phy_id].low_5ghz_freq = 5121 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq); 5122 upper_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep; 5123 } 5124 } 5125 } 5126 5127 static void 5128 ath12k_wmi_fill_lower_share_sbs_freq(struct ath12k_base *ab, 5129 u16 sbs_range_sep, 5130 struct ath12k_hw_mode_freq_range_arg *ref_freq) 5131 { 5132 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5133 struct ath12k_hw_mode_freq_range_arg *lower_sbs_freq_range; 5134 u8 phy_id; 5135 5136 lower_sbs_freq_range = 5137 hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS_LOWER_SHARE]; 5138 5139 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5140 lower_sbs_freq_range[phy_id].low_2ghz_freq = 5141 ref_freq[phy_id].low_2ghz_freq; 5142 lower_sbs_freq_range[phy_id].high_2ghz_freq = 5143 ref_freq[phy_id].high_2ghz_freq; 5144 5145 /* update for shared mac */ 5146 if (lower_sbs_freq_range[phy_id].low_2ghz_freq) { 5147 lower_sbs_freq_range[phy_id].low_5ghz_freq = 5148 ath12k_wmi_get_lowest_5ghz_freq_from_range(ref_freq); 5149 lower_sbs_freq_range[phy_id].high_5ghz_freq = sbs_range_sep; 5150 } else { 5151 lower_sbs_freq_range[phy_id].low_5ghz_freq = sbs_range_sep + 10; 5152 lower_sbs_freq_range[phy_id].high_5ghz_freq = 5153 ath12k_wmi_get_highest_5ghz_freq_from_range(ref_freq); 5154 } 5155 } 5156 } 5157 5158 static const char *ath12k_wmi_hw_mode_to_str(enum ath12k_hw_mode hw_mode) 5159 { 5160 static const char * const mode_str[] = { 5161 [ATH12K_HW_MODE_SMM] = "SMM", 5162 [ATH12K_HW_MODE_DBS] = "DBS", 5163 [ATH12K_HW_MODE_SBS] = "SBS", 5164 [ATH12K_HW_MODE_SBS_UPPER_SHARE] = "SBS_UPPER_SHARE", 5165 [ATH12K_HW_MODE_SBS_LOWER_SHARE] = "SBS_LOWER_SHARE", 5166 }; 5167 5168 if (hw_mode >= ARRAY_SIZE(mode_str)) 5169 return "Unknown"; 5170 5171 return mode_str[hw_mode]; 5172 } 5173 5174 static void 5175 ath12k_wmi_dump_freq_range_per_mac(struct ath12k_base *ab, 5176 struct ath12k_hw_mode_freq_range_arg *freq_range, 5177 enum ath12k_hw_mode hw_mode) 5178 { 5179 u8 i; 5180 5181 for (i = 0; i < MAX_RADIOS; i++) 5182 if (freq_range[i].low_2ghz_freq || freq_range[i].low_5ghz_freq) 5183 ath12k_dbg(ab, ATH12K_DBG_WMI, 5184 "frequency range: %s(%d) mac %d 2 GHz [%d - %d] 5 GHz [%d - %d]", 5185 ath12k_wmi_hw_mode_to_str(hw_mode), 5186 hw_mode, i, 5187 freq_range[i].low_2ghz_freq, 5188 freq_range[i].high_2ghz_freq, 5189 freq_range[i].low_5ghz_freq, 5190 freq_range[i].high_5ghz_freq); 5191 } 5192 5193 static void ath12k_wmi_dump_freq_range(struct ath12k_base *ab) 5194 { 5195 struct ath12k_hw_mode_freq_range_arg *freq_range; 5196 u8 i; 5197 5198 for (i = ATH12K_HW_MODE_SMM; i < ATH12K_HW_MODE_MAX; i++) { 5199 freq_range = ab->wmi_ab.hw_mode_info.freq_range_caps[i]; 5200 ath12k_wmi_dump_freq_range_per_mac(ab, freq_range, i); 5201 } 5202 } 5203 5204 static int ath12k_wmi_modify_sbs_freq(struct ath12k_base *ab, u8 phy_id) 5205 { 5206 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5207 struct ath12k_hw_mode_freq_range_arg *sbs_mac_range, *shared_mac_range; 5208 struct ath12k_hw_mode_freq_range_arg *non_shared_range; 5209 u8 shared_phy_id; 5210 5211 sbs_mac_range = &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][phy_id]; 5212 5213 /* if SBS mac range has both 2.4 and 5 GHz ranges, i.e. shared phy_id 5214 * keep the range as it is in SBS 5215 */ 5216 if (sbs_mac_range->low_2ghz_freq && sbs_mac_range->low_5ghz_freq) 5217 return 0; 5218 5219 if (sbs_mac_range->low_2ghz_freq && !sbs_mac_range->low_5ghz_freq) { 5220 ath12k_err(ab, "Invalid DBS/SBS mode with only 2.4Ghz"); 5221 ath12k_wmi_dump_freq_range_per_mac(ab, sbs_mac_range, ATH12K_HW_MODE_SBS); 5222 return -EINVAL; 5223 } 5224 5225 non_shared_range = sbs_mac_range; 5226 /* if SBS mac range has only 5 GHz then it's the non-shared phy, so 5227 * modify the range as per the shared mac. 5228 */ 5229 shared_phy_id = phy_id ? 0 : 1; 5230 shared_mac_range = 5231 &hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS][shared_phy_id]; 5232 5233 if (shared_mac_range->low_5ghz_freq > non_shared_range->low_5ghz_freq) { 5234 ath12k_dbg(ab, ATH12K_DBG_WMI, "high 5 GHz shared"); 5235 /* If the shared mac lower 5 GHz frequency is greater than 5236 * non-shared mac lower 5 GHz frequency then the shared mac has 5237 * high 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz high 5238 * freq should be less than the shared mac's low 5 GHz freq. 5239 */ 5240 if (non_shared_range->high_5ghz_freq >= 5241 shared_mac_range->low_5ghz_freq) 5242 non_shared_range->high_5ghz_freq = 5243 max_t(u32, shared_mac_range->low_5ghz_freq - 10, 5244 non_shared_range->low_5ghz_freq); 5245 } else if (shared_mac_range->high_5ghz_freq < 5246 non_shared_range->high_5ghz_freq) { 5247 ath12k_dbg(ab, ATH12K_DBG_WMI, "low 5 GHz shared"); 5248 /* If the shared mac high 5 GHz frequency is less than 5249 * non-shared mac high 5 GHz frequency then the shared mac has 5250 * low 5 GHz shared with 2.4 GHz. So non-shared mac's 5 GHz low 5251 * freq should be greater than the shared mac's high 5 GHz freq. 5252 */ 5253 if (shared_mac_range->high_5ghz_freq >= 5254 non_shared_range->low_5ghz_freq) 5255 non_shared_range->low_5ghz_freq = 5256 min_t(u32, shared_mac_range->high_5ghz_freq + 10, 5257 non_shared_range->high_5ghz_freq); 5258 } else { 5259 ath12k_warn(ab, "invalid SBS range with all 5 GHz shared"); 5260 return -EINVAL; 5261 } 5262 5263 return 0; 5264 } 5265 5266 static void ath12k_wmi_update_sbs_freq_info(struct ath12k_base *ab) 5267 { 5268 struct ath12k_hw_mode_info *hw_mode_info = &ab->wmi_ab.hw_mode_info; 5269 struct ath12k_hw_mode_freq_range_arg *mac_range; 5270 u16 sbs_range_sep; 5271 u8 phy_id; 5272 int ret; 5273 5274 mac_range = hw_mode_info->freq_range_caps[ATH12K_HW_MODE_SBS]; 5275 5276 /* If sbs_lower_band_end_freq has a value, then the frequency range 5277 * will be split using that value. 5278 */ 5279 sbs_range_sep = ab->wmi_ab.sbs_lower_band_end_freq; 5280 if (sbs_range_sep) { 5281 ath12k_wmi_fill_upper_share_sbs_freq(ab, sbs_range_sep, 5282 mac_range); 5283 ath12k_wmi_fill_lower_share_sbs_freq(ab, sbs_range_sep, 5284 mac_range); 5285 /* Hardware specifies the range boundary with sbs_range_sep, 5286 * (i.e. the boundary between 5 GHz high and 5 GHz low), 5287 * reset the original one to make sure it will not get used. 5288 */ 5289 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS); 5290 return; 5291 } 5292 5293 /* If sbs_lower_band_end_freq is not set that means firmware will send one 5294 * shared mac range and one non-shared mac range. so update that freq. 5295 */ 5296 for (phy_id = 0; phy_id < MAX_RADIOS; phy_id++) { 5297 ret = ath12k_wmi_modify_sbs_freq(ab, phy_id); 5298 if (ret) { 5299 memset(mac_range, 0, sizeof(*mac_range) * MAX_RADIOS); 5300 break; 5301 } 5302 } 5303 } 5304 5305 static void 5306 ath12k_wmi_update_mac_freq_info(struct ath12k_base *ab, 5307 enum wmi_host_hw_mode_config_type hw_config_type, 5308 u32 phy_id, 5309 struct ath12k_svc_ext_mac_phy_info *mac_cap) 5310 { 5311 if (phy_id >= MAX_RADIOS) { 5312 ath12k_err(ab, "mac more than two not supported: %d", phy_id); 5313 return; 5314 } 5315 5316 ath12k_dbg(ab, ATH12K_DBG_WMI, 5317 "hw_mode_cfg %d mac %d band 0x%x SBS cutoff freq %d 2 GHz [%d - %d] 5 GHz [%d - %d]", 5318 hw_config_type, phy_id, mac_cap->supported_bands, 5319 ab->wmi_ab.sbs_lower_band_end_freq, 5320 mac_cap->hw_freq_range.low_2ghz_freq, 5321 mac_cap->hw_freq_range.high_2ghz_freq, 5322 mac_cap->hw_freq_range.low_5ghz_freq, 5323 mac_cap->hw_freq_range.high_5ghz_freq); 5324 5325 switch (hw_config_type) { 5326 case WMI_HOST_HW_MODE_SINGLE: 5327 if (phy_id) { 5328 ath12k_dbg(ab, ATH12K_DBG_WMI, "mac phy 1 is not supported"); 5329 break; 5330 } 5331 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SMM, phy_id); 5332 break; 5333 5334 case WMI_HOST_HW_MODE_DBS: 5335 if (!ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS)) 5336 ath12k_wmi_update_freq_info(ab, mac_cap, 5337 ATH12K_HW_MODE_DBS, phy_id); 5338 break; 5339 case WMI_HOST_HW_MODE_DBS_SBS: 5340 case WMI_HOST_HW_MODE_DBS_OR_SBS: 5341 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_DBS, phy_id); 5342 if (ab->wmi_ab.sbs_lower_band_end_freq || 5343 mac_cap->hw_freq_range.low_5ghz_freq || 5344 mac_cap->hw_freq_range.low_2ghz_freq) 5345 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, 5346 phy_id); 5347 5348 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_DBS)) 5349 ath12k_wmi_update_dbs_freq_info(ab); 5350 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS)) 5351 ath12k_wmi_update_sbs_freq_info(ab); 5352 break; 5353 case WMI_HOST_HW_MODE_SBS: 5354 case WMI_HOST_HW_MODE_SBS_PASSIVE: 5355 ath12k_wmi_update_freq_info(ab, mac_cap, ATH12K_HW_MODE_SBS, phy_id); 5356 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS)) 5357 ath12k_wmi_update_sbs_freq_info(ab); 5358 5359 break; 5360 default: 5361 break; 5362 } 5363 } 5364 5365 static bool ath12k_wmi_sbs_range_present(struct ath12k_base *ab) 5366 { 5367 if (ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS) || 5368 (ab->wmi_ab.sbs_lower_band_end_freq && 5369 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_LOWER_SHARE) && 5370 ath12k_wmi_all_phy_range_updated(ab, ATH12K_HW_MODE_SBS_UPPER_SHARE))) 5371 return true; 5372 5373 return false; 5374 } 5375 5376 static int ath12k_wmi_update_hw_mode_list(struct ath12k_base *ab) 5377 { 5378 struct ath12k_svc_ext_info *svc_ext_info = &ab->wmi_ab.svc_ext_info; 5379 struct ath12k_hw_mode_info *info = &ab->wmi_ab.hw_mode_info; 5380 enum wmi_host_hw_mode_config_type hw_config_type; 5381 struct ath12k_svc_ext_mac_phy_info *tmp; 5382 bool dbs_mode = false, sbs_mode = false; 5383 u32 i, j = 0; 5384 5385 if (!svc_ext_info->num_hw_modes) { 5386 ath12k_err(ab, "invalid number of hw modes"); 5387 return -EINVAL; 5388 } 5389 5390 ath12k_dbg(ab, ATH12K_DBG_WMI, "updated HW mode list: num modes %d", 5391 svc_ext_info->num_hw_modes); 5392 5393 memset(info->freq_range_caps, 0, sizeof(info->freq_range_caps)); 5394 5395 for (i = 0; i < svc_ext_info->num_hw_modes; i++) { 5396 if (j >= ATH12K_MAX_MAC_PHY_CAP) 5397 return -EINVAL; 5398 5399 /* Update for MAC0 */ 5400 tmp = &svc_ext_info->mac_phy_info[j++]; 5401 hw_config_type = tmp->hw_mode_config_type; 5402 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, tmp->phy_id, tmp); 5403 5404 /* SBS and DBS have dual MAC. Up to 2 MACs are considered. */ 5405 if (hw_config_type == WMI_HOST_HW_MODE_DBS || 5406 hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE || 5407 hw_config_type == WMI_HOST_HW_MODE_SBS || 5408 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) { 5409 if (j >= ATH12K_MAX_MAC_PHY_CAP) 5410 return -EINVAL; 5411 /* Update for MAC1 */ 5412 tmp = &svc_ext_info->mac_phy_info[j++]; 5413 ath12k_wmi_update_mac_freq_info(ab, hw_config_type, 5414 tmp->phy_id, tmp); 5415 5416 if (hw_config_type == WMI_HOST_HW_MODE_DBS || 5417 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS) 5418 dbs_mode = true; 5419 5420 if (ath12k_wmi_sbs_range_present(ab) && 5421 (hw_config_type == WMI_HOST_HW_MODE_SBS_PASSIVE || 5422 hw_config_type == WMI_HOST_HW_MODE_SBS || 5423 hw_config_type == WMI_HOST_HW_MODE_DBS_OR_SBS)) 5424 sbs_mode = true; 5425 } 5426 } 5427 5428 info->support_dbs = dbs_mode; 5429 info->support_sbs = sbs_mode; 5430 5431 ath12k_wmi_dump_freq_range(ab); 5432 5433 return 0; 5434 } 5435 5436 static int ath12k_wmi_svc_rdy_ext2_parse(struct ath12k_base *ab, 5437 u16 tag, u16 len, 5438 const void *ptr, void *data) 5439 { 5440 const struct ath12k_wmi_dbs_or_sbs_cap_params *dbs_or_sbs_caps; 5441 struct ath12k_wmi_pdev *wmi_handle = &ab->wmi_ab.wmi[0]; 5442 struct ath12k_wmi_svc_rdy_ext2_parse *parse = data; 5443 int ret; 5444 5445 switch (tag) { 5446 case WMI_TAG_SERVICE_READY_EXT2_EVENT: 5447 ret = ath12k_pull_svc_ready_ext2(wmi_handle, ptr, 5448 &parse->arg); 5449 if (ret) { 5450 ath12k_warn(ab, 5451 "failed to extract wmi service ready ext2 parameters: %d\n", 5452 ret); 5453 return ret; 5454 } 5455 break; 5456 5457 case WMI_TAG_ARRAY_STRUCT: 5458 if (!parse->dma_ring_cap_done) { 5459 ret = ath12k_wmi_dma_ring_caps(ab, len, ptr, 5460 &parse->dma_caps_parse); 5461 if (ret) 5462 return ret; 5463 5464 parse->dma_ring_cap_done = true; 5465 } else if (!parse->spectral_bin_scaling_done) { 5466 /* TODO: This is a place-holder as WMI tag for 5467 * spectral scaling is before 5468 * WMI_TAG_MAC_PHY_CAPABILITIES_EXT 5469 */ 5470 parse->spectral_bin_scaling_done = true; 5471 } else if (!parse->mac_phy_caps_ext_done) { 5472 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 5473 ath12k_wmi_tlv_mac_phy_caps_ext, 5474 parse); 5475 if (ret) { 5476 ath12k_warn(ab, "failed to parse extended MAC PHY capabilities WMI TLV: %d\n", 5477 ret); 5478 return ret; 5479 } 5480 5481 parse->mac_phy_caps_ext_done = true; 5482 } else if (!parse->hal_reg_caps_ext2_done) { 5483 parse->hal_reg_caps_ext2_done = true; 5484 } else if (!parse->scan_radio_caps_ext2_done) { 5485 parse->scan_radio_caps_ext2_done = true; 5486 } else if (!parse->twt_caps_done) { 5487 parse->twt_caps_done = true; 5488 } else if (!parse->htt_msdu_idx_to_qtype_map_done) { 5489 parse->htt_msdu_idx_to_qtype_map_done = true; 5490 } else if (!parse->dbs_or_sbs_cap_ext_done) { 5491 dbs_or_sbs_caps = ptr; 5492 ab->wmi_ab.sbs_lower_band_end_freq = 5493 __le32_to_cpu(dbs_or_sbs_caps->sbs_lower_band_end_freq); 5494 5495 ath12k_dbg(ab, ATH12K_DBG_WMI, "sbs_lower_band_end_freq %u\n", 5496 ab->wmi_ab.sbs_lower_band_end_freq); 5497 5498 ret = ath12k_wmi_update_hw_mode_list(ab); 5499 if (ret) { 5500 ath12k_warn(ab, "failed to update hw mode list: %d\n", 5501 ret); 5502 return ret; 5503 } 5504 5505 parse->dbs_or_sbs_cap_ext_done = true; 5506 } 5507 5508 break; 5509 default: 5510 break; 5511 } 5512 5513 return 0; 5514 } 5515 5516 static int ath12k_service_ready_ext2_event(struct ath12k_base *ab, 5517 struct sk_buff *skb) 5518 { 5519 struct ath12k_wmi_svc_rdy_ext2_parse svc_rdy_ext2 = { }; 5520 int ret; 5521 5522 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 5523 ath12k_wmi_svc_rdy_ext2_parse, 5524 &svc_rdy_ext2); 5525 if (ret) { 5526 ath12k_warn(ab, "failed to parse ext2 event tlv %d\n", ret); 5527 goto err; 5528 } 5529 5530 complete(&ab->wmi_ab.service_ready); 5531 5532 return 0; 5533 5534 err: 5535 ath12k_wmi_free_dbring_caps(ab); 5536 return ret; 5537 } 5538 5539 static int ath12k_pull_vdev_start_resp_tlv(struct ath12k_base *ab, struct sk_buff *skb, 5540 struct wmi_vdev_start_resp_event *vdev_rsp) 5541 { 5542 const void **tb; 5543 const struct wmi_vdev_start_resp_event *ev; 5544 int ret; 5545 5546 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5547 if (IS_ERR(tb)) { 5548 ret = PTR_ERR(tb); 5549 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5550 return ret; 5551 } 5552 5553 ev = tb[WMI_TAG_VDEV_START_RESPONSE_EVENT]; 5554 if (!ev) { 5555 ath12k_warn(ab, "failed to fetch vdev start resp ev"); 5556 kfree(tb); 5557 return -EPROTO; 5558 } 5559 5560 *vdev_rsp = *ev; 5561 5562 kfree(tb); 5563 return 0; 5564 } 5565 5566 static struct ath12k_reg_rule 5567 *create_ext_reg_rules_from_wmi(u32 num_reg_rules, 5568 struct ath12k_wmi_reg_rule_ext_params *wmi_reg_rule) 5569 { 5570 struct ath12k_reg_rule *reg_rule_ptr; 5571 u32 count; 5572 5573 reg_rule_ptr = kzalloc((num_reg_rules * sizeof(*reg_rule_ptr)), 5574 GFP_ATOMIC); 5575 5576 if (!reg_rule_ptr) 5577 return NULL; 5578 5579 for (count = 0; count < num_reg_rules; count++) { 5580 reg_rule_ptr[count].start_freq = 5581 le32_get_bits(wmi_reg_rule[count].freq_info, 5582 REG_RULE_START_FREQ); 5583 reg_rule_ptr[count].end_freq = 5584 le32_get_bits(wmi_reg_rule[count].freq_info, 5585 REG_RULE_END_FREQ); 5586 reg_rule_ptr[count].max_bw = 5587 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5588 REG_RULE_MAX_BW); 5589 reg_rule_ptr[count].reg_power = 5590 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5591 REG_RULE_REG_PWR); 5592 reg_rule_ptr[count].ant_gain = 5593 le32_get_bits(wmi_reg_rule[count].bw_pwr_info, 5594 REG_RULE_ANT_GAIN); 5595 reg_rule_ptr[count].flags = 5596 le32_get_bits(wmi_reg_rule[count].flag_info, 5597 REG_RULE_FLAGS); 5598 reg_rule_ptr[count].psd_flag = 5599 le32_get_bits(wmi_reg_rule[count].psd_power_info, 5600 REG_RULE_PSD_INFO); 5601 reg_rule_ptr[count].psd_eirp = 5602 le32_get_bits(wmi_reg_rule[count].psd_power_info, 5603 REG_RULE_PSD_EIRP); 5604 } 5605 5606 return reg_rule_ptr; 5607 } 5608 5609 static u8 ath12k_wmi_ignore_num_extra_rules(struct ath12k_wmi_reg_rule_ext_params *rule, 5610 u32 num_reg_rules) 5611 { 5612 u8 num_invalid_5ghz_rules = 0; 5613 u32 count, start_freq; 5614 5615 for (count = 0; count < num_reg_rules; count++) { 5616 start_freq = le32_get_bits(rule[count].freq_info, REG_RULE_START_FREQ); 5617 5618 if (start_freq >= ATH12K_MIN_6GHZ_FREQ) 5619 num_invalid_5ghz_rules++; 5620 } 5621 5622 return num_invalid_5ghz_rules; 5623 } 5624 5625 static int ath12k_pull_reg_chan_list_ext_update_ev(struct ath12k_base *ab, 5626 struct sk_buff *skb, 5627 struct ath12k_reg_info *reg_info) 5628 { 5629 const void **tb; 5630 const struct wmi_reg_chan_list_cc_ext_event *ev; 5631 struct ath12k_wmi_reg_rule_ext_params *ext_wmi_reg_rule; 5632 u32 num_2g_reg_rules, num_5g_reg_rules; 5633 u32 num_6g_reg_rules_ap[WMI_REG_CURRENT_MAX_AP_TYPE]; 5634 u32 num_6g_reg_rules_cl[WMI_REG_CURRENT_MAX_AP_TYPE][WMI_REG_MAX_CLIENT_TYPE]; 5635 u8 num_invalid_5ghz_ext_rules; 5636 u32 total_reg_rules = 0; 5637 int ret, i, j; 5638 5639 ath12k_dbg(ab, ATH12K_DBG_WMI, "processing regulatory ext channel list\n"); 5640 5641 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5642 if (IS_ERR(tb)) { 5643 ret = PTR_ERR(tb); 5644 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5645 return ret; 5646 } 5647 5648 ev = tb[WMI_TAG_REG_CHAN_LIST_CC_EXT_EVENT]; 5649 if (!ev) { 5650 ath12k_warn(ab, "failed to fetch reg chan list ext update ev\n"); 5651 kfree(tb); 5652 return -EPROTO; 5653 } 5654 5655 reg_info->num_2g_reg_rules = le32_to_cpu(ev->num_2g_reg_rules); 5656 reg_info->num_5g_reg_rules = le32_to_cpu(ev->num_5g_reg_rules); 5657 reg_info->num_6g_reg_rules_ap[WMI_REG_INDOOR_AP] = 5658 le32_to_cpu(ev->num_6g_reg_rules_ap_lpi); 5659 reg_info->num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP] = 5660 le32_to_cpu(ev->num_6g_reg_rules_ap_sp); 5661 reg_info->num_6g_reg_rules_ap[WMI_REG_VLP_AP] = 5662 le32_to_cpu(ev->num_6g_reg_rules_ap_vlp); 5663 5664 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5665 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 5666 le32_to_cpu(ev->num_6g_reg_rules_cl_lpi[i]); 5667 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 5668 le32_to_cpu(ev->num_6g_reg_rules_cl_sp[i]); 5669 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 5670 le32_to_cpu(ev->num_6g_reg_rules_cl_vlp[i]); 5671 } 5672 5673 num_2g_reg_rules = reg_info->num_2g_reg_rules; 5674 total_reg_rules += num_2g_reg_rules; 5675 num_5g_reg_rules = reg_info->num_5g_reg_rules; 5676 total_reg_rules += num_5g_reg_rules; 5677 5678 if (num_2g_reg_rules > MAX_REG_RULES || num_5g_reg_rules > MAX_REG_RULES) { 5679 ath12k_warn(ab, "Num reg rules for 2G/5G exceeds max limit (num_2g_reg_rules: %d num_5g_reg_rules: %d max_rules: %d)\n", 5680 num_2g_reg_rules, num_5g_reg_rules, MAX_REG_RULES); 5681 kfree(tb); 5682 return -EINVAL; 5683 } 5684 5685 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 5686 num_6g_reg_rules_ap[i] = reg_info->num_6g_reg_rules_ap[i]; 5687 5688 if (num_6g_reg_rules_ap[i] > MAX_6GHZ_REG_RULES) { 5689 ath12k_warn(ab, "Num 6G reg rules for AP mode(%d) exceeds max limit (num_6g_reg_rules_ap: %d, max_rules: %d)\n", 5690 i, num_6g_reg_rules_ap[i], MAX_6GHZ_REG_RULES); 5691 kfree(tb); 5692 return -EINVAL; 5693 } 5694 5695 total_reg_rules += num_6g_reg_rules_ap[i]; 5696 } 5697 5698 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5699 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] = 5700 reg_info->num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 5701 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i]; 5702 5703 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] = 5704 reg_info->num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 5705 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i]; 5706 5707 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] = 5708 reg_info->num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 5709 total_reg_rules += num_6g_reg_rules_cl[WMI_REG_VLP_AP][i]; 5710 5711 if (num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][i] > MAX_6GHZ_REG_RULES || 5712 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][i] > MAX_6GHZ_REG_RULES || 5713 num_6g_reg_rules_cl[WMI_REG_VLP_AP][i] > MAX_6GHZ_REG_RULES) { 5714 ath12k_warn(ab, "Num 6g client reg rules exceeds max limit, for client(type: %d)\n", 5715 i); 5716 kfree(tb); 5717 return -EINVAL; 5718 } 5719 } 5720 5721 if (!total_reg_rules) { 5722 ath12k_warn(ab, "No reg rules available\n"); 5723 kfree(tb); 5724 return -EINVAL; 5725 } 5726 5727 memcpy(reg_info->alpha2, &ev->alpha2, REG_ALPHA2_LEN); 5728 5729 reg_info->dfs_region = le32_to_cpu(ev->dfs_region); 5730 reg_info->phybitmap = le32_to_cpu(ev->phybitmap); 5731 reg_info->num_phy = le32_to_cpu(ev->num_phy); 5732 reg_info->phy_id = le32_to_cpu(ev->phy_id); 5733 reg_info->ctry_code = le32_to_cpu(ev->country_id); 5734 reg_info->reg_dmn_pair = le32_to_cpu(ev->domain_code); 5735 5736 switch (le32_to_cpu(ev->status_code)) { 5737 case WMI_REG_SET_CC_STATUS_PASS: 5738 reg_info->status_code = REG_SET_CC_STATUS_PASS; 5739 break; 5740 case WMI_REG_CURRENT_ALPHA2_NOT_FOUND: 5741 reg_info->status_code = REG_CURRENT_ALPHA2_NOT_FOUND; 5742 break; 5743 case WMI_REG_INIT_ALPHA2_NOT_FOUND: 5744 reg_info->status_code = REG_INIT_ALPHA2_NOT_FOUND; 5745 break; 5746 case WMI_REG_SET_CC_CHANGE_NOT_ALLOWED: 5747 reg_info->status_code = REG_SET_CC_CHANGE_NOT_ALLOWED; 5748 break; 5749 case WMI_REG_SET_CC_STATUS_NO_MEMORY: 5750 reg_info->status_code = REG_SET_CC_STATUS_NO_MEMORY; 5751 break; 5752 case WMI_REG_SET_CC_STATUS_FAIL: 5753 reg_info->status_code = REG_SET_CC_STATUS_FAIL; 5754 break; 5755 } 5756 5757 reg_info->is_ext_reg_event = true; 5758 5759 reg_info->min_bw_2g = le32_to_cpu(ev->min_bw_2g); 5760 reg_info->max_bw_2g = le32_to_cpu(ev->max_bw_2g); 5761 reg_info->min_bw_5g = le32_to_cpu(ev->min_bw_5g); 5762 reg_info->max_bw_5g = le32_to_cpu(ev->max_bw_5g); 5763 reg_info->min_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->min_bw_6g_ap_lpi); 5764 reg_info->max_bw_6g_ap[WMI_REG_INDOOR_AP] = le32_to_cpu(ev->max_bw_6g_ap_lpi); 5765 reg_info->min_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->min_bw_6g_ap_sp); 5766 reg_info->max_bw_6g_ap[WMI_REG_STD_POWER_AP] = le32_to_cpu(ev->max_bw_6g_ap_sp); 5767 reg_info->min_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->min_bw_6g_ap_vlp); 5768 reg_info->max_bw_6g_ap[WMI_REG_VLP_AP] = le32_to_cpu(ev->max_bw_6g_ap_vlp); 5769 5770 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5771 reg_info->min_bw_6g_client[WMI_REG_INDOOR_AP][i] = 5772 le32_to_cpu(ev->min_bw_6g_client_lpi[i]); 5773 reg_info->max_bw_6g_client[WMI_REG_INDOOR_AP][i] = 5774 le32_to_cpu(ev->max_bw_6g_client_lpi[i]); 5775 reg_info->min_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 5776 le32_to_cpu(ev->min_bw_6g_client_sp[i]); 5777 reg_info->max_bw_6g_client[WMI_REG_STD_POWER_AP][i] = 5778 le32_to_cpu(ev->max_bw_6g_client_sp[i]); 5779 reg_info->min_bw_6g_client[WMI_REG_VLP_AP][i] = 5780 le32_to_cpu(ev->min_bw_6g_client_vlp[i]); 5781 reg_info->max_bw_6g_client[WMI_REG_VLP_AP][i] = 5782 le32_to_cpu(ev->max_bw_6g_client_vlp[i]); 5783 } 5784 5785 ath12k_dbg(ab, ATH12K_DBG_WMI, 5786 "%s:cc_ext %s dfs %d BW: min_2g %d max_2g %d min_5g %d max_5g %d phy_bitmap 0x%x", 5787 __func__, reg_info->alpha2, reg_info->dfs_region, 5788 reg_info->min_bw_2g, reg_info->max_bw_2g, 5789 reg_info->min_bw_5g, reg_info->max_bw_5g, 5790 reg_info->phybitmap); 5791 5792 ath12k_dbg(ab, ATH12K_DBG_WMI, 5793 "num_2g_reg_rules %d num_5g_reg_rules %d", 5794 num_2g_reg_rules, num_5g_reg_rules); 5795 5796 ath12k_dbg(ab, ATH12K_DBG_WMI, 5797 "num_6g_reg_rules_ap_lpi: %d num_6g_reg_rules_ap_sp: %d num_6g_reg_rules_ap_vlp: %d", 5798 num_6g_reg_rules_ap[WMI_REG_INDOOR_AP], 5799 num_6g_reg_rules_ap[WMI_REG_STD_POWER_AP], 5800 num_6g_reg_rules_ap[WMI_REG_VLP_AP]); 5801 5802 ath12k_dbg(ab, ATH12K_DBG_WMI, 5803 "6g Regular client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 5804 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_DEFAULT_CLIENT], 5805 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_DEFAULT_CLIENT], 5806 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_DEFAULT_CLIENT]); 5807 5808 ath12k_dbg(ab, ATH12K_DBG_WMI, 5809 "6g Subordinate client: num_6g_reg_rules_lpi: %d num_6g_reg_rules_sp: %d num_6g_reg_rules_vlp: %d", 5810 num_6g_reg_rules_cl[WMI_REG_INDOOR_AP][WMI_REG_SUBORDINATE_CLIENT], 5811 num_6g_reg_rules_cl[WMI_REG_STD_POWER_AP][WMI_REG_SUBORDINATE_CLIENT], 5812 num_6g_reg_rules_cl[WMI_REG_VLP_AP][WMI_REG_SUBORDINATE_CLIENT]); 5813 5814 ext_wmi_reg_rule = 5815 (struct ath12k_wmi_reg_rule_ext_params *)((u8 *)ev 5816 + sizeof(*ev) 5817 + sizeof(struct wmi_tlv)); 5818 5819 if (num_2g_reg_rules) { 5820 reg_info->reg_rules_2g_ptr = 5821 create_ext_reg_rules_from_wmi(num_2g_reg_rules, 5822 ext_wmi_reg_rule); 5823 5824 if (!reg_info->reg_rules_2g_ptr) { 5825 kfree(tb); 5826 ath12k_warn(ab, "Unable to Allocate memory for 2g rules\n"); 5827 return -ENOMEM; 5828 } 5829 } 5830 5831 ext_wmi_reg_rule += num_2g_reg_rules; 5832 5833 /* Firmware might include 6 GHz reg rule in 5 GHz rule list 5834 * for few countries along with separate 6 GHz rule. 5835 * Having same 6 GHz reg rule in 5 GHz and 6 GHz rules list 5836 * causes intersect check to be true, and same rules will be 5837 * shown multiple times in iw cmd. 5838 * Hence, avoid parsing 6 GHz rule from 5 GHz reg rule list 5839 */ 5840 num_invalid_5ghz_ext_rules = ath12k_wmi_ignore_num_extra_rules(ext_wmi_reg_rule, 5841 num_5g_reg_rules); 5842 5843 if (num_invalid_5ghz_ext_rules) { 5844 ath12k_dbg(ab, ATH12K_DBG_WMI, 5845 "CC: %s 5 GHz reg rules number %d from fw, %d number of invalid 5 GHz rules", 5846 reg_info->alpha2, reg_info->num_5g_reg_rules, 5847 num_invalid_5ghz_ext_rules); 5848 5849 num_5g_reg_rules = num_5g_reg_rules - num_invalid_5ghz_ext_rules; 5850 reg_info->num_5g_reg_rules = num_5g_reg_rules; 5851 } 5852 5853 if (num_5g_reg_rules) { 5854 reg_info->reg_rules_5g_ptr = 5855 create_ext_reg_rules_from_wmi(num_5g_reg_rules, 5856 ext_wmi_reg_rule); 5857 5858 if (!reg_info->reg_rules_5g_ptr) { 5859 kfree(tb); 5860 ath12k_warn(ab, "Unable to Allocate memory for 5g rules\n"); 5861 return -ENOMEM; 5862 } 5863 } 5864 5865 /* We have adjusted the number of 5 GHz reg rules above. But still those 5866 * many rules needs to be adjusted in ext_wmi_reg_rule. 5867 * 5868 * NOTE: num_invalid_5ghz_ext_rules will be 0 for rest other cases. 5869 */ 5870 ext_wmi_reg_rule += (num_5g_reg_rules + num_invalid_5ghz_ext_rules); 5871 5872 for (i = 0; i < WMI_REG_CURRENT_MAX_AP_TYPE; i++) { 5873 reg_info->reg_rules_6g_ap_ptr[i] = 5874 create_ext_reg_rules_from_wmi(num_6g_reg_rules_ap[i], 5875 ext_wmi_reg_rule); 5876 5877 if (!reg_info->reg_rules_6g_ap_ptr[i]) { 5878 kfree(tb); 5879 ath12k_warn(ab, "Unable to Allocate memory for 6g ap rules\n"); 5880 return -ENOMEM; 5881 } 5882 5883 ext_wmi_reg_rule += num_6g_reg_rules_ap[i]; 5884 } 5885 5886 for (j = 0; j < WMI_REG_CURRENT_MAX_AP_TYPE; j++) { 5887 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5888 reg_info->reg_rules_6g_client_ptr[j][i] = 5889 create_ext_reg_rules_from_wmi(num_6g_reg_rules_cl[j][i], 5890 ext_wmi_reg_rule); 5891 5892 if (!reg_info->reg_rules_6g_client_ptr[j][i]) { 5893 kfree(tb); 5894 ath12k_warn(ab, "Unable to Allocate memory for 6g client rules\n"); 5895 return -ENOMEM; 5896 } 5897 5898 ext_wmi_reg_rule += num_6g_reg_rules_cl[j][i]; 5899 } 5900 } 5901 5902 reg_info->client_type = le32_to_cpu(ev->client_type); 5903 reg_info->rnr_tpe_usable = ev->rnr_tpe_usable; 5904 reg_info->unspecified_ap_usable = ev->unspecified_ap_usable; 5905 reg_info->domain_code_6g_ap[WMI_REG_INDOOR_AP] = 5906 le32_to_cpu(ev->domain_code_6g_ap_lpi); 5907 reg_info->domain_code_6g_ap[WMI_REG_STD_POWER_AP] = 5908 le32_to_cpu(ev->domain_code_6g_ap_sp); 5909 reg_info->domain_code_6g_ap[WMI_REG_VLP_AP] = 5910 le32_to_cpu(ev->domain_code_6g_ap_vlp); 5911 5912 for (i = 0; i < WMI_REG_MAX_CLIENT_TYPE; i++) { 5913 reg_info->domain_code_6g_client[WMI_REG_INDOOR_AP][i] = 5914 le32_to_cpu(ev->domain_code_6g_client_lpi[i]); 5915 reg_info->domain_code_6g_client[WMI_REG_STD_POWER_AP][i] = 5916 le32_to_cpu(ev->domain_code_6g_client_sp[i]); 5917 reg_info->domain_code_6g_client[WMI_REG_VLP_AP][i] = 5918 le32_to_cpu(ev->domain_code_6g_client_vlp[i]); 5919 } 5920 5921 reg_info->domain_code_6g_super_id = le32_to_cpu(ev->domain_code_6g_super_id); 5922 5923 ath12k_dbg(ab, ATH12K_DBG_WMI, "6g client_type: %d domain_code_6g_super_id: %d", 5924 reg_info->client_type, reg_info->domain_code_6g_super_id); 5925 5926 ath12k_dbg(ab, ATH12K_DBG_WMI, "processed regulatory ext channel list\n"); 5927 5928 kfree(tb); 5929 return 0; 5930 } 5931 5932 static int ath12k_pull_peer_del_resp_ev(struct ath12k_base *ab, struct sk_buff *skb, 5933 struct wmi_peer_delete_resp_event *peer_del_resp) 5934 { 5935 const void **tb; 5936 const struct wmi_peer_delete_resp_event *ev; 5937 int ret; 5938 5939 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5940 if (IS_ERR(tb)) { 5941 ret = PTR_ERR(tb); 5942 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5943 return ret; 5944 } 5945 5946 ev = tb[WMI_TAG_PEER_DELETE_RESP_EVENT]; 5947 if (!ev) { 5948 ath12k_warn(ab, "failed to fetch peer delete resp ev"); 5949 kfree(tb); 5950 return -EPROTO; 5951 } 5952 5953 memset(peer_del_resp, 0, sizeof(*peer_del_resp)); 5954 5955 peer_del_resp->vdev_id = ev->vdev_id; 5956 ether_addr_copy(peer_del_resp->peer_macaddr.addr, 5957 ev->peer_macaddr.addr); 5958 5959 kfree(tb); 5960 return 0; 5961 } 5962 5963 static int ath12k_pull_vdev_del_resp_ev(struct ath12k_base *ab, 5964 struct sk_buff *skb, 5965 u32 *vdev_id) 5966 { 5967 const void **tb; 5968 const struct wmi_vdev_delete_resp_event *ev; 5969 int ret; 5970 5971 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 5972 if (IS_ERR(tb)) { 5973 ret = PTR_ERR(tb); 5974 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 5975 return ret; 5976 } 5977 5978 ev = tb[WMI_TAG_VDEV_DELETE_RESP_EVENT]; 5979 if (!ev) { 5980 ath12k_warn(ab, "failed to fetch vdev delete resp ev"); 5981 kfree(tb); 5982 return -EPROTO; 5983 } 5984 5985 *vdev_id = le32_to_cpu(ev->vdev_id); 5986 5987 kfree(tb); 5988 return 0; 5989 } 5990 5991 static int ath12k_pull_bcn_tx_status_ev(struct ath12k_base *ab, 5992 struct sk_buff *skb, 5993 u32 *vdev_id, u32 *tx_status) 5994 { 5995 const void **tb; 5996 const struct wmi_bcn_tx_status_event *ev; 5997 int ret; 5998 5999 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6000 if (IS_ERR(tb)) { 6001 ret = PTR_ERR(tb); 6002 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6003 return ret; 6004 } 6005 6006 ev = tb[WMI_TAG_OFFLOAD_BCN_TX_STATUS_EVENT]; 6007 if (!ev) { 6008 ath12k_warn(ab, "failed to fetch bcn tx status ev"); 6009 kfree(tb); 6010 return -EPROTO; 6011 } 6012 6013 *vdev_id = le32_to_cpu(ev->vdev_id); 6014 *tx_status = le32_to_cpu(ev->tx_status); 6015 6016 kfree(tb); 6017 return 0; 6018 } 6019 6020 static int ath12k_pull_vdev_stopped_param_tlv(struct ath12k_base *ab, struct sk_buff *skb, 6021 u32 *vdev_id) 6022 { 6023 const void **tb; 6024 const struct wmi_vdev_stopped_event *ev; 6025 int ret; 6026 6027 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6028 if (IS_ERR(tb)) { 6029 ret = PTR_ERR(tb); 6030 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6031 return ret; 6032 } 6033 6034 ev = tb[WMI_TAG_VDEV_STOPPED_EVENT]; 6035 if (!ev) { 6036 ath12k_warn(ab, "failed to fetch vdev stop ev"); 6037 kfree(tb); 6038 return -EPROTO; 6039 } 6040 6041 *vdev_id = le32_to_cpu(ev->vdev_id); 6042 6043 kfree(tb); 6044 return 0; 6045 } 6046 6047 static int ath12k_wmi_tlv_mgmt_rx_parse(struct ath12k_base *ab, 6048 u16 tag, u16 len, 6049 const void *ptr, void *data) 6050 { 6051 struct wmi_tlv_mgmt_rx_parse *parse = data; 6052 6053 switch (tag) { 6054 case WMI_TAG_MGMT_RX_HDR: 6055 parse->fixed = ptr; 6056 break; 6057 case WMI_TAG_ARRAY_BYTE: 6058 if (!parse->frame_buf_done) { 6059 parse->frame_buf = ptr; 6060 parse->frame_buf_done = true; 6061 } 6062 break; 6063 } 6064 return 0; 6065 } 6066 6067 static int ath12k_pull_mgmt_rx_params_tlv(struct ath12k_base *ab, 6068 struct sk_buff *skb, 6069 struct ath12k_wmi_mgmt_rx_arg *hdr) 6070 { 6071 struct wmi_tlv_mgmt_rx_parse parse = { }; 6072 const struct ath12k_wmi_mgmt_rx_params *ev; 6073 const u8 *frame; 6074 int i, ret; 6075 6076 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6077 ath12k_wmi_tlv_mgmt_rx_parse, 6078 &parse); 6079 if (ret) { 6080 ath12k_warn(ab, "failed to parse mgmt rx tlv %d\n", ret); 6081 return ret; 6082 } 6083 6084 ev = parse.fixed; 6085 frame = parse.frame_buf; 6086 6087 if (!ev || !frame) { 6088 ath12k_warn(ab, "failed to fetch mgmt rx hdr"); 6089 return -EPROTO; 6090 } 6091 6092 hdr->pdev_id = le32_to_cpu(ev->pdev_id); 6093 hdr->chan_freq = le32_to_cpu(ev->chan_freq); 6094 hdr->channel = le32_to_cpu(ev->channel); 6095 hdr->snr = le32_to_cpu(ev->snr); 6096 hdr->rate = le32_to_cpu(ev->rate); 6097 hdr->phy_mode = le32_to_cpu(ev->phy_mode); 6098 hdr->buf_len = le32_to_cpu(ev->buf_len); 6099 hdr->status = le32_to_cpu(ev->status); 6100 hdr->flags = le32_to_cpu(ev->flags); 6101 hdr->rssi = a_sle32_to_cpu(ev->rssi); 6102 hdr->tsf_delta = le32_to_cpu(ev->tsf_delta); 6103 6104 for (i = 0; i < ATH_MAX_ANTENNA; i++) 6105 hdr->rssi_ctl[i] = le32_to_cpu(ev->rssi_ctl[i]); 6106 6107 if (skb->len < (frame - skb->data) + hdr->buf_len) { 6108 ath12k_warn(ab, "invalid length in mgmt rx hdr ev"); 6109 return -EPROTO; 6110 } 6111 6112 /* shift the sk_buff to point to `frame` */ 6113 skb_trim(skb, 0); 6114 skb_put(skb, frame - skb->data); 6115 skb_pull(skb, frame - skb->data); 6116 skb_put(skb, hdr->buf_len); 6117 6118 return 0; 6119 } 6120 6121 static int wmi_process_mgmt_tx_comp(struct ath12k *ar, u32 desc_id, 6122 u32 status) 6123 { 6124 struct sk_buff *msdu; 6125 struct ieee80211_tx_info *info; 6126 struct ath12k_skb_cb *skb_cb; 6127 int num_mgmt; 6128 6129 spin_lock_bh(&ar->txmgmt_idr_lock); 6130 msdu = idr_find(&ar->txmgmt_idr, desc_id); 6131 6132 if (!msdu) { 6133 ath12k_warn(ar->ab, "received mgmt tx compl for invalid msdu_id: %d\n", 6134 desc_id); 6135 spin_unlock_bh(&ar->txmgmt_idr_lock); 6136 return -ENOENT; 6137 } 6138 6139 idr_remove(&ar->txmgmt_idr, desc_id); 6140 spin_unlock_bh(&ar->txmgmt_idr_lock); 6141 6142 skb_cb = ATH12K_SKB_CB(msdu); 6143 dma_unmap_single(ar->ab->dev, skb_cb->paddr, msdu->len, DMA_TO_DEVICE); 6144 6145 info = IEEE80211_SKB_CB(msdu); 6146 memset(&info->status, 0, sizeof(info->status)); 6147 6148 /* skip tx rate update from ieee80211_status*/ 6149 info->status.rates[0].idx = -1; 6150 6151 if ((!(info->flags & IEEE80211_TX_CTL_NO_ACK)) && !status) 6152 info->flags |= IEEE80211_TX_STAT_ACK; 6153 6154 if ((info->flags & IEEE80211_TX_CTL_NO_ACK) && !status) 6155 info->flags |= IEEE80211_TX_STAT_NOACK_TRANSMITTED; 6156 6157 ieee80211_tx_status_irqsafe(ath12k_ar_to_hw(ar), msdu); 6158 6159 num_mgmt = atomic_dec_if_positive(&ar->num_pending_mgmt_tx); 6160 6161 /* WARN when we received this event without doing any mgmt tx */ 6162 if (num_mgmt < 0) 6163 WARN_ON_ONCE(1); 6164 6165 if (!num_mgmt) 6166 wake_up(&ar->txmgmt_empty_waitq); 6167 6168 return 0; 6169 } 6170 6171 static int ath12k_pull_mgmt_tx_compl_param_tlv(struct ath12k_base *ab, 6172 struct sk_buff *skb, 6173 struct wmi_mgmt_tx_compl_event *param) 6174 { 6175 const void **tb; 6176 const struct wmi_mgmt_tx_compl_event *ev; 6177 int ret; 6178 6179 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6180 if (IS_ERR(tb)) { 6181 ret = PTR_ERR(tb); 6182 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6183 return ret; 6184 } 6185 6186 ev = tb[WMI_TAG_MGMT_TX_COMPL_EVENT]; 6187 if (!ev) { 6188 ath12k_warn(ab, "failed to fetch mgmt tx compl ev"); 6189 kfree(tb); 6190 return -EPROTO; 6191 } 6192 6193 param->pdev_id = ev->pdev_id; 6194 param->desc_id = ev->desc_id; 6195 param->status = ev->status; 6196 6197 kfree(tb); 6198 return 0; 6199 } 6200 6201 static void ath12k_wmi_event_scan_started(struct ath12k *ar) 6202 { 6203 lockdep_assert_held(&ar->data_lock); 6204 6205 switch (ar->scan.state) { 6206 case ATH12K_SCAN_IDLE: 6207 case ATH12K_SCAN_RUNNING: 6208 case ATH12K_SCAN_ABORTING: 6209 ath12k_warn(ar->ab, "received scan started event in an invalid scan state: %s (%d)\n", 6210 ath12k_scan_state_str(ar->scan.state), 6211 ar->scan.state); 6212 break; 6213 case ATH12K_SCAN_STARTING: 6214 ar->scan.state = ATH12K_SCAN_RUNNING; 6215 6216 if (ar->scan.is_roc) 6217 ieee80211_ready_on_channel(ath12k_ar_to_hw(ar)); 6218 6219 complete(&ar->scan.started); 6220 break; 6221 } 6222 } 6223 6224 static void ath12k_wmi_event_scan_start_failed(struct ath12k *ar) 6225 { 6226 lockdep_assert_held(&ar->data_lock); 6227 6228 switch (ar->scan.state) { 6229 case ATH12K_SCAN_IDLE: 6230 case ATH12K_SCAN_RUNNING: 6231 case ATH12K_SCAN_ABORTING: 6232 ath12k_warn(ar->ab, "received scan start failed event in an invalid scan state: %s (%d)\n", 6233 ath12k_scan_state_str(ar->scan.state), 6234 ar->scan.state); 6235 break; 6236 case ATH12K_SCAN_STARTING: 6237 complete(&ar->scan.started); 6238 __ath12k_mac_scan_finish(ar); 6239 break; 6240 } 6241 } 6242 6243 static void ath12k_wmi_event_scan_completed(struct ath12k *ar) 6244 { 6245 lockdep_assert_held(&ar->data_lock); 6246 6247 switch (ar->scan.state) { 6248 case ATH12K_SCAN_IDLE: 6249 case ATH12K_SCAN_STARTING: 6250 /* One suspected reason scan can be completed while starting is 6251 * if firmware fails to deliver all scan events to the host, 6252 * e.g. when transport pipe is full. This has been observed 6253 * with spectral scan phyerr events starving wmi transport 6254 * pipe. In such case the "scan completed" event should be (and 6255 * is) ignored by the host as it may be just firmware's scan 6256 * state machine recovering. 6257 */ 6258 ath12k_warn(ar->ab, "received scan completed event in an invalid scan state: %s (%d)\n", 6259 ath12k_scan_state_str(ar->scan.state), 6260 ar->scan.state); 6261 break; 6262 case ATH12K_SCAN_RUNNING: 6263 case ATH12K_SCAN_ABORTING: 6264 __ath12k_mac_scan_finish(ar); 6265 break; 6266 } 6267 } 6268 6269 static void ath12k_wmi_event_scan_bss_chan(struct ath12k *ar) 6270 { 6271 lockdep_assert_held(&ar->data_lock); 6272 6273 switch (ar->scan.state) { 6274 case ATH12K_SCAN_IDLE: 6275 case ATH12K_SCAN_STARTING: 6276 ath12k_warn(ar->ab, "received scan bss chan event in an invalid scan state: %s (%d)\n", 6277 ath12k_scan_state_str(ar->scan.state), 6278 ar->scan.state); 6279 break; 6280 case ATH12K_SCAN_RUNNING: 6281 case ATH12K_SCAN_ABORTING: 6282 ar->scan_channel = NULL; 6283 break; 6284 } 6285 } 6286 6287 static void ath12k_wmi_event_scan_foreign_chan(struct ath12k *ar, u32 freq) 6288 { 6289 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 6290 6291 lockdep_assert_held(&ar->data_lock); 6292 6293 switch (ar->scan.state) { 6294 case ATH12K_SCAN_IDLE: 6295 case ATH12K_SCAN_STARTING: 6296 ath12k_warn(ar->ab, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 6297 ath12k_scan_state_str(ar->scan.state), 6298 ar->scan.state); 6299 break; 6300 case ATH12K_SCAN_RUNNING: 6301 case ATH12K_SCAN_ABORTING: 6302 ar->scan_channel = ieee80211_get_channel(hw->wiphy, freq); 6303 6304 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 6305 complete(&ar->scan.on_channel); 6306 6307 break; 6308 } 6309 } 6310 6311 static const char * 6312 ath12k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 6313 enum wmi_scan_completion_reason reason) 6314 { 6315 switch (type) { 6316 case WMI_SCAN_EVENT_STARTED: 6317 return "started"; 6318 case WMI_SCAN_EVENT_COMPLETED: 6319 switch (reason) { 6320 case WMI_SCAN_REASON_COMPLETED: 6321 return "completed"; 6322 case WMI_SCAN_REASON_CANCELLED: 6323 return "completed [cancelled]"; 6324 case WMI_SCAN_REASON_PREEMPTED: 6325 return "completed [preempted]"; 6326 case WMI_SCAN_REASON_TIMEDOUT: 6327 return "completed [timedout]"; 6328 case WMI_SCAN_REASON_INTERNAL_FAILURE: 6329 return "completed [internal err]"; 6330 case WMI_SCAN_REASON_MAX: 6331 break; 6332 } 6333 return "completed [unknown]"; 6334 case WMI_SCAN_EVENT_BSS_CHANNEL: 6335 return "bss channel"; 6336 case WMI_SCAN_EVENT_FOREIGN_CHAN: 6337 return "foreign channel"; 6338 case WMI_SCAN_EVENT_DEQUEUED: 6339 return "dequeued"; 6340 case WMI_SCAN_EVENT_PREEMPTED: 6341 return "preempted"; 6342 case WMI_SCAN_EVENT_START_FAILED: 6343 return "start failed"; 6344 case WMI_SCAN_EVENT_RESTARTED: 6345 return "restarted"; 6346 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 6347 return "foreign channel exit"; 6348 default: 6349 return "unknown"; 6350 } 6351 } 6352 6353 static int ath12k_pull_scan_ev(struct ath12k_base *ab, struct sk_buff *skb, 6354 struct wmi_scan_event *scan_evt_param) 6355 { 6356 const void **tb; 6357 const struct wmi_scan_event *ev; 6358 int ret; 6359 6360 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6361 if (IS_ERR(tb)) { 6362 ret = PTR_ERR(tb); 6363 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6364 return ret; 6365 } 6366 6367 ev = tb[WMI_TAG_SCAN_EVENT]; 6368 if (!ev) { 6369 ath12k_warn(ab, "failed to fetch scan ev"); 6370 kfree(tb); 6371 return -EPROTO; 6372 } 6373 6374 scan_evt_param->event_type = ev->event_type; 6375 scan_evt_param->reason = ev->reason; 6376 scan_evt_param->channel_freq = ev->channel_freq; 6377 scan_evt_param->scan_req_id = ev->scan_req_id; 6378 scan_evt_param->scan_id = ev->scan_id; 6379 scan_evt_param->vdev_id = ev->vdev_id; 6380 scan_evt_param->tsf_timestamp = ev->tsf_timestamp; 6381 6382 kfree(tb); 6383 return 0; 6384 } 6385 6386 static int ath12k_pull_peer_sta_kickout_ev(struct ath12k_base *ab, struct sk_buff *skb, 6387 struct wmi_peer_sta_kickout_arg *arg) 6388 { 6389 const void **tb; 6390 const struct wmi_peer_sta_kickout_event *ev; 6391 int ret; 6392 6393 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6394 if (IS_ERR(tb)) { 6395 ret = PTR_ERR(tb); 6396 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6397 return ret; 6398 } 6399 6400 ev = tb[WMI_TAG_PEER_STA_KICKOUT_EVENT]; 6401 if (!ev) { 6402 ath12k_warn(ab, "failed to fetch peer sta kickout ev"); 6403 kfree(tb); 6404 return -EPROTO; 6405 } 6406 6407 arg->mac_addr = ev->peer_macaddr.addr; 6408 6409 kfree(tb); 6410 return 0; 6411 } 6412 6413 static int ath12k_pull_roam_ev(struct ath12k_base *ab, struct sk_buff *skb, 6414 struct wmi_roam_event *roam_ev) 6415 { 6416 const void **tb; 6417 const struct wmi_roam_event *ev; 6418 int ret; 6419 6420 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6421 if (IS_ERR(tb)) { 6422 ret = PTR_ERR(tb); 6423 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6424 return ret; 6425 } 6426 6427 ev = tb[WMI_TAG_ROAM_EVENT]; 6428 if (!ev) { 6429 ath12k_warn(ab, "failed to fetch roam ev"); 6430 kfree(tb); 6431 return -EPROTO; 6432 } 6433 6434 roam_ev->vdev_id = ev->vdev_id; 6435 roam_ev->reason = ev->reason; 6436 roam_ev->rssi = ev->rssi; 6437 6438 kfree(tb); 6439 return 0; 6440 } 6441 6442 static int freq_to_idx(struct ath12k *ar, int freq) 6443 { 6444 struct ieee80211_supported_band *sband; 6445 struct ieee80211_hw *hw = ath12k_ar_to_hw(ar); 6446 int band, ch, idx = 0; 6447 6448 for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) { 6449 if (!ar->mac.sbands[band].channels) 6450 continue; 6451 6452 sband = hw->wiphy->bands[band]; 6453 if (!sband) 6454 continue; 6455 6456 for (ch = 0; ch < sband->n_channels; ch++, idx++) { 6457 if (sband->channels[ch].center_freq < 6458 KHZ_TO_MHZ(ar->freq_range.start_freq) || 6459 sband->channels[ch].center_freq > 6460 KHZ_TO_MHZ(ar->freq_range.end_freq)) 6461 continue; 6462 6463 if (sband->channels[ch].center_freq == freq) 6464 goto exit; 6465 } 6466 } 6467 6468 exit: 6469 return idx; 6470 } 6471 6472 static int ath12k_pull_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 6473 struct wmi_chan_info_event *ch_info_ev) 6474 { 6475 const void **tb; 6476 const struct wmi_chan_info_event *ev; 6477 int ret; 6478 6479 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6480 if (IS_ERR(tb)) { 6481 ret = PTR_ERR(tb); 6482 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6483 return ret; 6484 } 6485 6486 ev = tb[WMI_TAG_CHAN_INFO_EVENT]; 6487 if (!ev) { 6488 ath12k_warn(ab, "failed to fetch chan info ev"); 6489 kfree(tb); 6490 return -EPROTO; 6491 } 6492 6493 ch_info_ev->err_code = ev->err_code; 6494 ch_info_ev->freq = ev->freq; 6495 ch_info_ev->cmd_flags = ev->cmd_flags; 6496 ch_info_ev->noise_floor = ev->noise_floor; 6497 ch_info_ev->rx_clear_count = ev->rx_clear_count; 6498 ch_info_ev->cycle_count = ev->cycle_count; 6499 ch_info_ev->chan_tx_pwr_range = ev->chan_tx_pwr_range; 6500 ch_info_ev->chan_tx_pwr_tp = ev->chan_tx_pwr_tp; 6501 ch_info_ev->rx_frame_count = ev->rx_frame_count; 6502 ch_info_ev->tx_frame_cnt = ev->tx_frame_cnt; 6503 ch_info_ev->mac_clk_mhz = ev->mac_clk_mhz; 6504 ch_info_ev->vdev_id = ev->vdev_id; 6505 6506 kfree(tb); 6507 return 0; 6508 } 6509 6510 static int 6511 ath12k_pull_pdev_bss_chan_info_ev(struct ath12k_base *ab, struct sk_buff *skb, 6512 struct wmi_pdev_bss_chan_info_event *bss_ch_info_ev) 6513 { 6514 const void **tb; 6515 const struct wmi_pdev_bss_chan_info_event *ev; 6516 int ret; 6517 6518 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6519 if (IS_ERR(tb)) { 6520 ret = PTR_ERR(tb); 6521 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6522 return ret; 6523 } 6524 6525 ev = tb[WMI_TAG_PDEV_BSS_CHAN_INFO_EVENT]; 6526 if (!ev) { 6527 ath12k_warn(ab, "failed to fetch pdev bss chan info ev"); 6528 kfree(tb); 6529 return -EPROTO; 6530 } 6531 6532 bss_ch_info_ev->pdev_id = ev->pdev_id; 6533 bss_ch_info_ev->freq = ev->freq; 6534 bss_ch_info_ev->noise_floor = ev->noise_floor; 6535 bss_ch_info_ev->rx_clear_count_low = ev->rx_clear_count_low; 6536 bss_ch_info_ev->rx_clear_count_high = ev->rx_clear_count_high; 6537 bss_ch_info_ev->cycle_count_low = ev->cycle_count_low; 6538 bss_ch_info_ev->cycle_count_high = ev->cycle_count_high; 6539 bss_ch_info_ev->tx_cycle_count_low = ev->tx_cycle_count_low; 6540 bss_ch_info_ev->tx_cycle_count_high = ev->tx_cycle_count_high; 6541 bss_ch_info_ev->rx_cycle_count_low = ev->rx_cycle_count_low; 6542 bss_ch_info_ev->rx_cycle_count_high = ev->rx_cycle_count_high; 6543 bss_ch_info_ev->rx_bss_cycle_count_low = ev->rx_bss_cycle_count_low; 6544 bss_ch_info_ev->rx_bss_cycle_count_high = ev->rx_bss_cycle_count_high; 6545 6546 kfree(tb); 6547 return 0; 6548 } 6549 6550 static int 6551 ath12k_pull_vdev_install_key_compl_ev(struct ath12k_base *ab, struct sk_buff *skb, 6552 struct wmi_vdev_install_key_complete_arg *arg) 6553 { 6554 const void **tb; 6555 const struct wmi_vdev_install_key_compl_event *ev; 6556 int ret; 6557 6558 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6559 if (IS_ERR(tb)) { 6560 ret = PTR_ERR(tb); 6561 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6562 return ret; 6563 } 6564 6565 ev = tb[WMI_TAG_VDEV_INSTALL_KEY_COMPLETE_EVENT]; 6566 if (!ev) { 6567 ath12k_warn(ab, "failed to fetch vdev install key compl ev"); 6568 kfree(tb); 6569 return -EPROTO; 6570 } 6571 6572 arg->vdev_id = le32_to_cpu(ev->vdev_id); 6573 arg->macaddr = ev->peer_macaddr.addr; 6574 arg->key_idx = le32_to_cpu(ev->key_idx); 6575 arg->key_flags = le32_to_cpu(ev->key_flags); 6576 arg->status = le32_to_cpu(ev->status); 6577 6578 kfree(tb); 6579 return 0; 6580 } 6581 6582 static int ath12k_pull_peer_assoc_conf_ev(struct ath12k_base *ab, struct sk_buff *skb, 6583 struct wmi_peer_assoc_conf_arg *peer_assoc_conf) 6584 { 6585 const void **tb; 6586 const struct wmi_peer_assoc_conf_event *ev; 6587 int ret; 6588 6589 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6590 if (IS_ERR(tb)) { 6591 ret = PTR_ERR(tb); 6592 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6593 return ret; 6594 } 6595 6596 ev = tb[WMI_TAG_PEER_ASSOC_CONF_EVENT]; 6597 if (!ev) { 6598 ath12k_warn(ab, "failed to fetch peer assoc conf ev"); 6599 kfree(tb); 6600 return -EPROTO; 6601 } 6602 6603 peer_assoc_conf->vdev_id = le32_to_cpu(ev->vdev_id); 6604 peer_assoc_conf->macaddr = ev->peer_macaddr.addr; 6605 6606 kfree(tb); 6607 return 0; 6608 } 6609 6610 static int 6611 ath12k_pull_pdev_temp_ev(struct ath12k_base *ab, struct sk_buff *skb, 6612 const struct wmi_pdev_temperature_event *ev) 6613 { 6614 const void **tb; 6615 int ret; 6616 6617 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6618 if (IS_ERR(tb)) { 6619 ret = PTR_ERR(tb); 6620 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6621 return ret; 6622 } 6623 6624 ev = tb[WMI_TAG_PDEV_TEMPERATURE_EVENT]; 6625 if (!ev) { 6626 ath12k_warn(ab, "failed to fetch pdev temp ev"); 6627 kfree(tb); 6628 return -EPROTO; 6629 } 6630 6631 kfree(tb); 6632 return 0; 6633 } 6634 6635 static void ath12k_wmi_op_ep_tx_credits(struct ath12k_base *ab) 6636 { 6637 /* try to send pending beacons first. they take priority */ 6638 wake_up(&ab->wmi_ab.tx_credits_wq); 6639 } 6640 6641 static int ath12k_reg_11d_new_cc_event(struct ath12k_base *ab, struct sk_buff *skb) 6642 { 6643 const struct wmi_11d_new_cc_event *ev; 6644 struct ath12k *ar; 6645 struct ath12k_pdev *pdev; 6646 const void **tb; 6647 int ret, i; 6648 6649 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 6650 if (IS_ERR(tb)) { 6651 ret = PTR_ERR(tb); 6652 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 6653 return ret; 6654 } 6655 6656 ev = tb[WMI_TAG_11D_NEW_COUNTRY_EVENT]; 6657 if (!ev) { 6658 kfree(tb); 6659 ath12k_warn(ab, "failed to fetch 11d new cc ev"); 6660 return -EPROTO; 6661 } 6662 6663 spin_lock_bh(&ab->base_lock); 6664 memcpy(&ab->new_alpha2, &ev->new_alpha2, REG_ALPHA2_LEN); 6665 spin_unlock_bh(&ab->base_lock); 6666 6667 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi 11d new cc %c%c\n", 6668 ab->new_alpha2[0], 6669 ab->new_alpha2[1]); 6670 6671 kfree(tb); 6672 6673 for (i = 0; i < ab->num_radios; i++) { 6674 pdev = &ab->pdevs[i]; 6675 ar = pdev->ar; 6676 ar->state_11d = ATH12K_11D_IDLE; 6677 ar->ah->regd_updated = false; 6678 complete(&ar->completed_11d_scan); 6679 } 6680 6681 queue_work(ab->workqueue, &ab->update_11d_work); 6682 6683 return 0; 6684 } 6685 6686 static void ath12k_wmi_htc_tx_complete(struct ath12k_base *ab, 6687 struct sk_buff *skb) 6688 { 6689 dev_kfree_skb(skb); 6690 } 6691 6692 static int ath12k_reg_chan_list_event(struct ath12k_base *ab, struct sk_buff *skb) 6693 { 6694 struct ath12k_reg_info *reg_info; 6695 struct ath12k *ar = NULL; 6696 u8 pdev_idx = 255; 6697 int ret; 6698 6699 reg_info = kzalloc(sizeof(*reg_info), GFP_ATOMIC); 6700 if (!reg_info) { 6701 ret = -ENOMEM; 6702 goto fallback; 6703 } 6704 6705 ret = ath12k_pull_reg_chan_list_ext_update_ev(ab, skb, reg_info); 6706 if (ret) { 6707 ath12k_warn(ab, "failed to extract regulatory info from received event\n"); 6708 goto mem_free; 6709 } 6710 6711 ret = ath12k_reg_validate_reg_info(ab, reg_info); 6712 if (ret == ATH12K_REG_STATUS_FALLBACK) { 6713 ath12k_warn(ab, "failed to validate reg info %d\n", ret); 6714 /* firmware has successfully switches to new regd but host can not 6715 * continue, so free reginfo and fallback to old regd 6716 */ 6717 goto mem_free; 6718 } else if (ret == ATH12K_REG_STATUS_DROP) { 6719 /* reg info is valid but we will not store it and 6720 * not going to create new regd for it 6721 */ 6722 ret = ATH12K_REG_STATUS_VALID; 6723 goto mem_free; 6724 } 6725 6726 /* free old reg_info if it exist */ 6727 pdev_idx = reg_info->phy_id; 6728 if (ab->reg_info[pdev_idx]) { 6729 ath12k_reg_reset_reg_info(ab->reg_info[pdev_idx]); 6730 kfree(ab->reg_info[pdev_idx]); 6731 } 6732 /* reg_info is valid, we store it for later use 6733 * even below regd build failed 6734 */ 6735 ab->reg_info[pdev_idx] = reg_info; 6736 6737 ret = ath12k_reg_handle_chan_list(ab, reg_info, WMI_VDEV_TYPE_UNSPEC, 6738 IEEE80211_REG_UNSET_AP); 6739 if (ret) { 6740 ath12k_warn(ab, "failed to handle chan list %d\n", ret); 6741 goto fallback; 6742 } 6743 6744 goto out; 6745 6746 mem_free: 6747 ath12k_reg_reset_reg_info(reg_info); 6748 kfree(reg_info); 6749 6750 if (ret == ATH12K_REG_STATUS_VALID) 6751 goto out; 6752 6753 fallback: 6754 /* Fallback to older reg (by sending previous country setting 6755 * again if fw has succeeded and we failed to process here. 6756 * The Regdomain should be uniform across driver and fw. Since the 6757 * FW has processed the command and sent a success status, we expect 6758 * this function to succeed as well. If it doesn't, CTRY needs to be 6759 * reverted at the fw and the old SCAN_CHAN_LIST cmd needs to be sent. 6760 */ 6761 /* TODO: This is rare, but still should also be handled */ 6762 WARN_ON(1); 6763 6764 out: 6765 /* In some error cases, even a valid pdev_idx might not be available */ 6766 if (pdev_idx != 255) 6767 ar = ab->pdevs[pdev_idx].ar; 6768 6769 /* During the boot-time update, 'ar' might not be allocated, 6770 * so the completion cannot be marked at that point. 6771 * This boot-time update is handled in ath12k_mac_hw_register() 6772 * before registering the hardware. 6773 */ 6774 if (ar) 6775 complete_all(&ar->regd_update_completed); 6776 6777 return ret; 6778 } 6779 6780 static int ath12k_wmi_rdy_parse(struct ath12k_base *ab, u16 tag, u16 len, 6781 const void *ptr, void *data) 6782 { 6783 struct ath12k_wmi_rdy_parse *rdy_parse = data; 6784 struct wmi_ready_event fixed_param; 6785 struct ath12k_wmi_mac_addr_params *addr_list; 6786 struct ath12k_pdev *pdev; 6787 u32 num_mac_addr; 6788 int i; 6789 6790 switch (tag) { 6791 case WMI_TAG_READY_EVENT: 6792 memset(&fixed_param, 0, sizeof(fixed_param)); 6793 memcpy(&fixed_param, (struct wmi_ready_event *)ptr, 6794 min_t(u16, sizeof(fixed_param), len)); 6795 ab->wlan_init_status = le32_to_cpu(fixed_param.ready_event_min.status); 6796 rdy_parse->num_extra_mac_addr = 6797 le32_to_cpu(fixed_param.ready_event_min.num_extra_mac_addr); 6798 6799 ether_addr_copy(ab->mac_addr, 6800 fixed_param.ready_event_min.mac_addr.addr); 6801 ab->pktlog_defs_checksum = le32_to_cpu(fixed_param.pktlog_defs_checksum); 6802 ab->wmi_ready = true; 6803 break; 6804 case WMI_TAG_ARRAY_FIXED_STRUCT: 6805 addr_list = (struct ath12k_wmi_mac_addr_params *)ptr; 6806 num_mac_addr = rdy_parse->num_extra_mac_addr; 6807 6808 if (!(ab->num_radios > 1 && num_mac_addr >= ab->num_radios)) 6809 break; 6810 6811 for (i = 0; i < ab->num_radios; i++) { 6812 pdev = &ab->pdevs[i]; 6813 ether_addr_copy(pdev->mac_addr, addr_list[i].addr); 6814 } 6815 ab->pdevs_macaddr_valid = true; 6816 break; 6817 default: 6818 break; 6819 } 6820 6821 return 0; 6822 } 6823 6824 static int ath12k_ready_event(struct ath12k_base *ab, struct sk_buff *skb) 6825 { 6826 struct ath12k_wmi_rdy_parse rdy_parse = { }; 6827 int ret; 6828 6829 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 6830 ath12k_wmi_rdy_parse, &rdy_parse); 6831 if (ret) { 6832 ath12k_warn(ab, "failed to parse tlv %d\n", ret); 6833 return ret; 6834 } 6835 6836 complete(&ab->wmi_ab.unified_ready); 6837 return 0; 6838 } 6839 6840 static void ath12k_peer_delete_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 6841 { 6842 struct wmi_peer_delete_resp_event peer_del_resp; 6843 struct ath12k *ar; 6844 6845 if (ath12k_pull_peer_del_resp_ev(ab, skb, &peer_del_resp) != 0) { 6846 ath12k_warn(ab, "failed to extract peer delete resp"); 6847 return; 6848 } 6849 6850 rcu_read_lock(); 6851 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(peer_del_resp.vdev_id)); 6852 if (!ar) { 6853 ath12k_warn(ab, "invalid vdev id in peer delete resp ev %d", 6854 peer_del_resp.vdev_id); 6855 rcu_read_unlock(); 6856 return; 6857 } 6858 6859 complete(&ar->peer_delete_done); 6860 rcu_read_unlock(); 6861 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer delete resp for vdev id %d addr %pM\n", 6862 peer_del_resp.vdev_id, peer_del_resp.peer_macaddr.addr); 6863 } 6864 6865 static void ath12k_vdev_delete_resp_event(struct ath12k_base *ab, 6866 struct sk_buff *skb) 6867 { 6868 struct ath12k *ar; 6869 u32 vdev_id = 0; 6870 6871 if (ath12k_pull_vdev_del_resp_ev(ab, skb, &vdev_id) != 0) { 6872 ath12k_warn(ab, "failed to extract vdev delete resp"); 6873 return; 6874 } 6875 6876 rcu_read_lock(); 6877 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6878 if (!ar) { 6879 ath12k_warn(ab, "invalid vdev id in vdev delete resp ev %d", 6880 vdev_id); 6881 rcu_read_unlock(); 6882 return; 6883 } 6884 6885 complete(&ar->vdev_delete_done); 6886 6887 rcu_read_unlock(); 6888 6889 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev delete resp for vdev id %d\n", 6890 vdev_id); 6891 } 6892 6893 static const char *ath12k_wmi_vdev_resp_print(u32 vdev_resp_status) 6894 { 6895 switch (vdev_resp_status) { 6896 case WMI_VDEV_START_RESPONSE_INVALID_VDEVID: 6897 return "invalid vdev id"; 6898 case WMI_VDEV_START_RESPONSE_NOT_SUPPORTED: 6899 return "not supported"; 6900 case WMI_VDEV_START_RESPONSE_DFS_VIOLATION: 6901 return "dfs violation"; 6902 case WMI_VDEV_START_RESPONSE_INVALID_REGDOMAIN: 6903 return "invalid regdomain"; 6904 default: 6905 return "unknown"; 6906 } 6907 } 6908 6909 static void ath12k_vdev_start_resp_event(struct ath12k_base *ab, struct sk_buff *skb) 6910 { 6911 struct wmi_vdev_start_resp_event vdev_start_resp; 6912 struct ath12k *ar; 6913 u32 status; 6914 6915 if (ath12k_pull_vdev_start_resp_tlv(ab, skb, &vdev_start_resp) != 0) { 6916 ath12k_warn(ab, "failed to extract vdev start resp"); 6917 return; 6918 } 6919 6920 rcu_read_lock(); 6921 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(vdev_start_resp.vdev_id)); 6922 if (!ar) { 6923 ath12k_warn(ab, "invalid vdev id in vdev start resp ev %d", 6924 vdev_start_resp.vdev_id); 6925 rcu_read_unlock(); 6926 return; 6927 } 6928 6929 ar->last_wmi_vdev_start_status = 0; 6930 6931 status = le32_to_cpu(vdev_start_resp.status); 6932 if (WARN_ON_ONCE(status)) { 6933 ath12k_warn(ab, "vdev start resp error status %d (%s)\n", 6934 status, ath12k_wmi_vdev_resp_print(status)); 6935 ar->last_wmi_vdev_start_status = status; 6936 } 6937 6938 ar->max_allowed_tx_power = (s8)le32_to_cpu(vdev_start_resp.max_allowed_tx_power); 6939 6940 complete(&ar->vdev_setup_done); 6941 6942 rcu_read_unlock(); 6943 6944 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev start resp for vdev id %d", 6945 vdev_start_resp.vdev_id); 6946 } 6947 6948 static void ath12k_bcn_tx_status_event(struct ath12k_base *ab, struct sk_buff *skb) 6949 { 6950 u32 vdev_id, tx_status; 6951 6952 if (ath12k_pull_bcn_tx_status_ev(ab, skb, &vdev_id, &tx_status) != 0) { 6953 ath12k_warn(ab, "failed to extract bcn tx status"); 6954 return; 6955 } 6956 } 6957 6958 static void ath12k_vdev_stopped_event(struct ath12k_base *ab, struct sk_buff *skb) 6959 { 6960 struct ath12k *ar; 6961 u32 vdev_id = 0; 6962 6963 if (ath12k_pull_vdev_stopped_param_tlv(ab, skb, &vdev_id) != 0) { 6964 ath12k_warn(ab, "failed to extract vdev stopped event"); 6965 return; 6966 } 6967 6968 rcu_read_lock(); 6969 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 6970 if (!ar) { 6971 ath12k_warn(ab, "invalid vdev id in vdev stopped ev %d", 6972 vdev_id); 6973 rcu_read_unlock(); 6974 return; 6975 } 6976 6977 complete(&ar->vdev_setup_done); 6978 6979 rcu_read_unlock(); 6980 6981 ath12k_dbg(ab, ATH12K_DBG_WMI, "vdev stopped for vdev id %d", vdev_id); 6982 } 6983 6984 static void ath12k_mgmt_rx_event(struct ath12k_base *ab, struct sk_buff *skb) 6985 { 6986 struct ath12k_wmi_mgmt_rx_arg rx_ev = {0}; 6987 struct ath12k *ar; 6988 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 6989 struct ieee80211_hdr *hdr; 6990 u16 fc; 6991 struct ieee80211_supported_band *sband; 6992 s32 noise_floor; 6993 6994 if (ath12k_pull_mgmt_rx_params_tlv(ab, skb, &rx_ev) != 0) { 6995 ath12k_warn(ab, "failed to extract mgmt rx event"); 6996 dev_kfree_skb(skb); 6997 return; 6998 } 6999 7000 memset(status, 0, sizeof(*status)); 7001 7002 ath12k_dbg(ab, ATH12K_DBG_MGMT, "mgmt rx event status %08x\n", 7003 rx_ev.status); 7004 7005 rcu_read_lock(); 7006 ar = ath12k_mac_get_ar_by_pdev_id(ab, rx_ev.pdev_id); 7007 7008 if (!ar) { 7009 ath12k_warn(ab, "invalid pdev_id %d in mgmt_rx_event\n", 7010 rx_ev.pdev_id); 7011 dev_kfree_skb(skb); 7012 goto exit; 7013 } 7014 7015 if ((test_bit(ATH12K_FLAG_CAC_RUNNING, &ar->dev_flags)) || 7016 (rx_ev.status & (WMI_RX_STATUS_ERR_DECRYPT | 7017 WMI_RX_STATUS_ERR_KEY_CACHE_MISS | 7018 WMI_RX_STATUS_ERR_CRC))) { 7019 dev_kfree_skb(skb); 7020 goto exit; 7021 } 7022 7023 if (rx_ev.status & WMI_RX_STATUS_ERR_MIC) 7024 status->flag |= RX_FLAG_MMIC_ERROR; 7025 7026 if (rx_ev.chan_freq >= ATH12K_MIN_6GHZ_FREQ && 7027 rx_ev.chan_freq <= ATH12K_MAX_6GHZ_FREQ) { 7028 status->band = NL80211_BAND_6GHZ; 7029 status->freq = rx_ev.chan_freq; 7030 } else if (rx_ev.channel >= 1 && rx_ev.channel <= 14) { 7031 status->band = NL80211_BAND_2GHZ; 7032 } else if (rx_ev.channel >= 36 && rx_ev.channel <= ATH12K_MAX_5GHZ_CHAN) { 7033 status->band = NL80211_BAND_5GHZ; 7034 } else { 7035 /* Shouldn't happen unless list of advertised channels to 7036 * mac80211 has been changed. 7037 */ 7038 WARN_ON_ONCE(1); 7039 dev_kfree_skb(skb); 7040 goto exit; 7041 } 7042 7043 if (rx_ev.phy_mode == MODE_11B && 7044 (status->band == NL80211_BAND_5GHZ || status->band == NL80211_BAND_6GHZ)) 7045 ath12k_dbg(ab, ATH12K_DBG_WMI, 7046 "wmi mgmt rx 11b (CCK) on 5/6GHz, band = %d\n", status->band); 7047 7048 sband = &ar->mac.sbands[status->band]; 7049 7050 if (status->band != NL80211_BAND_6GHZ) 7051 status->freq = ieee80211_channel_to_frequency(rx_ev.channel, 7052 status->band); 7053 7054 spin_lock_bh(&ar->data_lock); 7055 noise_floor = ath12k_pdev_get_noise_floor(ar); 7056 spin_unlock_bh(&ar->data_lock); 7057 7058 status->signal = rx_ev.snr + noise_floor; 7059 status->rate_idx = ath12k_mac_bitrate_to_idx(sband, rx_ev.rate / 100); 7060 7061 hdr = (struct ieee80211_hdr *)skb->data; 7062 fc = le16_to_cpu(hdr->frame_control); 7063 7064 /* Firmware is guaranteed to report all essential management frames via 7065 * WMI while it can deliver some extra via HTT. Since there can be 7066 * duplicates split the reporting wrt monitor/sniffing. 7067 */ 7068 status->flag |= RX_FLAG_SKIP_MONITOR; 7069 7070 /* In case of PMF, FW delivers decrypted frames with Protected Bit set 7071 * including group privacy action frames. 7072 */ 7073 if (ieee80211_has_protected(hdr->frame_control)) { 7074 status->flag |= RX_FLAG_DECRYPTED; 7075 7076 if (!ieee80211_is_robust_mgmt_frame(skb)) { 7077 status->flag |= RX_FLAG_IV_STRIPPED | 7078 RX_FLAG_MMIC_STRIPPED; 7079 hdr->frame_control = __cpu_to_le16(fc & 7080 ~IEEE80211_FCTL_PROTECTED); 7081 } 7082 } 7083 7084 if (ieee80211_is_beacon(hdr->frame_control)) 7085 ath12k_mac_handle_beacon(ar, skb); 7086 7087 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7088 "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 7089 skb, skb->len, 7090 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 7091 7092 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7093 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 7094 status->freq, status->band, status->signal, 7095 status->rate_idx); 7096 7097 ieee80211_rx_ni(ath12k_ar_to_hw(ar), skb); 7098 7099 exit: 7100 rcu_read_unlock(); 7101 } 7102 7103 static void ath12k_mgmt_tx_compl_event(struct ath12k_base *ab, struct sk_buff *skb) 7104 { 7105 struct wmi_mgmt_tx_compl_event tx_compl_param = {0}; 7106 struct ath12k *ar; 7107 7108 if (ath12k_pull_mgmt_tx_compl_param_tlv(ab, skb, &tx_compl_param) != 0) { 7109 ath12k_warn(ab, "failed to extract mgmt tx compl event"); 7110 return; 7111 } 7112 7113 rcu_read_lock(); 7114 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(tx_compl_param.pdev_id)); 7115 if (!ar) { 7116 ath12k_warn(ab, "invalid pdev id %d in mgmt_tx_compl_event\n", 7117 tx_compl_param.pdev_id); 7118 goto exit; 7119 } 7120 7121 wmi_process_mgmt_tx_comp(ar, le32_to_cpu(tx_compl_param.desc_id), 7122 le32_to_cpu(tx_compl_param.status)); 7123 7124 ath12k_dbg(ab, ATH12K_DBG_MGMT, 7125 "mgmt tx compl ev pdev_id %d, desc_id %d, status %d", 7126 tx_compl_param.pdev_id, tx_compl_param.desc_id, 7127 tx_compl_param.status); 7128 7129 exit: 7130 rcu_read_unlock(); 7131 } 7132 7133 static struct ath12k *ath12k_get_ar_on_scan_state(struct ath12k_base *ab, 7134 u32 vdev_id, 7135 enum ath12k_scan_state state) 7136 { 7137 int i; 7138 struct ath12k_pdev *pdev; 7139 struct ath12k *ar; 7140 7141 for (i = 0; i < ab->num_radios; i++) { 7142 pdev = rcu_dereference(ab->pdevs_active[i]); 7143 if (pdev && pdev->ar) { 7144 ar = pdev->ar; 7145 7146 spin_lock_bh(&ar->data_lock); 7147 if (ar->scan.state == state && 7148 ar->scan.arvif && 7149 ar->scan.arvif->vdev_id == vdev_id) { 7150 spin_unlock_bh(&ar->data_lock); 7151 return ar; 7152 } 7153 spin_unlock_bh(&ar->data_lock); 7154 } 7155 } 7156 return NULL; 7157 } 7158 7159 static void ath12k_scan_event(struct ath12k_base *ab, struct sk_buff *skb) 7160 { 7161 struct ath12k *ar; 7162 struct wmi_scan_event scan_ev = {0}; 7163 7164 if (ath12k_pull_scan_ev(ab, skb, &scan_ev) != 0) { 7165 ath12k_warn(ab, "failed to extract scan event"); 7166 return; 7167 } 7168 7169 rcu_read_lock(); 7170 7171 /* In case the scan was cancelled, ex. during interface teardown, 7172 * the interface will not be found in active interfaces. 7173 * Rather, in such scenarios, iterate over the active pdev's to 7174 * search 'ar' if the corresponding 'ar' scan is ABORTING and the 7175 * aborting scan's vdev id matches this event info. 7176 */ 7177 if (le32_to_cpu(scan_ev.event_type) == WMI_SCAN_EVENT_COMPLETED && 7178 le32_to_cpu(scan_ev.reason) == WMI_SCAN_REASON_CANCELLED) { 7179 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 7180 ATH12K_SCAN_ABORTING); 7181 if (!ar) 7182 ar = ath12k_get_ar_on_scan_state(ab, le32_to_cpu(scan_ev.vdev_id), 7183 ATH12K_SCAN_RUNNING); 7184 } else { 7185 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(scan_ev.vdev_id)); 7186 } 7187 7188 if (!ar) { 7189 ath12k_warn(ab, "Received scan event for unknown vdev"); 7190 rcu_read_unlock(); 7191 return; 7192 } 7193 7194 spin_lock_bh(&ar->data_lock); 7195 7196 ath12k_dbg(ab, ATH12K_DBG_WMI, 7197 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 7198 ath12k_wmi_event_scan_type_str(le32_to_cpu(scan_ev.event_type), 7199 le32_to_cpu(scan_ev.reason)), 7200 le32_to_cpu(scan_ev.event_type), 7201 le32_to_cpu(scan_ev.reason), 7202 le32_to_cpu(scan_ev.channel_freq), 7203 le32_to_cpu(scan_ev.scan_req_id), 7204 le32_to_cpu(scan_ev.scan_id), 7205 le32_to_cpu(scan_ev.vdev_id), 7206 ath12k_scan_state_str(ar->scan.state), ar->scan.state); 7207 7208 switch (le32_to_cpu(scan_ev.event_type)) { 7209 case WMI_SCAN_EVENT_STARTED: 7210 ath12k_wmi_event_scan_started(ar); 7211 break; 7212 case WMI_SCAN_EVENT_COMPLETED: 7213 ath12k_wmi_event_scan_completed(ar); 7214 break; 7215 case WMI_SCAN_EVENT_BSS_CHANNEL: 7216 ath12k_wmi_event_scan_bss_chan(ar); 7217 break; 7218 case WMI_SCAN_EVENT_FOREIGN_CHAN: 7219 ath12k_wmi_event_scan_foreign_chan(ar, le32_to_cpu(scan_ev.channel_freq)); 7220 break; 7221 case WMI_SCAN_EVENT_START_FAILED: 7222 ath12k_warn(ab, "received scan start failure event\n"); 7223 ath12k_wmi_event_scan_start_failed(ar); 7224 break; 7225 case WMI_SCAN_EVENT_DEQUEUED: 7226 __ath12k_mac_scan_finish(ar); 7227 break; 7228 case WMI_SCAN_EVENT_PREEMPTED: 7229 case WMI_SCAN_EVENT_RESTARTED: 7230 case WMI_SCAN_EVENT_FOREIGN_CHAN_EXIT: 7231 default: 7232 break; 7233 } 7234 7235 spin_unlock_bh(&ar->data_lock); 7236 7237 rcu_read_unlock(); 7238 } 7239 7240 static void ath12k_peer_sta_kickout_event(struct ath12k_base *ab, struct sk_buff *skb) 7241 { 7242 struct wmi_peer_sta_kickout_arg arg = {}; 7243 struct ieee80211_sta *sta; 7244 struct ath12k_peer *peer; 7245 struct ath12k *ar; 7246 7247 if (ath12k_pull_peer_sta_kickout_ev(ab, skb, &arg) != 0) { 7248 ath12k_warn(ab, "failed to extract peer sta kickout event"); 7249 return; 7250 } 7251 7252 rcu_read_lock(); 7253 7254 spin_lock_bh(&ab->base_lock); 7255 7256 peer = ath12k_peer_find_by_addr(ab, arg.mac_addr); 7257 7258 if (!peer) { 7259 ath12k_warn(ab, "peer not found %pM\n", 7260 arg.mac_addr); 7261 goto exit; 7262 } 7263 7264 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer->vdev_id); 7265 if (!ar) { 7266 ath12k_warn(ab, "invalid vdev id in peer sta kickout ev %d", 7267 peer->vdev_id); 7268 goto exit; 7269 } 7270 7271 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar), 7272 arg.mac_addr, NULL); 7273 if (!sta) { 7274 ath12k_warn(ab, "Spurious quick kickout for STA %pM\n", 7275 arg.mac_addr); 7276 goto exit; 7277 } 7278 7279 ath12k_dbg(ab, ATH12K_DBG_WMI, "peer sta kickout event %pM", 7280 arg.mac_addr); 7281 7282 ieee80211_report_low_ack(sta, 10); 7283 7284 exit: 7285 spin_unlock_bh(&ab->base_lock); 7286 rcu_read_unlock(); 7287 } 7288 7289 static void ath12k_roam_event(struct ath12k_base *ab, struct sk_buff *skb) 7290 { 7291 struct wmi_roam_event roam_ev = {}; 7292 struct ath12k *ar; 7293 u32 vdev_id; 7294 u8 roam_reason; 7295 7296 if (ath12k_pull_roam_ev(ab, skb, &roam_ev) != 0) { 7297 ath12k_warn(ab, "failed to extract roam event"); 7298 return; 7299 } 7300 7301 vdev_id = le32_to_cpu(roam_ev.vdev_id); 7302 roam_reason = u32_get_bits(le32_to_cpu(roam_ev.reason), 7303 WMI_ROAM_REASON_MASK); 7304 7305 ath12k_dbg(ab, ATH12K_DBG_WMI, 7306 "wmi roam event vdev %u reason %d rssi %d\n", 7307 vdev_id, roam_reason, roam_ev.rssi); 7308 7309 rcu_read_lock(); 7310 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 7311 if (!ar) { 7312 ath12k_warn(ab, "invalid vdev id in roam ev %d", vdev_id); 7313 rcu_read_unlock(); 7314 return; 7315 } 7316 7317 if (roam_reason >= WMI_ROAM_REASON_MAX) 7318 ath12k_warn(ab, "ignoring unknown roam event reason %d on vdev %i\n", 7319 roam_reason, vdev_id); 7320 7321 switch (roam_reason) { 7322 case WMI_ROAM_REASON_BEACON_MISS: 7323 ath12k_mac_handle_beacon_miss(ar, vdev_id); 7324 break; 7325 case WMI_ROAM_REASON_BETTER_AP: 7326 case WMI_ROAM_REASON_LOW_RSSI: 7327 case WMI_ROAM_REASON_SUITABLE_AP_FOUND: 7328 case WMI_ROAM_REASON_HO_FAILED: 7329 ath12k_warn(ab, "ignoring not implemented roam event reason %d on vdev %i\n", 7330 roam_reason, vdev_id); 7331 break; 7332 } 7333 7334 rcu_read_unlock(); 7335 } 7336 7337 static void ath12k_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 7338 { 7339 struct wmi_chan_info_event ch_info_ev = {0}; 7340 struct ath12k *ar; 7341 struct survey_info *survey; 7342 int idx; 7343 /* HW channel counters frequency value in hertz */ 7344 u32 cc_freq_hz = ab->cc_freq_hz; 7345 7346 if (ath12k_pull_chan_info_ev(ab, skb, &ch_info_ev) != 0) { 7347 ath12k_warn(ab, "failed to extract chan info event"); 7348 return; 7349 } 7350 7351 ath12k_dbg(ab, ATH12K_DBG_WMI, 7352 "chan info vdev_id %d err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d mac_clk_mhz %d\n", 7353 ch_info_ev.vdev_id, ch_info_ev.err_code, ch_info_ev.freq, 7354 ch_info_ev.cmd_flags, ch_info_ev.noise_floor, 7355 ch_info_ev.rx_clear_count, ch_info_ev.cycle_count, 7356 ch_info_ev.mac_clk_mhz); 7357 7358 if (le32_to_cpu(ch_info_ev.cmd_flags) == WMI_CHAN_INFO_END_RESP) { 7359 ath12k_dbg(ab, ATH12K_DBG_WMI, "chan info report completed\n"); 7360 return; 7361 } 7362 7363 rcu_read_lock(); 7364 ar = ath12k_mac_get_ar_by_vdev_id(ab, le32_to_cpu(ch_info_ev.vdev_id)); 7365 if (!ar) { 7366 ath12k_warn(ab, "invalid vdev id in chan info ev %d", 7367 ch_info_ev.vdev_id); 7368 rcu_read_unlock(); 7369 return; 7370 } 7371 spin_lock_bh(&ar->data_lock); 7372 7373 switch (ar->scan.state) { 7374 case ATH12K_SCAN_IDLE: 7375 case ATH12K_SCAN_STARTING: 7376 ath12k_warn(ab, "received chan info event without a scan request, ignoring\n"); 7377 goto exit; 7378 case ATH12K_SCAN_RUNNING: 7379 case ATH12K_SCAN_ABORTING: 7380 break; 7381 } 7382 7383 idx = freq_to_idx(ar, le32_to_cpu(ch_info_ev.freq)); 7384 if (idx >= ARRAY_SIZE(ar->survey)) { 7385 ath12k_warn(ab, "chan info: invalid frequency %d (idx %d out of bounds)\n", 7386 ch_info_ev.freq, idx); 7387 goto exit; 7388 } 7389 7390 /* If FW provides MAC clock frequency in Mhz, overriding the initialized 7391 * HW channel counters frequency value 7392 */ 7393 if (ch_info_ev.mac_clk_mhz) 7394 cc_freq_hz = (le32_to_cpu(ch_info_ev.mac_clk_mhz) * 1000); 7395 7396 if (ch_info_ev.cmd_flags == WMI_CHAN_INFO_START_RESP) { 7397 survey = &ar->survey[idx]; 7398 memset(survey, 0, sizeof(*survey)); 7399 survey->noise = le32_to_cpu(ch_info_ev.noise_floor); 7400 survey->filled = SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME | 7401 SURVEY_INFO_TIME_BUSY; 7402 survey->time = div_u64(le32_to_cpu(ch_info_ev.cycle_count), cc_freq_hz); 7403 survey->time_busy = div_u64(le32_to_cpu(ch_info_ev.rx_clear_count), 7404 cc_freq_hz); 7405 } 7406 exit: 7407 spin_unlock_bh(&ar->data_lock); 7408 rcu_read_unlock(); 7409 } 7410 7411 static void 7412 ath12k_pdev_bss_chan_info_event(struct ath12k_base *ab, struct sk_buff *skb) 7413 { 7414 struct wmi_pdev_bss_chan_info_event bss_ch_info_ev = {}; 7415 struct survey_info *survey; 7416 struct ath12k *ar; 7417 u32 cc_freq_hz = ab->cc_freq_hz; 7418 u64 busy, total, tx, rx, rx_bss; 7419 int idx; 7420 7421 if (ath12k_pull_pdev_bss_chan_info_ev(ab, skb, &bss_ch_info_ev) != 0) { 7422 ath12k_warn(ab, "failed to extract pdev bss chan info event"); 7423 return; 7424 } 7425 7426 busy = (u64)(le32_to_cpu(bss_ch_info_ev.rx_clear_count_high)) << 32 | 7427 le32_to_cpu(bss_ch_info_ev.rx_clear_count_low); 7428 7429 total = (u64)(le32_to_cpu(bss_ch_info_ev.cycle_count_high)) << 32 | 7430 le32_to_cpu(bss_ch_info_ev.cycle_count_low); 7431 7432 tx = (u64)(le32_to_cpu(bss_ch_info_ev.tx_cycle_count_high)) << 32 | 7433 le32_to_cpu(bss_ch_info_ev.tx_cycle_count_low); 7434 7435 rx = (u64)(le32_to_cpu(bss_ch_info_ev.rx_cycle_count_high)) << 32 | 7436 le32_to_cpu(bss_ch_info_ev.rx_cycle_count_low); 7437 7438 rx_bss = (u64)(le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_high)) << 32 | 7439 le32_to_cpu(bss_ch_info_ev.rx_bss_cycle_count_low); 7440 7441 ath12k_dbg(ab, ATH12K_DBG_WMI, 7442 "pdev bss chan info:\n pdev_id: %d freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n", 7443 bss_ch_info_ev.pdev_id, bss_ch_info_ev.freq, 7444 bss_ch_info_ev.noise_floor, busy, total, 7445 tx, rx, rx_bss); 7446 7447 rcu_read_lock(); 7448 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(bss_ch_info_ev.pdev_id)); 7449 7450 if (!ar) { 7451 ath12k_warn(ab, "invalid pdev id %d in bss_chan_info event\n", 7452 bss_ch_info_ev.pdev_id); 7453 rcu_read_unlock(); 7454 return; 7455 } 7456 7457 spin_lock_bh(&ar->data_lock); 7458 idx = freq_to_idx(ar, le32_to_cpu(bss_ch_info_ev.freq)); 7459 if (idx >= ARRAY_SIZE(ar->survey)) { 7460 ath12k_warn(ab, "bss chan info: invalid frequency %d (idx %d out of bounds)\n", 7461 bss_ch_info_ev.freq, idx); 7462 goto exit; 7463 } 7464 7465 survey = &ar->survey[idx]; 7466 7467 survey->noise = le32_to_cpu(bss_ch_info_ev.noise_floor); 7468 survey->time = div_u64(total, cc_freq_hz); 7469 survey->time_busy = div_u64(busy, cc_freq_hz); 7470 survey->time_rx = div_u64(rx_bss, cc_freq_hz); 7471 survey->time_tx = div_u64(tx, cc_freq_hz); 7472 survey->filled |= (SURVEY_INFO_NOISE_DBM | 7473 SURVEY_INFO_TIME | 7474 SURVEY_INFO_TIME_BUSY | 7475 SURVEY_INFO_TIME_RX | 7476 SURVEY_INFO_TIME_TX); 7477 exit: 7478 spin_unlock_bh(&ar->data_lock); 7479 complete(&ar->bss_survey_done); 7480 7481 rcu_read_unlock(); 7482 } 7483 7484 static void ath12k_vdev_install_key_compl_event(struct ath12k_base *ab, 7485 struct sk_buff *skb) 7486 { 7487 struct wmi_vdev_install_key_complete_arg install_key_compl = {0}; 7488 struct ath12k *ar; 7489 7490 if (ath12k_pull_vdev_install_key_compl_ev(ab, skb, &install_key_compl) != 0) { 7491 ath12k_warn(ab, "failed to extract install key compl event"); 7492 return; 7493 } 7494 7495 ath12k_dbg(ab, ATH12K_DBG_WMI, 7496 "vdev install key ev idx %d flags %08x macaddr %pM status %d\n", 7497 install_key_compl.key_idx, install_key_compl.key_flags, 7498 install_key_compl.macaddr, install_key_compl.status); 7499 7500 rcu_read_lock(); 7501 ar = ath12k_mac_get_ar_by_vdev_id(ab, install_key_compl.vdev_id); 7502 if (!ar) { 7503 ath12k_warn(ab, "invalid vdev id in install key compl ev %d", 7504 install_key_compl.vdev_id); 7505 rcu_read_unlock(); 7506 return; 7507 } 7508 7509 ar->install_key_status = 0; 7510 7511 if (install_key_compl.status != WMI_VDEV_INSTALL_KEY_COMPL_STATUS_SUCCESS) { 7512 ath12k_warn(ab, "install key failed for %pM status %d\n", 7513 install_key_compl.macaddr, install_key_compl.status); 7514 ar->install_key_status = install_key_compl.status; 7515 } 7516 7517 complete(&ar->install_key_done); 7518 rcu_read_unlock(); 7519 } 7520 7521 static int ath12k_wmi_tlv_services_parser(struct ath12k_base *ab, 7522 u16 tag, u16 len, 7523 const void *ptr, 7524 void *data) 7525 { 7526 const struct wmi_service_available_event *ev; 7527 u32 *wmi_ext2_service_bitmap; 7528 int i, j; 7529 u16 expected_len; 7530 7531 expected_len = WMI_SERVICE_SEGMENT_BM_SIZE32 * sizeof(u32); 7532 if (len < expected_len) { 7533 ath12k_warn(ab, "invalid length %d for the WMI services available tag 0x%x\n", 7534 len, tag); 7535 return -EINVAL; 7536 } 7537 7538 switch (tag) { 7539 case WMI_TAG_SERVICE_AVAILABLE_EVENT: 7540 ev = (struct wmi_service_available_event *)ptr; 7541 for (i = 0, j = WMI_MAX_SERVICE; 7542 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT_SERVICE; 7543 i++) { 7544 do { 7545 if (le32_to_cpu(ev->wmi_service_segment_bitmap[i]) & 7546 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 7547 set_bit(j, ab->wmi_ab.svc_map); 7548 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 7549 } 7550 7551 ath12k_dbg(ab, ATH12K_DBG_WMI, 7552 "wmi_ext_service_bitmap 0x%x 0x%x 0x%x 0x%x", 7553 ev->wmi_service_segment_bitmap[0], 7554 ev->wmi_service_segment_bitmap[1], 7555 ev->wmi_service_segment_bitmap[2], 7556 ev->wmi_service_segment_bitmap[3]); 7557 break; 7558 case WMI_TAG_ARRAY_UINT32: 7559 wmi_ext2_service_bitmap = (u32 *)ptr; 7560 for (i = 0, j = WMI_MAX_EXT_SERVICE; 7561 i < WMI_SERVICE_SEGMENT_BM_SIZE32 && j < WMI_MAX_EXT2_SERVICE; 7562 i++) { 7563 do { 7564 if (wmi_ext2_service_bitmap[i] & 7565 BIT(j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32)) 7566 set_bit(j, ab->wmi_ab.svc_map); 7567 } while (++j % WMI_AVAIL_SERVICE_BITS_IN_SIZE32); 7568 } 7569 7570 ath12k_dbg(ab, ATH12K_DBG_WMI, 7571 "wmi_ext2_service_bitmap 0x%04x 0x%04x 0x%04x 0x%04x", 7572 wmi_ext2_service_bitmap[0], wmi_ext2_service_bitmap[1], 7573 wmi_ext2_service_bitmap[2], wmi_ext2_service_bitmap[3]); 7574 break; 7575 } 7576 return 0; 7577 } 7578 7579 static int ath12k_service_available_event(struct ath12k_base *ab, struct sk_buff *skb) 7580 { 7581 int ret; 7582 7583 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 7584 ath12k_wmi_tlv_services_parser, 7585 NULL); 7586 return ret; 7587 } 7588 7589 static void ath12k_peer_assoc_conf_event(struct ath12k_base *ab, struct sk_buff *skb) 7590 { 7591 struct wmi_peer_assoc_conf_arg peer_assoc_conf = {0}; 7592 struct ath12k *ar; 7593 7594 if (ath12k_pull_peer_assoc_conf_ev(ab, skb, &peer_assoc_conf) != 0) { 7595 ath12k_warn(ab, "failed to extract peer assoc conf event"); 7596 return; 7597 } 7598 7599 ath12k_dbg(ab, ATH12K_DBG_WMI, 7600 "peer assoc conf ev vdev id %d macaddr %pM\n", 7601 peer_assoc_conf.vdev_id, peer_assoc_conf.macaddr); 7602 7603 rcu_read_lock(); 7604 ar = ath12k_mac_get_ar_by_vdev_id(ab, peer_assoc_conf.vdev_id); 7605 7606 if (!ar) { 7607 ath12k_warn(ab, "invalid vdev id in peer assoc conf ev %d", 7608 peer_assoc_conf.vdev_id); 7609 rcu_read_unlock(); 7610 return; 7611 } 7612 7613 complete(&ar->peer_assoc_done); 7614 rcu_read_unlock(); 7615 } 7616 7617 static void 7618 ath12k_wmi_fw_vdev_stats_dump(struct ath12k *ar, 7619 struct ath12k_fw_stats *fw_stats, 7620 char *buf, u32 *length) 7621 { 7622 const struct ath12k_fw_stats_vdev *vdev; 7623 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7624 struct ath12k_link_vif *arvif; 7625 u32 len = *length; 7626 u8 *vif_macaddr; 7627 int i; 7628 7629 len += scnprintf(buf + len, buf_len - len, "\n"); 7630 len += scnprintf(buf + len, buf_len - len, "%30s\n", 7631 "ath12k VDEV stats"); 7632 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7633 "================="); 7634 7635 list_for_each_entry(vdev, &fw_stats->vdevs, list) { 7636 arvif = ath12k_mac_get_arvif(ar, vdev->vdev_id); 7637 if (!arvif) 7638 continue; 7639 vif_macaddr = arvif->ahvif->vif->addr; 7640 7641 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7642 "VDEV ID", vdev->vdev_id); 7643 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", 7644 "VDEV MAC address", vif_macaddr); 7645 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7646 "beacon snr", vdev->beacon_snr); 7647 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7648 "data snr", vdev->data_snr); 7649 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7650 "num rx frames", vdev->num_rx_frames); 7651 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7652 "num rts fail", vdev->num_rts_fail); 7653 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7654 "num rts success", vdev->num_rts_success); 7655 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7656 "num rx err", vdev->num_rx_err); 7657 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7658 "num rx discard", vdev->num_rx_discard); 7659 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7660 "num tx not acked", vdev->num_tx_not_acked); 7661 7662 for (i = 0 ; i < WLAN_MAX_AC; i++) 7663 len += scnprintf(buf + len, buf_len - len, 7664 "%25s [%02d] %u\n", 7665 "num tx frames", i, 7666 vdev->num_tx_frames[i]); 7667 7668 for (i = 0 ; i < WLAN_MAX_AC; i++) 7669 len += scnprintf(buf + len, buf_len - len, 7670 "%25s [%02d] %u\n", 7671 "num tx frames retries", i, 7672 vdev->num_tx_frames_retries[i]); 7673 7674 for (i = 0 ; i < WLAN_MAX_AC; i++) 7675 len += scnprintf(buf + len, buf_len - len, 7676 "%25s [%02d] %u\n", 7677 "num tx frames failures", i, 7678 vdev->num_tx_frames_failures[i]); 7679 7680 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++) 7681 len += scnprintf(buf + len, buf_len - len, 7682 "%25s [%02d] 0x%08x\n", 7683 "tx rate history", i, 7684 vdev->tx_rate_history[i]); 7685 for (i = 0 ; i < MAX_TX_RATE_VALUES; i++) 7686 len += scnprintf(buf + len, buf_len - len, 7687 "%25s [%02d] %u\n", 7688 "beacon rssi history", i, 7689 vdev->beacon_rssi_history[i]); 7690 7691 len += scnprintf(buf + len, buf_len - len, "\n"); 7692 *length = len; 7693 } 7694 } 7695 7696 static void 7697 ath12k_wmi_fw_bcn_stats_dump(struct ath12k *ar, 7698 struct ath12k_fw_stats *fw_stats, 7699 char *buf, u32 *length) 7700 { 7701 const struct ath12k_fw_stats_bcn *bcn; 7702 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7703 struct ath12k_link_vif *arvif; 7704 u32 len = *length; 7705 size_t num_bcn; 7706 7707 num_bcn = list_count_nodes(&fw_stats->bcn); 7708 7709 len += scnprintf(buf + len, buf_len - len, "\n"); 7710 len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n", 7711 "ath12k Beacon stats", num_bcn); 7712 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7713 "==================="); 7714 7715 list_for_each_entry(bcn, &fw_stats->bcn, list) { 7716 arvif = ath12k_mac_get_arvif(ar, bcn->vdev_id); 7717 if (!arvif) 7718 continue; 7719 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7720 "VDEV ID", bcn->vdev_id); 7721 len += scnprintf(buf + len, buf_len - len, "%30s %pM\n", 7722 "VDEV MAC address", arvif->ahvif->vif->addr); 7723 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7724 "================"); 7725 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7726 "Num of beacon tx success", bcn->tx_bcn_succ_cnt); 7727 len += scnprintf(buf + len, buf_len - len, "%30s %u\n", 7728 "Num of beacon tx failures", bcn->tx_bcn_outage_cnt); 7729 7730 len += scnprintf(buf + len, buf_len - len, "\n"); 7731 *length = len; 7732 } 7733 } 7734 7735 static void 7736 ath12k_wmi_fw_pdev_base_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 7737 char *buf, u32 *length, u64 fw_soc_drop_cnt) 7738 { 7739 u32 len = *length; 7740 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7741 7742 len = scnprintf(buf + len, buf_len - len, "\n"); 7743 len += scnprintf(buf + len, buf_len - len, "%30s\n", 7744 "ath12k PDEV stats"); 7745 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7746 "================="); 7747 7748 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7749 "Channel noise floor", pdev->ch_noise_floor); 7750 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7751 "Channel TX power", pdev->chan_tx_power); 7752 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7753 "TX frame count", pdev->tx_frame_count); 7754 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7755 "RX frame count", pdev->rx_frame_count); 7756 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7757 "RX clear count", pdev->rx_clear_count); 7758 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7759 "Cycle count", pdev->cycle_count); 7760 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7761 "PHY error count", pdev->phy_err_count); 7762 len += scnprintf(buf + len, buf_len - len, "%30s %10llu\n", 7763 "soc drop count", fw_soc_drop_cnt); 7764 7765 *length = len; 7766 } 7767 7768 static void 7769 ath12k_wmi_fw_pdev_tx_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 7770 char *buf, u32 *length) 7771 { 7772 u32 len = *length; 7773 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7774 7775 len += scnprintf(buf + len, buf_len - len, "\n%30s\n", 7776 "ath12k PDEV TX stats"); 7777 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7778 "===================="); 7779 7780 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7781 "HTT cookies queued", pdev->comp_queued); 7782 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7783 "HTT cookies disp.", pdev->comp_delivered); 7784 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7785 "MSDU queued", pdev->msdu_enqued); 7786 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7787 "MPDU queued", pdev->mpdu_enqued); 7788 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7789 "MSDUs dropped", pdev->wmm_drop); 7790 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7791 "Local enqued", pdev->local_enqued); 7792 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7793 "Local freed", pdev->local_freed); 7794 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7795 "HW queued", pdev->hw_queued); 7796 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7797 "PPDUs reaped", pdev->hw_reaped); 7798 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7799 "Num underruns", pdev->underrun); 7800 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7801 "PPDUs cleaned", pdev->tx_abort); 7802 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7803 "MPDUs requeued", pdev->mpdus_requed); 7804 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7805 "Excessive retries", pdev->tx_ko); 7806 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7807 "HW rate", pdev->data_rc); 7808 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7809 "Sched self triggers", pdev->self_triggers); 7810 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7811 "Dropped due to SW retries", 7812 pdev->sw_retry_failure); 7813 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7814 "Illegal rate phy errors", 7815 pdev->illgl_rate_phy_err); 7816 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7817 "PDEV continuous xretry", pdev->pdev_cont_xretry); 7818 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7819 "TX timeout", pdev->pdev_tx_timeout); 7820 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7821 "PDEV resets", pdev->pdev_resets); 7822 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7823 "Stateless TIDs alloc failures", 7824 pdev->stateless_tid_alloc_failure); 7825 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7826 "PHY underrun", pdev->phy_underrun); 7827 len += scnprintf(buf + len, buf_len - len, "%30s %10u\n", 7828 "MPDU is more than txop limit", pdev->txop_ovf); 7829 *length = len; 7830 } 7831 7832 static void 7833 ath12k_wmi_fw_pdev_rx_stats_dump(const struct ath12k_fw_stats_pdev *pdev, 7834 char *buf, u32 *length) 7835 { 7836 u32 len = *length; 7837 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7838 7839 len += scnprintf(buf + len, buf_len - len, "\n%30s\n", 7840 "ath12k PDEV RX stats"); 7841 len += scnprintf(buf + len, buf_len - len, "%30s\n\n", 7842 "===================="); 7843 7844 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7845 "Mid PPDU route change", 7846 pdev->mid_ppdu_route_change); 7847 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7848 "Tot. number of statuses", pdev->status_rcvd); 7849 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7850 "Extra frags on rings 0", pdev->r0_frags); 7851 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7852 "Extra frags on rings 1", pdev->r1_frags); 7853 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7854 "Extra frags on rings 2", pdev->r2_frags); 7855 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7856 "Extra frags on rings 3", pdev->r3_frags); 7857 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7858 "MSDUs delivered to HTT", pdev->htt_msdus); 7859 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7860 "MPDUs delivered to HTT", pdev->htt_mpdus); 7861 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7862 "MSDUs delivered to stack", pdev->loc_msdus); 7863 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7864 "MPDUs delivered to stack", pdev->loc_mpdus); 7865 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7866 "Oversized AMSUs", pdev->oversize_amsdu); 7867 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7868 "PHY errors", pdev->phy_errs); 7869 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7870 "PHY errors drops", pdev->phy_err_drop); 7871 len += scnprintf(buf + len, buf_len - len, "%30s %10d\n", 7872 "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs); 7873 *length = len; 7874 } 7875 7876 static void 7877 ath12k_wmi_fw_pdev_stats_dump(struct ath12k *ar, 7878 struct ath12k_fw_stats *fw_stats, 7879 char *buf, u32 *length) 7880 { 7881 const struct ath12k_fw_stats_pdev *pdev; 7882 u32 len = *length; 7883 7884 pdev = list_first_entry_or_null(&fw_stats->pdevs, 7885 struct ath12k_fw_stats_pdev, list); 7886 if (!pdev) { 7887 ath12k_warn(ar->ab, "failed to get pdev stats\n"); 7888 return; 7889 } 7890 7891 ath12k_wmi_fw_pdev_base_stats_dump(pdev, buf, &len, 7892 ar->ab->fw_soc_drop_count); 7893 ath12k_wmi_fw_pdev_tx_stats_dump(pdev, buf, &len); 7894 ath12k_wmi_fw_pdev_rx_stats_dump(pdev, buf, &len); 7895 7896 *length = len; 7897 } 7898 7899 void ath12k_wmi_fw_stats_dump(struct ath12k *ar, 7900 struct ath12k_fw_stats *fw_stats, 7901 u32 stats_id, char *buf) 7902 { 7903 u32 len = 0; 7904 u32 buf_len = ATH12K_FW_STATS_BUF_SIZE; 7905 7906 spin_lock_bh(&ar->data_lock); 7907 7908 switch (stats_id) { 7909 case WMI_REQUEST_VDEV_STAT: 7910 ath12k_wmi_fw_vdev_stats_dump(ar, fw_stats, buf, &len); 7911 break; 7912 case WMI_REQUEST_BCN_STAT: 7913 ath12k_wmi_fw_bcn_stats_dump(ar, fw_stats, buf, &len); 7914 break; 7915 case WMI_REQUEST_PDEV_STAT: 7916 ath12k_wmi_fw_pdev_stats_dump(ar, fw_stats, buf, &len); 7917 break; 7918 default: 7919 break; 7920 } 7921 7922 spin_unlock_bh(&ar->data_lock); 7923 7924 if (len >= buf_len) 7925 buf[len - 1] = 0; 7926 else 7927 buf[len] = 0; 7928 7929 ath12k_fw_stats_reset(ar); 7930 } 7931 7932 static void 7933 ath12k_wmi_pull_vdev_stats(const struct wmi_vdev_stats_params *src, 7934 struct ath12k_fw_stats_vdev *dst) 7935 { 7936 int i; 7937 7938 dst->vdev_id = le32_to_cpu(src->vdev_id); 7939 dst->beacon_snr = le32_to_cpu(src->beacon_snr); 7940 dst->data_snr = le32_to_cpu(src->data_snr); 7941 dst->num_rx_frames = le32_to_cpu(src->num_rx_frames); 7942 dst->num_rts_fail = le32_to_cpu(src->num_rts_fail); 7943 dst->num_rts_success = le32_to_cpu(src->num_rts_success); 7944 dst->num_rx_err = le32_to_cpu(src->num_rx_err); 7945 dst->num_rx_discard = le32_to_cpu(src->num_rx_discard); 7946 dst->num_tx_not_acked = le32_to_cpu(src->num_tx_not_acked); 7947 7948 for (i = 0; i < WLAN_MAX_AC; i++) 7949 dst->num_tx_frames[i] = 7950 le32_to_cpu(src->num_tx_frames[i]); 7951 7952 for (i = 0; i < WLAN_MAX_AC; i++) 7953 dst->num_tx_frames_retries[i] = 7954 le32_to_cpu(src->num_tx_frames_retries[i]); 7955 7956 for (i = 0; i < WLAN_MAX_AC; i++) 7957 dst->num_tx_frames_failures[i] = 7958 le32_to_cpu(src->num_tx_frames_failures[i]); 7959 7960 for (i = 0; i < MAX_TX_RATE_VALUES; i++) 7961 dst->tx_rate_history[i] = 7962 le32_to_cpu(src->tx_rate_history[i]); 7963 7964 for (i = 0; i < MAX_TX_RATE_VALUES; i++) 7965 dst->beacon_rssi_history[i] = 7966 le32_to_cpu(src->beacon_rssi_history[i]); 7967 } 7968 7969 static void 7970 ath12k_wmi_pull_bcn_stats(const struct ath12k_wmi_bcn_stats_params *src, 7971 struct ath12k_fw_stats_bcn *dst) 7972 { 7973 dst->vdev_id = le32_to_cpu(src->vdev_id); 7974 dst->tx_bcn_succ_cnt = le32_to_cpu(src->tx_bcn_succ_cnt); 7975 dst->tx_bcn_outage_cnt = le32_to_cpu(src->tx_bcn_outage_cnt); 7976 } 7977 7978 static void 7979 ath12k_wmi_pull_pdev_stats_base(const struct ath12k_wmi_pdev_base_stats_params *src, 7980 struct ath12k_fw_stats_pdev *dst) 7981 { 7982 dst->ch_noise_floor = a_sle32_to_cpu(src->chan_nf); 7983 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); 7984 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); 7985 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); 7986 dst->cycle_count = __le32_to_cpu(src->cycle_count); 7987 dst->phy_err_count = __le32_to_cpu(src->phy_err_count); 7988 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); 7989 } 7990 7991 static void 7992 ath12k_wmi_pull_pdev_stats_tx(const struct ath12k_wmi_pdev_tx_stats_params *src, 7993 struct ath12k_fw_stats_pdev *dst) 7994 { 7995 dst->comp_queued = a_sle32_to_cpu(src->comp_queued); 7996 dst->comp_delivered = a_sle32_to_cpu(src->comp_delivered); 7997 dst->msdu_enqued = a_sle32_to_cpu(src->msdu_enqued); 7998 dst->mpdu_enqued = a_sle32_to_cpu(src->mpdu_enqued); 7999 dst->wmm_drop = a_sle32_to_cpu(src->wmm_drop); 8000 dst->local_enqued = a_sle32_to_cpu(src->local_enqued); 8001 dst->local_freed = a_sle32_to_cpu(src->local_freed); 8002 dst->hw_queued = a_sle32_to_cpu(src->hw_queued); 8003 dst->hw_reaped = a_sle32_to_cpu(src->hw_reaped); 8004 dst->underrun = a_sle32_to_cpu(src->underrun); 8005 dst->tx_abort = a_sle32_to_cpu(src->tx_abort); 8006 dst->mpdus_requed = a_sle32_to_cpu(src->mpdus_requed); 8007 dst->tx_ko = __le32_to_cpu(src->tx_ko); 8008 dst->data_rc = __le32_to_cpu(src->data_rc); 8009 dst->self_triggers = __le32_to_cpu(src->self_triggers); 8010 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); 8011 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); 8012 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); 8013 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); 8014 dst->pdev_resets = __le32_to_cpu(src->pdev_resets); 8015 dst->stateless_tid_alloc_failure = 8016 __le32_to_cpu(src->stateless_tid_alloc_failure); 8017 dst->phy_underrun = __le32_to_cpu(src->phy_underrun); 8018 dst->txop_ovf = __le32_to_cpu(src->txop_ovf); 8019 } 8020 8021 static void 8022 ath12k_wmi_pull_pdev_stats_rx(const struct ath12k_wmi_pdev_rx_stats_params *src, 8023 struct ath12k_fw_stats_pdev *dst) 8024 { 8025 dst->mid_ppdu_route_change = 8026 a_sle32_to_cpu(src->mid_ppdu_route_change); 8027 dst->status_rcvd = a_sle32_to_cpu(src->status_rcvd); 8028 dst->r0_frags = a_sle32_to_cpu(src->r0_frags); 8029 dst->r1_frags = a_sle32_to_cpu(src->r1_frags); 8030 dst->r2_frags = a_sle32_to_cpu(src->r2_frags); 8031 dst->r3_frags = a_sle32_to_cpu(src->r3_frags); 8032 dst->htt_msdus = a_sle32_to_cpu(src->htt_msdus); 8033 dst->htt_mpdus = a_sle32_to_cpu(src->htt_mpdus); 8034 dst->loc_msdus = a_sle32_to_cpu(src->loc_msdus); 8035 dst->loc_mpdus = a_sle32_to_cpu(src->loc_mpdus); 8036 dst->oversize_amsdu = a_sle32_to_cpu(src->oversize_amsdu); 8037 dst->phy_errs = a_sle32_to_cpu(src->phy_errs); 8038 dst->phy_err_drop = a_sle32_to_cpu(src->phy_err_drop); 8039 dst->mpdu_errs = a_sle32_to_cpu(src->mpdu_errs); 8040 } 8041 8042 static int ath12k_wmi_tlv_fw_stats_data_parse(struct ath12k_base *ab, 8043 struct wmi_tlv_fw_stats_parse *parse, 8044 const void *ptr, 8045 u16 len) 8046 { 8047 const struct wmi_stats_event *ev = parse->ev; 8048 struct ath12k_fw_stats *stats = parse->stats; 8049 struct ath12k *ar; 8050 struct ath12k_link_vif *arvif; 8051 struct ieee80211_sta *sta; 8052 struct ath12k_sta *ahsta; 8053 struct ath12k_link_sta *arsta; 8054 int i, ret = 0; 8055 const void *data = ptr; 8056 8057 if (!ev) { 8058 ath12k_warn(ab, "failed to fetch update stats ev"); 8059 return -EPROTO; 8060 } 8061 8062 if (!stats) 8063 return -EINVAL; 8064 8065 rcu_read_lock(); 8066 8067 stats->pdev_id = le32_to_cpu(ev->pdev_id); 8068 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats->pdev_id); 8069 if (!ar) { 8070 ath12k_warn(ab, "invalid pdev id %d in update stats event\n", 8071 le32_to_cpu(ev->pdev_id)); 8072 ret = -EPROTO; 8073 goto exit; 8074 } 8075 8076 for (i = 0; i < le32_to_cpu(ev->num_vdev_stats); i++) { 8077 const struct wmi_vdev_stats_params *src; 8078 struct ath12k_fw_stats_vdev *dst; 8079 8080 src = data; 8081 if (len < sizeof(*src)) { 8082 ret = -EPROTO; 8083 goto exit; 8084 } 8085 8086 arvif = ath12k_mac_get_arvif(ar, le32_to_cpu(src->vdev_id)); 8087 if (arvif) { 8088 sta = ieee80211_find_sta_by_ifaddr(ath12k_ar_to_hw(ar), 8089 arvif->bssid, 8090 NULL); 8091 if (sta) { 8092 ahsta = ath12k_sta_to_ahsta(sta); 8093 arsta = &ahsta->deflink; 8094 arsta->rssi_beacon = le32_to_cpu(src->beacon_snr); 8095 ath12k_dbg(ab, ATH12K_DBG_WMI, 8096 "wmi stats vdev id %d snr %d\n", 8097 src->vdev_id, src->beacon_snr); 8098 } else { 8099 ath12k_dbg(ab, ATH12K_DBG_WMI, 8100 "not found station bssid %pM for vdev stat\n", 8101 arvif->bssid); 8102 } 8103 } 8104 8105 data += sizeof(*src); 8106 len -= sizeof(*src); 8107 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 8108 if (!dst) 8109 continue; 8110 ath12k_wmi_pull_vdev_stats(src, dst); 8111 stats->stats_id = WMI_REQUEST_VDEV_STAT; 8112 list_add_tail(&dst->list, &stats->vdevs); 8113 } 8114 for (i = 0; i < le32_to_cpu(ev->num_bcn_stats); i++) { 8115 const struct ath12k_wmi_bcn_stats_params *src; 8116 struct ath12k_fw_stats_bcn *dst; 8117 8118 src = data; 8119 if (len < sizeof(*src)) { 8120 ret = -EPROTO; 8121 goto exit; 8122 } 8123 8124 data += sizeof(*src); 8125 len -= sizeof(*src); 8126 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 8127 if (!dst) 8128 continue; 8129 ath12k_wmi_pull_bcn_stats(src, dst); 8130 stats->stats_id = WMI_REQUEST_BCN_STAT; 8131 list_add_tail(&dst->list, &stats->bcn); 8132 } 8133 for (i = 0; i < le32_to_cpu(ev->num_pdev_stats); i++) { 8134 const struct ath12k_wmi_pdev_stats_params *src; 8135 struct ath12k_fw_stats_pdev *dst; 8136 8137 src = data; 8138 if (len < sizeof(*src)) { 8139 ret = -EPROTO; 8140 goto exit; 8141 } 8142 8143 stats->stats_id = WMI_REQUEST_PDEV_STAT; 8144 8145 data += sizeof(*src); 8146 len -= sizeof(*src); 8147 8148 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 8149 if (!dst) 8150 continue; 8151 8152 ath12k_wmi_pull_pdev_stats_base(&src->base, dst); 8153 ath12k_wmi_pull_pdev_stats_tx(&src->tx, dst); 8154 ath12k_wmi_pull_pdev_stats_rx(&src->rx, dst); 8155 list_add_tail(&dst->list, &stats->pdevs); 8156 } 8157 8158 exit: 8159 rcu_read_unlock(); 8160 return ret; 8161 } 8162 8163 static int ath12k_wmi_tlv_fw_stats_parse(struct ath12k_base *ab, 8164 u16 tag, u16 len, 8165 const void *ptr, void *data) 8166 { 8167 struct wmi_tlv_fw_stats_parse *parse = data; 8168 int ret = 0; 8169 8170 switch (tag) { 8171 case WMI_TAG_STATS_EVENT: 8172 parse->ev = ptr; 8173 break; 8174 case WMI_TAG_ARRAY_BYTE: 8175 ret = ath12k_wmi_tlv_fw_stats_data_parse(ab, parse, ptr, len); 8176 break; 8177 default: 8178 break; 8179 } 8180 return ret; 8181 } 8182 8183 static int ath12k_wmi_pull_fw_stats(struct ath12k_base *ab, struct sk_buff *skb, 8184 struct ath12k_fw_stats *stats) 8185 { 8186 struct wmi_tlv_fw_stats_parse parse = {}; 8187 8188 stats->stats_id = 0; 8189 parse.stats = stats; 8190 8191 return ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 8192 ath12k_wmi_tlv_fw_stats_parse, 8193 &parse); 8194 } 8195 8196 static void ath12k_wmi_fw_stats_process(struct ath12k *ar, 8197 struct ath12k_fw_stats *stats) 8198 { 8199 struct ath12k_base *ab = ar->ab; 8200 struct ath12k_pdev *pdev; 8201 bool is_end = true; 8202 size_t total_vdevs_started = 0; 8203 int i; 8204 8205 if (stats->stats_id == WMI_REQUEST_VDEV_STAT) { 8206 if (list_empty(&stats->vdevs)) { 8207 ath12k_warn(ab, "empty vdev stats"); 8208 return; 8209 } 8210 /* FW sends all the active VDEV stats irrespective of PDEV, 8211 * hence limit until the count of all VDEVs started 8212 */ 8213 rcu_read_lock(); 8214 for (i = 0; i < ab->num_radios; i++) { 8215 pdev = rcu_dereference(ab->pdevs_active[i]); 8216 if (pdev && pdev->ar) 8217 total_vdevs_started += pdev->ar->num_started_vdevs; 8218 } 8219 rcu_read_unlock(); 8220 8221 if (total_vdevs_started) 8222 is_end = ((++ar->fw_stats.num_vdev_recvd) == 8223 total_vdevs_started); 8224 8225 list_splice_tail_init(&stats->vdevs, 8226 &ar->fw_stats.vdevs); 8227 8228 if (is_end) 8229 complete(&ar->fw_stats_done); 8230 8231 return; 8232 } 8233 8234 if (stats->stats_id == WMI_REQUEST_BCN_STAT) { 8235 if (list_empty(&stats->bcn)) { 8236 ath12k_warn(ab, "empty beacon stats"); 8237 return; 8238 } 8239 /* Mark end until we reached the count of all started VDEVs 8240 * within the PDEV 8241 */ 8242 if (ar->num_started_vdevs) 8243 is_end = ((++ar->fw_stats.num_bcn_recvd) == 8244 ar->num_started_vdevs); 8245 8246 list_splice_tail_init(&stats->bcn, 8247 &ar->fw_stats.bcn); 8248 8249 if (is_end) 8250 complete(&ar->fw_stats_done); 8251 } 8252 } 8253 8254 static void ath12k_update_stats_event(struct ath12k_base *ab, struct sk_buff *skb) 8255 { 8256 struct ath12k_fw_stats stats = {}; 8257 struct ath12k *ar; 8258 int ret; 8259 8260 INIT_LIST_HEAD(&stats.pdevs); 8261 INIT_LIST_HEAD(&stats.vdevs); 8262 INIT_LIST_HEAD(&stats.bcn); 8263 8264 ret = ath12k_wmi_pull_fw_stats(ab, skb, &stats); 8265 if (ret) { 8266 ath12k_warn(ab, "failed to pull fw stats: %d\n", ret); 8267 goto free; 8268 } 8269 8270 ath12k_dbg(ab, ATH12K_DBG_WMI, "event update stats"); 8271 8272 rcu_read_lock(); 8273 ar = ath12k_mac_get_ar_by_pdev_id(ab, stats.pdev_id); 8274 if (!ar) { 8275 rcu_read_unlock(); 8276 ath12k_warn(ab, "failed to get ar for pdev_id %d: %d\n", 8277 stats.pdev_id, ret); 8278 goto free; 8279 } 8280 8281 spin_lock_bh(&ar->data_lock); 8282 8283 /* Handle WMI_REQUEST_PDEV_STAT status update */ 8284 if (stats.stats_id == WMI_REQUEST_PDEV_STAT) { 8285 list_splice_tail_init(&stats.pdevs, &ar->fw_stats.pdevs); 8286 complete(&ar->fw_stats_done); 8287 goto complete; 8288 } 8289 8290 /* Handle WMI_REQUEST_VDEV_STAT and WMI_REQUEST_BCN_STAT updates. */ 8291 ath12k_wmi_fw_stats_process(ar, &stats); 8292 8293 complete: 8294 complete(&ar->fw_stats_complete); 8295 spin_unlock_bh(&ar->data_lock); 8296 rcu_read_unlock(); 8297 8298 /* Since the stats's pdev, vdev and beacon list are spliced and reinitialised 8299 * at this point, no need to free the individual list. 8300 */ 8301 return; 8302 8303 free: 8304 ath12k_fw_stats_free(&stats); 8305 } 8306 8307 /* PDEV_CTL_FAILSAFE_CHECK_EVENT is received from FW when the frequency scanned 8308 * is not part of BDF CTL(Conformance test limits) table entries. 8309 */ 8310 static void ath12k_pdev_ctl_failsafe_check_event(struct ath12k_base *ab, 8311 struct sk_buff *skb) 8312 { 8313 const void **tb; 8314 const struct wmi_pdev_ctl_failsafe_chk_event *ev; 8315 int ret; 8316 8317 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8318 if (IS_ERR(tb)) { 8319 ret = PTR_ERR(tb); 8320 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8321 return; 8322 } 8323 8324 ev = tb[WMI_TAG_PDEV_CTL_FAILSAFE_CHECK_EVENT]; 8325 if (!ev) { 8326 ath12k_warn(ab, "failed to fetch pdev ctl failsafe check ev"); 8327 kfree(tb); 8328 return; 8329 } 8330 8331 ath12k_dbg(ab, ATH12K_DBG_WMI, 8332 "pdev ctl failsafe check ev status %d\n", 8333 ev->ctl_failsafe_status); 8334 8335 /* If ctl_failsafe_status is set to 1 FW will max out the Transmit power 8336 * to 10 dBm else the CTL power entry in the BDF would be picked up. 8337 */ 8338 if (ev->ctl_failsafe_status != 0) 8339 ath12k_warn(ab, "pdev ctl failsafe failure status %d", 8340 ev->ctl_failsafe_status); 8341 8342 kfree(tb); 8343 } 8344 8345 static void 8346 ath12k_wmi_process_csa_switch_count_event(struct ath12k_base *ab, 8347 const struct ath12k_wmi_pdev_csa_event *ev, 8348 const u32 *vdev_ids) 8349 { 8350 u32 current_switch_count = le32_to_cpu(ev->current_switch_count); 8351 u32 num_vdevs = le32_to_cpu(ev->num_vdevs); 8352 struct ieee80211_bss_conf *conf; 8353 struct ath12k_link_vif *arvif; 8354 struct ath12k_vif *ahvif; 8355 int i; 8356 8357 rcu_read_lock(); 8358 for (i = 0; i < num_vdevs; i++) { 8359 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, vdev_ids[i]); 8360 8361 if (!arvif) { 8362 ath12k_warn(ab, "Recvd csa status for unknown vdev %d", 8363 vdev_ids[i]); 8364 continue; 8365 } 8366 ahvif = arvif->ahvif; 8367 8368 if (arvif->link_id >= IEEE80211_MLD_MAX_NUM_LINKS) { 8369 ath12k_warn(ab, "Invalid CSA switch count even link id: %d\n", 8370 arvif->link_id); 8371 continue; 8372 } 8373 8374 conf = rcu_dereference(ahvif->vif->link_conf[arvif->link_id]); 8375 if (!conf) { 8376 ath12k_warn(ab, "unable to access bss link conf in process csa for vif %pM link %u\n", 8377 ahvif->vif->addr, arvif->link_id); 8378 continue; 8379 } 8380 8381 if (!arvif->is_up || !conf->csa_active) 8382 continue; 8383 8384 /* Finish CSA when counter reaches zero */ 8385 if (!current_switch_count) { 8386 ieee80211_csa_finish(ahvif->vif, arvif->link_id); 8387 arvif->current_cntdown_counter = 0; 8388 } else if (current_switch_count > 1) { 8389 /* If the count in event is not what we expect, don't update the 8390 * mac80211 count. Since during beacon Tx failure, count in the 8391 * firmware will not decrement and this event will come with the 8392 * previous count value again 8393 */ 8394 if (current_switch_count != arvif->current_cntdown_counter) 8395 continue; 8396 8397 arvif->current_cntdown_counter = 8398 ieee80211_beacon_update_cntdwn(ahvif->vif, 8399 arvif->link_id); 8400 } 8401 } 8402 rcu_read_unlock(); 8403 } 8404 8405 static void 8406 ath12k_wmi_pdev_csa_switch_count_status_event(struct ath12k_base *ab, 8407 struct sk_buff *skb) 8408 { 8409 const void **tb; 8410 const struct ath12k_wmi_pdev_csa_event *ev; 8411 const u32 *vdev_ids; 8412 int ret; 8413 8414 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8415 if (IS_ERR(tb)) { 8416 ret = PTR_ERR(tb); 8417 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8418 return; 8419 } 8420 8421 ev = tb[WMI_TAG_PDEV_CSA_SWITCH_COUNT_STATUS_EVENT]; 8422 vdev_ids = tb[WMI_TAG_ARRAY_UINT32]; 8423 8424 if (!ev || !vdev_ids) { 8425 ath12k_warn(ab, "failed to fetch pdev csa switch count ev"); 8426 kfree(tb); 8427 return; 8428 } 8429 8430 ath12k_dbg(ab, ATH12K_DBG_WMI, 8431 "pdev csa switch count %d for pdev %d, num_vdevs %d", 8432 ev->current_switch_count, ev->pdev_id, 8433 ev->num_vdevs); 8434 8435 ath12k_wmi_process_csa_switch_count_event(ab, ev, vdev_ids); 8436 8437 kfree(tb); 8438 } 8439 8440 static void 8441 ath12k_wmi_pdev_dfs_radar_detected_event(struct ath12k_base *ab, struct sk_buff *skb) 8442 { 8443 const void **tb; 8444 struct ath12k_mac_get_any_chanctx_conf_arg arg; 8445 const struct ath12k_wmi_pdev_radar_event *ev; 8446 struct ath12k *ar; 8447 int ret; 8448 8449 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8450 if (IS_ERR(tb)) { 8451 ret = PTR_ERR(tb); 8452 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8453 return; 8454 } 8455 8456 ev = tb[WMI_TAG_PDEV_DFS_RADAR_DETECTION_EVENT]; 8457 8458 if (!ev) { 8459 ath12k_warn(ab, "failed to fetch pdev dfs radar detected ev"); 8460 kfree(tb); 8461 return; 8462 } 8463 8464 ath12k_dbg(ab, ATH12K_DBG_WMI, 8465 "pdev dfs radar detected on pdev %d, detection mode %d, chan freq %d, chan_width %d, detector id %d, seg id %d, timestamp %d, chirp %d, freq offset %d, sidx %d", 8466 ev->pdev_id, ev->detection_mode, ev->chan_freq, ev->chan_width, 8467 ev->detector_id, ev->segment_id, ev->timestamp, ev->is_chirp, 8468 ev->freq_offset, ev->sidx); 8469 8470 rcu_read_lock(); 8471 8472 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev->pdev_id)); 8473 8474 if (!ar) { 8475 ath12k_warn(ab, "radar detected in invalid pdev %d\n", 8476 ev->pdev_id); 8477 goto exit; 8478 } 8479 8480 arg.ar = ar; 8481 arg.chanctx_conf = NULL; 8482 ieee80211_iter_chan_contexts_atomic(ath12k_ar_to_hw(ar), 8483 ath12k_mac_get_any_chanctx_conf_iter, &arg); 8484 if (!arg.chanctx_conf) { 8485 ath12k_warn(ab, "failed to find valid chanctx_conf in radar detected event\n"); 8486 goto exit; 8487 } 8488 8489 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "DFS Radar Detected in pdev %d\n", 8490 ev->pdev_id); 8491 8492 if (ar->dfs_block_radar_events) 8493 ath12k_info(ab, "DFS Radar detected, but ignored as requested\n"); 8494 else 8495 ieee80211_radar_detected(ath12k_ar_to_hw(ar), arg.chanctx_conf); 8496 8497 exit: 8498 rcu_read_unlock(); 8499 8500 kfree(tb); 8501 } 8502 8503 static void ath12k_tm_wmi_event_segmented(struct ath12k_base *ab, u32 cmd_id, 8504 struct sk_buff *skb) 8505 { 8506 const struct ath12k_wmi_ftm_event *ev; 8507 const void **tb; 8508 int ret; 8509 u16 length; 8510 8511 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8512 8513 if (IS_ERR(tb)) { 8514 ret = PTR_ERR(tb); 8515 ath12k_warn(ab, "failed to parse ftm event tlv: %d\n", ret); 8516 return; 8517 } 8518 8519 ev = tb[WMI_TAG_ARRAY_BYTE]; 8520 if (!ev) { 8521 ath12k_warn(ab, "failed to fetch ftm msg\n"); 8522 kfree(tb); 8523 return; 8524 } 8525 8526 length = skb->len - TLV_HDR_SIZE; 8527 ath12k_tm_process_event(ab, cmd_id, ev, length); 8528 kfree(tb); 8529 tb = NULL; 8530 } 8531 8532 static void 8533 ath12k_wmi_pdev_temperature_event(struct ath12k_base *ab, 8534 struct sk_buff *skb) 8535 { 8536 struct ath12k *ar; 8537 struct wmi_pdev_temperature_event ev = {0}; 8538 8539 if (ath12k_pull_pdev_temp_ev(ab, skb, &ev) != 0) { 8540 ath12k_warn(ab, "failed to extract pdev temperature event"); 8541 return; 8542 } 8543 8544 ath12k_dbg(ab, ATH12K_DBG_WMI, 8545 "pdev temperature ev temp %d pdev_id %d\n", ev.temp, ev.pdev_id); 8546 8547 rcu_read_lock(); 8548 8549 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(ev.pdev_id)); 8550 if (!ar) { 8551 ath12k_warn(ab, "invalid pdev id in pdev temperature ev %d", ev.pdev_id); 8552 goto exit; 8553 } 8554 8555 exit: 8556 rcu_read_unlock(); 8557 } 8558 8559 static void ath12k_fils_discovery_event(struct ath12k_base *ab, 8560 struct sk_buff *skb) 8561 { 8562 const void **tb; 8563 const struct wmi_fils_discovery_event *ev; 8564 int ret; 8565 8566 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8567 if (IS_ERR(tb)) { 8568 ret = PTR_ERR(tb); 8569 ath12k_warn(ab, 8570 "failed to parse FILS discovery event tlv %d\n", 8571 ret); 8572 return; 8573 } 8574 8575 ev = tb[WMI_TAG_HOST_SWFDA_EVENT]; 8576 if (!ev) { 8577 ath12k_warn(ab, "failed to fetch FILS discovery event\n"); 8578 kfree(tb); 8579 return; 8580 } 8581 8582 ath12k_warn(ab, 8583 "FILS discovery frame expected from host for vdev_id: %u, transmission scheduled at %u, next TBTT: %u\n", 8584 ev->vdev_id, ev->fils_tt, ev->tbtt); 8585 8586 kfree(tb); 8587 } 8588 8589 static void ath12k_probe_resp_tx_status_event(struct ath12k_base *ab, 8590 struct sk_buff *skb) 8591 { 8592 const void **tb; 8593 const struct wmi_probe_resp_tx_status_event *ev; 8594 int ret; 8595 8596 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8597 if (IS_ERR(tb)) { 8598 ret = PTR_ERR(tb); 8599 ath12k_warn(ab, 8600 "failed to parse probe response transmission status event tlv: %d\n", 8601 ret); 8602 return; 8603 } 8604 8605 ev = tb[WMI_TAG_OFFLOAD_PRB_RSP_TX_STATUS_EVENT]; 8606 if (!ev) { 8607 ath12k_warn(ab, 8608 "failed to fetch probe response transmission status event"); 8609 kfree(tb); 8610 return; 8611 } 8612 8613 if (ev->tx_status) 8614 ath12k_warn(ab, 8615 "Probe response transmission failed for vdev_id %u, status %u\n", 8616 ev->vdev_id, ev->tx_status); 8617 8618 kfree(tb); 8619 } 8620 8621 static int ath12k_wmi_p2p_noa_event(struct ath12k_base *ab, 8622 struct sk_buff *skb) 8623 { 8624 const void **tb; 8625 const struct wmi_p2p_noa_event *ev; 8626 const struct ath12k_wmi_p2p_noa_info *noa; 8627 struct ath12k *ar; 8628 int ret, vdev_id; 8629 8630 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8631 if (IS_ERR(tb)) { 8632 ret = PTR_ERR(tb); 8633 ath12k_warn(ab, "failed to parse P2P NoA TLV: %d\n", ret); 8634 return ret; 8635 } 8636 8637 ev = tb[WMI_TAG_P2P_NOA_EVENT]; 8638 noa = tb[WMI_TAG_P2P_NOA_INFO]; 8639 8640 if (!ev || !noa) { 8641 ret = -EPROTO; 8642 goto out; 8643 } 8644 8645 vdev_id = __le32_to_cpu(ev->vdev_id); 8646 8647 ath12k_dbg(ab, ATH12K_DBG_WMI, 8648 "wmi tlv p2p noa vdev_id %i descriptors %u\n", 8649 vdev_id, le32_get_bits(noa->noa_attr, WMI_P2P_NOA_INFO_DESC_NUM)); 8650 8651 rcu_read_lock(); 8652 ar = ath12k_mac_get_ar_by_vdev_id(ab, vdev_id); 8653 if (!ar) { 8654 ath12k_warn(ab, "invalid vdev id %d in P2P NoA event\n", 8655 vdev_id); 8656 ret = -EINVAL; 8657 goto unlock; 8658 } 8659 8660 ath12k_p2p_noa_update_by_vdev_id(ar, vdev_id, noa); 8661 8662 ret = 0; 8663 8664 unlock: 8665 rcu_read_unlock(); 8666 out: 8667 kfree(tb); 8668 return ret; 8669 } 8670 8671 static void ath12k_rfkill_state_change_event(struct ath12k_base *ab, 8672 struct sk_buff *skb) 8673 { 8674 const struct wmi_rfkill_state_change_event *ev; 8675 const void **tb; 8676 int ret; 8677 8678 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8679 if (IS_ERR(tb)) { 8680 ret = PTR_ERR(tb); 8681 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8682 return; 8683 } 8684 8685 ev = tb[WMI_TAG_RFKILL_EVENT]; 8686 if (!ev) { 8687 kfree(tb); 8688 return; 8689 } 8690 8691 ath12k_dbg(ab, ATH12K_DBG_MAC, 8692 "wmi tlv rfkill state change gpio %d type %d radio_state %d\n", 8693 le32_to_cpu(ev->gpio_pin_num), 8694 le32_to_cpu(ev->int_type), 8695 le32_to_cpu(ev->radio_state)); 8696 8697 spin_lock_bh(&ab->base_lock); 8698 ab->rfkill_radio_on = (ev->radio_state == cpu_to_le32(WMI_RFKILL_RADIO_STATE_ON)); 8699 spin_unlock_bh(&ab->base_lock); 8700 8701 queue_work(ab->workqueue, &ab->rfkill_work); 8702 kfree(tb); 8703 } 8704 8705 static void 8706 ath12k_wmi_diag_event(struct ath12k_base *ab, struct sk_buff *skb) 8707 { 8708 trace_ath12k_wmi_diag(ab, skb->data, skb->len); 8709 } 8710 8711 static void ath12k_wmi_twt_enable_event(struct ath12k_base *ab, 8712 struct sk_buff *skb) 8713 { 8714 const void **tb; 8715 const struct wmi_twt_enable_event *ev; 8716 int ret; 8717 8718 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8719 if (IS_ERR(tb)) { 8720 ret = PTR_ERR(tb); 8721 ath12k_warn(ab, "failed to parse wmi twt enable status event tlv: %d\n", 8722 ret); 8723 return; 8724 } 8725 8726 ev = tb[WMI_TAG_TWT_ENABLE_COMPLETE_EVENT]; 8727 if (!ev) { 8728 ath12k_warn(ab, "failed to fetch twt enable wmi event\n"); 8729 goto exit; 8730 } 8731 8732 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt enable event pdev id %u status %u\n", 8733 le32_to_cpu(ev->pdev_id), 8734 le32_to_cpu(ev->status)); 8735 8736 exit: 8737 kfree(tb); 8738 } 8739 8740 static void ath12k_wmi_twt_disable_event(struct ath12k_base *ab, 8741 struct sk_buff *skb) 8742 { 8743 const void **tb; 8744 const struct wmi_twt_disable_event *ev; 8745 int ret; 8746 8747 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8748 if (IS_ERR(tb)) { 8749 ret = PTR_ERR(tb); 8750 ath12k_warn(ab, "failed to parse wmi twt disable status event tlv: %d\n", 8751 ret); 8752 return; 8753 } 8754 8755 ev = tb[WMI_TAG_TWT_DISABLE_COMPLETE_EVENT]; 8756 if (!ev) { 8757 ath12k_warn(ab, "failed to fetch twt disable wmi event\n"); 8758 goto exit; 8759 } 8760 8761 ath12k_dbg(ab, ATH12K_DBG_MAC, "wmi twt disable event pdev id %d status %u\n", 8762 le32_to_cpu(ev->pdev_id), 8763 le32_to_cpu(ev->status)); 8764 8765 exit: 8766 kfree(tb); 8767 } 8768 8769 static int ath12k_wmi_wow_wakeup_host_parse(struct ath12k_base *ab, 8770 u16 tag, u16 len, 8771 const void *ptr, void *data) 8772 { 8773 const struct wmi_wow_ev_pg_fault_param *pf_param; 8774 const struct wmi_wow_ev_param *param; 8775 struct wmi_wow_ev_arg *arg = data; 8776 int pf_len; 8777 8778 switch (tag) { 8779 case WMI_TAG_WOW_EVENT_INFO: 8780 param = ptr; 8781 arg->wake_reason = le32_to_cpu(param->wake_reason); 8782 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow wakeup host reason %d %s\n", 8783 arg->wake_reason, wow_reason(arg->wake_reason)); 8784 break; 8785 8786 case WMI_TAG_ARRAY_BYTE: 8787 if (arg && arg->wake_reason == WOW_REASON_PAGE_FAULT) { 8788 pf_param = ptr; 8789 pf_len = le32_to_cpu(pf_param->len); 8790 if (pf_len > len - sizeof(pf_len) || 8791 pf_len < 0) { 8792 ath12k_warn(ab, "invalid wo reason page fault buffer len %d\n", 8793 pf_len); 8794 return -EINVAL; 8795 } 8796 ath12k_dbg(ab, ATH12K_DBG_WMI, "wow_reason_page_fault len %d\n", 8797 pf_len); 8798 ath12k_dbg_dump(ab, ATH12K_DBG_WMI, 8799 "wow_reason_page_fault packet present", 8800 "wow_pg_fault ", 8801 pf_param->data, 8802 pf_len); 8803 } 8804 break; 8805 default: 8806 break; 8807 } 8808 8809 return 0; 8810 } 8811 8812 static void ath12k_wmi_event_wow_wakeup_host(struct ath12k_base *ab, struct sk_buff *skb) 8813 { 8814 struct wmi_wow_ev_arg arg = { }; 8815 int ret; 8816 8817 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 8818 ath12k_wmi_wow_wakeup_host_parse, 8819 &arg); 8820 if (ret) { 8821 ath12k_warn(ab, "failed to parse wmi wow wakeup host event tlv: %d\n", 8822 ret); 8823 return; 8824 } 8825 8826 complete(&ab->wow.wakeup_completed); 8827 } 8828 8829 static void ath12k_wmi_gtk_offload_status_event(struct ath12k_base *ab, 8830 struct sk_buff *skb) 8831 { 8832 const struct wmi_gtk_offload_status_event *ev; 8833 struct ath12k_link_vif *arvif; 8834 __be64 replay_ctr_be; 8835 u64 replay_ctr; 8836 const void **tb; 8837 int ret; 8838 8839 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8840 if (IS_ERR(tb)) { 8841 ret = PTR_ERR(tb); 8842 ath12k_warn(ab, "failed to parse tlv: %d\n", ret); 8843 return; 8844 } 8845 8846 ev = tb[WMI_TAG_GTK_OFFLOAD_STATUS_EVENT]; 8847 if (!ev) { 8848 ath12k_warn(ab, "failed to fetch gtk offload status ev"); 8849 kfree(tb); 8850 return; 8851 } 8852 8853 rcu_read_lock(); 8854 arvif = ath12k_mac_get_arvif_by_vdev_id(ab, le32_to_cpu(ev->vdev_id)); 8855 if (!arvif) { 8856 rcu_read_unlock(); 8857 ath12k_warn(ab, "failed to get arvif for vdev_id:%d\n", 8858 le32_to_cpu(ev->vdev_id)); 8859 kfree(tb); 8860 return; 8861 } 8862 8863 replay_ctr = le64_to_cpu(ev->replay_ctr); 8864 arvif->rekey_data.replay_ctr = replay_ctr; 8865 ath12k_dbg(ab, ATH12K_DBG_WMI, "wmi gtk offload event refresh_cnt %d replay_ctr %llu\n", 8866 le32_to_cpu(ev->refresh_cnt), replay_ctr); 8867 8868 /* supplicant expects big-endian replay counter */ 8869 replay_ctr_be = cpu_to_be64(replay_ctr); 8870 8871 ieee80211_gtk_rekey_notify(arvif->ahvif->vif, arvif->bssid, 8872 (void *)&replay_ctr_be, GFP_ATOMIC); 8873 8874 rcu_read_unlock(); 8875 8876 kfree(tb); 8877 } 8878 8879 static void ath12k_wmi_event_mlo_setup_complete(struct ath12k_base *ab, 8880 struct sk_buff *skb) 8881 { 8882 const struct wmi_mlo_setup_complete_event *ev; 8883 struct ath12k *ar = NULL; 8884 struct ath12k_pdev *pdev; 8885 const void **tb; 8886 int ret, i; 8887 8888 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8889 if (IS_ERR(tb)) { 8890 ret = PTR_ERR(tb); 8891 ath12k_warn(ab, "failed to parse mlo setup complete event tlv: %d\n", 8892 ret); 8893 return; 8894 } 8895 8896 ev = tb[WMI_TAG_MLO_SETUP_COMPLETE_EVENT]; 8897 if (!ev) { 8898 ath12k_warn(ab, "failed to fetch mlo setup complete event\n"); 8899 kfree(tb); 8900 return; 8901 } 8902 8903 if (le32_to_cpu(ev->pdev_id) > ab->num_radios) 8904 goto skip_lookup; 8905 8906 for (i = 0; i < ab->num_radios; i++) { 8907 pdev = &ab->pdevs[i]; 8908 if (pdev && pdev->pdev_id == le32_to_cpu(ev->pdev_id)) { 8909 ar = pdev->ar; 8910 break; 8911 } 8912 } 8913 8914 skip_lookup: 8915 if (!ar) { 8916 ath12k_warn(ab, "invalid pdev_id %d status %u in setup complete event\n", 8917 ev->pdev_id, ev->status); 8918 goto out; 8919 } 8920 8921 ar->mlo_setup_status = le32_to_cpu(ev->status); 8922 complete(&ar->mlo_setup_done); 8923 8924 out: 8925 kfree(tb); 8926 } 8927 8928 static void ath12k_wmi_event_teardown_complete(struct ath12k_base *ab, 8929 struct sk_buff *skb) 8930 { 8931 const struct wmi_mlo_teardown_complete_event *ev; 8932 const void **tb; 8933 int ret; 8934 8935 tb = ath12k_wmi_tlv_parse_alloc(ab, skb, GFP_ATOMIC); 8936 if (IS_ERR(tb)) { 8937 ret = PTR_ERR(tb); 8938 ath12k_warn(ab, "failed to parse teardown complete event tlv: %d\n", ret); 8939 return; 8940 } 8941 8942 ev = tb[WMI_TAG_MLO_TEARDOWN_COMPLETE]; 8943 if (!ev) { 8944 ath12k_warn(ab, "failed to fetch teardown complete event\n"); 8945 kfree(tb); 8946 return; 8947 } 8948 8949 kfree(tb); 8950 } 8951 8952 #ifdef CONFIG_ATH12K_DEBUGFS 8953 static int ath12k_wmi_tpc_stats_copy_buffer(struct ath12k_base *ab, 8954 const void *ptr, u16 tag, u16 len, 8955 struct wmi_tpc_stats_arg *tpc_stats) 8956 { 8957 u32 len1, len2, len3, len4; 8958 s16 *dst_ptr; 8959 s8 *dst_ptr_ctl; 8960 8961 len1 = le32_to_cpu(tpc_stats->max_reg_allowed_power.tpc_reg_pwr.reg_array_len); 8962 len2 = le32_to_cpu(tpc_stats->rates_array1.tpc_rates_array.rate_array_len); 8963 len3 = le32_to_cpu(tpc_stats->rates_array2.tpc_rates_array.rate_array_len); 8964 len4 = le32_to_cpu(tpc_stats->ctl_array.tpc_ctl_pwr.ctl_array_len); 8965 8966 switch (tpc_stats->event_count) { 8967 case ATH12K_TPC_STATS_CONFIG_REG_PWR_EVENT: 8968 if (len1 > len) 8969 return -ENOBUFS; 8970 8971 if (tpc_stats->tlvs_rcvd & WMI_TPC_REG_PWR_ALLOWED) { 8972 dst_ptr = tpc_stats->max_reg_allowed_power.reg_pwr_array; 8973 memcpy(dst_ptr, ptr, len1); 8974 } 8975 break; 8976 case ATH12K_TPC_STATS_RATES_EVENT1: 8977 if (len2 > len) 8978 return -ENOBUFS; 8979 8980 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY1) { 8981 dst_ptr = tpc_stats->rates_array1.rate_array; 8982 memcpy(dst_ptr, ptr, len2); 8983 } 8984 break; 8985 case ATH12K_TPC_STATS_RATES_EVENT2: 8986 if (len3 > len) 8987 return -ENOBUFS; 8988 8989 if (tpc_stats->tlvs_rcvd & WMI_TPC_RATES_ARRAY2) { 8990 dst_ptr = tpc_stats->rates_array2.rate_array; 8991 memcpy(dst_ptr, ptr, len3); 8992 } 8993 break; 8994 case ATH12K_TPC_STATS_CTL_TABLE_EVENT: 8995 if (len4 > len) 8996 return -ENOBUFS; 8997 8998 if (tpc_stats->tlvs_rcvd & WMI_TPC_CTL_PWR_ARRAY) { 8999 dst_ptr_ctl = tpc_stats->ctl_array.ctl_pwr_table; 9000 memcpy(dst_ptr_ctl, ptr, len4); 9001 } 9002 break; 9003 } 9004 return 0; 9005 } 9006 9007 static int ath12k_tpc_get_reg_pwr(struct ath12k_base *ab, 9008 struct wmi_tpc_stats_arg *tpc_stats, 9009 struct wmi_max_reg_power_fixed_params *ev) 9010 { 9011 struct wmi_max_reg_power_allowed_arg *reg_pwr; 9012 u32 total_size; 9013 9014 ath12k_dbg(ab, ATH12K_DBG_WMI, 9015 "Received reg power array type %d length %d for tpc stats\n", 9016 ev->reg_power_type, ev->reg_array_len); 9017 9018 switch (le32_to_cpu(ev->reg_power_type)) { 9019 case TPC_STATS_REG_PWR_ALLOWED_TYPE: 9020 reg_pwr = &tpc_stats->max_reg_allowed_power; 9021 break; 9022 default: 9023 return -EINVAL; 9024 } 9025 9026 /* Each entry is 2 byte hence multiplying the indices with 2 */ 9027 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) * 9028 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4) * 2; 9029 if (le32_to_cpu(ev->reg_array_len) != total_size) { 9030 ath12k_warn(ab, 9031 "Total size and reg_array_len doesn't match for tpc stats\n"); 9032 return -EINVAL; 9033 } 9034 9035 memcpy(®_pwr->tpc_reg_pwr, ev, sizeof(struct wmi_max_reg_power_fixed_params)); 9036 9037 reg_pwr->reg_pwr_array = kzalloc(le32_to_cpu(reg_pwr->tpc_reg_pwr.reg_array_len), 9038 GFP_ATOMIC); 9039 if (!reg_pwr->reg_pwr_array) 9040 return -ENOMEM; 9041 9042 tpc_stats->tlvs_rcvd |= WMI_TPC_REG_PWR_ALLOWED; 9043 9044 return 0; 9045 } 9046 9047 static int ath12k_tpc_get_rate_array(struct ath12k_base *ab, 9048 struct wmi_tpc_stats_arg *tpc_stats, 9049 struct wmi_tpc_rates_array_fixed_params *ev) 9050 { 9051 struct wmi_tpc_rates_array_arg *rates_array; 9052 u32 flag = 0, rate_array_len; 9053 9054 ath12k_dbg(ab, ATH12K_DBG_WMI, 9055 "Received rates array type %d length %d for tpc stats\n", 9056 ev->rate_array_type, ev->rate_array_len); 9057 9058 switch (le32_to_cpu(ev->rate_array_type)) { 9059 case ATH12K_TPC_STATS_RATES_ARRAY1: 9060 rates_array = &tpc_stats->rates_array1; 9061 flag = WMI_TPC_RATES_ARRAY1; 9062 break; 9063 case ATH12K_TPC_STATS_RATES_ARRAY2: 9064 rates_array = &tpc_stats->rates_array2; 9065 flag = WMI_TPC_RATES_ARRAY2; 9066 break; 9067 default: 9068 ath12k_warn(ab, 9069 "Received invalid type of rates array for tpc stats\n"); 9070 return -EINVAL; 9071 } 9072 memcpy(&rates_array->tpc_rates_array, ev, 9073 sizeof(struct wmi_tpc_rates_array_fixed_params)); 9074 rate_array_len = le32_to_cpu(rates_array->tpc_rates_array.rate_array_len); 9075 rates_array->rate_array = kzalloc(rate_array_len, GFP_ATOMIC); 9076 if (!rates_array->rate_array) 9077 return -ENOMEM; 9078 9079 tpc_stats->tlvs_rcvd |= flag; 9080 return 0; 9081 } 9082 9083 static int ath12k_tpc_get_ctl_pwr_tbl(struct ath12k_base *ab, 9084 struct wmi_tpc_stats_arg *tpc_stats, 9085 struct wmi_tpc_ctl_pwr_fixed_params *ev) 9086 { 9087 struct wmi_tpc_ctl_pwr_table_arg *ctl_array; 9088 u32 total_size, ctl_array_len, flag = 0; 9089 9090 ath12k_dbg(ab, ATH12K_DBG_WMI, 9091 "Received ctl array type %d length %d for tpc stats\n", 9092 ev->ctl_array_type, ev->ctl_array_len); 9093 9094 switch (le32_to_cpu(ev->ctl_array_type)) { 9095 case ATH12K_TPC_STATS_CTL_ARRAY: 9096 ctl_array = &tpc_stats->ctl_array; 9097 flag = WMI_TPC_CTL_PWR_ARRAY; 9098 break; 9099 default: 9100 ath12k_warn(ab, 9101 "Received invalid type of ctl pwr table for tpc stats\n"); 9102 return -EINVAL; 9103 } 9104 9105 total_size = le32_to_cpu(ev->d1) * le32_to_cpu(ev->d2) * 9106 le32_to_cpu(ev->d3) * le32_to_cpu(ev->d4); 9107 if (le32_to_cpu(ev->ctl_array_len) != total_size) { 9108 ath12k_warn(ab, 9109 "Total size and ctl_array_len doesn't match for tpc stats\n"); 9110 return -EINVAL; 9111 } 9112 9113 memcpy(&ctl_array->tpc_ctl_pwr, ev, sizeof(struct wmi_tpc_ctl_pwr_fixed_params)); 9114 ctl_array_len = le32_to_cpu(ctl_array->tpc_ctl_pwr.ctl_array_len); 9115 ctl_array->ctl_pwr_table = kzalloc(ctl_array_len, GFP_ATOMIC); 9116 if (!ctl_array->ctl_pwr_table) 9117 return -ENOMEM; 9118 9119 tpc_stats->tlvs_rcvd |= flag; 9120 return 0; 9121 } 9122 9123 static int ath12k_wmi_tpc_stats_subtlv_parser(struct ath12k_base *ab, 9124 u16 tag, u16 len, 9125 const void *ptr, void *data) 9126 { 9127 struct wmi_tpc_rates_array_fixed_params *tpc_rates_array; 9128 struct wmi_max_reg_power_fixed_params *tpc_reg_pwr; 9129 struct wmi_tpc_ctl_pwr_fixed_params *tpc_ctl_pwr; 9130 struct wmi_tpc_stats_arg *tpc_stats = data; 9131 struct wmi_tpc_config_params *tpc_config; 9132 int ret = 0; 9133 9134 if (!tpc_stats) { 9135 ath12k_warn(ab, "tpc stats memory unavailable\n"); 9136 return -EINVAL; 9137 } 9138 9139 switch (tag) { 9140 case WMI_TAG_TPC_STATS_CONFIG_EVENT: 9141 tpc_config = (struct wmi_tpc_config_params *)ptr; 9142 memcpy(&tpc_stats->tpc_config, tpc_config, 9143 sizeof(struct wmi_tpc_config_params)); 9144 break; 9145 case WMI_TAG_TPC_STATS_REG_PWR_ALLOWED: 9146 tpc_reg_pwr = (struct wmi_max_reg_power_fixed_params *)ptr; 9147 ret = ath12k_tpc_get_reg_pwr(ab, tpc_stats, tpc_reg_pwr); 9148 break; 9149 case WMI_TAG_TPC_STATS_RATES_ARRAY: 9150 tpc_rates_array = (struct wmi_tpc_rates_array_fixed_params *)ptr; 9151 ret = ath12k_tpc_get_rate_array(ab, tpc_stats, tpc_rates_array); 9152 break; 9153 case WMI_TAG_TPC_STATS_CTL_PWR_TABLE_EVENT: 9154 tpc_ctl_pwr = (struct wmi_tpc_ctl_pwr_fixed_params *)ptr; 9155 ret = ath12k_tpc_get_ctl_pwr_tbl(ab, tpc_stats, tpc_ctl_pwr); 9156 break; 9157 default: 9158 ath12k_warn(ab, 9159 "Received invalid tag for tpc stats in subtlvs\n"); 9160 return -EINVAL; 9161 } 9162 return ret; 9163 } 9164 9165 static int ath12k_wmi_tpc_stats_event_parser(struct ath12k_base *ab, 9166 u16 tag, u16 len, 9167 const void *ptr, void *data) 9168 { 9169 struct wmi_tpc_stats_arg *tpc_stats = (struct wmi_tpc_stats_arg *)data; 9170 int ret; 9171 9172 switch (tag) { 9173 case WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM: 9174 ret = 0; 9175 /* Fixed param is already processed*/ 9176 break; 9177 case WMI_TAG_ARRAY_STRUCT: 9178 /* len 0 is expected for array of struct when there 9179 * is no content of that type to pack inside that tlv 9180 */ 9181 if (len == 0) 9182 return 0; 9183 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 9184 ath12k_wmi_tpc_stats_subtlv_parser, 9185 tpc_stats); 9186 break; 9187 case WMI_TAG_ARRAY_INT16: 9188 if (len == 0) 9189 return 0; 9190 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr, 9191 WMI_TAG_ARRAY_INT16, 9192 len, tpc_stats); 9193 break; 9194 case WMI_TAG_ARRAY_BYTE: 9195 if (len == 0) 9196 return 0; 9197 ret = ath12k_wmi_tpc_stats_copy_buffer(ab, ptr, 9198 WMI_TAG_ARRAY_BYTE, 9199 len, tpc_stats); 9200 break; 9201 default: 9202 ath12k_warn(ab, "Received invalid tag for tpc stats\n"); 9203 ret = -EINVAL; 9204 break; 9205 } 9206 return ret; 9207 } 9208 9209 void ath12k_wmi_free_tpc_stats_mem(struct ath12k *ar) 9210 { 9211 struct wmi_tpc_stats_arg *tpc_stats = ar->debug.tpc_stats; 9212 9213 lockdep_assert_held(&ar->data_lock); 9214 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc stats mem free\n"); 9215 if (tpc_stats) { 9216 kfree(tpc_stats->max_reg_allowed_power.reg_pwr_array); 9217 kfree(tpc_stats->rates_array1.rate_array); 9218 kfree(tpc_stats->rates_array2.rate_array); 9219 kfree(tpc_stats->ctl_array.ctl_pwr_table); 9220 kfree(tpc_stats); 9221 ar->debug.tpc_stats = NULL; 9222 } 9223 } 9224 9225 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab, 9226 struct sk_buff *skb) 9227 { 9228 struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *fixed_param; 9229 struct wmi_tpc_stats_arg *tpc_stats; 9230 const struct wmi_tlv *tlv; 9231 void *ptr = skb->data; 9232 struct ath12k *ar; 9233 u16 tlv_tag; 9234 u32 event_count; 9235 int ret; 9236 9237 if (!skb->data) { 9238 ath12k_warn(ab, "No data present in tpc stats event\n"); 9239 return; 9240 } 9241 9242 if (skb->len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) { 9243 ath12k_warn(ab, "TPC stats event size invalid\n"); 9244 return; 9245 } 9246 9247 tlv = (struct wmi_tlv *)ptr; 9248 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 9249 ptr += sizeof(*tlv); 9250 9251 if (tlv_tag != WMI_TAG_HALPHY_CTRL_PATH_EVENT_FIXED_PARAM) { 9252 ath12k_warn(ab, "TPC stats without fixed param tlv at start\n"); 9253 return; 9254 } 9255 9256 fixed_param = (struct ath12k_wmi_pdev_tpc_stats_event_fixed_params *)ptr; 9257 rcu_read_lock(); 9258 ar = ath12k_mac_get_ar_by_pdev_id(ab, le32_to_cpu(fixed_param->pdev_id) + 1); 9259 if (!ar) { 9260 ath12k_warn(ab, "Failed to get ar for tpc stats\n"); 9261 rcu_read_unlock(); 9262 return; 9263 } 9264 spin_lock_bh(&ar->data_lock); 9265 if (!ar->debug.tpc_request) { 9266 /* Event is received either without request or the 9267 * timeout, if memory is already allocated free it 9268 */ 9269 if (ar->debug.tpc_stats) { 9270 ath12k_warn(ab, "Freeing memory for tpc_stats\n"); 9271 ath12k_wmi_free_tpc_stats_mem(ar); 9272 } 9273 goto unlock; 9274 } 9275 9276 event_count = le32_to_cpu(fixed_param->event_count); 9277 if (event_count == 0) { 9278 if (ar->debug.tpc_stats) { 9279 ath12k_warn(ab, 9280 "Invalid tpc memory present\n"); 9281 goto unlock; 9282 } 9283 ar->debug.tpc_stats = 9284 kzalloc(sizeof(struct wmi_tpc_stats_arg), 9285 GFP_ATOMIC); 9286 if (!ar->debug.tpc_stats) { 9287 ath12k_warn(ab, 9288 "Failed to allocate memory for tpc stats\n"); 9289 goto unlock; 9290 } 9291 } 9292 9293 tpc_stats = ar->debug.tpc_stats; 9294 if (!tpc_stats) { 9295 ath12k_warn(ab, "tpc stats memory unavailable\n"); 9296 goto unlock; 9297 } 9298 9299 if (!(event_count == 0)) { 9300 if (event_count != tpc_stats->event_count + 1) { 9301 ath12k_warn(ab, 9302 "Invalid tpc event received\n"); 9303 goto unlock; 9304 } 9305 } 9306 tpc_stats->pdev_id = le32_to_cpu(fixed_param->pdev_id); 9307 tpc_stats->end_of_event = le32_to_cpu(fixed_param->end_of_event); 9308 tpc_stats->event_count = le32_to_cpu(fixed_param->event_count); 9309 ath12k_dbg(ab, ATH12K_DBG_WMI, 9310 "tpc stats event_count %d\n", 9311 tpc_stats->event_count); 9312 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 9313 ath12k_wmi_tpc_stats_event_parser, 9314 tpc_stats); 9315 if (ret) { 9316 ath12k_wmi_free_tpc_stats_mem(ar); 9317 ath12k_warn(ab, "failed to parse tpc_stats tlv: %d\n", ret); 9318 goto unlock; 9319 } 9320 9321 if (tpc_stats->end_of_event) 9322 complete(&ar->debug.tpc_complete); 9323 9324 unlock: 9325 spin_unlock_bh(&ar->data_lock); 9326 rcu_read_unlock(); 9327 } 9328 #else 9329 static void ath12k_wmi_process_tpc_stats(struct ath12k_base *ab, 9330 struct sk_buff *skb) 9331 { 9332 } 9333 #endif 9334 9335 static int 9336 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser(struct ath12k_base *ab, 9337 u16 tag, u16 len, 9338 const void *ptr, void *data) 9339 { 9340 const struct ath12k_wmi_rssi_dbm_conv_temp_info_params *temp_info; 9341 const struct ath12k_wmi_rssi_dbm_conv_info_params *param_info; 9342 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info = data; 9343 struct ath12k_wmi_rssi_dbm_conv_param_arg param_arg; 9344 s32 nf_hw_dbm[ATH12K_MAX_NUM_NF_HW_DBM]; 9345 u8 num_20mhz_segments; 9346 s8 min_nf, *nf_ptr; 9347 int i, j; 9348 9349 switch (tag) { 9350 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO: 9351 if (len < sizeof(*param_info)) { 9352 ath12k_warn(ab, 9353 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd", 9354 tag, len); 9355 return -EINVAL; 9356 } 9357 9358 param_info = ptr; 9359 9360 param_arg.curr_bw = le32_to_cpu(param_info->curr_bw); 9361 param_arg.curr_rx_chainmask = le32_to_cpu(param_info->curr_rx_chainmask); 9362 9363 /* The received array is actually a 2D byte-array for per chain, 9364 * per 20MHz subband. Convert to 2D byte-array 9365 */ 9366 nf_ptr = ¶m_arg.nf_hw_dbm[0][0]; 9367 9368 for (i = 0; i < ATH12K_MAX_NUM_NF_HW_DBM; i++) { 9369 nf_hw_dbm[i] = a_sle32_to_cpu(param_info->nf_hw_dbm[i]); 9370 9371 for (j = 0; j < 4; j++) { 9372 *nf_ptr = (nf_hw_dbm[i] >> (j * 8)) & 0xFF; 9373 nf_ptr++; 9374 } 9375 } 9376 9377 switch (param_arg.curr_bw) { 9378 case WMI_CHAN_WIDTH_20: 9379 num_20mhz_segments = 1; 9380 break; 9381 case WMI_CHAN_WIDTH_40: 9382 num_20mhz_segments = 2; 9383 break; 9384 case WMI_CHAN_WIDTH_80: 9385 num_20mhz_segments = 4; 9386 break; 9387 case WMI_CHAN_WIDTH_160: 9388 num_20mhz_segments = 8; 9389 break; 9390 case WMI_CHAN_WIDTH_320: 9391 num_20mhz_segments = 16; 9392 break; 9393 default: 9394 ath12k_warn(ab, "Invalid current bandwidth %d in RSSI dbm event", 9395 param_arg.curr_bw); 9396 /* In error case, still consider the primary 20 MHz segment since 9397 * that would be much better than instead of dropping the whole 9398 * event 9399 */ 9400 num_20mhz_segments = 1; 9401 } 9402 9403 min_nf = ATH12K_DEFAULT_NOISE_FLOOR; 9404 9405 for (i = 0; i < ATH12K_MAX_NUM_ANTENNA; i++) { 9406 if (!(param_arg.curr_rx_chainmask & BIT(i))) 9407 continue; 9408 9409 for (j = 0; j < num_20mhz_segments; j++) { 9410 if (param_arg.nf_hw_dbm[i][j] < min_nf) 9411 min_nf = param_arg.nf_hw_dbm[i][j]; 9412 } 9413 } 9414 9415 rssi_info->min_nf_dbm = min_nf; 9416 rssi_info->nf_dbm_present = true; 9417 break; 9418 case WMI_TAG_RSSI_DBM_CONVERSION_TEMP_OFFSET_INFO: 9419 if (len < sizeof(*temp_info)) { 9420 ath12k_warn(ab, 9421 "RSSI dbm conv subtlv 0x%x invalid len %d rcvd", 9422 tag, len); 9423 return -EINVAL; 9424 } 9425 9426 temp_info = ptr; 9427 rssi_info->temp_offset = a_sle32_to_cpu(temp_info->offset); 9428 rssi_info->temp_offset_present = true; 9429 break; 9430 default: 9431 ath12k_dbg(ab, ATH12K_DBG_WMI, 9432 "Unknown subtlv 0x%x in RSSI dbm conversion event\n", tag); 9433 } 9434 9435 return 0; 9436 } 9437 9438 static int 9439 ath12k_wmi_rssi_dbm_conv_info_event_parser(struct ath12k_base *ab, 9440 u16 tag, u16 len, 9441 const void *ptr, void *data) 9442 { 9443 int ret = 0; 9444 9445 switch (tag) { 9446 case WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM: 9447 /* Fixed param is already processed*/ 9448 break; 9449 case WMI_TAG_ARRAY_STRUCT: 9450 /* len 0 is expected for array of struct when there 9451 * is no content of that type inside that tlv 9452 */ 9453 if (len == 0) 9454 return 0; 9455 9456 ret = ath12k_wmi_tlv_iter(ab, ptr, len, 9457 ath12k_wmi_rssi_dbm_conv_info_evt_subtlv_parser, 9458 data); 9459 break; 9460 default: 9461 ath12k_dbg(ab, ATH12K_DBG_WMI, 9462 "Received invalid tag 0x%x for RSSI dbm conv info event\n", 9463 tag); 9464 break; 9465 } 9466 9467 return ret; 9468 } 9469 9470 static int 9471 ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(struct ath12k_base *ab, u8 *ptr, 9472 size_t len, int *pdev_id) 9473 { 9474 struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *fixed_param; 9475 const struct wmi_tlv *tlv; 9476 u16 tlv_tag; 9477 9478 if (len < (sizeof(*fixed_param) + TLV_HDR_SIZE)) { 9479 ath12k_warn(ab, "invalid RSSI dbm conv event size %zu\n", len); 9480 return -EINVAL; 9481 } 9482 9483 tlv = (struct wmi_tlv *)ptr; 9484 tlv_tag = le32_get_bits(tlv->header, WMI_TLV_TAG); 9485 ptr += sizeof(*tlv); 9486 9487 if (tlv_tag != WMI_TAG_RSSI_DBM_CONVERSION_PARAMS_INFO_FIXED_PARAM) { 9488 ath12k_warn(ab, "RSSI dbm conv event received without fixed param tlv\n"); 9489 return -EINVAL; 9490 } 9491 9492 fixed_param = (struct ath12k_wmi_rssi_dbm_conv_info_fixed_params *)ptr; 9493 *pdev_id = le32_to_cpu(fixed_param->pdev_id); 9494 9495 return 0; 9496 } 9497 9498 static void 9499 ath12k_wmi_update_rssi_offsets(struct ath12k *ar, 9500 struct ath12k_wmi_rssi_dbm_conv_info_arg *rssi_info) 9501 { 9502 struct ath12k_pdev_rssi_offsets *info = &ar->rssi_info; 9503 9504 lockdep_assert_held(&ar->data_lock); 9505 9506 if (rssi_info->temp_offset_present) 9507 info->temp_offset = rssi_info->temp_offset; 9508 9509 if (rssi_info->nf_dbm_present) 9510 info->min_nf_dbm = rssi_info->min_nf_dbm; 9511 9512 info->noise_floor = info->min_nf_dbm + info->temp_offset; 9513 } 9514 9515 static void 9516 ath12k_wmi_rssi_dbm_conversion_params_info_event(struct ath12k_base *ab, 9517 struct sk_buff *skb) 9518 { 9519 struct ath12k_wmi_rssi_dbm_conv_info_arg rssi_info; 9520 struct ath12k *ar; 9521 s32 noise_floor; 9522 u32 pdev_id; 9523 int ret; 9524 9525 ret = ath12k_wmi_rssi_dbm_conv_info_process_fixed_param(ab, skb->data, skb->len, 9526 &pdev_id); 9527 if (ret) { 9528 ath12k_warn(ab, "failed to parse fixed param in RSSI dbm conv event: %d\n", 9529 ret); 9530 return; 9531 } 9532 9533 rcu_read_lock(); 9534 ar = ath12k_mac_get_ar_by_pdev_id(ab, pdev_id); 9535 /* If pdev is not active, ignore the event */ 9536 if (!ar) 9537 goto out_unlock; 9538 9539 ret = ath12k_wmi_tlv_iter(ab, skb->data, skb->len, 9540 ath12k_wmi_rssi_dbm_conv_info_event_parser, 9541 &rssi_info); 9542 if (ret) { 9543 ath12k_warn(ab, "unable to parse RSSI dbm conversion event\n"); 9544 goto out_unlock; 9545 } 9546 9547 spin_lock_bh(&ar->data_lock); 9548 ath12k_wmi_update_rssi_offsets(ar, &rssi_info); 9549 noise_floor = ath12k_pdev_get_noise_floor(ar); 9550 spin_unlock_bh(&ar->data_lock); 9551 9552 ath12k_dbg(ab, ATH12K_DBG_WMI, 9553 "RSSI noise floor updated, new value is %d dbm\n", noise_floor); 9554 out_unlock: 9555 rcu_read_unlock(); 9556 } 9557 9558 static void ath12k_wmi_op_rx(struct ath12k_base *ab, struct sk_buff *skb) 9559 { 9560 struct wmi_cmd_hdr *cmd_hdr; 9561 enum wmi_tlv_event_id id; 9562 9563 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 9564 id = le32_get_bits(cmd_hdr->cmd_id, WMI_CMD_HDR_CMD_ID); 9565 9566 if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr))) 9567 goto out; 9568 9569 switch (id) { 9570 /* Process all the WMI events here */ 9571 case WMI_SERVICE_READY_EVENTID: 9572 ath12k_service_ready_event(ab, skb); 9573 break; 9574 case WMI_SERVICE_READY_EXT_EVENTID: 9575 ath12k_service_ready_ext_event(ab, skb); 9576 break; 9577 case WMI_SERVICE_READY_EXT2_EVENTID: 9578 ath12k_service_ready_ext2_event(ab, skb); 9579 break; 9580 case WMI_REG_CHAN_LIST_CC_EXT_EVENTID: 9581 ath12k_reg_chan_list_event(ab, skb); 9582 break; 9583 case WMI_READY_EVENTID: 9584 ath12k_ready_event(ab, skb); 9585 break; 9586 case WMI_PEER_DELETE_RESP_EVENTID: 9587 ath12k_peer_delete_resp_event(ab, skb); 9588 break; 9589 case WMI_VDEV_START_RESP_EVENTID: 9590 ath12k_vdev_start_resp_event(ab, skb); 9591 break; 9592 case WMI_OFFLOAD_BCN_TX_STATUS_EVENTID: 9593 ath12k_bcn_tx_status_event(ab, skb); 9594 break; 9595 case WMI_VDEV_STOPPED_EVENTID: 9596 ath12k_vdev_stopped_event(ab, skb); 9597 break; 9598 case WMI_MGMT_RX_EVENTID: 9599 ath12k_mgmt_rx_event(ab, skb); 9600 /* mgmt_rx_event() owns the skb now! */ 9601 return; 9602 case WMI_MGMT_TX_COMPLETION_EVENTID: 9603 ath12k_mgmt_tx_compl_event(ab, skb); 9604 break; 9605 case WMI_SCAN_EVENTID: 9606 ath12k_scan_event(ab, skb); 9607 break; 9608 case WMI_PEER_STA_KICKOUT_EVENTID: 9609 ath12k_peer_sta_kickout_event(ab, skb); 9610 break; 9611 case WMI_ROAM_EVENTID: 9612 ath12k_roam_event(ab, skb); 9613 break; 9614 case WMI_CHAN_INFO_EVENTID: 9615 ath12k_chan_info_event(ab, skb); 9616 break; 9617 case WMI_PDEV_BSS_CHAN_INFO_EVENTID: 9618 ath12k_pdev_bss_chan_info_event(ab, skb); 9619 break; 9620 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 9621 ath12k_vdev_install_key_compl_event(ab, skb); 9622 break; 9623 case WMI_SERVICE_AVAILABLE_EVENTID: 9624 ath12k_service_available_event(ab, skb); 9625 break; 9626 case WMI_PEER_ASSOC_CONF_EVENTID: 9627 ath12k_peer_assoc_conf_event(ab, skb); 9628 break; 9629 case WMI_UPDATE_STATS_EVENTID: 9630 ath12k_update_stats_event(ab, skb); 9631 break; 9632 case WMI_PDEV_CTL_FAILSAFE_CHECK_EVENTID: 9633 ath12k_pdev_ctl_failsafe_check_event(ab, skb); 9634 break; 9635 case WMI_PDEV_CSA_SWITCH_COUNT_STATUS_EVENTID: 9636 ath12k_wmi_pdev_csa_switch_count_status_event(ab, skb); 9637 break; 9638 case WMI_PDEV_TEMPERATURE_EVENTID: 9639 ath12k_wmi_pdev_temperature_event(ab, skb); 9640 break; 9641 case WMI_PDEV_DMA_RING_BUF_RELEASE_EVENTID: 9642 ath12k_wmi_pdev_dma_ring_buf_release_event(ab, skb); 9643 break; 9644 case WMI_HOST_FILS_DISCOVERY_EVENTID: 9645 ath12k_fils_discovery_event(ab, skb); 9646 break; 9647 case WMI_OFFLOAD_PROB_RESP_TX_STATUS_EVENTID: 9648 ath12k_probe_resp_tx_status_event(ab, skb); 9649 break; 9650 case WMI_RFKILL_STATE_CHANGE_EVENTID: 9651 ath12k_rfkill_state_change_event(ab, skb); 9652 break; 9653 case WMI_TWT_ENABLE_EVENTID: 9654 ath12k_wmi_twt_enable_event(ab, skb); 9655 break; 9656 case WMI_TWT_DISABLE_EVENTID: 9657 ath12k_wmi_twt_disable_event(ab, skb); 9658 break; 9659 case WMI_P2P_NOA_EVENTID: 9660 ath12k_wmi_p2p_noa_event(ab, skb); 9661 break; 9662 case WMI_PDEV_DFS_RADAR_DETECTION_EVENTID: 9663 ath12k_wmi_pdev_dfs_radar_detected_event(ab, skb); 9664 break; 9665 case WMI_VDEV_DELETE_RESP_EVENTID: 9666 ath12k_vdev_delete_resp_event(ab, skb); 9667 break; 9668 case WMI_DIAG_EVENTID: 9669 ath12k_wmi_diag_event(ab, skb); 9670 break; 9671 case WMI_WOW_WAKEUP_HOST_EVENTID: 9672 ath12k_wmi_event_wow_wakeup_host(ab, skb); 9673 break; 9674 case WMI_GTK_OFFLOAD_STATUS_EVENTID: 9675 ath12k_wmi_gtk_offload_status_event(ab, skb); 9676 break; 9677 case WMI_MLO_SETUP_COMPLETE_EVENTID: 9678 ath12k_wmi_event_mlo_setup_complete(ab, skb); 9679 break; 9680 case WMI_MLO_TEARDOWN_COMPLETE_EVENTID: 9681 ath12k_wmi_event_teardown_complete(ab, skb); 9682 break; 9683 case WMI_HALPHY_STATS_CTRL_PATH_EVENTID: 9684 ath12k_wmi_process_tpc_stats(ab, skb); 9685 break; 9686 case WMI_11D_NEW_COUNTRY_EVENTID: 9687 ath12k_reg_11d_new_cc_event(ab, skb); 9688 break; 9689 case WMI_PDEV_RSSI_DBM_CONVERSION_PARAMS_INFO_EVENTID: 9690 ath12k_wmi_rssi_dbm_conversion_params_info_event(ab, skb); 9691 break; 9692 /* add Unsupported events (rare) here */ 9693 case WMI_TBTTOFFSET_EXT_UPDATE_EVENTID: 9694 case WMI_PEER_OPER_MODE_CHANGE_EVENTID: 9695 case WMI_PDEV_DMA_RING_CFG_RSP_EVENTID: 9696 ath12k_dbg(ab, ATH12K_DBG_WMI, 9697 "ignoring unsupported event 0x%x\n", id); 9698 break; 9699 /* add Unsupported events (frequent) here */ 9700 case WMI_PDEV_GET_HALPHY_CAL_STATUS_EVENTID: 9701 case WMI_MGMT_RX_FW_CONSUMED_EVENTID: 9702 case WMI_OBSS_COLOR_COLLISION_DETECTION_EVENTID: 9703 /* debug might flood hence silently ignore (no-op) */ 9704 break; 9705 case WMI_PDEV_UTF_EVENTID: 9706 if (test_bit(ATH12K_FLAG_FTM_SEGMENTED, &ab->dev_flags)) 9707 ath12k_tm_wmi_event_segmented(ab, id, skb); 9708 else 9709 ath12k_tm_wmi_event_unsegmented(ab, id, skb); 9710 break; 9711 default: 9712 ath12k_dbg(ab, ATH12K_DBG_WMI, "Unknown eventid: 0x%x\n", id); 9713 break; 9714 } 9715 9716 out: 9717 dev_kfree_skb(skb); 9718 } 9719 9720 static int ath12k_connect_pdev_htc_service(struct ath12k_base *ab, 9721 u32 pdev_idx) 9722 { 9723 int status; 9724 static const u32 svc_id[] = { 9725 ATH12K_HTC_SVC_ID_WMI_CONTROL, 9726 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC1, 9727 ATH12K_HTC_SVC_ID_WMI_CONTROL_MAC2 9728 }; 9729 struct ath12k_htc_svc_conn_req conn_req = {}; 9730 struct ath12k_htc_svc_conn_resp conn_resp = {}; 9731 9732 /* these fields are the same for all service endpoints */ 9733 conn_req.ep_ops.ep_tx_complete = ath12k_wmi_htc_tx_complete; 9734 conn_req.ep_ops.ep_rx_complete = ath12k_wmi_op_rx; 9735 conn_req.ep_ops.ep_tx_credits = ath12k_wmi_op_ep_tx_credits; 9736 9737 /* connect to control service */ 9738 conn_req.service_id = svc_id[pdev_idx]; 9739 9740 status = ath12k_htc_connect_service(&ab->htc, &conn_req, &conn_resp); 9741 if (status) { 9742 ath12k_warn(ab, "failed to connect to WMI CONTROL service status: %d\n", 9743 status); 9744 return status; 9745 } 9746 9747 ab->wmi_ab.wmi_endpoint_id[pdev_idx] = conn_resp.eid; 9748 ab->wmi_ab.wmi[pdev_idx].eid = conn_resp.eid; 9749 ab->wmi_ab.max_msg_len[pdev_idx] = conn_resp.max_msg_len; 9750 9751 return 0; 9752 } 9753 9754 static int 9755 ath12k_wmi_send_unit_test_cmd(struct ath12k *ar, 9756 struct wmi_unit_test_cmd ut_cmd, 9757 u32 *test_args) 9758 { 9759 struct ath12k_wmi_pdev *wmi = ar->wmi; 9760 struct wmi_unit_test_cmd *cmd; 9761 struct sk_buff *skb; 9762 struct wmi_tlv *tlv; 9763 void *ptr; 9764 u32 *ut_cmd_args; 9765 int buf_len, arg_len; 9766 int ret; 9767 int i; 9768 9769 arg_len = sizeof(u32) * le32_to_cpu(ut_cmd.num_args); 9770 buf_len = sizeof(ut_cmd) + arg_len + TLV_HDR_SIZE; 9771 9772 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 9773 if (!skb) 9774 return -ENOMEM; 9775 9776 cmd = (struct wmi_unit_test_cmd *)skb->data; 9777 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_UNIT_TEST_CMD, 9778 sizeof(ut_cmd)); 9779 9780 cmd->vdev_id = ut_cmd.vdev_id; 9781 cmd->module_id = ut_cmd.module_id; 9782 cmd->num_args = ut_cmd.num_args; 9783 cmd->diag_token = ut_cmd.diag_token; 9784 9785 ptr = skb->data + sizeof(ut_cmd); 9786 9787 tlv = ptr; 9788 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 9789 9790 ptr += TLV_HDR_SIZE; 9791 9792 ut_cmd_args = ptr; 9793 for (i = 0; i < le32_to_cpu(ut_cmd.num_args); i++) 9794 ut_cmd_args[i] = test_args[i]; 9795 9796 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 9797 "WMI unit test : module %d vdev %d n_args %d token %d\n", 9798 cmd->module_id, cmd->vdev_id, cmd->num_args, 9799 cmd->diag_token); 9800 9801 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_UNIT_TEST_CMDID); 9802 9803 if (ret) { 9804 ath12k_warn(ar->ab, "failed to send WMI_UNIT_TEST CMD :%d\n", 9805 ret); 9806 dev_kfree_skb(skb); 9807 } 9808 9809 return ret; 9810 } 9811 9812 int ath12k_wmi_simulate_radar(struct ath12k *ar) 9813 { 9814 struct ath12k_link_vif *arvif; 9815 u32 dfs_args[DFS_MAX_TEST_ARGS]; 9816 struct wmi_unit_test_cmd wmi_ut; 9817 bool arvif_found = false; 9818 9819 list_for_each_entry(arvif, &ar->arvifs, list) { 9820 if (arvif->is_started && arvif->ahvif->vdev_type == WMI_VDEV_TYPE_AP) { 9821 arvif_found = true; 9822 break; 9823 } 9824 } 9825 9826 if (!arvif_found) 9827 return -EINVAL; 9828 9829 dfs_args[DFS_TEST_CMDID] = 0; 9830 dfs_args[DFS_TEST_PDEV_ID] = ar->pdev->pdev_id; 9831 /* Currently we could pass segment_id(b0 - b1), chirp(b2) 9832 * freq offset (b3 - b10) to unit test. For simulation 9833 * purpose this can be set to 0 which is valid. 9834 */ 9835 dfs_args[DFS_TEST_RADAR_PARAM] = 0; 9836 9837 wmi_ut.vdev_id = cpu_to_le32(arvif->vdev_id); 9838 wmi_ut.module_id = cpu_to_le32(DFS_UNIT_TEST_MODULE); 9839 wmi_ut.num_args = cpu_to_le32(DFS_MAX_TEST_ARGS); 9840 wmi_ut.diag_token = cpu_to_le32(DFS_UNIT_TEST_TOKEN); 9841 9842 ath12k_dbg(ar->ab, ATH12K_DBG_REG, "Triggering Radar Simulation\n"); 9843 9844 return ath12k_wmi_send_unit_test_cmd(ar, wmi_ut, dfs_args); 9845 } 9846 9847 int ath12k_wmi_send_tpc_stats_request(struct ath12k *ar, 9848 enum wmi_halphy_ctrl_path_stats_id tpc_stats_type) 9849 { 9850 struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *cmd; 9851 struct ath12k_wmi_pdev *wmi = ar->wmi; 9852 struct sk_buff *skb; 9853 struct wmi_tlv *tlv; 9854 __le32 *pdev_id; 9855 u32 buf_len; 9856 void *ptr; 9857 int ret; 9858 9859 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + sizeof(u32) + TLV_HDR_SIZE + TLV_HDR_SIZE; 9860 9861 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 9862 if (!skb) 9863 return -ENOMEM; 9864 cmd = (struct wmi_request_halphy_ctrl_path_stats_cmd_fixed_params *)skb->data; 9865 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HALPHY_CTRL_PATH_CMD_FIXED_PARAM, 9866 sizeof(*cmd)); 9867 9868 cmd->stats_id_mask = cpu_to_le32(WMI_REQ_CTRL_PATH_PDEV_TX_STAT); 9869 cmd->action = cpu_to_le32(WMI_REQUEST_CTRL_PATH_STAT_GET); 9870 cmd->subid = cpu_to_le32(tpc_stats_type); 9871 9872 ptr = skb->data + sizeof(*cmd); 9873 9874 /* The below TLV arrays optionally follow this fixed param TLV structure 9875 * 1. ARRAY_UINT32 pdev_ids[] 9876 * If this array is present and non-zero length, stats should only 9877 * be provided from the pdevs identified in the array. 9878 * 2. ARRAY_UNIT32 vdev_ids[] 9879 * If this array is present and non-zero length, stats should only 9880 * be provided from the vdevs identified in the array. 9881 * 3. ath12k_wmi_mac_addr_params peer_macaddr[]; 9882 * If this array is present and non-zero length, stats should only 9883 * be provided from the peers with the MAC addresses specified 9884 * in the array 9885 */ 9886 tlv = ptr; 9887 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32)); 9888 ptr += TLV_HDR_SIZE; 9889 9890 pdev_id = ptr; 9891 *pdev_id = cpu_to_le32(ath12k_mac_get_target_pdev_id(ar)); 9892 ptr += sizeof(*pdev_id); 9893 9894 tlv = ptr; 9895 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 9896 ptr += TLV_HDR_SIZE; 9897 9898 tlv = ptr; 9899 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_FIXED_STRUCT, 0); 9900 ptr += TLV_HDR_SIZE; 9901 9902 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_REQUEST_HALPHY_CTRL_PATH_STATS_CMDID); 9903 if (ret) { 9904 ath12k_warn(ar->ab, 9905 "failed to submit WMI_REQUEST_STATS_CTRL_PATH_CMDID\n"); 9906 dev_kfree_skb(skb); 9907 return ret; 9908 } 9909 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "WMI get TPC STATS sent on pdev %d\n", 9910 ar->pdev->pdev_id); 9911 9912 return ret; 9913 } 9914 9915 int ath12k_wmi_connect(struct ath12k_base *ab) 9916 { 9917 u32 i; 9918 u8 wmi_ep_count; 9919 9920 wmi_ep_count = ab->htc.wmi_ep_count; 9921 if (wmi_ep_count > ab->hw_params->max_radios) 9922 return -1; 9923 9924 for (i = 0; i < wmi_ep_count; i++) 9925 ath12k_connect_pdev_htc_service(ab, i); 9926 9927 return 0; 9928 } 9929 9930 static void ath12k_wmi_pdev_detach(struct ath12k_base *ab, u8 pdev_id) 9931 { 9932 if (WARN_ON(pdev_id >= MAX_RADIOS)) 9933 return; 9934 9935 /* TODO: Deinit any pdev specific wmi resource */ 9936 } 9937 9938 int ath12k_wmi_pdev_attach(struct ath12k_base *ab, 9939 u8 pdev_id) 9940 { 9941 struct ath12k_wmi_pdev *wmi_handle; 9942 9943 if (pdev_id >= ab->hw_params->max_radios) 9944 return -EINVAL; 9945 9946 wmi_handle = &ab->wmi_ab.wmi[pdev_id]; 9947 9948 wmi_handle->wmi_ab = &ab->wmi_ab; 9949 9950 ab->wmi_ab.ab = ab; 9951 /* TODO: Init remaining resource specific to pdev */ 9952 9953 return 0; 9954 } 9955 9956 int ath12k_wmi_attach(struct ath12k_base *ab) 9957 { 9958 int ret; 9959 9960 ret = ath12k_wmi_pdev_attach(ab, 0); 9961 if (ret) 9962 return ret; 9963 9964 ab->wmi_ab.ab = ab; 9965 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_MAX; 9966 9967 /* It's overwritten when service_ext_ready is handled */ 9968 if (ab->hw_params->single_pdev_only) 9969 ab->wmi_ab.preferred_hw_mode = WMI_HOST_HW_MODE_SINGLE; 9970 9971 /* TODO: Init remaining wmi soc resources required */ 9972 init_completion(&ab->wmi_ab.service_ready); 9973 init_completion(&ab->wmi_ab.unified_ready); 9974 9975 return 0; 9976 } 9977 9978 void ath12k_wmi_detach(struct ath12k_base *ab) 9979 { 9980 int i; 9981 9982 /* TODO: Deinit wmi resource specific to SOC as required */ 9983 9984 for (i = 0; i < ab->htc.wmi_ep_count; i++) 9985 ath12k_wmi_pdev_detach(ab, i); 9986 9987 ath12k_wmi_free_dbring_caps(ab); 9988 } 9989 9990 int ath12k_wmi_hw_data_filter_cmd(struct ath12k *ar, struct wmi_hw_data_filter_arg *arg) 9991 { 9992 struct wmi_hw_data_filter_cmd *cmd; 9993 struct sk_buff *skb; 9994 int len; 9995 9996 len = sizeof(*cmd); 9997 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 9998 9999 if (!skb) 10000 return -ENOMEM; 10001 10002 cmd = (struct wmi_hw_data_filter_cmd *)skb->data; 10003 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_HW_DATA_FILTER_CMD, 10004 sizeof(*cmd)); 10005 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 10006 cmd->enable = cpu_to_le32(arg->enable ? 1 : 0); 10007 10008 /* Set all modes in case of disable */ 10009 if (arg->enable) 10010 cmd->hw_filter_bitmap = cpu_to_le32(arg->hw_filter_bitmap); 10011 else 10012 cmd->hw_filter_bitmap = cpu_to_le32((u32)~0U); 10013 10014 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10015 "wmi hw data filter enable %d filter_bitmap 0x%x\n", 10016 arg->enable, arg->hw_filter_bitmap); 10017 10018 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_HW_DATA_FILTER_CMDID); 10019 } 10020 10021 int ath12k_wmi_wow_host_wakeup_ind(struct ath12k *ar) 10022 { 10023 struct wmi_wow_host_wakeup_cmd *cmd; 10024 struct sk_buff *skb; 10025 size_t len; 10026 10027 len = sizeof(*cmd); 10028 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10029 if (!skb) 10030 return -ENOMEM; 10031 10032 cmd = (struct wmi_wow_host_wakeup_cmd *)skb->data; 10033 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_HOSTWAKEUP_FROM_SLEEP_CMD, 10034 sizeof(*cmd)); 10035 10036 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow host wakeup ind\n"); 10037 10038 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID); 10039 } 10040 10041 int ath12k_wmi_wow_enable(struct ath12k *ar) 10042 { 10043 struct wmi_wow_enable_cmd *cmd; 10044 struct sk_buff *skb; 10045 int len; 10046 10047 len = sizeof(*cmd); 10048 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10049 if (!skb) 10050 return -ENOMEM; 10051 10052 cmd = (struct wmi_wow_enable_cmd *)skb->data; 10053 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ENABLE_CMD, 10054 sizeof(*cmd)); 10055 10056 cmd->enable = cpu_to_le32(1); 10057 cmd->pause_iface_config = cpu_to_le32(WOW_IFACE_PAUSE_ENABLED); 10058 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow enable\n"); 10059 10060 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_CMDID); 10061 } 10062 10063 int ath12k_wmi_wow_add_wakeup_event(struct ath12k *ar, u32 vdev_id, 10064 enum wmi_wow_wakeup_event event, 10065 u32 enable) 10066 { 10067 struct wmi_wow_add_del_event_cmd *cmd; 10068 struct sk_buff *skb; 10069 size_t len; 10070 10071 len = sizeof(*cmd); 10072 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10073 if (!skb) 10074 return -ENOMEM; 10075 10076 cmd = (struct wmi_wow_add_del_event_cmd *)skb->data; 10077 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_DEL_EVT_CMD, 10078 sizeof(*cmd)); 10079 cmd->vdev_id = cpu_to_le32(vdev_id); 10080 cmd->is_add = cpu_to_le32(enable); 10081 cmd->event_bitmap = cpu_to_le32((1 << event)); 10082 10083 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add wakeup event %s enable %d vdev_id %d\n", 10084 wow_wakeup_event(event), enable, vdev_id); 10085 10086 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID); 10087 } 10088 10089 int ath12k_wmi_wow_add_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id, 10090 const u8 *pattern, const u8 *mask, 10091 int pattern_len, int pattern_offset) 10092 { 10093 struct wmi_wow_add_pattern_cmd *cmd; 10094 struct wmi_wow_bitmap_pattern_params *bitmap; 10095 struct wmi_tlv *tlv; 10096 struct sk_buff *skb; 10097 void *ptr; 10098 size_t len; 10099 10100 len = sizeof(*cmd) + 10101 sizeof(*tlv) + /* array struct */ 10102 sizeof(*bitmap) + /* bitmap */ 10103 sizeof(*tlv) + /* empty ipv4 sync */ 10104 sizeof(*tlv) + /* empty ipv6 sync */ 10105 sizeof(*tlv) + /* empty magic */ 10106 sizeof(*tlv) + /* empty info timeout */ 10107 sizeof(*tlv) + sizeof(u32); /* ratelimit interval */ 10108 10109 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10110 if (!skb) 10111 return -ENOMEM; 10112 10113 /* cmd */ 10114 ptr = skb->data; 10115 cmd = ptr; 10116 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_ADD_PATTERN_CMD, 10117 sizeof(*cmd)); 10118 cmd->vdev_id = cpu_to_le32(vdev_id); 10119 cmd->pattern_id = cpu_to_le32(pattern_id); 10120 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN); 10121 10122 ptr += sizeof(*cmd); 10123 10124 /* bitmap */ 10125 tlv = ptr; 10126 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, sizeof(*bitmap)); 10127 10128 ptr += sizeof(*tlv); 10129 10130 bitmap = ptr; 10131 bitmap->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_BITMAP_PATTERN_T, 10132 sizeof(*bitmap)); 10133 memcpy(bitmap->patternbuf, pattern, pattern_len); 10134 memcpy(bitmap->bitmaskbuf, mask, pattern_len); 10135 bitmap->pattern_offset = cpu_to_le32(pattern_offset); 10136 bitmap->pattern_len = cpu_to_le32(pattern_len); 10137 bitmap->bitmask_len = cpu_to_le32(pattern_len); 10138 bitmap->pattern_id = cpu_to_le32(pattern_id); 10139 10140 ptr += sizeof(*bitmap); 10141 10142 /* ipv4 sync */ 10143 tlv = ptr; 10144 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 10145 10146 ptr += sizeof(*tlv); 10147 10148 /* ipv6 sync */ 10149 tlv = ptr; 10150 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 10151 10152 ptr += sizeof(*tlv); 10153 10154 /* magic */ 10155 tlv = ptr; 10156 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 0); 10157 10158 ptr += sizeof(*tlv); 10159 10160 /* pattern info timeout */ 10161 tlv = ptr; 10162 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 10163 10164 ptr += sizeof(*tlv); 10165 10166 /* ratelimit interval */ 10167 tlv = ptr; 10168 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, sizeof(u32)); 10169 10170 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow add pattern vdev_id %d pattern_id %d pattern_offset %d pattern_len %d\n", 10171 vdev_id, pattern_id, pattern_offset, pattern_len); 10172 10173 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow pattern: ", 10174 bitmap->patternbuf, pattern_len); 10175 ath12k_dbg_dump(ar->ab, ATH12K_DBG_WMI, NULL, "wow bitmask: ", 10176 bitmap->bitmaskbuf, pattern_len); 10177 10178 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_ADD_WAKE_PATTERN_CMDID); 10179 } 10180 10181 int ath12k_wmi_wow_del_pattern(struct ath12k *ar, u32 vdev_id, u32 pattern_id) 10182 { 10183 struct wmi_wow_del_pattern_cmd *cmd; 10184 struct sk_buff *skb; 10185 size_t len; 10186 10187 len = sizeof(*cmd); 10188 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10189 if (!skb) 10190 return -ENOMEM; 10191 10192 cmd = (struct wmi_wow_del_pattern_cmd *)skb->data; 10193 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_WOW_DEL_PATTERN_CMD, 10194 sizeof(*cmd)); 10195 cmd->vdev_id = cpu_to_le32(vdev_id); 10196 cmd->pattern_id = cpu_to_le32(pattern_id); 10197 cmd->pattern_type = cpu_to_le32(WOW_BITMAP_PATTERN); 10198 10199 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv wow del pattern vdev_id %d pattern_id %d\n", 10200 vdev_id, pattern_id); 10201 10202 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_WOW_DEL_WAKE_PATTERN_CMDID); 10203 } 10204 10205 static struct sk_buff * 10206 ath12k_wmi_op_gen_config_pno_start(struct ath12k *ar, u32 vdev_id, 10207 struct wmi_pno_scan_req_arg *pno) 10208 { 10209 struct nlo_configured_params *nlo_list; 10210 size_t len, nlo_list_len, channel_list_len; 10211 struct wmi_wow_nlo_config_cmd *cmd; 10212 __le32 *channel_list; 10213 struct wmi_tlv *tlv; 10214 struct sk_buff *skb; 10215 void *ptr; 10216 u32 i; 10217 10218 len = sizeof(*cmd) + 10219 sizeof(*tlv) + 10220 /* TLV place holder for array of structures 10221 * nlo_configured_params(nlo_list) 10222 */ 10223 sizeof(*tlv); 10224 /* TLV place holder for array of uint32 channel_list */ 10225 10226 channel_list_len = sizeof(u32) * pno->a_networks[0].channel_count; 10227 len += channel_list_len; 10228 10229 nlo_list_len = sizeof(*nlo_list) * pno->uc_networks_count; 10230 len += nlo_list_len; 10231 10232 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10233 if (!skb) 10234 return ERR_PTR(-ENOMEM); 10235 10236 ptr = skb->data; 10237 cmd = ptr; 10238 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, sizeof(*cmd)); 10239 10240 cmd->vdev_id = cpu_to_le32(pno->vdev_id); 10241 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_START | WMI_NLO_CONFIG_SSID_HIDE_EN); 10242 10243 /* current FW does not support min-max range for dwell time */ 10244 cmd->active_dwell_time = cpu_to_le32(pno->active_max_time); 10245 cmd->passive_dwell_time = cpu_to_le32(pno->passive_max_time); 10246 10247 if (pno->do_passive_scan) 10248 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SCAN_PASSIVE); 10249 10250 cmd->fast_scan_period = cpu_to_le32(pno->fast_scan_period); 10251 cmd->slow_scan_period = cpu_to_le32(pno->slow_scan_period); 10252 cmd->fast_scan_max_cycles = cpu_to_le32(pno->fast_scan_max_cycles); 10253 cmd->delay_start_time = cpu_to_le32(pno->delay_start_time); 10254 10255 if (pno->enable_pno_scan_randomization) { 10256 cmd->flags |= cpu_to_le32(WMI_NLO_CONFIG_SPOOFED_MAC_IN_PROBE_REQ | 10257 WMI_NLO_CONFIG_RANDOM_SEQ_NO_IN_PROBE_REQ); 10258 ether_addr_copy(cmd->mac_addr.addr, pno->mac_addr); 10259 ether_addr_copy(cmd->mac_mask.addr, pno->mac_addr_mask); 10260 } 10261 10262 ptr += sizeof(*cmd); 10263 10264 /* nlo_configured_params(nlo_list) */ 10265 cmd->no_of_ssids = cpu_to_le32(pno->uc_networks_count); 10266 tlv = ptr; 10267 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, nlo_list_len); 10268 10269 ptr += sizeof(*tlv); 10270 nlo_list = ptr; 10271 for (i = 0; i < pno->uc_networks_count; i++) { 10272 tlv = (struct wmi_tlv *)(&nlo_list[i].tlv_header); 10273 tlv->header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARRAY_BYTE, 10274 sizeof(*nlo_list)); 10275 10276 nlo_list[i].ssid.valid = cpu_to_le32(1); 10277 nlo_list[i].ssid.ssid.ssid_len = 10278 cpu_to_le32(pno->a_networks[i].ssid.ssid_len); 10279 memcpy(nlo_list[i].ssid.ssid.ssid, 10280 pno->a_networks[i].ssid.ssid, 10281 le32_to_cpu(nlo_list[i].ssid.ssid.ssid_len)); 10282 10283 if (pno->a_networks[i].rssi_threshold && 10284 pno->a_networks[i].rssi_threshold > -300) { 10285 nlo_list[i].rssi_cond.valid = cpu_to_le32(1); 10286 nlo_list[i].rssi_cond.rssi = 10287 cpu_to_le32(pno->a_networks[i].rssi_threshold); 10288 } 10289 10290 nlo_list[i].bcast_nw_type.valid = cpu_to_le32(1); 10291 nlo_list[i].bcast_nw_type.bcast_nw_type = 10292 cpu_to_le32(pno->a_networks[i].bcast_nw_type); 10293 } 10294 10295 ptr += nlo_list_len; 10296 cmd->num_of_channels = cpu_to_le32(pno->a_networks[0].channel_count); 10297 tlv = ptr; 10298 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, channel_list_len); 10299 ptr += sizeof(*tlv); 10300 channel_list = ptr; 10301 10302 for (i = 0; i < pno->a_networks[0].channel_count; i++) 10303 channel_list[i] = cpu_to_le32(pno->a_networks[0].channels[i]); 10304 10305 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi tlv start pno config vdev_id %d\n", 10306 vdev_id); 10307 10308 return skb; 10309 } 10310 10311 static struct sk_buff *ath12k_wmi_op_gen_config_pno_stop(struct ath12k *ar, 10312 u32 vdev_id) 10313 { 10314 struct wmi_wow_nlo_config_cmd *cmd; 10315 struct sk_buff *skb; 10316 size_t len; 10317 10318 len = sizeof(*cmd); 10319 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10320 if (!skb) 10321 return ERR_PTR(-ENOMEM); 10322 10323 cmd = (struct wmi_wow_nlo_config_cmd *)skb->data; 10324 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NLO_CONFIG_CMD, len); 10325 10326 cmd->vdev_id = cpu_to_le32(vdev_id); 10327 cmd->flags = cpu_to_le32(WMI_NLO_CONFIG_STOP); 10328 10329 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10330 "wmi tlv stop pno config vdev_id %d\n", vdev_id); 10331 return skb; 10332 } 10333 10334 int ath12k_wmi_wow_config_pno(struct ath12k *ar, u32 vdev_id, 10335 struct wmi_pno_scan_req_arg *pno_scan) 10336 { 10337 struct sk_buff *skb; 10338 10339 if (pno_scan->enable) 10340 skb = ath12k_wmi_op_gen_config_pno_start(ar, vdev_id, pno_scan); 10341 else 10342 skb = ath12k_wmi_op_gen_config_pno_stop(ar, vdev_id); 10343 10344 if (IS_ERR_OR_NULL(skb)) 10345 return -ENOMEM; 10346 10347 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID); 10348 } 10349 10350 static void ath12k_wmi_fill_ns_offload(struct ath12k *ar, 10351 struct wmi_arp_ns_offload_arg *offload, 10352 void **ptr, 10353 bool enable, 10354 bool ext) 10355 { 10356 struct wmi_ns_offload_params *ns; 10357 struct wmi_tlv *tlv; 10358 void *buf_ptr = *ptr; 10359 u32 ns_cnt, ns_ext_tuples; 10360 int i, max_offloads; 10361 10362 ns_cnt = offload->ipv6_count; 10363 10364 tlv = buf_ptr; 10365 10366 if (ext) { 10367 ns_ext_tuples = offload->ipv6_count - WMI_MAX_NS_OFFLOADS; 10368 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10369 ns_ext_tuples * sizeof(*ns)); 10370 i = WMI_MAX_NS_OFFLOADS; 10371 max_offloads = offload->ipv6_count; 10372 } else { 10373 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10374 WMI_MAX_NS_OFFLOADS * sizeof(*ns)); 10375 i = 0; 10376 max_offloads = WMI_MAX_NS_OFFLOADS; 10377 } 10378 10379 buf_ptr += sizeof(*tlv); 10380 10381 for (; i < max_offloads; i++) { 10382 ns = buf_ptr; 10383 ns->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_NS_OFFLOAD_TUPLE, 10384 sizeof(*ns)); 10385 10386 if (enable) { 10387 if (i < ns_cnt) 10388 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_VALID); 10389 10390 memcpy(ns->target_ipaddr[0], offload->ipv6_addr[i], 16); 10391 memcpy(ns->solicitation_ipaddr, offload->self_ipv6_addr[i], 16); 10392 10393 if (offload->ipv6_type[i]) 10394 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_IS_IPV6_ANYCAST); 10395 10396 memcpy(ns->target_mac.addr, offload->mac_addr, ETH_ALEN); 10397 10398 if (!is_zero_ether_addr(ns->target_mac.addr)) 10399 ns->flags |= cpu_to_le32(WMI_NSOL_FLAGS_MAC_VALID); 10400 10401 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10402 "wmi index %d ns_solicited %pI6 target %pI6", 10403 i, ns->solicitation_ipaddr, 10404 ns->target_ipaddr[0]); 10405 } 10406 10407 buf_ptr += sizeof(*ns); 10408 } 10409 10410 *ptr = buf_ptr; 10411 } 10412 10413 static void ath12k_wmi_fill_arp_offload(struct ath12k *ar, 10414 struct wmi_arp_ns_offload_arg *offload, 10415 void **ptr, 10416 bool enable) 10417 { 10418 struct wmi_arp_offload_params *arp; 10419 struct wmi_tlv *tlv; 10420 void *buf_ptr = *ptr; 10421 int i; 10422 10423 /* fill arp tuple */ 10424 tlv = buf_ptr; 10425 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10426 WMI_MAX_ARP_OFFLOADS * sizeof(*arp)); 10427 buf_ptr += sizeof(*tlv); 10428 10429 for (i = 0; i < WMI_MAX_ARP_OFFLOADS; i++) { 10430 arp = buf_ptr; 10431 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_ARP_OFFLOAD_TUPLE, 10432 sizeof(*arp)); 10433 10434 if (enable && i < offload->ipv4_count) { 10435 /* Copy the target ip addr and flags */ 10436 arp->flags = cpu_to_le32(WMI_ARPOL_FLAGS_VALID); 10437 memcpy(arp->target_ipaddr, offload->ipv4_addr[i], 4); 10438 10439 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "wmi arp offload address %pI4", 10440 arp->target_ipaddr); 10441 } 10442 10443 buf_ptr += sizeof(*arp); 10444 } 10445 10446 *ptr = buf_ptr; 10447 } 10448 10449 int ath12k_wmi_arp_ns_offload(struct ath12k *ar, 10450 struct ath12k_link_vif *arvif, 10451 struct wmi_arp_ns_offload_arg *offload, 10452 bool enable) 10453 { 10454 struct wmi_set_arp_ns_offload_cmd *cmd; 10455 struct wmi_tlv *tlv; 10456 struct sk_buff *skb; 10457 void *buf_ptr; 10458 size_t len; 10459 u8 ns_cnt, ns_ext_tuples = 0; 10460 10461 ns_cnt = offload->ipv6_count; 10462 10463 len = sizeof(*cmd) + 10464 sizeof(*tlv) + 10465 WMI_MAX_NS_OFFLOADS * sizeof(struct wmi_ns_offload_params) + 10466 sizeof(*tlv) + 10467 WMI_MAX_ARP_OFFLOADS * sizeof(struct wmi_arp_offload_params); 10468 10469 if (ns_cnt > WMI_MAX_NS_OFFLOADS) { 10470 ns_ext_tuples = ns_cnt - WMI_MAX_NS_OFFLOADS; 10471 len += sizeof(*tlv) + 10472 ns_ext_tuples * sizeof(struct wmi_ns_offload_params); 10473 } 10474 10475 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10476 if (!skb) 10477 return -ENOMEM; 10478 10479 buf_ptr = skb->data; 10480 cmd = buf_ptr; 10481 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_SET_ARP_NS_OFFLOAD_CMD, 10482 sizeof(*cmd)); 10483 cmd->flags = cpu_to_le32(0); 10484 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 10485 cmd->num_ns_ext_tuples = cpu_to_le32(ns_ext_tuples); 10486 10487 buf_ptr += sizeof(*cmd); 10488 10489 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 0); 10490 ath12k_wmi_fill_arp_offload(ar, offload, &buf_ptr, enable); 10491 10492 if (ns_ext_tuples) 10493 ath12k_wmi_fill_ns_offload(ar, offload, &buf_ptr, enable, 1); 10494 10495 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_SET_ARP_NS_OFFLOAD_CMDID); 10496 } 10497 10498 int ath12k_wmi_gtk_rekey_offload(struct ath12k *ar, 10499 struct ath12k_link_vif *arvif, bool enable) 10500 { 10501 struct ath12k_rekey_data *rekey_data = &arvif->rekey_data; 10502 struct wmi_gtk_rekey_offload_cmd *cmd; 10503 struct sk_buff *skb; 10504 __le64 replay_ctr; 10505 int len; 10506 10507 len = sizeof(*cmd); 10508 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10509 if (!skb) 10510 return -ENOMEM; 10511 10512 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data; 10513 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd)); 10514 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 10515 10516 if (enable) { 10517 cmd->flags = cpu_to_le32(GTK_OFFLOAD_ENABLE_OPCODE); 10518 10519 /* the length in rekey_data and cmd is equal */ 10520 memcpy(cmd->kck, rekey_data->kck, sizeof(cmd->kck)); 10521 memcpy(cmd->kek, rekey_data->kek, sizeof(cmd->kek)); 10522 10523 replay_ctr = cpu_to_le64(rekey_data->replay_ctr); 10524 memcpy(cmd->replay_ctr, &replay_ctr, 10525 sizeof(replay_ctr)); 10526 } else { 10527 cmd->flags = cpu_to_le32(GTK_OFFLOAD_DISABLE_OPCODE); 10528 } 10529 10530 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "offload gtk rekey vdev: %d %d\n", 10531 arvif->vdev_id, enable); 10532 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID); 10533 } 10534 10535 int ath12k_wmi_gtk_rekey_getinfo(struct ath12k *ar, 10536 struct ath12k_link_vif *arvif) 10537 { 10538 struct wmi_gtk_rekey_offload_cmd *cmd; 10539 struct sk_buff *skb; 10540 int len; 10541 10542 len = sizeof(*cmd); 10543 skb = ath12k_wmi_alloc_skb(ar->wmi->wmi_ab, len); 10544 if (!skb) 10545 return -ENOMEM; 10546 10547 cmd = (struct wmi_gtk_rekey_offload_cmd *)skb->data; 10548 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_GTK_OFFLOAD_CMD, sizeof(*cmd)); 10549 cmd->vdev_id = cpu_to_le32(arvif->vdev_id); 10550 cmd->flags = cpu_to_le32(GTK_OFFLOAD_REQUEST_STATUS_OPCODE); 10551 10552 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "get gtk rekey vdev_id: %d\n", 10553 arvif->vdev_id); 10554 return ath12k_wmi_cmd_send(ar->wmi, skb, WMI_GTK_OFFLOAD_CMDID); 10555 } 10556 10557 int ath12k_wmi_sta_keepalive(struct ath12k *ar, 10558 const struct wmi_sta_keepalive_arg *arg) 10559 { 10560 struct wmi_sta_keepalive_arp_resp_params *arp; 10561 struct ath12k_wmi_pdev *wmi = ar->wmi; 10562 struct wmi_sta_keepalive_cmd *cmd; 10563 struct sk_buff *skb; 10564 size_t len; 10565 10566 len = sizeof(*cmd) + sizeof(*arp); 10567 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 10568 if (!skb) 10569 return -ENOMEM; 10570 10571 cmd = (struct wmi_sta_keepalive_cmd *)skb->data; 10572 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALIVE_CMD, sizeof(*cmd)); 10573 cmd->vdev_id = cpu_to_le32(arg->vdev_id); 10574 cmd->enabled = cpu_to_le32(arg->enabled); 10575 cmd->interval = cpu_to_le32(arg->interval); 10576 cmd->method = cpu_to_le32(arg->method); 10577 10578 arp = (struct wmi_sta_keepalive_arp_resp_params *)(cmd + 1); 10579 arp->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_STA_KEEPALVE_ARP_RESPONSE, 10580 sizeof(*arp)); 10581 if (arg->method == WMI_STA_KEEPALIVE_METHOD_UNSOLICITED_ARP_RESPONSE || 10582 arg->method == WMI_STA_KEEPALIVE_METHOD_GRATUITOUS_ARP_REQUEST) { 10583 arp->src_ip4_addr = cpu_to_le32(arg->src_ip4_addr); 10584 arp->dest_ip4_addr = cpu_to_le32(arg->dest_ip4_addr); 10585 ether_addr_copy(arp->dest_mac_addr.addr, arg->dest_mac_addr); 10586 } 10587 10588 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10589 "wmi sta keepalive vdev %d enabled %d method %d interval %d\n", 10590 arg->vdev_id, arg->enabled, arg->method, arg->interval); 10591 10592 return ath12k_wmi_cmd_send(wmi, skb, WMI_STA_KEEPALIVE_CMDID); 10593 } 10594 10595 int ath12k_wmi_mlo_setup(struct ath12k *ar, struct wmi_mlo_setup_arg *mlo_params) 10596 { 10597 struct wmi_mlo_setup_cmd *cmd; 10598 struct ath12k_wmi_pdev *wmi = ar->wmi; 10599 u32 *partner_links, num_links; 10600 int i, ret, buf_len, arg_len; 10601 struct sk_buff *skb; 10602 struct wmi_tlv *tlv; 10603 void *ptr; 10604 10605 num_links = mlo_params->num_partner_links; 10606 arg_len = num_links * sizeof(u32); 10607 buf_len = sizeof(*cmd) + TLV_HDR_SIZE + arg_len; 10608 10609 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, buf_len); 10610 if (!skb) 10611 return -ENOMEM; 10612 10613 cmd = (struct wmi_mlo_setup_cmd *)skb->data; 10614 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_SETUP_CMD, 10615 sizeof(*cmd)); 10616 cmd->mld_group_id = mlo_params->group_id; 10617 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 10618 ptr = skb->data + sizeof(*cmd); 10619 10620 tlv = ptr; 10621 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, arg_len); 10622 ptr += TLV_HDR_SIZE; 10623 10624 partner_links = ptr; 10625 for (i = 0; i < num_links; i++) 10626 partner_links[i] = mlo_params->partner_link_id[i]; 10627 10628 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_SETUP_CMDID); 10629 if (ret) { 10630 ath12k_warn(ar->ab, "failed to submit WMI_MLO_SETUP_CMDID command: %d\n", 10631 ret); 10632 dev_kfree_skb(skb); 10633 return ret; 10634 } 10635 10636 return 0; 10637 } 10638 10639 int ath12k_wmi_mlo_ready(struct ath12k *ar) 10640 { 10641 struct wmi_mlo_ready_cmd *cmd; 10642 struct ath12k_wmi_pdev *wmi = ar->wmi; 10643 struct sk_buff *skb; 10644 int ret, len; 10645 10646 len = sizeof(*cmd); 10647 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 10648 if (!skb) 10649 return -ENOMEM; 10650 10651 cmd = (struct wmi_mlo_ready_cmd *)skb->data; 10652 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_READY_CMD, 10653 sizeof(*cmd)); 10654 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 10655 10656 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_READY_CMDID); 10657 if (ret) { 10658 ath12k_warn(ar->ab, "failed to submit WMI_MLO_READY_CMDID command: %d\n", 10659 ret); 10660 dev_kfree_skb(skb); 10661 return ret; 10662 } 10663 10664 return 0; 10665 } 10666 10667 int ath12k_wmi_mlo_teardown(struct ath12k *ar) 10668 { 10669 struct wmi_mlo_teardown_cmd *cmd; 10670 struct ath12k_wmi_pdev *wmi = ar->wmi; 10671 struct sk_buff *skb; 10672 int ret, len; 10673 10674 len = sizeof(*cmd); 10675 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 10676 if (!skb) 10677 return -ENOMEM; 10678 10679 cmd = (struct wmi_mlo_teardown_cmd *)skb->data; 10680 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_TEARDOWN_CMD, 10681 sizeof(*cmd)); 10682 cmd->pdev_id = cpu_to_le32(ar->pdev->pdev_id); 10683 cmd->reason_code = WMI_MLO_TEARDOWN_SSR_REASON; 10684 10685 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_MLO_TEARDOWN_CMDID); 10686 if (ret) { 10687 ath12k_warn(ar->ab, "failed to submit WMI MLO teardown command: %d\n", 10688 ret); 10689 dev_kfree_skb(skb); 10690 return ret; 10691 } 10692 10693 return 0; 10694 } 10695 10696 bool ath12k_wmi_supports_6ghz_cc_ext(struct ath12k *ar) 10697 { 10698 return test_bit(WMI_TLV_SERVICE_REG_CC_EXT_EVENT_SUPPORT, 10699 ar->ab->wmi_ab.svc_map) && ar->supports_6ghz; 10700 } 10701 10702 int ath12k_wmi_send_vdev_set_tpc_power(struct ath12k *ar, 10703 u32 vdev_id, 10704 struct ath12k_reg_tpc_power_info *param) 10705 { 10706 struct wmi_vdev_set_tpc_power_cmd *cmd; 10707 struct ath12k_wmi_pdev *wmi = ar->wmi; 10708 struct wmi_vdev_ch_power_params *ch; 10709 int i, ret, len, array_len; 10710 struct sk_buff *skb; 10711 struct wmi_tlv *tlv; 10712 u8 *ptr; 10713 10714 array_len = sizeof(*ch) * param->num_pwr_levels; 10715 len = sizeof(*cmd) + TLV_HDR_SIZE + array_len; 10716 10717 skb = ath12k_wmi_alloc_skb(wmi->wmi_ab, len); 10718 if (!skb) 10719 return -ENOMEM; 10720 10721 ptr = skb->data; 10722 10723 cmd = (struct wmi_vdev_set_tpc_power_cmd *)ptr; 10724 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_SET_TPC_POWER_CMD, 10725 sizeof(*cmd)); 10726 cmd->vdev_id = cpu_to_le32(vdev_id); 10727 cmd->psd_power = cpu_to_le32(param->is_psd_power); 10728 cmd->eirp_power = cpu_to_le32(param->eirp_power); 10729 cmd->power_type_6ghz = cpu_to_le32(param->ap_power_type); 10730 10731 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, 10732 "tpc vdev id %d is psd power %d eirp power %d 6 ghz power type %d\n", 10733 vdev_id, param->is_psd_power, param->eirp_power, param->ap_power_type); 10734 10735 ptr += sizeof(*cmd); 10736 tlv = (struct wmi_tlv *)ptr; 10737 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, array_len); 10738 10739 ptr += TLV_HDR_SIZE; 10740 ch = (struct wmi_vdev_ch_power_params *)ptr; 10741 10742 for (i = 0; i < param->num_pwr_levels; i++, ch++) { 10743 ch->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_VDEV_CH_POWER_INFO, 10744 sizeof(*ch)); 10745 ch->chan_cfreq = cpu_to_le32(param->chan_power_info[i].chan_cfreq); 10746 ch->tx_power = cpu_to_le32(param->chan_power_info[i].tx_power); 10747 10748 ath12k_dbg(ar->ab, ATH12K_DBG_WMI, "tpc chan freq %d TX power %d\n", 10749 ch->chan_cfreq, ch->tx_power); 10750 } 10751 10752 ret = ath12k_wmi_cmd_send(wmi, skb, WMI_VDEV_SET_TPC_POWER_CMDID); 10753 if (ret) { 10754 ath12k_warn(ar->ab, "failed to send WMI_VDEV_SET_TPC_POWER_CMDID\n"); 10755 dev_kfree_skb(skb); 10756 return ret; 10757 } 10758 10759 return 0; 10760 } 10761 10762 static int 10763 ath12k_wmi_fill_disallowed_bmap(struct ath12k_base *ab, 10764 struct wmi_disallowed_mlo_mode_bitmap_params *dislw_bmap, 10765 struct wmi_mlo_link_set_active_arg *arg) 10766 { 10767 struct wmi_ml_disallow_mode_bmap_arg *dislw_bmap_arg; 10768 u8 i; 10769 10770 if (arg->num_disallow_mode_comb > 10771 ARRAY_SIZE(arg->disallow_bmap)) { 10772 ath12k_warn(ab, "invalid num_disallow_mode_comb: %d", 10773 arg->num_disallow_mode_comb); 10774 return -EINVAL; 10775 } 10776 10777 dislw_bmap_arg = &arg->disallow_bmap[0]; 10778 for (i = 0; i < arg->num_disallow_mode_comb; i++) { 10779 dislw_bmap->tlv_header = 10780 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*dislw_bmap)); 10781 dislw_bmap->disallowed_mode_bitmap = 10782 cpu_to_le32(dislw_bmap_arg->disallowed_mode); 10783 dislw_bmap->ieee_link_id_comb = 10784 le32_encode_bits(dislw_bmap_arg->ieee_link_id[0], 10785 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_1) | 10786 le32_encode_bits(dislw_bmap_arg->ieee_link_id[1], 10787 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_2) | 10788 le32_encode_bits(dislw_bmap_arg->ieee_link_id[2], 10789 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_3) | 10790 le32_encode_bits(dislw_bmap_arg->ieee_link_id[3], 10791 WMI_DISALW_MLO_MODE_BMAP_IEEE_LINK_ID_COMB_4); 10792 10793 ath12k_dbg(ab, ATH12K_DBG_WMI, 10794 "entry %d disallowed_mode %d ieee_link_id_comb 0x%x", 10795 i, dislw_bmap_arg->disallowed_mode, 10796 dislw_bmap_arg->ieee_link_id_comb); 10797 dislw_bmap++; 10798 dislw_bmap_arg++; 10799 } 10800 10801 return 0; 10802 } 10803 10804 int ath12k_wmi_send_mlo_link_set_active_cmd(struct ath12k_base *ab, 10805 struct wmi_mlo_link_set_active_arg *arg) 10806 { 10807 struct wmi_disallowed_mlo_mode_bitmap_params *disallowed_mode_bmap; 10808 struct wmi_mlo_set_active_link_number_params *link_num_param; 10809 u32 num_link_num_param = 0, num_vdev_bitmap = 0; 10810 struct ath12k_wmi_base *wmi_ab = &ab->wmi_ab; 10811 struct wmi_mlo_link_set_active_cmd *cmd; 10812 u32 num_inactive_vdev_bitmap = 0; 10813 u32 num_disallow_mode_comb = 0; 10814 struct wmi_tlv *tlv; 10815 struct sk_buff *skb; 10816 __le32 *vdev_bitmap; 10817 void *buf_ptr; 10818 int i, ret; 10819 u32 len; 10820 10821 if (!arg->num_vdev_bitmap && !arg->num_link_entry) { 10822 ath12k_warn(ab, "Invalid num_vdev_bitmap and num_link_entry"); 10823 return -EINVAL; 10824 } 10825 10826 switch (arg->force_mode) { 10827 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_LINK_NUM: 10828 case WMI_MLO_LINK_FORCE_MODE_INACTIVE_LINK_NUM: 10829 num_link_num_param = arg->num_link_entry; 10830 fallthrough; 10831 case WMI_MLO_LINK_FORCE_MODE_ACTIVE: 10832 case WMI_MLO_LINK_FORCE_MODE_INACTIVE: 10833 case WMI_MLO_LINK_FORCE_MODE_NO_FORCE: 10834 num_vdev_bitmap = arg->num_vdev_bitmap; 10835 break; 10836 case WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE: 10837 num_vdev_bitmap = arg->num_vdev_bitmap; 10838 num_inactive_vdev_bitmap = arg->num_inactive_vdev_bitmap; 10839 break; 10840 default: 10841 ath12k_warn(ab, "Invalid force mode: %u", arg->force_mode); 10842 return -EINVAL; 10843 } 10844 10845 num_disallow_mode_comb = arg->num_disallow_mode_comb; 10846 len = sizeof(*cmd) + 10847 TLV_HDR_SIZE + sizeof(*link_num_param) * num_link_num_param + 10848 TLV_HDR_SIZE + sizeof(*vdev_bitmap) * num_vdev_bitmap + 10849 TLV_HDR_SIZE + TLV_HDR_SIZE + TLV_HDR_SIZE + 10850 TLV_HDR_SIZE + sizeof(*disallowed_mode_bmap) * num_disallow_mode_comb; 10851 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) 10852 len += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap; 10853 10854 skb = ath12k_wmi_alloc_skb(wmi_ab, len); 10855 if (!skb) 10856 return -ENOMEM; 10857 10858 cmd = (struct wmi_mlo_link_set_active_cmd *)skb->data; 10859 cmd->tlv_header = ath12k_wmi_tlv_cmd_hdr(WMI_TAG_MLO_LINK_SET_ACTIVE_CMD, 10860 sizeof(*cmd)); 10861 cmd->force_mode = cpu_to_le32(arg->force_mode); 10862 cmd->reason = cpu_to_le32(arg->reason); 10863 ath12k_dbg(ab, ATH12K_DBG_WMI, 10864 "mode %d reason %d num_link_num_param %d num_vdev_bitmap %d inactive %d num_disallow_mode_comb %d", 10865 arg->force_mode, arg->reason, num_link_num_param, 10866 num_vdev_bitmap, num_inactive_vdev_bitmap, 10867 num_disallow_mode_comb); 10868 10869 buf_ptr = skb->data + sizeof(*cmd); 10870 tlv = buf_ptr; 10871 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10872 sizeof(*link_num_param) * num_link_num_param); 10873 buf_ptr += TLV_HDR_SIZE; 10874 10875 if (num_link_num_param) { 10876 cmd->ctrl_flags = 10877 le32_encode_bits(arg->ctrl_flags.dync_force_link_num ? 1 : 0, 10878 CRTL_F_DYNC_FORCE_LINK_NUM); 10879 10880 link_num_param = buf_ptr; 10881 for (i = 0; i < num_link_num_param; i++) { 10882 link_num_param->tlv_header = 10883 ath12k_wmi_tlv_cmd_hdr(0, sizeof(*link_num_param)); 10884 link_num_param->num_of_link = 10885 cpu_to_le32(arg->link_num[i].num_of_link); 10886 link_num_param->vdev_type = 10887 cpu_to_le32(arg->link_num[i].vdev_type); 10888 link_num_param->vdev_subtype = 10889 cpu_to_le32(arg->link_num[i].vdev_subtype); 10890 link_num_param->home_freq = 10891 cpu_to_le32(arg->link_num[i].home_freq); 10892 ath12k_dbg(ab, ATH12K_DBG_WMI, 10893 "entry %d num_of_link %d vdev type %d subtype %d freq %d control_flags %d", 10894 i, arg->link_num[i].num_of_link, 10895 arg->link_num[i].vdev_type, 10896 arg->link_num[i].vdev_subtype, 10897 arg->link_num[i].home_freq, 10898 __le32_to_cpu(cmd->ctrl_flags)); 10899 link_num_param++; 10900 } 10901 10902 buf_ptr += sizeof(*link_num_param) * num_link_num_param; 10903 } 10904 10905 tlv = buf_ptr; 10906 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 10907 sizeof(*vdev_bitmap) * num_vdev_bitmap); 10908 buf_ptr += TLV_HDR_SIZE; 10909 10910 if (num_vdev_bitmap) { 10911 vdev_bitmap = buf_ptr; 10912 for (i = 0; i < num_vdev_bitmap; i++) { 10913 vdev_bitmap[i] = cpu_to_le32(arg->vdev_bitmap[i]); 10914 ath12k_dbg(ab, ATH12K_DBG_WMI, "entry %d vdev_id_bitmap 0x%x", 10915 i, arg->vdev_bitmap[i]); 10916 } 10917 10918 buf_ptr += sizeof(*vdev_bitmap) * num_vdev_bitmap; 10919 } 10920 10921 if (arg->force_mode == WMI_MLO_LINK_FORCE_MODE_ACTIVE_INACTIVE) { 10922 tlv = buf_ptr; 10923 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 10924 sizeof(*vdev_bitmap) * 10925 num_inactive_vdev_bitmap); 10926 buf_ptr += TLV_HDR_SIZE; 10927 10928 if (num_inactive_vdev_bitmap) { 10929 vdev_bitmap = buf_ptr; 10930 for (i = 0; i < num_inactive_vdev_bitmap; i++) { 10931 vdev_bitmap[i] = 10932 cpu_to_le32(arg->inactive_vdev_bitmap[i]); 10933 ath12k_dbg(ab, ATH12K_DBG_WMI, 10934 "entry %d inactive_vdev_id_bitmap 0x%x", 10935 i, arg->inactive_vdev_bitmap[i]); 10936 } 10937 10938 buf_ptr += sizeof(*vdev_bitmap) * num_inactive_vdev_bitmap; 10939 } 10940 } else { 10941 /* add empty vdev bitmap2 tlv */ 10942 tlv = buf_ptr; 10943 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 10944 buf_ptr += TLV_HDR_SIZE; 10945 } 10946 10947 /* add empty ieee_link_id_bitmap tlv */ 10948 tlv = buf_ptr; 10949 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 10950 buf_ptr += TLV_HDR_SIZE; 10951 10952 /* add empty ieee_link_id_bitmap2 tlv */ 10953 tlv = buf_ptr; 10954 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_UINT32, 0); 10955 buf_ptr += TLV_HDR_SIZE; 10956 10957 tlv = buf_ptr; 10958 tlv->header = ath12k_wmi_tlv_hdr(WMI_TAG_ARRAY_STRUCT, 10959 sizeof(*disallowed_mode_bmap) * 10960 arg->num_disallow_mode_comb); 10961 buf_ptr += TLV_HDR_SIZE; 10962 10963 ret = ath12k_wmi_fill_disallowed_bmap(ab, buf_ptr, arg); 10964 if (ret) 10965 goto free_skb; 10966 10967 ret = ath12k_wmi_cmd_send(&wmi_ab->wmi[0], skb, WMI_MLO_LINK_SET_ACTIVE_CMDID); 10968 if (ret) { 10969 ath12k_warn(ab, 10970 "failed to send WMI_MLO_LINK_SET_ACTIVE_CMDID: %d\n", ret); 10971 goto free_skb; 10972 } 10973 10974 ath12k_dbg(ab, ATH12K_DBG_WMI, "WMI mlo link set active cmd"); 10975 10976 return ret; 10977 10978 free_skb: 10979 dev_kfree_skb(skb); 10980 return ret; 10981 } 10982