1d5c65159SKalle Valo /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2d5c65159SKalle Valo /* 3d5c65159SKalle Valo * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4d5c65159SKalle Valo */ 5d5c65159SKalle Valo 6d5c65159SKalle Valo #ifndef ATH11K_MAC_H 7d5c65159SKalle Valo #define ATH11K_MAC_H 8d5c65159SKalle Valo 9d5c65159SKalle Valo #include <net/mac80211.h> 10d5c65159SKalle Valo #include <net/cfg80211.h> 11d5c65159SKalle Valo 12d5c65159SKalle Valo struct ath11k; 13d5c65159SKalle Valo struct ath11k_base; 14d5c65159SKalle Valo 15d5c65159SKalle Valo struct ath11k_generic_iter { 16d5c65159SKalle Valo struct ath11k *ar; 17d5c65159SKalle Valo int ret; 18d5c65159SKalle Valo }; 19d5c65159SKalle Valo 20d5c65159SKalle Valo /* number of failed packets (20 packets with 16 sw reties each) */ 21d5c65159SKalle Valo #define ATH11K_KICKOUT_THRESHOLD (20 * 16) 22d5c65159SKalle Valo 23d5c65159SKalle Valo /* Use insanely high numbers to make sure that the firmware implementation 24d5c65159SKalle Valo * won't start, we have the same functionality already in hostapd. Unit 25d5c65159SKalle Valo * is seconds. 26d5c65159SKalle Valo */ 27d5c65159SKalle Valo #define ATH11K_KEEPALIVE_MIN_IDLE 3747 28d5c65159SKalle Valo #define ATH11K_KEEPALIVE_MAX_IDLE 3895 29d5c65159SKalle Valo #define ATH11K_KEEPALIVE_MAX_UNRESPONSIVE 3900 30d5c65159SKalle Valo 31d5c65159SKalle Valo #define WMI_HOST_RC_DS_FLAG 0x01 32d5c65159SKalle Valo #define WMI_HOST_RC_CW40_FLAG 0x02 33d5c65159SKalle Valo #define WMI_HOST_RC_SGI_FLAG 0x04 34d5c65159SKalle Valo #define WMI_HOST_RC_HT_FLAG 0x08 35d5c65159SKalle Valo #define WMI_HOST_RC_RTSCTS_FLAG 0x10 36d5c65159SKalle Valo #define WMI_HOST_RC_TX_STBC_FLAG 0x20 37d5c65159SKalle Valo #define WMI_HOST_RC_RX_STBC_FLAG 0xC0 38d5c65159SKalle Valo #define WMI_HOST_RC_RX_STBC_FLAG_S 6 39d5c65159SKalle Valo #define WMI_HOST_RC_WEP_TKIP_FLAG 0x100 40d5c65159SKalle Valo #define WMI_HOST_RC_TS_FLAG 0x200 41d5c65159SKalle Valo #define WMI_HOST_RC_UAPSD_FLAG 0x400 42d5c65159SKalle Valo 43d5c65159SKalle Valo #define WMI_HT_CAP_ENABLED 0x0001 44d5c65159SKalle Valo #define WMI_HT_CAP_HT20_SGI 0x0002 45d5c65159SKalle Valo #define WMI_HT_CAP_DYNAMIC_SMPS 0x0004 46d5c65159SKalle Valo #define WMI_HT_CAP_TX_STBC 0x0008 47d5c65159SKalle Valo #define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3 48d5c65159SKalle Valo #define WMI_HT_CAP_RX_STBC 0x0030 49d5c65159SKalle Valo #define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4 50d5c65159SKalle Valo #define WMI_HT_CAP_LDPC 0x0040 51d5c65159SKalle Valo #define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080 52d5c65159SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY 0x0700 53d5c65159SKalle Valo #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8 54d5c65159SKalle Valo #define WMI_HT_CAP_HT40_SGI 0x0800 55d5c65159SKalle Valo #define WMI_HT_CAP_RX_LDPC 0x1000 56d5c65159SKalle Valo #define WMI_HT_CAP_TX_LDPC 0x2000 57d5c65159SKalle Valo #define WMI_HT_CAP_IBF_BFER 0x4000 58d5c65159SKalle Valo 59d5c65159SKalle Valo /* These macros should be used when we wish to advertise STBC support for 60d5c65159SKalle Valo * only 1SS or 2SS or 3SS. 61d5c65159SKalle Valo */ 62d5c65159SKalle Valo #define WMI_HT_CAP_RX_STBC_1SS 0x0010 63d5c65159SKalle Valo #define WMI_HT_CAP_RX_STBC_2SS 0x0020 64d5c65159SKalle Valo #define WMI_HT_CAP_RX_STBC_3SS 0x0030 65d5c65159SKalle Valo 66d5c65159SKalle Valo #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \ 67d5c65159SKalle Valo WMI_HT_CAP_HT20_SGI | \ 68d5c65159SKalle Valo WMI_HT_CAP_HT40_SGI | \ 69d5c65159SKalle Valo WMI_HT_CAP_TX_STBC | \ 70d5c65159SKalle Valo WMI_HT_CAP_RX_STBC | \ 71d5c65159SKalle Valo WMI_HT_CAP_LDPC) 72d5c65159SKalle Valo 73d5c65159SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003 74d5c65159SKalle Valo #define WMI_VHT_CAP_RX_LDPC 0x00000010 75d5c65159SKalle Valo #define WMI_VHT_CAP_SGI_80MHZ 0x00000020 76d5c65159SKalle Valo #define WMI_VHT_CAP_SGI_160MHZ 0x00000040 77d5c65159SKalle Valo #define WMI_VHT_CAP_TX_STBC 0x00000080 78d5c65159SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK 0x00000300 79d5c65159SKalle Valo #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8 80d5c65159SKalle Valo #define WMI_VHT_CAP_SU_BFER 0x00000800 81d5c65159SKalle Valo #define WMI_VHT_CAP_SU_BFEE 0x00001000 82d5c65159SKalle Valo #define WMI_VHT_CAP_MAX_CS_ANT_MASK 0x0000E000 83d5c65159SKalle Valo #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT 13 84d5c65159SKalle Valo #define WMI_VHT_CAP_MAX_SND_DIM_MASK 0x00070000 85d5c65159SKalle Valo #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT 16 86d5c65159SKalle Valo #define WMI_VHT_CAP_MU_BFER 0x00080000 87d5c65159SKalle Valo #define WMI_VHT_CAP_MU_BFEE 0x00100000 88d5c65159SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000 89d5c65159SKalle Valo #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT 23 90d5c65159SKalle Valo #define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000 91d5c65159SKalle Valo #define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000 92d5c65159SKalle Valo 93d5c65159SKalle Valo #define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002 94d5c65159SKalle Valo 95d5c65159SKalle Valo /* These macros should be used when we wish to advertise STBC support for 96d5c65159SKalle Valo * only 1SS or 2SS or 3SS. 97d5c65159SKalle Valo */ 98d5c65159SKalle Valo #define WMI_VHT_CAP_RX_STBC_1SS 0x00000100 99d5c65159SKalle Valo #define WMI_VHT_CAP_RX_STBC_2SS 0x00000200 100d5c65159SKalle Valo #define WMI_VHT_CAP_RX_STBC_3SS 0x00000300 101d5c65159SKalle Valo 102d5c65159SKalle Valo #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \ 103d5c65159SKalle Valo WMI_VHT_CAP_SGI_80MHZ | \ 104d5c65159SKalle Valo WMI_VHT_CAP_TX_STBC | \ 105d5c65159SKalle Valo WMI_VHT_CAP_RX_STBC_MASK | \ 106d5c65159SKalle Valo WMI_VHT_CAP_RX_LDPC | \ 107d5c65159SKalle Valo WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \ 108d5c65159SKalle Valo WMI_VHT_CAP_RX_FIXED_ANT | \ 109d5c65159SKalle Valo WMI_VHT_CAP_TX_FIXED_ANT) 110d5c65159SKalle Valo 111d5c65159SKalle Valo /* FIXME: should these be in ieee80211.h? */ 112d5c65159SKalle Valo #define IEEE80211_VHT_MCS_SUPPORT_0_11_MASK GENMASK(23, 16) 113d5c65159SKalle Valo #define IEEE80211_DISABLE_VHT_MCS_SUPPORT_0_11 BIT(24) 114d5c65159SKalle Valo 115d5c65159SKalle Valo #define WMI_MAX_SPATIAL_STREAM 3 116d5c65159SKalle Valo 117d5c65159SKalle Valo #define ATH11K_CHAN_WIDTH_NUM 8 118d5c65159SKalle Valo 119d5c65159SKalle Valo extern const struct htt_rx_ring_tlv_filter ath11k_mac_mon_status_filter_default; 120d5c65159SKalle Valo 121d5c65159SKalle Valo void ath11k_mac_destroy(struct ath11k_base *ab); 122d5c65159SKalle Valo void ath11k_mac_unregister(struct ath11k_base *ab); 123*0366f426SVasanthakumar Thiagarajan int ath11k_mac_register(struct ath11k_base *ab); 124*0366f426SVasanthakumar Thiagarajan int ath11k_mac_allocate(struct ath11k_base *ab); 125d5c65159SKalle Valo int ath11k_mac_hw_ratecode_to_legacy_rate(u8 hw_rc, u8 preamble, u8 *rateidx, 126d5c65159SKalle Valo u16 *rate); 127d5c65159SKalle Valo u8 ath11k_mac_bitrate_to_idx(const struct ieee80211_supported_band *sband, 128d5c65159SKalle Valo u32 bitrate); 129d5c65159SKalle Valo u8 ath11k_mac_hw_rate_to_idx(const struct ieee80211_supported_band *sband, 130d5c65159SKalle Valo u8 hw_rate, bool cck); 131d5c65159SKalle Valo 132d5c65159SKalle Valo void __ath11k_mac_scan_finish(struct ath11k *ar); 133d5c65159SKalle Valo void ath11k_mac_scan_finish(struct ath11k *ar); 134d5c65159SKalle Valo 135d5c65159SKalle Valo struct ath11k_vif *ath11k_mac_get_arvif(struct ath11k *ar, u32 vdev_id); 136d5c65159SKalle Valo struct ath11k_vif *ath11k_mac_get_arvif_by_vdev_id(struct ath11k_base *ab, 137d5c65159SKalle Valo u32 vdev_id); 138d5c65159SKalle Valo struct ath11k *ath11k_mac_get_ar_by_vdev_id(struct ath11k_base *ab, u32 vdev_id); 139d5c65159SKalle Valo struct ath11k *ath11k_mac_get_ar_by_pdev_id(struct ath11k_base *ab, u32 pdev_id); 140d5c65159SKalle Valo struct ath11k *ath11k_mac_get_ar_vdev_stop_status(struct ath11k_base *ab, 141d5c65159SKalle Valo u32 vdev_id); 142d5c65159SKalle Valo 143d5c65159SKalle Valo void ath11k_mac_drain_tx(struct ath11k *ar); 144d5c65159SKalle Valo void ath11k_mac_peer_cleanup_all(struct ath11k *ar); 145d5c65159SKalle Valo int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx); 14639e81c6aSTamizh chelvam u8 ath11k_mac_bw_to_mac80211_bw(u8 bw); 147d5c65159SKalle Valo #endif 148