xref: /linux/drivers/net/ethernet/wangxun/ngbe/ngbe_hw.c (revision a23e1966932464e1c5226cb9ac4ce1d5fc10ba22)
102338c48SMengyuan Lou // SPDX-License-Identifier: GPL-2.0
202338c48SMengyuan Lou /* Copyright (c) 2019 - 2022 Beijing WangXun Technology Co., Ltd. */
302338c48SMengyuan Lou 
402338c48SMengyuan Lou #include <linux/etherdevice.h>
502338c48SMengyuan Lou #include <linux/iopoll.h>
602338c48SMengyuan Lou #include <linux/pci.h>
702338c48SMengyuan Lou 
802338c48SMengyuan Lou #include "../libwx/wx_type.h"
902338c48SMengyuan Lou #include "../libwx/wx_hw.h"
1002338c48SMengyuan Lou #include "ngbe_type.h"
1102338c48SMengyuan Lou #include "ngbe_hw.h"
1202338c48SMengyuan Lou 
ngbe_eeprom_chksum_hostif(struct wx * wx)13803df55dSMengyuan Lou int ngbe_eeprom_chksum_hostif(struct wx *wx)
1402338c48SMengyuan Lou {
1502338c48SMengyuan Lou 	struct wx_hic_read_shadow_ram buffer;
1602338c48SMengyuan Lou 	int status;
1702338c48SMengyuan Lou 	int tmp;
1802338c48SMengyuan Lou 
1902338c48SMengyuan Lou 	buffer.hdr.req.cmd = NGBE_FW_EEPROM_CHECKSUM_CMD;
2002338c48SMengyuan Lou 	buffer.hdr.req.buf_lenh = 0;
2102338c48SMengyuan Lou 	buffer.hdr.req.buf_lenl = 0;
2202338c48SMengyuan Lou 	buffer.hdr.req.checksum = NGBE_FW_CMD_DEFAULT_CHECKSUM;
2302338c48SMengyuan Lou 	/* convert offset from words to bytes */
2402338c48SMengyuan Lou 	buffer.address = 0;
2502338c48SMengyuan Lou 	/* one word */
2602338c48SMengyuan Lou 	buffer.length = 0;
2702338c48SMengyuan Lou 
289607a3e6SJiawen Wu 	status = wx_host_interface_command(wx, (u32 *)&buffer, sizeof(buffer),
2902338c48SMengyuan Lou 					   WX_HI_COMMAND_TIMEOUT, false);
3002338c48SMengyuan Lou 
3102338c48SMengyuan Lou 	if (status < 0)
3202338c48SMengyuan Lou 		return status;
339607a3e6SJiawen Wu 	tmp = rd32a(wx, WX_MNG_MBOX, 1);
3402338c48SMengyuan Lou 	if (tmp == NGBE_FW_CMD_ST_PASS)
3502338c48SMengyuan Lou 		return 0;
3602338c48SMengyuan Lou 	return -EIO;
3702338c48SMengyuan Lou }
3802338c48SMengyuan Lou 
ngbe_reset_misc(struct wx * wx)39803df55dSMengyuan Lou static int ngbe_reset_misc(struct wx *wx)
4002338c48SMengyuan Lou {
419607a3e6SJiawen Wu 	wx_reset_misc(wx);
42803df55dSMengyuan Lou 	if (wx->gpio_ctrl) {
4302338c48SMengyuan Lou 		/* gpio0 is used to power on/off control*/
449607a3e6SJiawen Wu 		wr32(wx, NGBE_GPIO_DDR, 0x1);
45a1cf597bSMengyuan Lou 		ngbe_sfp_modules_txrx_powerctl(wx, false);
4602338c48SMengyuan Lou 	}
4702338c48SMengyuan Lou 	return 0;
4802338c48SMengyuan Lou }
4902338c48SMengyuan Lou 
ngbe_sfp_modules_txrx_powerctl(struct wx * wx,bool swi)50a1cf597bSMengyuan Lou void ngbe_sfp_modules_txrx_powerctl(struct wx *wx, bool swi)
51a1cf597bSMengyuan Lou {
52860edff5SMengyuan Lou 	/* gpio0 is used to power on control . 0 is on */
53860edff5SMengyuan Lou 	wr32(wx, NGBE_GPIO_DR, swi ? 0 : NGBE_GPIO_DR_0);
54a1cf597bSMengyuan Lou }
55a1cf597bSMengyuan Lou 
5602338c48SMengyuan Lou /**
5702338c48SMengyuan Lou  *  ngbe_reset_hw - Perform hardware reset
58803df55dSMengyuan Lou  *  @wx: pointer to hardware structure
5902338c48SMengyuan Lou  *
6002338c48SMengyuan Lou  *  Resets the hardware by resetting the transmit and receive units, masks
6102338c48SMengyuan Lou  *  and clears all interrupts, perform a PHY reset, and perform a link (MAC)
6202338c48SMengyuan Lou  *  reset.
6302338c48SMengyuan Lou  **/
ngbe_reset_hw(struct wx * wx)64803df55dSMengyuan Lou int ngbe_reset_hw(struct wx *wx)
6502338c48SMengyuan Lou {
66a1cf597bSMengyuan Lou 	u32 val = 0;
67a1cf597bSMengyuan Lou 	int ret = 0;
6802338c48SMengyuan Lou 
69803df55dSMengyuan Lou 	/* Call wx stop to disable tx/rx and clear interrupts */
70a1cf597bSMengyuan Lou 	ret = wx_stop_adapter(wx);
71a1cf597bSMengyuan Lou 	if (ret != 0)
72a1cf597bSMengyuan Lou 		return ret;
73a1cf597bSMengyuan Lou 
74a1cf597bSMengyuan Lou 	if (wx->mac_type != em_mac_type_mdi) {
75a1cf597bSMengyuan Lou 		val = WX_MIS_RST_LAN_RST(wx->bus.func);
76a1cf597bSMengyuan Lou 		wr32(wx, WX_MIS_RST, val | rd32(wx, WX_MIS_RST));
77a1cf597bSMengyuan Lou 
78a1cf597bSMengyuan Lou 		ret = read_poll_timeout(rd32, val,
79a1cf597bSMengyuan Lou 					!(val & (BIT(9) << wx->bus.func)), 1000,
80a1cf597bSMengyuan Lou 					100000, false, wx, 0x10028);
81a1cf597bSMengyuan Lou 		if (ret) {
82a1cf597bSMengyuan Lou 			wx_err(wx, "Lan reset exceed s maximum times.\n");
83a1cf597bSMengyuan Lou 			return ret;
84a1cf597bSMengyuan Lou 		}
85a1cf597bSMengyuan Lou 	}
86803df55dSMengyuan Lou 	ngbe_reset_misc(wx);
8702338c48SMengyuan Lou 
880a2714d5SJiawen Wu 	wx_clear_hw_cntrs(wx);
890a2714d5SJiawen Wu 
9002338c48SMengyuan Lou 	/* Store the permanent mac address */
919607a3e6SJiawen Wu 	wx_get_mac_addr(wx, wx->mac.perm_addr);
9202338c48SMengyuan Lou 
9302338c48SMengyuan Lou 	/* reset num_rar_entries to 128 */
949607a3e6SJiawen Wu 	wx->mac.num_rar_entries = NGBE_RAR_ENTRIES;
959607a3e6SJiawen Wu 	wx_init_rx_addrs(wx);
969607a3e6SJiawen Wu 	pci_set_master(wx->pdev);
9702338c48SMengyuan Lou 
9802338c48SMengyuan Lou 	return 0;
9902338c48SMengyuan Lou }
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