1f1372ee1SKalderon, Michal /* QLogic qed NIC Driver 2f1372ee1SKalderon, Michal * Copyright (c) 2015-2017 QLogic Corporation 3f1372ee1SKalderon, Michal * 4f1372ee1SKalderon, Michal * This software is available to you under a choice of one of two 5f1372ee1SKalderon, Michal * licenses. You may choose to be licensed under the terms of the GNU 6f1372ee1SKalderon, Michal * General Public License (GPL) Version 2, available from the file 7f1372ee1SKalderon, Michal * COPYING in the main directory of this source tree, or the 8f1372ee1SKalderon, Michal * OpenIB.org BSD license below: 9f1372ee1SKalderon, Michal * 10f1372ee1SKalderon, Michal * Redistribution and use in source and binary forms, with or 11f1372ee1SKalderon, Michal * without modification, are permitted provided that the following 12f1372ee1SKalderon, Michal * conditions are met: 13f1372ee1SKalderon, Michal * 14f1372ee1SKalderon, Michal * - Redistributions of source code must retain the above 15f1372ee1SKalderon, Michal * copyright notice, this list of conditions and the following 16f1372ee1SKalderon, Michal * disclaimer. 17f1372ee1SKalderon, Michal * 18f1372ee1SKalderon, Michal * - Redistributions in binary form must reproduce the above 19f1372ee1SKalderon, Michal * copyright notice, this list of conditions and the following 20f1372ee1SKalderon, Michal * disclaimer in the documentation and /or other materials 21f1372ee1SKalderon, Michal * provided with the distribution. 22f1372ee1SKalderon, Michal * 23f1372ee1SKalderon, Michal * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24f1372ee1SKalderon, Michal * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25f1372ee1SKalderon, Michal * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26f1372ee1SKalderon, Michal * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27f1372ee1SKalderon, Michal * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28f1372ee1SKalderon, Michal * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29f1372ee1SKalderon, Michal * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30f1372ee1SKalderon, Michal * SOFTWARE. 31f1372ee1SKalderon, Michal */ 32b71b9afdSKalderon, Michal #ifndef _QED_RDMA_H 33b71b9afdSKalderon, Michal #define _QED_RDMA_H 34f1372ee1SKalderon, Michal #include <linux/types.h> 35f1372ee1SKalderon, Michal #include <linux/bitops.h> 36f1372ee1SKalderon, Michal #include <linux/kernel.h> 37f1372ee1SKalderon, Michal #include <linux/list.h> 38f1372ee1SKalderon, Michal #include <linux/slab.h> 39f1372ee1SKalderon, Michal #include <linux/spinlock.h> 40f1372ee1SKalderon, Michal #include <linux/qed/qed_if.h> 417003cdd6SKalderon, Michal #include <linux/qed/qed_rdma_if.h> 42f1372ee1SKalderon, Michal #include "qed.h" 43f1372ee1SKalderon, Michal #include "qed_dev_api.h" 44f1372ee1SKalderon, Michal #include "qed_hsi.h" 4567b40dccSKalderon, Michal #include "qed_iwarp.h" 46b71b9afdSKalderon, Michal #include "qed_roce.h" 47f1372ee1SKalderon, Michal 48f1372ee1SKalderon, Michal #define QED_RDMA_MAX_FMR (RDMA_MAX_TIDS) 49f1372ee1SKalderon, Michal #define QED_RDMA_MAX_P_KEY (1) 50f1372ee1SKalderon, Michal #define QED_RDMA_MAX_WQE (0x7FFF) 51f1372ee1SKalderon, Michal #define QED_RDMA_MAX_SRQ_WQE_ELEM (0x7FFF) 52f1372ee1SKalderon, Michal #define QED_RDMA_PAGE_SIZE_CAPS (0xFFFFF000) 53f1372ee1SKalderon, Michal #define QED_RDMA_ACK_DELAY (15) 54f1372ee1SKalderon, Michal #define QED_RDMA_MAX_MR_SIZE (0x10000000000ULL) 55f1372ee1SKalderon, Michal #define QED_RDMA_MAX_CQS (RDMA_MAX_CQS) 56f1372ee1SKalderon, Michal #define QED_RDMA_MAX_MRS (RDMA_MAX_TIDS) 57f1372ee1SKalderon, Michal /* Add 1 for header element */ 58f1372ee1SKalderon, Michal #define QED_RDMA_MAX_SRQ_ELEM_PER_WQE (RDMA_MAX_SGE_PER_RQ_WQE + 1) 59f1372ee1SKalderon, Michal #define QED_RDMA_MAX_SGE_PER_SRQ_WQE (RDMA_MAX_SGE_PER_RQ_WQE) 60f1372ee1SKalderon, Michal #define QED_RDMA_SRQ_WQE_ELEM_SIZE (16) 61f1372ee1SKalderon, Michal #define QED_RDMA_MAX_SRQS (32 * 1024) 62f1372ee1SKalderon, Michal 63f1372ee1SKalderon, Michal #define QED_RDMA_MAX_CQE_32_BIT (0x7FFFFFFF - 1) 64f1372ee1SKalderon, Michal #define QED_RDMA_MAX_CQE_16_BIT (0x7FFF - 1) 65f1372ee1SKalderon, Michal 66f1372ee1SKalderon, Michal enum qed_rdma_toggle_bit { 67f1372ee1SKalderon, Michal QED_RDMA_TOGGLE_BIT_CLEAR = 0, 68f1372ee1SKalderon, Michal QED_RDMA_TOGGLE_BIT_SET = 1 69f1372ee1SKalderon, Michal }; 70f1372ee1SKalderon, Michal 71f1372ee1SKalderon, Michal #define QED_RDMA_MAX_BMAP_NAME (10) 72f1372ee1SKalderon, Michal struct qed_bmap { 73f1372ee1SKalderon, Michal unsigned long *bitmap; 74f1372ee1SKalderon, Michal u32 max_count; 75f1372ee1SKalderon, Michal char name[QED_RDMA_MAX_BMAP_NAME]; 76f1372ee1SKalderon, Michal }; 77f1372ee1SKalderon, Michal 78f1372ee1SKalderon, Michal struct qed_rdma_info { 79f1372ee1SKalderon, Michal /* spin lock to protect bitmaps */ 80f1372ee1SKalderon, Michal spinlock_t lock; 81f1372ee1SKalderon, Michal 82f1372ee1SKalderon, Michal struct qed_bmap cq_map; 83f1372ee1SKalderon, Michal struct qed_bmap pd_map; 84f1372ee1SKalderon, Michal struct qed_bmap tid_map; 85f1372ee1SKalderon, Michal struct qed_bmap qp_map; 86f1372ee1SKalderon, Michal struct qed_bmap srq_map; 87f1372ee1SKalderon, Michal struct qed_bmap cid_map; 88456a5849SKalderon, Michal struct qed_bmap tcp_cid_map; 89f1372ee1SKalderon, Michal struct qed_bmap real_cid_map; 90f1372ee1SKalderon, Michal struct qed_bmap dpi_map; 91f1372ee1SKalderon, Michal struct qed_bmap toggle_bits; 92f1372ee1SKalderon, Michal struct qed_rdma_events events; 93f1372ee1SKalderon, Michal struct qed_rdma_device *dev; 94f1372ee1SKalderon, Michal struct qed_rdma_port *port; 95f1372ee1SKalderon, Michal u32 last_tid; 96f1372ee1SKalderon, Michal u8 num_cnqs; 97f1372ee1SKalderon, Michal u32 num_qps; 98f1372ee1SKalderon, Michal u32 num_mrs; 9939dbc646SYuval Bason u32 num_srqs; 10039dbc646SYuval Bason u16 srq_id_offset; 101f1372ee1SKalderon, Michal u16 queue_zone_base; 102f1372ee1SKalderon, Michal u16 max_queue_zones; 103f1372ee1SKalderon, Michal enum protocol_type proto; 10467b40dccSKalderon, Michal struct qed_iwarp_info iwarp; 105*291d57f6SMichal Kalderon u8 active:1; 106f1372ee1SKalderon, Michal }; 107f1372ee1SKalderon, Michal 108f1372ee1SKalderon, Michal struct qed_rdma_qp { 109f1372ee1SKalderon, Michal struct regpair qp_handle; 110f1372ee1SKalderon, Michal struct regpair qp_handle_async; 111f1372ee1SKalderon, Michal u32 qpid; 112f1372ee1SKalderon, Michal u16 icid; 113f1372ee1SKalderon, Michal enum qed_roce_qp_state cur_state; 11467b40dccSKalderon, Michal enum qed_iwarp_qp_state iwarp_state; 115f1372ee1SKalderon, Michal bool use_srq; 116f1372ee1SKalderon, Michal bool signal_all; 117f1372ee1SKalderon, Michal bool fmr_and_reserved_lkey; 118f1372ee1SKalderon, Michal 119f1372ee1SKalderon, Michal bool incoming_rdma_read_en; 120f1372ee1SKalderon, Michal bool incoming_rdma_write_en; 121f1372ee1SKalderon, Michal bool incoming_atomic_en; 122f1372ee1SKalderon, Michal bool e2e_flow_control_en; 123f1372ee1SKalderon, Michal 124f1372ee1SKalderon, Michal u16 pd; 125f1372ee1SKalderon, Michal u16 pkey; 126f1372ee1SKalderon, Michal u32 dest_qp; 127f1372ee1SKalderon, Michal u16 mtu; 128f1372ee1SKalderon, Michal u16 srq_id; 129f1372ee1SKalderon, Michal u8 traffic_class_tos; 130f1372ee1SKalderon, Michal u8 hop_limit_ttl; 131f1372ee1SKalderon, Michal u16 dpi; 132f1372ee1SKalderon, Michal u32 flow_label; 133f1372ee1SKalderon, Michal bool lb_indication; 134f1372ee1SKalderon, Michal u16 vlan_id; 135f1372ee1SKalderon, Michal u32 ack_timeout; 136f1372ee1SKalderon, Michal u8 retry_cnt; 137f1372ee1SKalderon, Michal u8 rnr_retry_cnt; 138f1372ee1SKalderon, Michal u8 min_rnr_nak_timer; 139f1372ee1SKalderon, Michal bool sqd_async; 140f1372ee1SKalderon, Michal union qed_gid sgid; 141f1372ee1SKalderon, Michal union qed_gid dgid; 142f1372ee1SKalderon, Michal enum roce_mode roce_mode; 143f1372ee1SKalderon, Michal u16 udp_src_port; 144f1372ee1SKalderon, Michal u8 stats_queue; 145f1372ee1SKalderon, Michal 146f1372ee1SKalderon, Michal /* requeseter */ 147f1372ee1SKalderon, Michal u8 max_rd_atomic_req; 148f1372ee1SKalderon, Michal u32 sq_psn; 149f1372ee1SKalderon, Michal u16 sq_cq_id; 150f1372ee1SKalderon, Michal u16 sq_num_pages; 151f1372ee1SKalderon, Michal dma_addr_t sq_pbl_ptr; 152f1372ee1SKalderon, Michal void *orq; 153f1372ee1SKalderon, Michal dma_addr_t orq_phys_addr; 154f1372ee1SKalderon, Michal u8 orq_num_pages; 155f1372ee1SKalderon, Michal bool req_offloaded; 156f1372ee1SKalderon, Michal 157f1372ee1SKalderon, Michal /* responder */ 158f1372ee1SKalderon, Michal u8 max_rd_atomic_resp; 159f1372ee1SKalderon, Michal u32 rq_psn; 160f1372ee1SKalderon, Michal u16 rq_cq_id; 161f1372ee1SKalderon, Michal u16 rq_num_pages; 162f1372ee1SKalderon, Michal dma_addr_t rq_pbl_ptr; 163f1372ee1SKalderon, Michal void *irq; 164f1372ee1SKalderon, Michal dma_addr_t irq_phys_addr; 165f1372ee1SKalderon, Michal u8 irq_num_pages; 166f1372ee1SKalderon, Michal bool resp_offloaded; 167f1372ee1SKalderon, Michal u32 cq_prod; 168f1372ee1SKalderon, Michal 169f1372ee1SKalderon, Michal u8 remote_mac_addr[6]; 170f1372ee1SKalderon, Michal u8 local_mac_addr[6]; 171f1372ee1SKalderon, Michal 172f1372ee1SKalderon, Michal void *shared_queue; 173f1372ee1SKalderon, Michal dma_addr_t shared_queue_phys_addr; 174456a5849SKalderon, Michal struct qed_iwarp_ep *ep; 175f1372ee1SKalderon, Michal }; 176f1372ee1SKalderon, Michal 177f1372ee1SKalderon, Michal #if IS_ENABLED(CONFIG_QED_RDMA) 178f1372ee1SKalderon, Michal void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 179b71b9afdSKalderon, Michal void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt); 180*291d57f6SMichal Kalderon int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn); 181*291d57f6SMichal Kalderon void qed_rdma_info_free(struct qed_hwfn *p_hwfn); 182f1372ee1SKalderon, Michal #else 183b71b9afdSKalderon, Michal static inline void qed_rdma_dpm_conf(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt) {} 184b71b9afdSKalderon, Michal static inline void qed_rdma_dpm_bar(struct qed_hwfn *p_hwfn, 185f1372ee1SKalderon, Michal struct qed_ptt *p_ptt) {} 186*291d57f6SMichal Kalderon static inline int qed_rdma_info_alloc(struct qed_hwfn *p_hwfn) {return -EINVAL} 187*291d57f6SMichal Kalderon static inline void qed_rdma_info_free(struct qed_hwfn *p_hwfn) {} 188f1372ee1SKalderon, Michal #endif 189b71b9afdSKalderon, Michal 190b71b9afdSKalderon, Michal int 191b71b9afdSKalderon, Michal qed_rdma_bmap_alloc(struct qed_hwfn *p_hwfn, 192b71b9afdSKalderon, Michal struct qed_bmap *bmap, u32 max_count, char *name); 193b71b9afdSKalderon, Michal 194b71b9afdSKalderon, Michal void 195b71b9afdSKalderon, Michal qed_rdma_bmap_free(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, bool check); 196b71b9afdSKalderon, Michal 197b71b9afdSKalderon, Michal int 198b71b9afdSKalderon, Michal qed_rdma_bmap_alloc_id(struct qed_hwfn *p_hwfn, 199b71b9afdSKalderon, Michal struct qed_bmap *bmap, u32 *id_num); 200b71b9afdSKalderon, Michal 201b71b9afdSKalderon, Michal void 202b71b9afdSKalderon, Michal qed_bmap_set_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num); 203b71b9afdSKalderon, Michal 204b71b9afdSKalderon, Michal void 205b71b9afdSKalderon, Michal qed_bmap_release_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num); 206b71b9afdSKalderon, Michal 207b71b9afdSKalderon, Michal int 208b71b9afdSKalderon, Michal qed_bmap_test_id(struct qed_hwfn *p_hwfn, struct qed_bmap *bmap, u32 id_num); 209b71b9afdSKalderon, Michal 210b71b9afdSKalderon, Michal void qed_rdma_set_fw_mac(u16 *p_fw_mac, u8 *p_qed_mac); 211b71b9afdSKalderon, Michal 212b71b9afdSKalderon, Michal bool qed_rdma_allocated_qps(struct qed_hwfn *p_hwfn); 213f1372ee1SKalderon, Michal #endif 214