xref: /linux/drivers/net/ethernet/intel/ice/ice_parser.h (revision b2687653fe690569d48eb60343745fe436f7d532)
186ff3d79SJunfeng Guo /* SPDX-License-Identifier: GPL-2.0 */
286ff3d79SJunfeng Guo /* Copyright (C) 2024 Intel Corporation */
386ff3d79SJunfeng Guo 
486ff3d79SJunfeng Guo #ifndef _ICE_PARSER_H_
586ff3d79SJunfeng Guo #define _ICE_PARSER_H_
686ff3d79SJunfeng Guo 
775b4a938SJunfeng Guo #define ICE_SEC_DATA_OFFSET				4
875b4a938SJunfeng Guo #define ICE_SID_RXPARSER_IMEM_ENTRY_SIZE		48
975b4a938SJunfeng Guo #define ICE_SID_RXPARSER_METADATA_INIT_ENTRY_SIZE	24
1075b4a938SJunfeng Guo #define ICE_SID_RXPARSER_CAM_ENTRY_SIZE			16
1175b4a938SJunfeng Guo #define ICE_SID_RXPARSER_PG_SPILL_ENTRY_SIZE		17
1275b4a938SJunfeng Guo #define ICE_SID_RXPARSER_NOMATCH_CAM_ENTRY_SIZE		12
1375b4a938SJunfeng Guo #define ICE_SID_RXPARSER_NOMATCH_SPILL_ENTRY_SIZE	13
1475b4a938SJunfeng Guo #define ICE_SID_RXPARSER_BOOST_TCAM_ENTRY_SIZE		88
1575b4a938SJunfeng Guo #define ICE_SID_RXPARSER_MARKER_TYPE_ENTRY_SIZE		24
1675b4a938SJunfeng Guo #define ICE_SID_RXPARSER_MARKER_GRP_ENTRY_SIZE		8
1775b4a938SJunfeng Guo #define ICE_SID_RXPARSER_PROTO_GRP_ENTRY_SIZE		24
1875b4a938SJunfeng Guo #define ICE_SID_RXPARSER_FLAG_REDIR_ENTRY_SIZE		1
1975b4a938SJunfeng Guo 
2075b4a938SJunfeng Guo #define ICE_SEC_LBL_DATA_OFFSET				2
2175b4a938SJunfeng Guo #define ICE_SID_LBL_ENTRY_SIZE				66
2275b4a938SJunfeng Guo 
2375b4a938SJunfeng Guo /*** ICE_SID_RXPARSER_IMEM section ***/
2475b4a938SJunfeng Guo #define ICE_IMEM_TABLE_SIZE		192
2575b4a938SJunfeng Guo 
2675b4a938SJunfeng Guo /* TCAM boost Master; if bit is set, and TCAM hit, TCAM output overrides iMEM
2775b4a938SJunfeng Guo  * output.
2875b4a938SJunfeng Guo  */
2975b4a938SJunfeng Guo struct ice_bst_main {
3075b4a938SJunfeng Guo 	bool alu0;
3175b4a938SJunfeng Guo 	bool alu1;
3275b4a938SJunfeng Guo 	bool alu2;
3375b4a938SJunfeng Guo 	bool pg;
3475b4a938SJunfeng Guo };
3575b4a938SJunfeng Guo 
3675b4a938SJunfeng Guo struct ice_bst_keybuilder {
3775b4a938SJunfeng Guo 	u8 prio;	/* 0-3: PG precedence within ALUs (3 highest) */
3875b4a938SJunfeng Guo 	bool tsr_ctrl;	/* TCAM Search Register control */
3975b4a938SJunfeng Guo };
4075b4a938SJunfeng Guo 
4175b4a938SJunfeng Guo /* Next protocol Key builder */
4275b4a938SJunfeng Guo struct ice_np_keybuilder {
4375b4a938SJunfeng Guo 	u8 opc;
4475b4a938SJunfeng Guo 	u8 start_reg0;
4575b4a938SJunfeng Guo 	u8 len_reg1;
4675b4a938SJunfeng Guo };
4775b4a938SJunfeng Guo 
4875b4a938SJunfeng Guo enum ice_np_keybuilder_opcode {
4975b4a938SJunfeng Guo 	ICE_NPKB_OPC_EXTRACT	= 0,
5075b4a938SJunfeng Guo 	ICE_NPKB_OPC_BUILD	= 1,
5175b4a938SJunfeng Guo 	ICE_NPKB_OPC_BYPASS	= 2,
5275b4a938SJunfeng Guo };
5375b4a938SJunfeng Guo 
5475b4a938SJunfeng Guo /* Parse Graph Key builder */
5575b4a938SJunfeng Guo struct ice_pg_keybuilder {
5675b4a938SJunfeng Guo 	bool flag0_ena;
5775b4a938SJunfeng Guo 	bool flag1_ena;
5875b4a938SJunfeng Guo 	bool flag2_ena;
5975b4a938SJunfeng Guo 	bool flag3_ena;
6075b4a938SJunfeng Guo 	u8 flag0_idx;
6175b4a938SJunfeng Guo 	u8 flag1_idx;
6275b4a938SJunfeng Guo 	u8 flag2_idx;
6375b4a938SJunfeng Guo 	u8 flag3_idx;
6475b4a938SJunfeng Guo 	u8 alu_reg_idx;
6575b4a938SJunfeng Guo };
6675b4a938SJunfeng Guo 
6775b4a938SJunfeng Guo enum ice_alu_idx {
6875b4a938SJunfeng Guo 	ICE_ALU0_IDX	= 0,
6975b4a938SJunfeng Guo 	ICE_ALU1_IDX	= 1,
7075b4a938SJunfeng Guo 	ICE_ALU2_IDX	= 2,
7175b4a938SJunfeng Guo };
7275b4a938SJunfeng Guo 
7375b4a938SJunfeng Guo enum ice_alu_opcode {
7475b4a938SJunfeng Guo 	ICE_ALU_PARK	= 0,
7575b4a938SJunfeng Guo 	ICE_ALU_MOV_ADD	= 1,
7675b4a938SJunfeng Guo 	ICE_ALU_ADD	= 2,
7775b4a938SJunfeng Guo 	ICE_ALU_MOV_AND	= 4,
7875b4a938SJunfeng Guo 	ICE_ALU_AND	= 5,
7975b4a938SJunfeng Guo 	ICE_ALU_AND_IMM	= 6,
8075b4a938SJunfeng Guo 	ICE_ALU_MOV_OR	= 7,
8175b4a938SJunfeng Guo 	ICE_ALU_OR	= 8,
8275b4a938SJunfeng Guo 	ICE_ALU_MOV_XOR	= 9,
8375b4a938SJunfeng Guo 	ICE_ALU_XOR	= 10,
8475b4a938SJunfeng Guo 	ICE_ALU_NOP	= 11,
8575b4a938SJunfeng Guo 	ICE_ALU_BR	= 12,
8675b4a938SJunfeng Guo 	ICE_ALU_BREQ	= 13,
8775b4a938SJunfeng Guo 	ICE_ALU_BRNEQ	= 14,
8875b4a938SJunfeng Guo 	ICE_ALU_BRGT	= 15,
8975b4a938SJunfeng Guo 	ICE_ALU_BRLT	= 16,
9075b4a938SJunfeng Guo 	ICE_ALU_BRGEQ	= 17,
9175b4a938SJunfeng Guo 	ICE_ALU_BRLEG	= 18,
9275b4a938SJunfeng Guo 	ICE_ALU_SETEQ	= 19,
9375b4a938SJunfeng Guo 	ICE_ALU_ANDEQ	= 20,
9475b4a938SJunfeng Guo 	ICE_ALU_OREQ	= 21,
9575b4a938SJunfeng Guo 	ICE_ALU_SETNEQ	= 22,
9675b4a938SJunfeng Guo 	ICE_ALU_ANDNEQ	= 23,
9775b4a938SJunfeng Guo 	ICE_ALU_ORNEQ	= 24,
9875b4a938SJunfeng Guo 	ICE_ALU_SETGT	= 25,
9975b4a938SJunfeng Guo 	ICE_ALU_ANDGT	= 26,
10075b4a938SJunfeng Guo 	ICE_ALU_ORGT	= 27,
10175b4a938SJunfeng Guo 	ICE_ALU_SETLT	= 28,
10275b4a938SJunfeng Guo 	ICE_ALU_ANDLT	= 29,
10375b4a938SJunfeng Guo 	ICE_ALU_ORLT	= 30,
10475b4a938SJunfeng Guo 	ICE_ALU_MOV_SUB	= 31,
10575b4a938SJunfeng Guo 	ICE_ALU_SUB	= 32,
10675b4a938SJunfeng Guo 	ICE_ALU_INVALID	= 64,
10775b4a938SJunfeng Guo };
10875b4a938SJunfeng Guo 
10975b4a938SJunfeng Guo enum ice_proto_off_opcode {
11075b4a938SJunfeng Guo 	ICE_PO_OFF_REMAIN	= 0,
11175b4a938SJunfeng Guo 	ICE_PO_OFF_HDR_ADD	= 1,
11275b4a938SJunfeng Guo 	ICE_PO_OFF_HDR_SUB	= 2,
11375b4a938SJunfeng Guo };
11475b4a938SJunfeng Guo 
11575b4a938SJunfeng Guo struct ice_alu {
11675b4a938SJunfeng Guo 	enum ice_alu_opcode opc;
11775b4a938SJunfeng Guo 	u8 src_start;
11875b4a938SJunfeng Guo 	u8 src_len;
11975b4a938SJunfeng Guo 	bool shift_xlate_sel;
12075b4a938SJunfeng Guo 	u8 shift_xlate_key;
12175b4a938SJunfeng Guo 	u8 src_reg_id;
12275b4a938SJunfeng Guo 	u8 dst_reg_id;
12375b4a938SJunfeng Guo 	bool inc0;
12475b4a938SJunfeng Guo 	bool inc1;
12575b4a938SJunfeng Guo 	u8 proto_offset_opc;
12675b4a938SJunfeng Guo 	u8 proto_offset;
12775b4a938SJunfeng Guo 	u8 branch_addr;
12875b4a938SJunfeng Guo 	u16 imm;
12975b4a938SJunfeng Guo 	bool dedicate_flags_ena;
13075b4a938SJunfeng Guo 	u8 dst_start;
13175b4a938SJunfeng Guo 	u8 dst_len;
13275b4a938SJunfeng Guo 	bool flags_extr_imm;
13375b4a938SJunfeng Guo 	u8 flags_start_imm;
13475b4a938SJunfeng Guo };
13575b4a938SJunfeng Guo 
13675b4a938SJunfeng Guo /* Parser program code (iMEM) */
13775b4a938SJunfeng Guo struct ice_imem_item {
13875b4a938SJunfeng Guo 	u16 idx;
13975b4a938SJunfeng Guo 	struct ice_bst_main b_m;
14075b4a938SJunfeng Guo 	struct ice_bst_keybuilder b_kb;
14175b4a938SJunfeng Guo 	u8 pg_prio;
14275b4a938SJunfeng Guo 	struct ice_np_keybuilder np_kb;
14375b4a938SJunfeng Guo 	struct ice_pg_keybuilder pg_kb;
14475b4a938SJunfeng Guo 	struct ice_alu alu0;
14575b4a938SJunfeng Guo 	struct ice_alu alu1;
14675b4a938SJunfeng Guo 	struct ice_alu alu2;
14775b4a938SJunfeng Guo };
14875b4a938SJunfeng Guo 
14975b4a938SJunfeng Guo /*** ICE_SID_RXPARSER_METADATA_INIT section ***/
15075b4a938SJunfeng Guo #define ICE_METAINIT_TABLE_SIZE		16
15175b4a938SJunfeng Guo 
15275b4a938SJunfeng Guo /* Metadata Initialization item  */
15375b4a938SJunfeng Guo struct ice_metainit_item {
15475b4a938SJunfeng Guo 	u16 idx;
15575b4a938SJunfeng Guo 
15675b4a938SJunfeng Guo 	u8 tsr;		/* TCAM Search key Register */
15775b4a938SJunfeng Guo 	u16 ho;		/* Header Offset register */
15875b4a938SJunfeng Guo 	u16 pc;		/* Program Counter register */
15975b4a938SJunfeng Guo 	u16 pg_rn;	/* Parse Graph Root Node */
16075b4a938SJunfeng Guo 	u8 cd;		/* Control Domain ID */
16175b4a938SJunfeng Guo 
16275b4a938SJunfeng Guo 	/* General Purpose Registers */
16375b4a938SJunfeng Guo 	bool gpr_a_ctrl;
16475b4a938SJunfeng Guo 	u8 gpr_a_data_mdid;
16575b4a938SJunfeng Guo 	u8 gpr_a_data_start;
16675b4a938SJunfeng Guo 	u8 gpr_a_data_len;
16775b4a938SJunfeng Guo 	u8 gpr_a_id;
16875b4a938SJunfeng Guo 
16975b4a938SJunfeng Guo 	bool gpr_b_ctrl;
17075b4a938SJunfeng Guo 	u8 gpr_b_data_mdid;
17175b4a938SJunfeng Guo 	u8 gpr_b_data_start;
17275b4a938SJunfeng Guo 	u8 gpr_b_data_len;
17375b4a938SJunfeng Guo 	u8 gpr_b_id;
17475b4a938SJunfeng Guo 
17575b4a938SJunfeng Guo 	bool gpr_c_ctrl;
17675b4a938SJunfeng Guo 	u8 gpr_c_data_mdid;
17775b4a938SJunfeng Guo 	u8 gpr_c_data_start;
17875b4a938SJunfeng Guo 	u8 gpr_c_data_len;
17975b4a938SJunfeng Guo 	u8 gpr_c_id;
18075b4a938SJunfeng Guo 
18175b4a938SJunfeng Guo 	bool gpr_d_ctrl;
18275b4a938SJunfeng Guo 	u8 gpr_d_data_mdid;
18375b4a938SJunfeng Guo 	u8 gpr_d_data_start;
18475b4a938SJunfeng Guo 	u8 gpr_d_data_len;
18575b4a938SJunfeng Guo 	u8 gpr_d_id;
18675b4a938SJunfeng Guo 
18775b4a938SJunfeng Guo 	u64 flags; /* Initial value for all flags */
18875b4a938SJunfeng Guo };
18975b4a938SJunfeng Guo 
19075b4a938SJunfeng Guo /*** ICE_SID_RXPARSER_CAM, ICE_SID_RXPARSER_PG_SPILL,
19175b4a938SJunfeng Guo  *    ICE_SID_RXPARSER_NOMATCH_CAM and ICE_SID_RXPARSER_NOMATCH_CAM
19275b4a938SJunfeng Guo  *    sections ***/
19375b4a938SJunfeng Guo #define ICE_PG_CAM_TABLE_SIZE		2048
19475b4a938SJunfeng Guo #define ICE_PG_SP_CAM_TABLE_SIZE	128
19575b4a938SJunfeng Guo #define ICE_PG_NM_CAM_TABLE_SIZE	1024
19675b4a938SJunfeng Guo #define ICE_PG_NM_SP_CAM_TABLE_SIZE	64
19775b4a938SJunfeng Guo 
19875b4a938SJunfeng Guo struct ice_pg_cam_key {
19975b4a938SJunfeng Guo 	bool valid;
2004851f12cSJunfeng Guo 	struct_group_attr(val, __packed,
20175b4a938SJunfeng Guo 		u16 node_id;	/* Node ID of protocol in parse graph */
20275b4a938SJunfeng Guo 		bool flag0;
20375b4a938SJunfeng Guo 		bool flag1;
20475b4a938SJunfeng Guo 		bool flag2;
20575b4a938SJunfeng Guo 		bool flag3;
20675b4a938SJunfeng Guo 		u8 boost_idx;	/* Boost TCAM match index */
20775b4a938SJunfeng Guo 		u16 alu_reg;
2084851f12cSJunfeng Guo 		u32 next_proto;	/* next Protocol value (must be last) */
2094851f12cSJunfeng Guo 	);
21075b4a938SJunfeng Guo };
21175b4a938SJunfeng Guo 
21275b4a938SJunfeng Guo struct ice_pg_nm_cam_key {
21375b4a938SJunfeng Guo 	bool valid;
2144851f12cSJunfeng Guo 	struct_group_attr(val, __packed,
21575b4a938SJunfeng Guo 		u16 node_id;
21675b4a938SJunfeng Guo 		bool flag0;
21775b4a938SJunfeng Guo 		bool flag1;
21875b4a938SJunfeng Guo 		bool flag2;
21975b4a938SJunfeng Guo 		bool flag3;
22075b4a938SJunfeng Guo 		u8 boost_idx;
22175b4a938SJunfeng Guo 		u16 alu_reg;
2224851f12cSJunfeng Guo 	);
22375b4a938SJunfeng Guo };
22475b4a938SJunfeng Guo 
22575b4a938SJunfeng Guo struct ice_pg_cam_action {
22675b4a938SJunfeng Guo 	u16 next_node;	/* Parser Node ID for the next round */
22775b4a938SJunfeng Guo 	u8 next_pc;	/* next Program Counter */
22875b4a938SJunfeng Guo 	bool is_pg;	/* is protocol group */
22975b4a938SJunfeng Guo 	u8 proto_id;	/* protocol ID or proto group ID */
23075b4a938SJunfeng Guo 	bool is_mg;	/* is marker group */
23175b4a938SJunfeng Guo 	u8 marker_id;	/* marker ID or marker group ID */
23275b4a938SJunfeng Guo 	bool is_last_round;
23375b4a938SJunfeng Guo 	bool ho_polarity; /* header offset polarity */
23475b4a938SJunfeng Guo 	u16 ho_inc;
23575b4a938SJunfeng Guo };
23675b4a938SJunfeng Guo 
23775b4a938SJunfeng Guo /* Parse Graph item */
23875b4a938SJunfeng Guo struct ice_pg_cam_item {
23975b4a938SJunfeng Guo 	u16 idx;
24075b4a938SJunfeng Guo 	struct ice_pg_cam_key key;
24175b4a938SJunfeng Guo 	struct ice_pg_cam_action action;
24275b4a938SJunfeng Guo };
24375b4a938SJunfeng Guo 
24475b4a938SJunfeng Guo /* Parse Graph No Match item */
24575b4a938SJunfeng Guo struct ice_pg_nm_cam_item {
24675b4a938SJunfeng Guo 	u16 idx;
24775b4a938SJunfeng Guo 	struct ice_pg_nm_cam_key key;
24875b4a938SJunfeng Guo 	struct ice_pg_cam_action action;
24975b4a938SJunfeng Guo };
25075b4a938SJunfeng Guo 
2514851f12cSJunfeng Guo struct ice_pg_cam_item *ice_pg_cam_match(struct ice_pg_cam_item *table,
2524851f12cSJunfeng Guo 					 int size, struct ice_pg_cam_key *key);
2534851f12cSJunfeng Guo struct ice_pg_nm_cam_item *
2544851f12cSJunfeng Guo ice_pg_nm_cam_match(struct ice_pg_nm_cam_item *table, int size,
2554851f12cSJunfeng Guo 		    struct ice_pg_cam_key *key);
2564851f12cSJunfeng Guo 
25775b4a938SJunfeng Guo /*** ICE_SID_RXPARSER_BOOST_TCAM and ICE_SID_LBL_RXPARSER_TMEM sections ***/
25875b4a938SJunfeng Guo #define ICE_BST_TCAM_TABLE_SIZE		256
25975b4a938SJunfeng Guo #define ICE_BST_TCAM_KEY_SIZE		20
26075b4a938SJunfeng Guo #define ICE_BST_KEY_TCAM_SIZE		19
26175b4a938SJunfeng Guo 
26275b4a938SJunfeng Guo /* Boost TCAM item */
26375b4a938SJunfeng Guo struct ice_bst_tcam_item {
26475b4a938SJunfeng Guo 	u16 addr;
26575b4a938SJunfeng Guo 	u8 key[ICE_BST_TCAM_KEY_SIZE];
26675b4a938SJunfeng Guo 	u8 key_inv[ICE_BST_TCAM_KEY_SIZE];
26775b4a938SJunfeng Guo 	u8 hit_idx_grp;
26875b4a938SJunfeng Guo 	u8 pg_prio;
26975b4a938SJunfeng Guo 	struct ice_np_keybuilder np_kb;
27075b4a938SJunfeng Guo 	struct ice_pg_keybuilder pg_kb;
27175b4a938SJunfeng Guo 	struct ice_alu alu0;
27275b4a938SJunfeng Guo 	struct ice_alu alu1;
27375b4a938SJunfeng Guo 	struct ice_alu alu2;
27475b4a938SJunfeng Guo };
27575b4a938SJunfeng Guo 
27675b4a938SJunfeng Guo #define ICE_LBL_LEN			64
277b2687653SJunfeng Guo #define ICE_LBL_BST_DVM			"BOOST_MAC_VLAN_DVM"
278b2687653SJunfeng Guo #define ICE_LBL_BST_SVM			"BOOST_MAC_VLAN_SVM"
279b2687653SJunfeng Guo 
280b2687653SJunfeng Guo enum ice_lbl_type {
281b2687653SJunfeng Guo 	ICE_LBL_BST_TYPE_UNKNOWN,
282b2687653SJunfeng Guo 	ICE_LBL_BST_TYPE_DVM,
283b2687653SJunfeng Guo 	ICE_LBL_BST_TYPE_SVM,
284b2687653SJunfeng Guo };
285b2687653SJunfeng Guo 
28675b4a938SJunfeng Guo struct ice_lbl_item {
28775b4a938SJunfeng Guo 	u16 idx;
28875b4a938SJunfeng Guo 	char label[ICE_LBL_LEN];
289b2687653SJunfeng Guo 
290b2687653SJunfeng Guo 	/* must be at the end, not part of the DDP section */
291b2687653SJunfeng Guo 	enum ice_lbl_type type;
29275b4a938SJunfeng Guo };
29375b4a938SJunfeng Guo 
2944851f12cSJunfeng Guo struct ice_bst_tcam_item *
2954851f12cSJunfeng Guo ice_bst_tcam_match(struct ice_bst_tcam_item *tcam_table, u8 *pat);
296b2687653SJunfeng Guo struct ice_bst_tcam_item *
297b2687653SJunfeng Guo ice_bst_tcam_search(struct ice_bst_tcam_item *tcam_table,
298b2687653SJunfeng Guo 		    struct ice_lbl_item *lbl_table,
299b2687653SJunfeng Guo 		    enum ice_lbl_type type, u16 *start);
3004851f12cSJunfeng Guo 
30175b4a938SJunfeng Guo /*** ICE_SID_RXPARSER_MARKER_PTYPE section ***/
30275b4a938SJunfeng Guo #define ICE_PTYPE_MK_TCAM_TABLE_SIZE	1024
30375b4a938SJunfeng Guo #define ICE_PTYPE_MK_TCAM_KEY_SIZE	10
30475b4a938SJunfeng Guo 
30575b4a938SJunfeng Guo struct ice_ptype_mk_tcam_item {
30675b4a938SJunfeng Guo 	u16 address;
30775b4a938SJunfeng Guo 	u16 ptype;
30875b4a938SJunfeng Guo 	u8 key[ICE_PTYPE_MK_TCAM_KEY_SIZE];
30975b4a938SJunfeng Guo 	u8 key_inv[ICE_PTYPE_MK_TCAM_KEY_SIZE];
31075b4a938SJunfeng Guo } __packed;
31175b4a938SJunfeng Guo 
3124851f12cSJunfeng Guo struct ice_ptype_mk_tcam_item *
3134851f12cSJunfeng Guo ice_ptype_mk_tcam_match(struct ice_ptype_mk_tcam_item *table,
3144851f12cSJunfeng Guo 			u8 *pat, int len);
31575b4a938SJunfeng Guo /*** ICE_SID_RXPARSER_MARKER_GRP section ***/
31675b4a938SJunfeng Guo #define ICE_MK_GRP_TABLE_SIZE		128
31775b4a938SJunfeng Guo #define ICE_MK_COUNT_PER_GRP		8
31875b4a938SJunfeng Guo 
31975b4a938SJunfeng Guo /*  Marker Group item */
32075b4a938SJunfeng Guo struct ice_mk_grp_item {
32175b4a938SJunfeng Guo 	int idx;
32275b4a938SJunfeng Guo 	u8 markers[ICE_MK_COUNT_PER_GRP];
32375b4a938SJunfeng Guo };
32475b4a938SJunfeng Guo 
32575b4a938SJunfeng Guo /*** ICE_SID_RXPARSER_PROTO_GRP section ***/
32675b4a938SJunfeng Guo #define ICE_PROTO_COUNT_PER_GRP		8
32775b4a938SJunfeng Guo #define ICE_PROTO_GRP_TABLE_SIZE	192
32875b4a938SJunfeng Guo #define ICE_PROTO_GRP_ITEM_SIZE		22
32975b4a938SJunfeng Guo struct ice_proto_off {
33075b4a938SJunfeng Guo 	bool polarity;	/* true: positive, false: negative */
33175b4a938SJunfeng Guo 	u8 proto_id;
33275b4a938SJunfeng Guo 	u16 offset;	/* 10 bit protocol offset */
33375b4a938SJunfeng Guo };
33475b4a938SJunfeng Guo 
33575b4a938SJunfeng Guo /*  Protocol Group item */
33675b4a938SJunfeng Guo struct ice_proto_grp_item {
33775b4a938SJunfeng Guo 	u16 idx;
33875b4a938SJunfeng Guo 	struct ice_proto_off po[ICE_PROTO_COUNT_PER_GRP];
33975b4a938SJunfeng Guo };
34075b4a938SJunfeng Guo 
34175b4a938SJunfeng Guo /*** ICE_SID_RXPARSER_FLAG_REDIR section ***/
34275b4a938SJunfeng Guo #define ICE_FLG_RD_TABLE_SIZE	64
3434851f12cSJunfeng Guo #define ICE_FLG_RDT_SIZE	64
34475b4a938SJunfeng Guo 
34575b4a938SJunfeng Guo /* Flags Redirection item */
34675b4a938SJunfeng Guo struct ice_flg_rd_item {
34775b4a938SJunfeng Guo 	u16 idx;
34875b4a938SJunfeng Guo 	bool expose;
34975b4a938SJunfeng Guo 	u8 intr_flg_id;	/* Internal Flag ID */
35075b4a938SJunfeng Guo };
35175b4a938SJunfeng Guo 
3524851f12cSJunfeng Guo u64 ice_flg_redirect(struct ice_flg_rd_item *table, u64 psr_flg);
3534851f12cSJunfeng Guo 
35475b4a938SJunfeng Guo /*** ICE_SID_XLT_KEY_BUILDER_SW, ICE_SID_XLT_KEY_BUILDER_ACL,
35575b4a938SJunfeng Guo  * ICE_SID_XLT_KEY_BUILDER_FD and ICE_SID_XLT_KEY_BUILDER_RSS
35675b4a938SJunfeng Guo  * sections ***/
35775b4a938SJunfeng Guo #define ICE_XLT_KB_FLAG0_14_CNT		15
35875b4a938SJunfeng Guo #define ICE_XLT_KB_TBL_CNT		8
35975b4a938SJunfeng Guo #define ICE_XLT_KB_TBL_ENTRY_SIZE	24
36075b4a938SJunfeng Guo 
36175b4a938SJunfeng Guo struct ice_xlt_kb_entry {
36275b4a938SJunfeng Guo 	u8 xlt1_ad_sel;
36375b4a938SJunfeng Guo 	u8 xlt2_ad_sel;
36475b4a938SJunfeng Guo 	u16 flg0_14_sel[ICE_XLT_KB_FLAG0_14_CNT];
36575b4a938SJunfeng Guo 	u8 xlt1_md_sel;
36675b4a938SJunfeng Guo 	u8 xlt2_md_sel;
36775b4a938SJunfeng Guo };
36875b4a938SJunfeng Guo 
36975b4a938SJunfeng Guo /* XLT Key Builder */
37075b4a938SJunfeng Guo struct ice_xlt_kb {
37175b4a938SJunfeng Guo 	u8 xlt1_pm;	/* XLT1 Partition Mode */
37275b4a938SJunfeng Guo 	u8 xlt2_pm;	/* XLT2 Partition Mode */
37375b4a938SJunfeng Guo 	u8 prof_id_pm;	/* Profile ID Partition Mode */
37475b4a938SJunfeng Guo 	u64 flag15;
37575b4a938SJunfeng Guo 
37675b4a938SJunfeng Guo 	struct ice_xlt_kb_entry entries[ICE_XLT_KB_TBL_CNT];
37775b4a938SJunfeng Guo };
37875b4a938SJunfeng Guo 
3794851f12cSJunfeng Guo u16 ice_xlt_kb_flag_get(struct ice_xlt_kb *kb, u64 pkt_flag);
3804851f12cSJunfeng Guo 
38175b4a938SJunfeng Guo /*** Parser API ***/
3829a4c07aaSJunfeng Guo #define ICE_GPR_HV_IDX		64
3839a4c07aaSJunfeng Guo #define ICE_GPR_HV_SIZE		32
3849a4c07aaSJunfeng Guo #define ICE_GPR_ERR_IDX		84
3859a4c07aaSJunfeng Guo #define ICE_GPR_FLG_IDX		104
3869a4c07aaSJunfeng Guo #define ICE_GPR_FLG_SIZE	16
3879a4c07aaSJunfeng Guo 
3889a4c07aaSJunfeng Guo #define ICE_GPR_TSR_IDX		108	/* TSR: TCAM Search Register */
3899a4c07aaSJunfeng Guo #define ICE_GPR_NN_IDX		109	/* NN: Next Parsing Cycle Node ID */
3909a4c07aaSJunfeng Guo #define ICE_GPR_HO_IDX		110	/* HO: Next Parsing Cycle hdr Offset */
3919a4c07aaSJunfeng Guo #define ICE_GPR_NP_IDX		111	/* NP: Next Parsing Cycle */
3929a4c07aaSJunfeng Guo 
3939a4c07aaSJunfeng Guo #define ICE_PARSER_MAX_PKT_LEN	504
3949a4c07aaSJunfeng Guo #define ICE_PARSER_PKT_REV	32
3959a4c07aaSJunfeng Guo #define ICE_PARSER_GPR_NUM	128
3969a4c07aaSJunfeng Guo #define ICE_PARSER_FLG_NUM	64
3979a4c07aaSJunfeng Guo #define ICE_PARSER_ERR_NUM	16
3989a4c07aaSJunfeng Guo #define ICE_BST_KEY_SIZE	10
3999a4c07aaSJunfeng Guo #define ICE_MARKER_ID_SIZE	9
4009a4c07aaSJunfeng Guo #define ICE_MARKER_MAX_SIZE	\
4019a4c07aaSJunfeng Guo 		(ICE_MARKER_ID_SIZE * BITS_PER_BYTE - 1)
4029a4c07aaSJunfeng Guo #define ICE_MARKER_ID_NUM	8
4039a4c07aaSJunfeng Guo #define ICE_PO_PAIR_SIZE	256
4049a4c07aaSJunfeng Guo 
4059a4c07aaSJunfeng Guo struct ice_gpr_pu {
4069a4c07aaSJunfeng Guo 	/* array of flags to indicate if GRP needs to be updated */
4079a4c07aaSJunfeng Guo 	bool gpr_val_upd[ICE_PARSER_GPR_NUM];
4089a4c07aaSJunfeng Guo 	u16 gpr_val[ICE_PARSER_GPR_NUM];
4099a4c07aaSJunfeng Guo 	u64 flg_msk;
4109a4c07aaSJunfeng Guo 	u64 flg_val;
4119a4c07aaSJunfeng Guo 	u16 err_msk;
4129a4c07aaSJunfeng Guo 	u16 err_val;
4139a4c07aaSJunfeng Guo };
4149a4c07aaSJunfeng Guo 
4159a4c07aaSJunfeng Guo enum ice_pg_prio {
4169a4c07aaSJunfeng Guo 	ICE_PG_P0	= 0,
4179a4c07aaSJunfeng Guo 	ICE_PG_P1	= 1,
4189a4c07aaSJunfeng Guo 	ICE_PG_P2	= 2,
4199a4c07aaSJunfeng Guo 	ICE_PG_P3	= 3,
4209a4c07aaSJunfeng Guo };
4219a4c07aaSJunfeng Guo 
4229a4c07aaSJunfeng Guo struct ice_parser_rt {
4239a4c07aaSJunfeng Guo 	struct ice_parser *psr;
4249a4c07aaSJunfeng Guo 	u16 gpr[ICE_PARSER_GPR_NUM];
4259a4c07aaSJunfeng Guo 	u8 pkt_buf[ICE_PARSER_MAX_PKT_LEN + ICE_PARSER_PKT_REV];
4269a4c07aaSJunfeng Guo 	u16 pkt_len;
4279a4c07aaSJunfeng Guo 	u16 po;
4289a4c07aaSJunfeng Guo 	u8 bst_key[ICE_BST_KEY_SIZE];
4299a4c07aaSJunfeng Guo 	struct ice_pg_cam_key pg_key;
4309a4c07aaSJunfeng Guo 	struct ice_alu *alu0;
4319a4c07aaSJunfeng Guo 	struct ice_alu *alu1;
4329a4c07aaSJunfeng Guo 	struct ice_alu *alu2;
4339a4c07aaSJunfeng Guo 	struct ice_pg_cam_action *action;
4349a4c07aaSJunfeng Guo 	u8 pg_prio;
4359a4c07aaSJunfeng Guo 	struct ice_gpr_pu pu;
4369a4c07aaSJunfeng Guo 	u8 markers[ICE_MARKER_ID_SIZE];
4379a4c07aaSJunfeng Guo 	bool protocols[ICE_PO_PAIR_SIZE];
4389a4c07aaSJunfeng Guo 	u16 offsets[ICE_PO_PAIR_SIZE];
4399a4c07aaSJunfeng Guo };
4409a4c07aaSJunfeng Guo 
4419a4c07aaSJunfeng Guo struct ice_parser_proto_off {
4429a4c07aaSJunfeng Guo 	u8 proto_id;	/* hardware protocol ID */
4439a4c07aaSJunfeng Guo 	u16 offset;	/* offset from the start of the protocol header */
4449a4c07aaSJunfeng Guo };
4459a4c07aaSJunfeng Guo 
4469a4c07aaSJunfeng Guo #define ICE_PARSER_PROTO_OFF_PAIR_SIZE	16
4479a4c07aaSJunfeng Guo #define ICE_PARSER_FLAG_PSR_SIZE	8
448b2687653SJunfeng Guo #define ICE_BT_VM_OFF			0
4499a4c07aaSJunfeng Guo 
4509a4c07aaSJunfeng Guo struct ice_parser_result {
4519a4c07aaSJunfeng Guo 	u16 ptype;	/* 16 bits hardware PTYPE */
4529a4c07aaSJunfeng Guo 	/* array of protocol and header offset pairs */
4539a4c07aaSJunfeng Guo 	struct ice_parser_proto_off po[ICE_PARSER_PROTO_OFF_PAIR_SIZE];
4549a4c07aaSJunfeng Guo 	int po_num;	/* # of protocol-offset pairs must <= 16 */
4559a4c07aaSJunfeng Guo 	u64 flags_psr;	/* parser flags */
4569a4c07aaSJunfeng Guo 	u64 flags_pkt;	/* packet flags */
4579a4c07aaSJunfeng Guo 	u16 flags_sw;	/* key builder flags for SW */
4589a4c07aaSJunfeng Guo 	u16 flags_acl;	/* key builder flags for ACL */
4599a4c07aaSJunfeng Guo 	u16 flags_fd;	/* key builder flags for FD */
4609a4c07aaSJunfeng Guo 	u16 flags_rss;	/* key builder flags for RSS */
4619a4c07aaSJunfeng Guo };
4629a4c07aaSJunfeng Guo 
4639a4c07aaSJunfeng Guo void ice_parser_rt_reset(struct ice_parser_rt *rt);
4649a4c07aaSJunfeng Guo void ice_parser_rt_pktbuf_set(struct ice_parser_rt *rt, const u8 *pkt_buf,
4659a4c07aaSJunfeng Guo 			      int pkt_len);
4669a4c07aaSJunfeng Guo int ice_parser_rt_execute(struct ice_parser_rt *rt,
4679a4c07aaSJunfeng Guo 			  struct ice_parser_result *rslt);
4689a4c07aaSJunfeng Guo 
46986ff3d79SJunfeng Guo struct ice_parser {
47086ff3d79SJunfeng Guo 	struct ice_hw *hw; /* pointer to the hardware structure */
47175b4a938SJunfeng Guo 
47275b4a938SJunfeng Guo 	struct ice_imem_item *imem_table;
47375b4a938SJunfeng Guo 	struct ice_metainit_item *mi_table;
47475b4a938SJunfeng Guo 
47575b4a938SJunfeng Guo 	struct ice_pg_cam_item *pg_cam_table;
47675b4a938SJunfeng Guo 	struct ice_pg_cam_item *pg_sp_cam_table;
47775b4a938SJunfeng Guo 	struct ice_pg_nm_cam_item *pg_nm_cam_table;
47875b4a938SJunfeng Guo 	struct ice_pg_nm_cam_item *pg_nm_sp_cam_table;
47975b4a938SJunfeng Guo 
48075b4a938SJunfeng Guo 	struct ice_bst_tcam_item *bst_tcam_table;
48175b4a938SJunfeng Guo 	struct ice_lbl_item *bst_lbl_table;
48275b4a938SJunfeng Guo 	struct ice_ptype_mk_tcam_item *ptype_mk_tcam_table;
48375b4a938SJunfeng Guo 	struct ice_mk_grp_item *mk_grp_table;
48475b4a938SJunfeng Guo 	struct ice_proto_grp_item *proto_grp_table;
48575b4a938SJunfeng Guo 	struct ice_flg_rd_item *flg_rd_table;
48675b4a938SJunfeng Guo 
48775b4a938SJunfeng Guo 	struct ice_xlt_kb *xlt_kb_sw;
48875b4a938SJunfeng Guo 	struct ice_xlt_kb *xlt_kb_acl;
48975b4a938SJunfeng Guo 	struct ice_xlt_kb *xlt_kb_fd;
49075b4a938SJunfeng Guo 	struct ice_xlt_kb *xlt_kb_rss;
4919a4c07aaSJunfeng Guo 
4929a4c07aaSJunfeng Guo 	struct ice_parser_rt rt;
49386ff3d79SJunfeng Guo };
49486ff3d79SJunfeng Guo 
49586ff3d79SJunfeng Guo struct ice_parser *ice_parser_create(struct ice_hw *hw);
49686ff3d79SJunfeng Guo void ice_parser_destroy(struct ice_parser *psr);
497b2687653SJunfeng Guo void ice_parser_dvm_set(struct ice_parser *psr, bool on);
4989a4c07aaSJunfeng Guo int ice_parser_run(struct ice_parser *psr, const u8 *pkt_buf,
4999a4c07aaSJunfeng Guo 		   int pkt_len, struct ice_parser_result *rslt);
5009a4c07aaSJunfeng Guo void ice_parser_result_dump(struct ice_hw *hw, struct ice_parser_result *rslt);
50186ff3d79SJunfeng Guo #endif /* _ICE_PARSER_H_ */
502