1b11a0bb2SSalil Mehta // SPDX-License-Identifier: GPL-2.0+
2b11a0bb2SSalil Mehta // Copyright (c) 2016-2017 Hisilicon Limited.
3b11a0bb2SSalil Mehta
4b11a0bb2SSalil Mehta #include "hclge_mbx.h"
5b11a0bb2SSalil Mehta #include "hclgevf_main.h"
6b11a0bb2SSalil Mehta #include "hnae3.h"
7b11a0bb2SSalil Mehta
8d8355240SYufeng Mo #define CREATE_TRACE_POINTS
9d8355240SYufeng Mo #include "hclgevf_trace.h"
10d8355240SYufeng Mo
hclgevf_resp_to_errno(u16 resp_code)11027fd531SJian Shen static int hclgevf_resp_to_errno(u16 resp_code)
12027fd531SJian Shen {
13027fd531SJian Shen return resp_code ? -resp_code : 0;
14027fd531SJian Shen }
15027fd531SJian Shen
164671042fSPeng Li #define HCLGEVF_MBX_MATCH_ID_START 1
hclgevf_reset_mbx_resp_status(struct hclgevf_dev * hdev)17b11a0bb2SSalil Mehta static void hclgevf_reset_mbx_resp_status(struct hclgevf_dev *hdev)
18b11a0bb2SSalil Mehta {
19b11a0bb2SSalil Mehta /* this function should be called with mbx_resp.mbx_mutex held
209c657cbcSPeng Li * to protect the received_response from race condition
21b11a0bb2SSalil Mehta */
22b11a0bb2SSalil Mehta hdev->mbx_resp.received_resp = false;
23b11a0bb2SSalil Mehta hdev->mbx_resp.origin_mbx_msg = 0;
24b11a0bb2SSalil Mehta hdev->mbx_resp.resp_status = 0;
254671042fSPeng Li hdev->mbx_resp.match_id++;
264671042fSPeng Li /* Update match_id and ensure the value of match_id is not zero */
274671042fSPeng Li if (hdev->mbx_resp.match_id == 0)
284671042fSPeng Li hdev->mbx_resp.match_id = HCLGEVF_MBX_MATCH_ID_START;
29b11a0bb2SSalil Mehta memset(hdev->mbx_resp.additional_info, 0, HCLGE_MBX_MAX_RESP_DATA_SIZE);
30b11a0bb2SSalil Mehta }
31b11a0bb2SSalil Mehta
32b11a0bb2SSalil Mehta /* hclgevf_get_mbx_resp: used to get a response from PF after VF sends a mailbox
33b11a0bb2SSalil Mehta * message to PF.
34b11a0bb2SSalil Mehta * @hdev: pointer to struct hclgevf_dev
352e0f5388SPeng Li * @code0: the message opcode VF send to PF.
362e0f5388SPeng Li * @code1: the message sub-opcode VF send to PF.
372e0f5388SPeng Li * @resp_data: pointer to store response data from PF to VF.
382e0f5388SPeng Li * @resp_len: the length of resp_data from PF to VF.
39b11a0bb2SSalil Mehta */
hclgevf_get_mbx_resp(struct hclgevf_dev * hdev,u16 code0,u16 code1,u8 * resp_data,u16 resp_len)40b11a0bb2SSalil Mehta static int hclgevf_get_mbx_resp(struct hclgevf_dev *hdev, u16 code0, u16 code1,
41b11a0bb2SSalil Mehta u8 *resp_data, u16 resp_len)
42b11a0bb2SSalil Mehta {
43b11a0bb2SSalil Mehta #define HCLGEVF_MAX_TRY_TIMES 500
441b7d7b05SPeng Li #define HCLGEVF_SLEEP_USECOND 1000
45b11a0bb2SSalil Mehta struct hclgevf_mbx_resp_status *mbx_resp;
46b11a0bb2SSalil Mehta u16 r_code0, r_code1;
47b11a0bb2SSalil Mehta int i = 0;
48b11a0bb2SSalil Mehta
49b11a0bb2SSalil Mehta if (resp_len > HCLGE_MBX_MAX_RESP_DATA_SIZE) {
50b11a0bb2SSalil Mehta dev_err(&hdev->pdev->dev,
51adcf738bSGuojia Liao "VF mbx response len(=%u) exceeds maximum(=%u)\n",
52b11a0bb2SSalil Mehta resp_len,
53b11a0bb2SSalil Mehta HCLGE_MBX_MAX_RESP_DATA_SIZE);
54b11a0bb2SSalil Mehta return -EINVAL;
55b11a0bb2SSalil Mehta }
56b11a0bb2SSalil Mehta
57b11a0bb2SSalil Mehta while ((!hdev->mbx_resp.received_resp) && (i < HCLGEVF_MAX_TRY_TIMES)) {
58076bb537SJie Wang if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE,
59076bb537SJie Wang &hdev->hw.hw.comm_state))
60ef5f8e50SHuazhong Tan return -EIO;
61ef5f8e50SHuazhong Tan
621b7d7b05SPeng Li usleep_range(HCLGEVF_SLEEP_USECOND, HCLGEVF_SLEEP_USECOND * 2);
63b11a0bb2SSalil Mehta i++;
64b11a0bb2SSalil Mehta }
65b11a0bb2SSalil Mehta
66ac92c0a9SYonglong Liu /* ensure additional_info will be seen after received_resp */
67ac92c0a9SYonglong Liu smp_rmb();
68ac92c0a9SYonglong Liu
69b11a0bb2SSalil Mehta if (i >= HCLGEVF_MAX_TRY_TIMES) {
70b11a0bb2SSalil Mehta dev_err(&hdev->pdev->dev,
71adcf738bSGuojia Liao "VF could not get mbx(%u,%u) resp(=%d) from PF in %d tries\n",
72fbf3cd3fSHuazhong Tan code0, code1, hdev->mbx_resp.received_resp, i);
73b11a0bb2SSalil Mehta return -EIO;
74b11a0bb2SSalil Mehta }
75b11a0bb2SSalil Mehta
76b11a0bb2SSalil Mehta mbx_resp = &hdev->mbx_resp;
77b11a0bb2SSalil Mehta r_code0 = (u16)(mbx_resp->origin_mbx_msg >> 16);
78b11a0bb2SSalil Mehta r_code1 = (u16)(mbx_resp->origin_mbx_msg & 0xff);
792097fdefSJian Shen
802097fdefSJian Shen if (mbx_resp->resp_status)
812097fdefSJian Shen return mbx_resp->resp_status;
822097fdefSJian Shen
83b11a0bb2SSalil Mehta if (resp_data)
84b11a0bb2SSalil Mehta memcpy(resp_data, &mbx_resp->additional_info[0], resp_len);
85b11a0bb2SSalil Mehta
86b11a0bb2SSalil Mehta hclgevf_reset_mbx_resp_status(hdev);
87b11a0bb2SSalil Mehta
88b11a0bb2SSalil Mehta if (!(r_code0 == code0 && r_code1 == code1 && !mbx_resp->resp_status)) {
89b11a0bb2SSalil Mehta dev_err(&hdev->pdev->dev,
90adcf738bSGuojia Liao "VF could not match resp code(code0=%u,code1=%u), %d\n",
91b11a0bb2SSalil Mehta code0, code1, mbx_resp->resp_status);
92fbf3cd3fSHuazhong Tan dev_err(&hdev->pdev->dev,
93adcf738bSGuojia Liao "VF could not match resp r_code(r_code0=%u,r_code1=%u)\n",
94fbf3cd3fSHuazhong Tan r_code0, r_code1);
95b11a0bb2SSalil Mehta return -EIO;
96b11a0bb2SSalil Mehta }
97b11a0bb2SSalil Mehta
98b11a0bb2SSalil Mehta return 0;
99b11a0bb2SSalil Mehta }
100b11a0bb2SSalil Mehta
hclgevf_send_mbx_msg(struct hclgevf_dev * hdev,struct hclge_vf_to_pf_msg * send_msg,bool need_resp,u8 * resp_data,u16 resp_len)101d3410018SYufeng Mo int hclgevf_send_mbx_msg(struct hclgevf_dev *hdev,
102d3410018SYufeng Mo struct hclge_vf_to_pf_msg *send_msg, bool need_resp,
103b11a0bb2SSalil Mehta u8 *resp_data, u16 resp_len)
104b11a0bb2SSalil Mehta {
105b11a0bb2SSalil Mehta struct hclge_mbx_vf_to_pf_cmd *req;
1066befad60SJie Wang struct hclge_desc desc;
107b11a0bb2SSalil Mehta int status;
108b11a0bb2SSalil Mehta
109b11a0bb2SSalil Mehta req = (struct hclge_mbx_vf_to_pf_cmd *)desc.data;
110b11a0bb2SSalil Mehta
111d3410018SYufeng Mo if (!send_msg) {
112b11a0bb2SSalil Mehta dev_err(&hdev->pdev->dev,
113d3410018SYufeng Mo "failed to send mbx, msg is NULL\n");
114b11a0bb2SSalil Mehta return -EINVAL;
115b11a0bb2SSalil Mehta }
116b11a0bb2SSalil Mehta
117b11a0bb2SSalil Mehta hclgevf_cmd_setup_basic_desc(&desc, HCLGEVF_OPC_MBX_VF_TO_PF, false);
118bb5790b7SHuazhong Tan if (need_resp)
119bb5790b7SHuazhong Tan hnae3_set_bit(req->mbx_need_resp, HCLGE_MBX_NEED_RESP_B, 1);
120bb5790b7SHuazhong Tan
121d3410018SYufeng Mo memcpy(&req->msg, send_msg, sizeof(struct hclge_vf_to_pf_msg));
122b11a0bb2SSalil Mehta
12327cbf64aSJie Wang if (test_bit(HCLGEVF_STATE_NIC_REGISTERED, &hdev->state))
124d8355240SYufeng Mo trace_hclge_vf_mbx_send(hdev, req);
125d8355240SYufeng Mo
126b11a0bb2SSalil Mehta /* synchronous send */
127b11a0bb2SSalil Mehta if (need_resp) {
128b11a0bb2SSalil Mehta mutex_lock(&hdev->mbx_resp.mbx_mutex);
129b11a0bb2SSalil Mehta hclgevf_reset_mbx_resp_status(hdev);
130767975e5SJie Wang req->match_id = cpu_to_le16(hdev->mbx_resp.match_id);
131b11a0bb2SSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
132b11a0bb2SSalil Mehta if (status) {
133b11a0bb2SSalil Mehta dev_err(&hdev->pdev->dev,
134b11a0bb2SSalil Mehta "VF failed(=%d) to send mbx message to PF\n",
135b11a0bb2SSalil Mehta status);
136b11a0bb2SSalil Mehta mutex_unlock(&hdev->mbx_resp.mbx_mutex);
137b11a0bb2SSalil Mehta return status;
138b11a0bb2SSalil Mehta }
139b11a0bb2SSalil Mehta
140d3410018SYufeng Mo status = hclgevf_get_mbx_resp(hdev, send_msg->code,
141d3410018SYufeng Mo send_msg->subcode, resp_data,
142b11a0bb2SSalil Mehta resp_len);
143b11a0bb2SSalil Mehta mutex_unlock(&hdev->mbx_resp.mbx_mutex);
144b11a0bb2SSalil Mehta } else {
145b11a0bb2SSalil Mehta /* asynchronous send */
146b11a0bb2SSalil Mehta status = hclgevf_cmd_send(&hdev->hw, &desc, 1);
147b11a0bb2SSalil Mehta if (status) {
148b11a0bb2SSalil Mehta dev_err(&hdev->pdev->dev,
149b11a0bb2SSalil Mehta "VF failed(=%d) to send mbx message to PF\n",
150b11a0bb2SSalil Mehta status);
151b11a0bb2SSalil Mehta return status;
152b11a0bb2SSalil Mehta }
153b11a0bb2SSalil Mehta }
154b11a0bb2SSalil Mehta
155b11a0bb2SSalil Mehta return status;
156b11a0bb2SSalil Mehta }
157b11a0bb2SSalil Mehta
hclgevf_cmd_crq_empty(struct hclgevf_hw * hw)1586444e2a5SXi Wang static bool hclgevf_cmd_crq_empty(struct hclgevf_hw *hw)
1596444e2a5SXi Wang {
160cb413bfaSJie Wang u32 tail = hclgevf_read_dev(hw, HCLGE_COMM_NIC_CRQ_TAIL_REG);
1616444e2a5SXi Wang
162*169d07e7SPeiyang Wang return tail == (u32)hw->hw.cmq.crq.next_to_use;
1636444e2a5SXi Wang }
1646444e2a5SXi Wang
hclgevf_handle_mbx_response(struct hclgevf_dev * hdev,struct hclge_mbx_pf_to_vf_cmd * req)165d7517f8fSPeng Li static void hclgevf_handle_mbx_response(struct hclgevf_dev *hdev,
166d7517f8fSPeng Li struct hclge_mbx_pf_to_vf_cmd *req)
167d7517f8fSPeng Li {
168767975e5SJie Wang u16 vf_mbx_msg_subcode = le16_to_cpu(req->msg.vf_mbx_msg_subcode);
169767975e5SJie Wang u16 vf_mbx_msg_code = le16_to_cpu(req->msg.vf_mbx_msg_code);
170d7517f8fSPeng Li struct hclgevf_mbx_resp_status *resp = &hdev->mbx_resp;
171767975e5SJie Wang u16 resp_status = le16_to_cpu(req->msg.resp_status);
172767975e5SJie Wang u16 match_id = le16_to_cpu(req->match_id);
173d7517f8fSPeng Li
174d7517f8fSPeng Li if (resp->received_resp)
175d7517f8fSPeng Li dev_warn(&hdev->pdev->dev,
176d7517f8fSPeng Li "VF mbx resp flag not clear(%u)\n",
177767975e5SJie Wang vf_mbx_msg_code);
178d7517f8fSPeng Li
179767975e5SJie Wang resp->origin_mbx_msg = (vf_mbx_msg_code << 16);
180767975e5SJie Wang resp->origin_mbx_msg |= vf_mbx_msg_subcode;
181767975e5SJie Wang resp->resp_status = hclgevf_resp_to_errno(resp_status);
182d7517f8fSPeng Li memcpy(resp->additional_info, req->msg.resp_data,
183d7517f8fSPeng Li HCLGE_MBX_MAX_RESP_DATA_SIZE * sizeof(u8));
184ac92c0a9SYonglong Liu
185ac92c0a9SYonglong Liu /* ensure additional_info will be seen before setting received_resp */
186ac92c0a9SYonglong Liu smp_wmb();
187ac92c0a9SYonglong Liu
188767975e5SJie Wang if (match_id) {
189d7517f8fSPeng Li /* If match_id is not zero, it means PF support match_id.
190d7517f8fSPeng Li * if the match_id is right, VF get the right response, or
191d7517f8fSPeng Li * ignore the response. and driver will clear hdev->mbx_resp
192d7517f8fSPeng Li * when send next message which need response.
193d7517f8fSPeng Li */
194767975e5SJie Wang if (match_id == resp->match_id)
195d7517f8fSPeng Li resp->received_resp = true;
196d7517f8fSPeng Li } else {
197d7517f8fSPeng Li resp->received_resp = true;
198d7517f8fSPeng Li }
199d7517f8fSPeng Li }
200d7517f8fSPeng Li
hclgevf_handle_mbx_msg(struct hclgevf_dev * hdev,struct hclge_mbx_pf_to_vf_cmd * req)201d7517f8fSPeng Li static void hclgevf_handle_mbx_msg(struct hclgevf_dev *hdev,
202d7517f8fSPeng Li struct hclge_mbx_pf_to_vf_cmd *req)
203d7517f8fSPeng Li {
204d7517f8fSPeng Li /* we will drop the async msg if we find ARQ as full
205d7517f8fSPeng Li * and continue with next message
206d7517f8fSPeng Li */
207d7517f8fSPeng Li if (atomic_read(&hdev->arq.count) >=
208d7517f8fSPeng Li HCLGE_MBX_MAX_ARQ_MSG_NUM) {
209d7517f8fSPeng Li dev_warn(&hdev->pdev->dev,
210d7517f8fSPeng Li "Async Q full, dropping msg(%u)\n",
211767975e5SJie Wang le16_to_cpu(req->msg.code));
212d7517f8fSPeng Li return;
213d7517f8fSPeng Li }
214d7517f8fSPeng Li
215d7517f8fSPeng Li /* tail the async message in arq */
216d7517f8fSPeng Li memcpy(hdev->arq.msg_q[hdev->arq.tail], &req->msg,
217d7517f8fSPeng Li HCLGE_MBX_MAX_ARQ_MSG_SIZE * sizeof(u16));
218d7517f8fSPeng Li hclge_mbx_tail_ptr_move_arq(hdev->arq);
219d7517f8fSPeng Li atomic_inc(&hdev->arq.count);
220d7517f8fSPeng Li
221d7517f8fSPeng Li hclgevf_mbx_task_schedule(hdev);
222d7517f8fSPeng Li }
223d7517f8fSPeng Li
hclgevf_mbx_handler(struct hclgevf_dev * hdev)224b11a0bb2SSalil Mehta void hclgevf_mbx_handler(struct hclgevf_dev *hdev)
225b11a0bb2SSalil Mehta {
226b11a0bb2SSalil Mehta struct hclge_mbx_pf_to_vf_cmd *req;
227076bb537SJie Wang struct hclge_comm_cmq_ring *crq;
2286befad60SJie Wang struct hclge_desc *desc;
22907a0556aSSalil Mehta u16 flag;
230767975e5SJie Wang u16 code;
231b11a0bb2SSalil Mehta
232076bb537SJie Wang crq = &hdev->hw.hw.cmq.crq;
233b11a0bb2SSalil Mehta
2346444e2a5SXi Wang while (!hclgevf_cmd_crq_empty(&hdev->hw)) {
235076bb537SJie Wang if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE,
236076bb537SJie Wang &hdev->hw.hw.comm_state)) {
237ef5f8e50SHuazhong Tan dev_info(&hdev->pdev->dev, "vf crq need init\n");
238ef5f8e50SHuazhong Tan return;
239ef5f8e50SHuazhong Tan }
240ef5f8e50SHuazhong Tan
241b11a0bb2SSalil Mehta desc = &crq->desc[crq->next_to_use];
242b11a0bb2SSalil Mehta req = (struct hclge_mbx_pf_to_vf_cmd *)desc->data;
243b11a0bb2SSalil Mehta
2446444e2a5SXi Wang flag = le16_to_cpu(crq->desc[crq->next_to_use].flag);
245767975e5SJie Wang code = le16_to_cpu(req->msg.code);
246e4e87715SPeng Li if (unlikely(!hnae3_get_bit(flag, HCLGEVF_CMDQ_RX_OUTVLD_B))) {
2476444e2a5SXi Wang dev_warn(&hdev->pdev->dev,
248adcf738bSGuojia Liao "dropped invalid mailbox message, code = %u\n",
249767975e5SJie Wang code);
2506444e2a5SXi Wang
2516444e2a5SXi Wang /* dropping/not processing this invalid message */
2526444e2a5SXi Wang crq->desc[crq->next_to_use].flag = 0;
2536444e2a5SXi Wang hclge_mbx_ring_ptr_move_crq(crq);
2546444e2a5SXi Wang continue;
2556444e2a5SXi Wang }
2566444e2a5SXi Wang
257d8355240SYufeng Mo trace_hclge_vf_mbx_get(hdev, req);
258d8355240SYufeng Mo
25907a0556aSSalil Mehta /* synchronous messages are time critical and need preferential
26007a0556aSSalil Mehta * treatment. Therefore, we need to acknowledge all the sync
26107a0556aSSalil Mehta * responses as quickly as possible so that waiting tasks do not
26207a0556aSSalil Mehta * timeout and simultaneously queue the async messages for later
26307a0556aSSalil Mehta * prcessing in context of mailbox task i.e. the slow path.
26407a0556aSSalil Mehta */
265767975e5SJie Wang switch (code) {
266b11a0bb2SSalil Mehta case HCLGE_MBX_PF_VF_RESP:
267d7517f8fSPeng Li hclgevf_handle_mbx_response(hdev, req);
268b11a0bb2SSalil Mehta break;
269b11a0bb2SSalil Mehta case HCLGE_MBX_LINK_STAT_CHANGE:
270a15fa7d4SSalil Mehta case HCLGE_MBX_ASSERTING_RESET:
2719194d18bSliuzhongzhu case HCLGE_MBX_LINK_STAT_MODE:
2724803d010SChristophe JAILLET case HCLGE_MBX_PUSH_VLAN_INFO:
273e196ec75SJian Shen case HCLGE_MBX_PUSH_PROMISC_INFO:
274d7517f8fSPeng Li hclgevf_handle_mbx_msg(hdev, req);
275b11a0bb2SSalil Mehta break;
276b11a0bb2SSalil Mehta default:
277b11a0bb2SSalil Mehta dev_err(&hdev->pdev->dev,
278adcf738bSGuojia Liao "VF received unsupported(%u) mbx msg from PF\n",
279767975e5SJie Wang code);
280b11a0bb2SSalil Mehta break;
281b11a0bb2SSalil Mehta }
282090e3b53SPeng Li crq->desc[crq->next_to_use].flag = 0;
283b11a0bb2SSalil Mehta hclge_mbx_ring_ptr_move_crq(crq);
284b11a0bb2SSalil Mehta }
285b11a0bb2SSalil Mehta
286b11a0bb2SSalil Mehta /* Write back CMDQ_RQ header pointer, M7 need this pointer */
287cb413bfaSJie Wang hclgevf_write_dev(&hdev->hw, HCLGE_COMM_NIC_CRQ_HEAD_REG,
288b11a0bb2SSalil Mehta crq->next_to_use);
289b11a0bb2SSalil Mehta }
29007a0556aSSalil Mehta
hclgevf_parse_promisc_info(struct hclgevf_dev * hdev,u16 promisc_info)291e196ec75SJian Shen static void hclgevf_parse_promisc_info(struct hclgevf_dev *hdev,
292e196ec75SJian Shen u16 promisc_info)
293e196ec75SJian Shen {
294e196ec75SJian Shen if (!promisc_info)
295e196ec75SJian Shen dev_info(&hdev->pdev->dev,
296e196ec75SJian Shen "Promisc mode is closed by host for being untrusted.\n");
297e196ec75SJian Shen }
298e196ec75SJian Shen
hclgevf_mbx_async_handler(struct hclgevf_dev * hdev)29907a0556aSSalil Mehta void hclgevf_mbx_async_handler(struct hclgevf_dev *hdev)
30007a0556aSSalil Mehta {
301767975e5SJie Wang struct hclge_mbx_port_base_vlan *vlan_info;
302767975e5SJie Wang struct hclge_mbx_link_status *link_info;
303767975e5SJie Wang struct hclge_mbx_link_mode *link_mode;
304aa5c4f17SHuazhong Tan enum hnae3_reset_type reset_type;
30592f11ea1SJian Shen u16 link_status, state;
306767975e5SJie Wang __le16 *msg_q;
307767975e5SJie Wang u16 opcode;
30807a0556aSSalil Mehta u8 duplex;
30907a0556aSSalil Mehta u32 speed;
31007a0556aSSalil Mehta u32 tail;
31101305e16SGuangbin Huang u8 flag;
312767975e5SJie Wang u16 idx;
31307a0556aSSalil Mehta
31407a0556aSSalil Mehta tail = hdev->arq.tail;
31507a0556aSSalil Mehta
31607a0556aSSalil Mehta /* process all the async queue messages */
31707a0556aSSalil Mehta while (tail != hdev->arq.head) {
318076bb537SJie Wang if (test_bit(HCLGE_COMM_STATE_CMD_DISABLE,
319076bb537SJie Wang &hdev->hw.hw.comm_state)) {
320ef5f8e50SHuazhong Tan dev_info(&hdev->pdev->dev,
321ef5f8e50SHuazhong Tan "vf crq need init in async\n");
322ef5f8e50SHuazhong Tan return;
323ef5f8e50SHuazhong Tan }
324ef5f8e50SHuazhong Tan
32507a0556aSSalil Mehta msg_q = hdev->arq.msg_q[hdev->arq.head];
326767975e5SJie Wang opcode = le16_to_cpu(msg_q[0]);
327767975e5SJie Wang switch (opcode) {
32807a0556aSSalil Mehta case HCLGE_MBX_LINK_STAT_CHANGE:
329767975e5SJie Wang link_info = (struct hclge_mbx_link_status *)(msg_q + 1);
330767975e5SJie Wang link_status = le16_to_cpu(link_info->link_status);
331767975e5SJie Wang speed = le32_to_cpu(link_info->speed);
332767975e5SJie Wang duplex = (u8)le16_to_cpu(link_info->duplex);
333767975e5SJie Wang flag = link_info->flag;
33407a0556aSSalil Mehta
33507a0556aSSalil Mehta /* update upper layer with new link link status */
33607a0556aSSalil Mehta hclgevf_update_speed_duplex(hdev, speed, duplex);
337b15c072aSYonglong Liu hclgevf_update_link_status(hdev, link_status);
33807a0556aSSalil Mehta
33901305e16SGuangbin Huang if (flag & HCLGE_MBX_PUSH_LINK_STATUS_EN)
34001305e16SGuangbin Huang set_bit(HCLGEVF_STATE_PF_PUSH_LINK_STATUS,
34101305e16SGuangbin Huang &hdev->state);
34201305e16SGuangbin Huang
34307a0556aSSalil Mehta break;
3449194d18bSliuzhongzhu case HCLGE_MBX_LINK_STAT_MODE:
345767975e5SJie Wang link_mode = (struct hclge_mbx_link_mode *)(msg_q + 1);
346767975e5SJie Wang idx = le16_to_cpu(link_mode->idx);
3479194d18bSliuzhongzhu if (idx)
348767975e5SJie Wang hdev->hw.mac.supported =
349767975e5SJie Wang le64_to_cpu(link_mode->link_mode);
3509194d18bSliuzhongzhu else
351767975e5SJie Wang hdev->hw.mac.advertising =
352767975e5SJie Wang le64_to_cpu(link_mode->link_mode);
3539194d18bSliuzhongzhu break;
354a15fa7d4SSalil Mehta case HCLGE_MBX_ASSERTING_RESET:
355a15fa7d4SSalil Mehta /* PF has asserted reset hence VF should go in pending
356a15fa7d4SSalil Mehta * state and poll for the hardware reset status till it
357a15fa7d4SSalil Mehta * has been completely reset. After this stack should
358a15fa7d4SSalil Mehta * eventually be re-initialized.
359a15fa7d4SSalil Mehta */
360767975e5SJie Wang reset_type =
361767975e5SJie Wang (enum hnae3_reset_type)le16_to_cpu(msg_q[1]);
362aa5c4f17SHuazhong Tan set_bit(reset_type, &hdev->reset_pending);
363a15fa7d4SSalil Mehta set_bit(HCLGEVF_RESET_PENDING, &hdev->reset_state);
364a15fa7d4SSalil Mehta hclgevf_reset_task_schedule(hdev);
365a15fa7d4SSalil Mehta
366a15fa7d4SSalil Mehta break;
3674803d010SChristophe JAILLET case HCLGE_MBX_PUSH_VLAN_INFO:
368767975e5SJie Wang vlan_info =
369767975e5SJie Wang (struct hclge_mbx_port_base_vlan *)(msg_q + 1);
370767975e5SJie Wang state = le16_to_cpu(vlan_info->state);
37192f11ea1SJian Shen hclgevf_update_port_base_vlan_info(hdev, state,
372767975e5SJie Wang vlan_info);
37392f11ea1SJian Shen break;
374e196ec75SJian Shen case HCLGE_MBX_PUSH_PROMISC_INFO:
375767975e5SJie Wang hclgevf_parse_promisc_info(hdev, le16_to_cpu(msg_q[1]));
376e196ec75SJian Shen break;
37707a0556aSSalil Mehta default:
37807a0556aSSalil Mehta dev_err(&hdev->pdev->dev,
379adcf738bSGuojia Liao "fetched unsupported(%u) message from arq\n",
380767975e5SJie Wang opcode);
38107a0556aSSalil Mehta break;
38207a0556aSSalil Mehta }
38307a0556aSSalil Mehta
38407a0556aSSalil Mehta hclge_mbx_head_ptr_move_arq(hdev->arq);
38530780a8bSHuazhong Tan atomic_dec(&hdev->arq.count);
38607a0556aSSalil Mehta msg_q = hdev->arq.msg_q[hdev->arq.head];
38707a0556aSSalil Mehta }
38807a0556aSSalil Mehta }
389