1d4fd0404SClaudiu Manoil /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2d4fd0404SClaudiu Manoil /* Copyright 2017-2019 NXP */ 3d4fd0404SClaudiu Manoil 4d4fd0404SClaudiu Manoil #include <linux/timer.h> 5d4fd0404SClaudiu Manoil #include <linux/pci.h> 6d4fd0404SClaudiu Manoil #include <linux/netdevice.h> 7d4fd0404SClaudiu Manoil #include <linux/etherdevice.h> 8d4fd0404SClaudiu Manoil #include <linux/dma-mapping.h> 9d4fd0404SClaudiu Manoil #include <linux/skbuff.h> 10d4fd0404SClaudiu Manoil #include <linux/ethtool.h> 11e3f4a0a8SWei Fang #include <linux/fsl/ntmp.h> 12d4fd0404SClaudiu Manoil #include <linux/if_vlan.h> 1371b77a7aSClaudiu Manoil #include <linux/phylink.h> 14ae0e6a5dSClaudiu Manoil #include <linux/dim.h> 1592272ec4SJakub Kicinski #include <net/xdp.h> 16d4fd0404SClaudiu Manoil 17d4fd0404SClaudiu Manoil #include "enetc_hw.h" 1899100d0dSWei Fang #include "enetc4_hw.h" 19d4fd0404SClaudiu Manoil 20d4fd0404SClaudiu Manoil #define ENETC_MAC_MAXFRM_SIZE 9600 21d4fd0404SClaudiu Manoil #define ENETC_MAX_MTU (ENETC_MAC_MAXFRM_SIZE - \ 22d4fd0404SClaudiu Manoil (ETH_FCS_LEN + ETH_HLEN + VLAN_HLEN)) 23d4fd0404SClaudiu Manoil 240cc11cdbSPo Liu #define ENETC_CBD_DATA_MEM_ALIGN 64 250cc11cdbSPo Liu 26401dbdd1SWei Fang #define ENETC_MADDR_HASH_TBL_SZ 64 27401dbdd1SWei Fang 28401dbdd1SWei Fang enum enetc_mac_addr_type {UC, MC, MADDR_TYPE}; 29401dbdd1SWei Fang 30401dbdd1SWei Fang struct enetc_mac_filter { 31401dbdd1SWei Fang union { 32401dbdd1SWei Fang char mac_addr[ETH_ALEN]; 33401dbdd1SWei Fang DECLARE_BITMAP(mac_hash_table, ENETC_MADDR_HASH_TBL_SZ); 34401dbdd1SWei Fang }; 35401dbdd1SWei Fang int mac_addr_cnt; 36401dbdd1SWei Fang }; 37401dbdd1SWei Fang 38d4fd0404SClaudiu Manoil struct enetc_tx_swbd { 399d2b68ccSVladimir Oltean union { 40d4fd0404SClaudiu Manoil struct sk_buff *skb; 419d2b68ccSVladimir Oltean struct xdp_frame *xdp_frame; 429d2b68ccSVladimir Oltean }; 43d4fd0404SClaudiu Manoil dma_addr_t dma; 447ed2bc80SVladimir Oltean struct page *page; /* valid only if is_xdp_tx */ 457ed2bc80SVladimir Oltean u16 page_offset; /* valid only if is_xdp_tx */ 46d4fd0404SClaudiu Manoil u16 len; 477ed2bc80SVladimir Oltean enum dma_data_direction dir; 48d3982312SY.b. Lu u8 is_dma_page:1; 49d3982312SY.b. Lu u8 check_wb:1; 507294380cSYangbo Lu u8 do_twostep_tstamp:1; 51d504498dSVladimir Oltean u8 is_eof:1; 527ed2bc80SVladimir Oltean u8 is_xdp_tx:1; 539d2b68ccSVladimir Oltean u8 is_xdp_redirect:1; 54285e8dedSPo Liu u8 qbv_en:1; 55d4fd0404SClaudiu Manoil }; 56d4fd0404SClaudiu Manoil 5769797ff8SWei Fang struct enetc_lso_t { 5869797ff8SWei Fang bool ipv6; 5969797ff8SWei Fang bool tcp; 6069797ff8SWei Fang u8 l3_hdr_len; 6169797ff8SWei Fang u8 hdr_len; /* LSO header length */ 6269797ff8SWei Fang u8 l3_start; 6369797ff8SWei Fang u16 lso_seg_size; 6469797ff8SWei Fang int total_len; /* total data length, not include LSO header */ 6569797ff8SWei Fang }; 6669797ff8SWei Fang 6769797ff8SWei Fang #define ENETC_LSO_MAX_DATA_LEN SZ_256K 6869797ff8SWei Fang 69d4fd0404SClaudiu Manoil #define ENETC_RX_MAXFRM_SIZE ENETC_MAC_MAXFRM_SIZE 70d4fd0404SClaudiu Manoil #define ENETC_RXB_TRUESIZE 2048 /* PAGE_SIZE >> 1 */ 71d4fd0404SClaudiu Manoil #define ENETC_RXB_PAD NET_SKB_PAD /* add extra space if needed */ 72d4fd0404SClaudiu Manoil #define ENETC_RXB_DMA_SIZE \ 73d4fd0404SClaudiu Manoil (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - ENETC_RXB_PAD) 74d1b15102SVladimir Oltean #define ENETC_RXB_DMA_SIZE_XDP \ 75d1b15102SVladimir Oltean (SKB_WITH_OVERHEAD(ENETC_RXB_TRUESIZE) - XDP_PACKET_HEADROOM) 76d4fd0404SClaudiu Manoil 77d4fd0404SClaudiu Manoil struct enetc_rx_swbd { 78d4fd0404SClaudiu Manoil dma_addr_t dma; 79d4fd0404SClaudiu Manoil struct page *page; 80d4fd0404SClaudiu Manoil u16 page_offset; 817ed2bc80SVladimir Oltean enum dma_data_direction dir; 827ed2bc80SVladimir Oltean u16 len; 83d4fd0404SClaudiu Manoil }; 84d4fd0404SClaudiu Manoil 857ed2bc80SVladimir Oltean /* ENETC overhead: optional extension BD + 1 BD gap */ 867ed2bc80SVladimir Oltean #define ENETC_TXBDS_NEEDED(val) ((val) + 2) 8793c5d5a0SWei Fang /* For LS1028A, max # of chained Tx BDs is 15, including head and 8893c5d5a0SWei Fang * extension BD. 8993c5d5a0SWei Fang */ 907ed2bc80SVladimir Oltean #define ENETC_MAX_SKB_FRAGS 13 9193c5d5a0SWei Fang /* For ENETC v4 and later versions, max # of chained Tx BDs is 63, 9293c5d5a0SWei Fang * including head and extension BD, but the range of MAX_SKB_FRAGS 9393c5d5a0SWei Fang * is 17 ~ 45, so set ENETC4_MAX_SKB_FRAGS to MAX_SKB_FRAGS. 9493c5d5a0SWei Fang */ 9593c5d5a0SWei Fang #define ENETC4_MAX_SKB_FRAGS MAX_SKB_FRAGS 9693c5d5a0SWei Fang #define ENETC_TXBDS_MAX_NEEDED(x) ENETC_TXBDS_NEEDED((x) + 1) 977ed2bc80SVladimir Oltean 98d4fd0404SClaudiu Manoil struct enetc_ring_stats { 99d4fd0404SClaudiu Manoil unsigned int packets; 100d4fd0404SClaudiu Manoil unsigned int bytes; 101d4fd0404SClaudiu Manoil unsigned int rx_alloc_errs; 102d1b15102SVladimir Oltean unsigned int xdp_drops; 1037ed2bc80SVladimir Oltean unsigned int xdp_tx; 1047ed2bc80SVladimir Oltean unsigned int xdp_tx_drops; 1059d2b68ccSVladimir Oltean unsigned int xdp_redirect; 1069d2b68ccSVladimir Oltean unsigned int xdp_redirect_failures; 1077ed2bc80SVladimir Oltean unsigned int recycles; 1087ed2bc80SVladimir Oltean unsigned int recycle_failures; 109285e8dedSPo Liu unsigned int win_drop; 110d1b15102SVladimir Oltean }; 111d1b15102SVladimir Oltean 112d1b15102SVladimir Oltean struct enetc_xdp_data { 113d1b15102SVladimir Oltean struct xdp_rxq_info rxq; 114d1b15102SVladimir Oltean struct bpf_prog *prog; 1157ed2bc80SVladimir Oltean int xdp_tx_in_flight; 116d4fd0404SClaudiu Manoil }; 117d4fd0404SClaudiu Manoil 118d6a2829eSVladimir Oltean #define ENETC_RX_RING_DEFAULT_SIZE 2048 119ee3e875fSVladimir Oltean #define ENETC_TX_RING_DEFAULT_SIZE 2048 12002293dd4SClaudiu Manoil #define ENETC_DEFAULT_TX_WORK (ENETC_TX_RING_DEFAULT_SIZE / 2) 121d4fd0404SClaudiu Manoil 122f3ce29e1SVladimir Oltean struct enetc_bdr_resource { 123f3ce29e1SVladimir Oltean /* Input arguments saved for teardown */ 124f3ce29e1SVladimir Oltean struct device *dev; /* for DMA mapping */ 125f3ce29e1SVladimir Oltean size_t bd_count; 126f3ce29e1SVladimir Oltean size_t bd_size; 127f3ce29e1SVladimir Oltean 128f3ce29e1SVladimir Oltean /* Resource proper */ 129f3ce29e1SVladimir Oltean void *bd_base; /* points to Rx or Tx BD ring */ 130f3ce29e1SVladimir Oltean dma_addr_t bd_dma_base; 131f3ce29e1SVladimir Oltean union { 132f3ce29e1SVladimir Oltean struct enetc_tx_swbd *tx_swbd; 133f3ce29e1SVladimir Oltean struct enetc_rx_swbd *rx_swbd; 134f3ce29e1SVladimir Oltean }; 135f3ce29e1SVladimir Oltean char *tso_headers; 136f3ce29e1SVladimir Oltean dma_addr_t tso_headers_dma; 137f3ce29e1SVladimir Oltean }; 138f3ce29e1SVladimir Oltean 139d4fd0404SClaudiu Manoil struct enetc_bdr { 140d4fd0404SClaudiu Manoil struct device *dev; /* for DMA mapping */ 141d4fd0404SClaudiu Manoil struct net_device *ndev; 142d4fd0404SClaudiu Manoil void *bd_base; /* points to Rx or Tx BD ring */ 143d4fd0404SClaudiu Manoil union { 144d4fd0404SClaudiu Manoil void __iomem *tpir; 145d4fd0404SClaudiu Manoil void __iomem *rcir; 146d4fd0404SClaudiu Manoil }; 147d4fd0404SClaudiu Manoil u16 index; 148290b5fe0SVladimir Oltean u16 prio; 149d4fd0404SClaudiu Manoil int bd_count; /* # of BDs */ 150d4fd0404SClaudiu Manoil int next_to_use; 151d4fd0404SClaudiu Manoil int next_to_clean; 152d4fd0404SClaudiu Manoil union { 153d4fd0404SClaudiu Manoil struct enetc_tx_swbd *tx_swbd; 154d4fd0404SClaudiu Manoil struct enetc_rx_swbd *rx_swbd; 155d4fd0404SClaudiu Manoil }; 156d4fd0404SClaudiu Manoil union { 157d4fd0404SClaudiu Manoil void __iomem *tcir; /* Tx */ 158d4fd0404SClaudiu Manoil int next_to_alloc; /* Rx */ 159d4fd0404SClaudiu Manoil }; 160d4fd0404SClaudiu Manoil void __iomem *idr; /* Interrupt Detect Register pointer */ 161d4fd0404SClaudiu Manoil 162d1b15102SVladimir Oltean int buffer_offset; 163d1b15102SVladimir Oltean struct enetc_xdp_data xdp; 164d1b15102SVladimir Oltean 165d4fd0404SClaudiu Manoil struct enetc_ring_stats stats; 166d4fd0404SClaudiu Manoil 167d4fd0404SClaudiu Manoil dma_addr_t bd_dma_base; 1680d08c9ecSPo Liu u8 tsd_enable; /* Time specific departure */ 169434cebabSClaudiu Manoil bool ext_en; /* enable h/w descriptor extensions */ 170fb8629e2SIoana Ciornei 171fb8629e2SIoana Ciornei /* DMA buffer for TSO headers */ 172fb8629e2SIoana Ciornei char *tso_headers; 173fb8629e2SIoana Ciornei dma_addr_t tso_headers_dma; 174d4fd0404SClaudiu Manoil } ____cacheline_aligned_in_smp; 175d4fd0404SClaudiu Manoil 176d4fd0404SClaudiu Manoil static inline void enetc_bdr_idx_inc(struct enetc_bdr *bdr, int *i) 177d4fd0404SClaudiu Manoil { 178d4fd0404SClaudiu Manoil if (unlikely(++*i == bdr->bd_count)) 179d4fd0404SClaudiu Manoil *i = 0; 180d4fd0404SClaudiu Manoil } 181d4fd0404SClaudiu Manoil 182d4fd0404SClaudiu Manoil static inline int enetc_bd_unused(struct enetc_bdr *bdr) 183d4fd0404SClaudiu Manoil { 184d4fd0404SClaudiu Manoil if (bdr->next_to_clean > bdr->next_to_use) 185d4fd0404SClaudiu Manoil return bdr->next_to_clean - bdr->next_to_use - 1; 186d4fd0404SClaudiu Manoil 187d4fd0404SClaudiu Manoil return bdr->bd_count + bdr->next_to_clean - bdr->next_to_use - 1; 188d4fd0404SClaudiu Manoil } 189d4fd0404SClaudiu Manoil 1907ed2bc80SVladimir Oltean static inline int enetc_swbd_unused(struct enetc_bdr *bdr) 1917ed2bc80SVladimir Oltean { 1927ed2bc80SVladimir Oltean if (bdr->next_to_clean > bdr->next_to_alloc) 1937ed2bc80SVladimir Oltean return bdr->next_to_clean - bdr->next_to_alloc - 1; 1947ed2bc80SVladimir Oltean 1957ed2bc80SVladimir Oltean return bdr->bd_count + bdr->next_to_clean - bdr->next_to_alloc - 1; 1967ed2bc80SVladimir Oltean } 1977ed2bc80SVladimir Oltean 198d4fd0404SClaudiu Manoil /* Control BD ring */ 199d4fd0404SClaudiu Manoil #define ENETC_CBDR_DEFAULT_SIZE 64 200d4fd0404SClaudiu Manoil struct enetc_cbdr { 201d4fd0404SClaudiu Manoil void *bd_base; /* points to Rx or Tx BD ring */ 202d4fd0404SClaudiu Manoil void __iomem *pir; 203d4fd0404SClaudiu Manoil void __iomem *cir; 20427f9025dSVladimir Oltean void __iomem *mr; /* mode register */ 205d4fd0404SClaudiu Manoil 206d4fd0404SClaudiu Manoil int bd_count; /* # of BDs */ 207d4fd0404SClaudiu Manoil int next_to_use; 208d4fd0404SClaudiu Manoil int next_to_clean; 209d4fd0404SClaudiu Manoil 210d4fd0404SClaudiu Manoil dma_addr_t bd_dma_base; 21101121ab7SVladimir Oltean struct device *dma_dev; 212d4fd0404SClaudiu Manoil }; 213d4fd0404SClaudiu Manoil 214d4fd0404SClaudiu Manoil #define ENETC_TXBD(BDR, i) (&(((union enetc_tx_bd *)((BDR).bd_base))[i])) 215714239acSClaudiu Manoil 216714239acSClaudiu Manoil static inline union enetc_rx_bd *enetc_rxbd(struct enetc_bdr *rx_ring, int i) 217714239acSClaudiu Manoil { 218434cebabSClaudiu Manoil int hw_idx = i; 219434cebabSClaudiu Manoil 2209c699a8fSMartyn Welch if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) && rx_ring->ext_en) 221434cebabSClaudiu Manoil hw_idx = 2 * i; 2229c699a8fSMartyn Welch 223434cebabSClaudiu Manoil return &(((union enetc_rx_bd *)rx_ring->bd_base)[hw_idx]); 224714239acSClaudiu Manoil } 225714239acSClaudiu Manoil 226c027aa92SVladimir Oltean static inline void enetc_rxbd_next(struct enetc_bdr *rx_ring, 227c027aa92SVladimir Oltean union enetc_rx_bd **old_rxbd, int *old_index) 228714239acSClaudiu Manoil { 229c027aa92SVladimir Oltean union enetc_rx_bd *new_rxbd = *old_rxbd; 230c027aa92SVladimir Oltean int new_index = *old_index; 231c027aa92SVladimir Oltean 232c027aa92SVladimir Oltean new_rxbd++; 233c027aa92SVladimir Oltean 2349c699a8fSMartyn Welch if (IS_ENABLED(CONFIG_FSL_ENETC_PTP_CLOCK) && rx_ring->ext_en) 235c027aa92SVladimir Oltean new_rxbd++; 236714239acSClaudiu Manoil 237c027aa92SVladimir Oltean if (unlikely(++new_index == rx_ring->bd_count)) { 238c027aa92SVladimir Oltean new_rxbd = rx_ring->bd_base; 239c027aa92SVladimir Oltean new_index = 0; 240c027aa92SVladimir Oltean } 241c027aa92SVladimir Oltean 242c027aa92SVladimir Oltean *old_rxbd = new_rxbd; 243c027aa92SVladimir Oltean *old_index = new_index; 244714239acSClaudiu Manoil } 245d4fd0404SClaudiu Manoil 246434cebabSClaudiu Manoil static inline union enetc_rx_bd *enetc_rxbd_ext(union enetc_rx_bd *rxbd) 247434cebabSClaudiu Manoil { 248434cebabSClaudiu Manoil return ++rxbd; 249434cebabSClaudiu Manoil } 250434cebabSClaudiu Manoil 251beb74ac8SClaudiu Manoil struct enetc_msg_swbd { 252beb74ac8SClaudiu Manoil void *vaddr; 253beb74ac8SClaudiu Manoil dma_addr_t dma; 254beb74ac8SClaudiu Manoil int size; 255beb74ac8SClaudiu Manoil }; 256beb74ac8SClaudiu Manoil 257d4fd0404SClaudiu Manoil #define ENETC_REV1 0x1 258d4fd0404SClaudiu Manoil enum enetc_errata { 25982728b91SClaudiu Manoil ENETC_ERR_VLAN_ISOL = BIT(0), 26082728b91SClaudiu Manoil ENETC_ERR_UCMCSWP = BIT(1), 261d4fd0404SClaudiu Manoil }; 262d4fd0404SClaudiu Manoil 26394557a9aSVladimir Oltean #define ENETC_SI_F_PSFP BIT(0) 26494557a9aSVladimir Oltean #define ENETC_SI_F_QBV BIT(1) 26594557a9aSVladimir Oltean #define ENETC_SI_F_QBU BIT(2) 26669797ff8SWei Fang #define ENETC_SI_F_LSO BIT(3) 2672e47cb41SPo Liu 26899100d0dSWei Fang struct enetc_drvdata { 26999100d0dSWei Fang u32 pmac_offset; /* Only valid for PSI which supports 802.1Qbu */ 270d9a093d2SWei Fang u8 tx_csum:1; 27193c5d5a0SWei Fang u8 max_frags; 27299100d0dSWei Fang u64 sysclk_freq; 27399100d0dSWei Fang const struct ethtool_ops *eth_ops; 27499100d0dSWei Fang }; 27599100d0dSWei Fang 27699100d0dSWei Fang struct enetc_platform_info { 27799100d0dSWei Fang u16 revision; 27899100d0dSWei Fang u16 dev_id; 27999100d0dSWei Fang const struct enetc_drvdata *data; 28099100d0dSWei Fang }; 28199100d0dSWei Fang 28266b3fb00SWei Fang struct enetc_si; 28366b3fb00SWei Fang 28466b3fb00SWei Fang /* 28566b3fb00SWei Fang * This structure defines the some common hooks for ENETC PSI and VSI. 28666b3fb00SWei Fang * In addition, since VSI only uses the struct enetc_si as its private 28766b3fb00SWei Fang * driver data, so this structure also define some hooks specifically 28866b3fb00SWei Fang * for VSI. For VSI-specific hooks, the format is ‘vf_*()’. 28966b3fb00SWei Fang */ 29066b3fb00SWei Fang struct enetc_si_ops { 29166b3fb00SWei Fang int (*get_rss_table)(struct enetc_si *si, u32 *table, int count); 29266b3fb00SWei Fang int (*set_rss_table)(struct enetc_si *si, const u32 *table, int count); 29366b3fb00SWei Fang }; 29466b3fb00SWei Fang 295d4fd0404SClaudiu Manoil /* PCI IEP device data */ 296d4fd0404SClaudiu Manoil struct enetc_si { 297d4fd0404SClaudiu Manoil struct pci_dev *pdev; 298d4fd0404SClaudiu Manoil struct enetc_hw hw; 299d4fd0404SClaudiu Manoil enum enetc_errata errata; 300d4fd0404SClaudiu Manoil 301d4fd0404SClaudiu Manoil struct net_device *ndev; /* back ref. */ 302d4fd0404SClaudiu Manoil 303e3f4a0a8SWei Fang union { 304e3f4a0a8SWei Fang struct enetc_cbdr cbd_ring; /* Only ENETC 1.0 */ 305e3f4a0a8SWei Fang struct ntmp_user ntmp_user; /* ENETC 4.1 and later */ 306e3f4a0a8SWei Fang }; 307d4fd0404SClaudiu Manoil 308d4fd0404SClaudiu Manoil int num_rx_rings; /* how many rings are available in the SI */ 309d4fd0404SClaudiu Manoil int num_tx_rings; 310d382563fSClaudiu Manoil int num_fs_entries; 311d382563fSClaudiu Manoil int num_rss; /* number of RSS buckets */ 312d4fd0404SClaudiu Manoil unsigned short pad; 31399100d0dSWei Fang u16 revision; 3142e47cb41SPo Liu int hw_features; 31599100d0dSWei Fang const struct enetc_drvdata *drvdata; 316e3f4a0a8SWei Fang const struct enetc_si_ops *ops; 3176c5bafbaSWei Fang 3186c5bafbaSWei Fang struct workqueue_struct *workqueue; 3196c5bafbaSWei Fang struct work_struct rx_mode_task; 320df6cb095SWei Fang struct dentry *debugfs_root; 321d4fd0404SClaudiu Manoil }; 322d4fd0404SClaudiu Manoil 323d4fd0404SClaudiu Manoil #define ENETC_SI_ALIGN 32 324d4fd0404SClaudiu Manoil 32599100d0dSWei Fang static inline bool is_enetc_rev1(struct enetc_si *si) 32699100d0dSWei Fang { 32799100d0dSWei Fang return si->pdev->revision == ENETC_REV1; 32899100d0dSWei Fang } 32999100d0dSWei Fang 330d4fd0404SClaudiu Manoil static inline void *enetc_si_priv(const struct enetc_si *si) 331d4fd0404SClaudiu Manoil { 332d4fd0404SClaudiu Manoil return (char *)si + ALIGN(sizeof(struct enetc_si), ENETC_SI_ALIGN); 333d4fd0404SClaudiu Manoil } 334d4fd0404SClaudiu Manoil 335d4fd0404SClaudiu Manoil static inline bool enetc_si_is_pf(struct enetc_si *si) 336d4fd0404SClaudiu Manoil { 337d4fd0404SClaudiu Manoil return !!(si->hw.port); 338d4fd0404SClaudiu Manoil } 339d4fd0404SClaudiu Manoil 34087614b93SVladimir Oltean static inline int enetc_pf_to_port(struct pci_dev *pf_pdev) 34187614b93SVladimir Oltean { 34287614b93SVladimir Oltean switch (pf_pdev->devfn) { 34387614b93SVladimir Oltean case 0: 34487614b93SVladimir Oltean return 0; 34587614b93SVladimir Oltean case 1: 34687614b93SVladimir Oltean return 1; 34787614b93SVladimir Oltean case 2: 34887614b93SVladimir Oltean return 2; 34987614b93SVladimir Oltean case 6: 35087614b93SVladimir Oltean return 3; 35187614b93SVladimir Oltean default: 35287614b93SVladimir Oltean return -1; 35387614b93SVladimir Oltean } 35487614b93SVladimir Oltean } 35587614b93SVladimir Oltean 356d4fd0404SClaudiu Manoil #define ENETC_MAX_NUM_TXQS 8 357d4fd0404SClaudiu Manoil #define ENETC_INT_NAME_MAX (IFNAMSIZ + 8) 358d4fd0404SClaudiu Manoil 359d4fd0404SClaudiu Manoil struct enetc_int_vector { 360d4fd0404SClaudiu Manoil void __iomem *rbier; 361d4fd0404SClaudiu Manoil void __iomem *tbier_base; 36291571081SClaudiu Manoil void __iomem *ricr1; 363d4fd0404SClaudiu Manoil unsigned long tx_rings_map; 364d4fd0404SClaudiu Manoil int count_tx_rings; 36591571081SClaudiu Manoil u32 rx_ictt; 366ae0e6a5dSClaudiu Manoil u16 comp_cnt; 367ae0e6a5dSClaudiu Manoil bool rx_dim_en, rx_napi_work; 368ae0e6a5dSClaudiu Manoil struct napi_struct napi ____cacheline_aligned_in_smp; 369ae0e6a5dSClaudiu Manoil struct dim rx_dim ____cacheline_aligned_in_smp; 370d4fd0404SClaudiu Manoil char name[ENETC_INT_NAME_MAX]; 371d4fd0404SClaudiu Manoil 372058d9cfaSClaudiu Manoil struct enetc_bdr rx_ring; 373dd8e215eSKees Cook struct enetc_bdr tx_ring[] __counted_by(count_tx_rings); 374ae0e6a5dSClaudiu Manoil } ____cacheline_aligned_in_smp; 375d4fd0404SClaudiu Manoil 376d382563fSClaudiu Manoil struct enetc_cls_rule { 377d382563fSClaudiu Manoil struct ethtool_rx_flow_spec fs; 378d382563fSClaudiu Manoil int used; 379d382563fSClaudiu Manoil }; 380d382563fSClaudiu Manoil 38199100d0dSWei Fang #define ENETC_MAX_BDR_INT 6 /* fixed to max # of available cpus */ 38279e49982SPo Liu struct psfp_cap { 38379e49982SPo Liu u32 max_streamid; 38479e49982SPo Liu u32 max_psfp_filter; 38579e49982SPo Liu u32 max_psfp_gate; 38679e49982SPo Liu u32 max_psfp_gatelist; 38779e49982SPo Liu u32 max_psfp_meter; 38879e49982SPo Liu }; 389d4fd0404SClaudiu Manoil 390f768e751SYangbo Lu #define ENETC_F_TX_TSTAMP_MASK 0xff 391d3982312SY.b. Lu enum enetc_active_offloads { 392f768e751SYangbo Lu /* 8 bits reserved for TX timestamp types (hwtstamp_tx_types) */ 393f768e751SYangbo Lu ENETC_F_TX_TSTAMP = BIT(0), 3947294380cSYangbo Lu ENETC_F_TX_ONESTEP_SYNC_TSTAMP = BIT(1), 395f768e751SYangbo Lu 396f768e751SYangbo Lu ENETC_F_RX_TSTAMP = BIT(8), 397f768e751SYangbo Lu ENETC_F_QBV = BIT(9), 398f768e751SYangbo Lu ENETC_F_QCI = BIT(10), 399c7b9e808SVladimir Oltean ENETC_F_QBU = BIT(11), 400d9a093d2SWei Fang ENETC_F_TXCSUM = BIT(12), 40169797ff8SWei Fang ENETC_F_LSO = BIT(13), 402d3982312SY.b. Lu }; 403d3982312SY.b. Lu 4047294380cSYangbo Lu enum enetc_flags_bit { 4057294380cSYangbo Lu ENETC_TX_ONESTEP_TSTAMP_IN_PROGRESS = 0, 406c728a95cSWei Fang ENETC_TX_DOWN, 4077294380cSYangbo Lu }; 4087294380cSYangbo Lu 40991571081SClaudiu Manoil /* interrupt coalescing modes */ 41091571081SClaudiu Manoil enum enetc_ic_mode { 41191571081SClaudiu Manoil /* one interrupt per frame */ 41291571081SClaudiu Manoil ENETC_IC_NONE = 0, 41391571081SClaudiu Manoil /* activated when int coalescing time is set to a non-0 value */ 41491571081SClaudiu Manoil ENETC_IC_RX_MANUAL = BIT(0), 41591571081SClaudiu Manoil ENETC_IC_TX_MANUAL = BIT(1), 416ae0e6a5dSClaudiu Manoil /* use dynamic interrupt moderation */ 417ae0e6a5dSClaudiu Manoil ENETC_IC_RX_ADAPTIVE = BIT(2), 41891571081SClaudiu Manoil }; 41991571081SClaudiu Manoil 42091571081SClaudiu Manoil #define ENETC_RXIC_PKTTHR min_t(u32, 256, ENETC_RX_RING_DEFAULT_SIZE / 2) 42191571081SClaudiu Manoil #define ENETC_TXIC_PKTTHR min_t(u32, 128, ENETC_TX_RING_DEFAULT_SIZE / 2) 42291571081SClaudiu Manoil 423d4fd0404SClaudiu Manoil struct enetc_ndev_priv { 424d4fd0404SClaudiu Manoil struct net_device *ndev; 425d4fd0404SClaudiu Manoil struct device *dev; /* dma-mapping device */ 426d4fd0404SClaudiu Manoil struct enetc_si *si; 427d4fd0404SClaudiu Manoil 428d4fd0404SClaudiu Manoil int bdr_int_num; /* number of Rx/Tx ring interrupts */ 429d4fd0404SClaudiu Manoil struct enetc_int_vector *int_vector[ENETC_MAX_BDR_INT]; 430d4fd0404SClaudiu Manoil u16 num_rx_rings, num_tx_rings; 431d4fd0404SClaudiu Manoil u16 rx_bd_count, tx_bd_count; 432d4fd0404SClaudiu Manoil 433d4fd0404SClaudiu Manoil u16 msg_enable; 43482714539SVladimir Oltean 43582714539SVladimir Oltean u8 preemptible_tcs; 43693c5d5a0SWei Fang u8 max_frags; /* The maximum number of BDs for fragments */ 43782714539SVladimir Oltean 4387f071a45SVladimir Oltean enum enetc_active_offloads active_offloads; 439d4fd0404SClaudiu Manoil 4402e47cb41SPo Liu u32 speed; /* store speed for compare update pspeed */ 4412e47cb41SPo Liu 4427eab503bSVladimir Oltean struct enetc_bdr **xdp_tx_ring; 443d4fd0404SClaudiu Manoil struct enetc_bdr *tx_ring[16]; 444d4fd0404SClaudiu Manoil struct enetc_bdr *rx_ring[16]; 445f3ce29e1SVladimir Oltean const struct enetc_bdr_resource *tx_res; 446f3ce29e1SVladimir Oltean const struct enetc_bdr_resource *rx_res; 447d4fd0404SClaudiu Manoil 448d382563fSClaudiu Manoil struct enetc_cls_rule *cls_rules; 449d382563fSClaudiu Manoil 45079e49982SPo Liu struct psfp_cap psfp_cap; 45179e49982SPo Liu 452800db2d1SVladimir Oltean /* Minimum number of TX queues required by the network stack */ 453800db2d1SVladimir Oltean unsigned int min_num_stack_tx_queues; 454800db2d1SVladimir Oltean 45571b77a7aSClaudiu Manoil struct phylink *phylink; 45691571081SClaudiu Manoil int ic_mode; 45791571081SClaudiu Manoil u32 tx_ictt; 458d1b15102SVladimir Oltean 459d1b15102SVladimir Oltean struct bpf_prog *xdp_prog; 4607294380cSYangbo Lu 4617294380cSYangbo Lu unsigned long flags; 4627294380cSYangbo Lu 4637294380cSYangbo Lu struct work_struct tx_onestep_tstamp; 4647294380cSYangbo Lu struct sk_buff_head tx_skbs; 465c7b9e808SVladimir Oltean 466c7b9e808SVladimir Oltean /* Serialize access to MAC Merge state between ethtool requests 467c7b9e808SVladimir Oltean * and link state updates 468c7b9e808SVladimir Oltean */ 469c7b9e808SVladimir Oltean struct mutex mm_lock; 47099100d0dSWei Fang 47199100d0dSWei Fang struct clk *ref_clk; /* RGMII/RMII reference clock */ 47299100d0dSWei Fang u64 sysclk_freq; /* NETC system clock frequency */ 473d4fd0404SClaudiu Manoil }; 474d4fd0404SClaudiu Manoil 475beb74ac8SClaudiu Manoil /* Messaging */ 476beb74ac8SClaudiu Manoil 477beb74ac8SClaudiu Manoil /* VF-PF set primary MAC address message format */ 478beb74ac8SClaudiu Manoil struct enetc_msg_cmd_set_primary_mac { 479beb74ac8SClaudiu Manoil struct enetc_msg_cmd_header header; 480beb74ac8SClaudiu Manoil struct sockaddr mac; 481beb74ac8SClaudiu Manoil }; 482beb74ac8SClaudiu Manoil 483d4fd0404SClaudiu Manoil #define ENETC_CBD(R, i) (&(((struct enetc_cbd *)((R).bd_base))[i])) 484d4fd0404SClaudiu Manoil 485d4fd0404SClaudiu Manoil #define ENETC_CBDR_TIMEOUT 1000 /* usecs */ 486d4fd0404SClaudiu Manoil 48741514737SY.b. Lu /* PTP driver exports */ 48841514737SY.b. Lu extern int enetc_phc_index; 48941514737SY.b. Lu 490d4fd0404SClaudiu Manoil /* SI common */ 49112717decSVladimir Oltean u32 enetc_port_mac_rd(struct enetc_si *si, u32 reg); 49212717decSVladimir Oltean void enetc_port_mac_wr(struct enetc_si *si, u32 reg, u32 val); 493d4fd0404SClaudiu Manoil int enetc_pci_probe(struct pci_dev *pdev, const char *name, int sizeof_priv); 494d4fd0404SClaudiu Manoil void enetc_pci_remove(struct pci_dev *pdev); 495d4fd0404SClaudiu Manoil int enetc_alloc_msix(struct enetc_ndev_priv *priv); 496d4fd0404SClaudiu Manoil void enetc_free_msix(struct enetc_ndev_priv *priv); 497d4fd0404SClaudiu Manoil void enetc_get_si_caps(struct enetc_si *si); 498d4fd0404SClaudiu Manoil void enetc_init_si_rings_params(struct enetc_ndev_priv *priv); 499d4fd0404SClaudiu Manoil int enetc_alloc_si_resources(struct enetc_ndev_priv *priv); 500d4fd0404SClaudiu Manoil void enetc_free_si_resources(struct enetc_ndev_priv *priv); 501c646d10dSVladimir Oltean int enetc_configure_si(struct enetc_ndev_priv *priv); 50299100d0dSWei Fang int enetc_get_driver_data(struct enetc_si *si); 503401dbdd1SWei Fang void enetc_add_mac_addr_ht_filter(struct enetc_mac_filter *filter, 504401dbdd1SWei Fang const unsigned char *addr); 505401dbdd1SWei Fang void enetc_reset_mac_addr_filter(struct enetc_mac_filter *filter); 506d4fd0404SClaudiu Manoil 507d4fd0404SClaudiu Manoil int enetc_open(struct net_device *ndev); 508d4fd0404SClaudiu Manoil int enetc_close(struct net_device *ndev); 50991571081SClaudiu Manoil void enetc_start(struct net_device *ndev); 51091571081SClaudiu Manoil void enetc_stop(struct net_device *ndev); 511d4fd0404SClaudiu Manoil netdev_tx_t enetc_xmit(struct sk_buff *skb, struct net_device *ndev); 512d4fd0404SClaudiu Manoil struct net_device_stats *enetc_get_stats(struct net_device *ndev); 513fed38e64SVladimir Oltean void enetc_set_features(struct net_device *ndev, netdev_features_t features); 514d3982312SY.b. Lu int enetc_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd); 5155641c751SVladimir Oltean int enetc_setup_tc_mqprio(struct net_device *ndev, void *type_data); 5165353599aSVladimir Oltean void enetc_reset_tc_mqprio(struct net_device *ndev); 517766338c7SVladimir Oltean int enetc_setup_bpf(struct net_device *ndev, struct netdev_bpf *bpf); 5189d2b68ccSVladimir Oltean int enetc_xdp_xmit(struct net_device *ndev, int num_frames, 5199d2b68ccSVladimir Oltean struct xdp_frame **frames, u32 flags); 520cbe9e835SCamelia Groza 521*51672a65SVladimir Oltean int enetc_hwtstamp_get(struct net_device *ndev, 522*51672a65SVladimir Oltean struct kernel_hwtstamp_config *config); 523*51672a65SVladimir Oltean int enetc_hwtstamp_set(struct net_device *ndev, 524*51672a65SVladimir Oltean struct kernel_hwtstamp_config *config, 525*51672a65SVladimir Oltean struct netlink_ext_ack *extack); 526*51672a65SVladimir Oltean 527d4fd0404SClaudiu Manoil /* ethtool */ 52899100d0dSWei Fang extern const struct ethtool_ops enetc_pf_ethtool_ops; 52999100d0dSWei Fang extern const struct ethtool_ops enetc4_pf_ethtool_ops; 53099100d0dSWei Fang extern const struct ethtool_ops enetc_vf_ethtool_ops; 531d4fd0404SClaudiu Manoil void enetc_set_ethtool_ops(struct net_device *ndev); 532c7b9e808SVladimir Oltean void enetc_mm_link_state_update(struct enetc_ndev_priv *priv, bool link); 53382714539SVladimir Oltean void enetc_mm_commit_preemptible_tcs(struct enetc_ndev_priv *priv); 534d4fd0404SClaudiu Manoil 535d4fd0404SClaudiu Manoil /* control buffer descriptor ring (CBDR) */ 5365b4daa7fSVladimir Oltean int enetc_setup_cbdr(struct device *dev, struct enetc_hw *hw, int bd_count, 53724be14e3SVladimir Oltean struct enetc_cbdr *cbdr); 5380bfde022SVladimir Oltean void enetc_teardown_cbdr(struct enetc_cbdr *cbdr); 539e3f4a0a8SWei Fang int enetc4_setup_cbdr(struct enetc_si *si); 540e3f4a0a8SWei Fang void enetc4_teardown_cbdr(struct enetc_si *si); 541d4fd0404SClaudiu Manoil int enetc_set_mac_flt_entry(struct enetc_si *si, int index, 542d4fd0404SClaudiu Manoil char *mac_addr, int si_map); 543d4fd0404SClaudiu Manoil int enetc_clear_mac_flt_entry(struct enetc_si *si, int index); 544d382563fSClaudiu Manoil int enetc_set_fs_entry(struct enetc_si *si, struct enetc_cmd_rfse *rfse, 545d382563fSClaudiu Manoil int index); 5467e1af4d6SWei Fang void enetc_set_rss_key(struct enetc_si *si, const u8 *bytes); 547d382563fSClaudiu Manoil int enetc_get_rss_table(struct enetc_si *si, u32 *table, int count); 548d382563fSClaudiu Manoil int enetc_set_rss_table(struct enetc_si *si, const u32 *table, int count); 54934c6adf1SPo Liu int enetc_send_cmd(struct enetc_si *si, struct enetc_cbd *cbd); 5502627e987SWei Fang int enetc4_get_rss_table(struct enetc_si *si, u32 *table, int count); 5512627e987SWei Fang int enetc4_set_rss_table(struct enetc_si *si, const u32 *table, int count); 55234c6adf1SPo Liu 5530cc11cdbSPo Liu static inline void *enetc_cbd_alloc_data_mem(struct enetc_si *si, 5540cc11cdbSPo Liu struct enetc_cbd *cbd, 5550cc11cdbSPo Liu int size, dma_addr_t *dma, 5560cc11cdbSPo Liu void **data_align) 5570cc11cdbSPo Liu { 5580cc11cdbSPo Liu struct enetc_cbdr *ring = &si->cbd_ring; 5590cc11cdbSPo Liu dma_addr_t dma_align; 5600cc11cdbSPo Liu void *data; 5610cc11cdbSPo Liu 5620cc11cdbSPo Liu data = dma_alloc_coherent(ring->dma_dev, 5630cc11cdbSPo Liu size + ENETC_CBD_DATA_MEM_ALIGN, 5640cc11cdbSPo Liu dma, GFP_KERNEL); 5650cc11cdbSPo Liu if (!data) { 5660cc11cdbSPo Liu dev_err(ring->dma_dev, "CBD alloc data memory failed!\n"); 5670cc11cdbSPo Liu return NULL; 5680cc11cdbSPo Liu } 5690cc11cdbSPo Liu 5700cc11cdbSPo Liu dma_align = ALIGN(*dma, ENETC_CBD_DATA_MEM_ALIGN); 5710cc11cdbSPo Liu *data_align = PTR_ALIGN(data, ENETC_CBD_DATA_MEM_ALIGN); 5720cc11cdbSPo Liu 5730cc11cdbSPo Liu cbd->addr[0] = cpu_to_le32(lower_32_bits(dma_align)); 5740cc11cdbSPo Liu cbd->addr[1] = cpu_to_le32(upper_32_bits(dma_align)); 5750cc11cdbSPo Liu cbd->length = cpu_to_le16(size); 5760cc11cdbSPo Liu 5770cc11cdbSPo Liu return data; 5780cc11cdbSPo Liu } 5790cc11cdbSPo Liu 5800cc11cdbSPo Liu static inline void enetc_cbd_free_data_mem(struct enetc_si *si, int size, 5810cc11cdbSPo Liu void *data, dma_addr_t *dma) 5820cc11cdbSPo Liu { 5830cc11cdbSPo Liu struct enetc_cbdr *ring = &si->cbd_ring; 5840cc11cdbSPo Liu 5850cc11cdbSPo Liu dma_free_coherent(ring->dma_dev, size + ENETC_CBD_DATA_MEM_ALIGN, 5860cc11cdbSPo Liu data, *dma); 5870cc11cdbSPo Liu } 5880cc11cdbSPo Liu 589dfc7175dSVladimir Oltean void enetc_reset_ptcmsdur(struct enetc_hw *hw); 590dfc7175dSVladimir Oltean void enetc_set_ptcmsdur(struct enetc_hw *hw, u32 *queue_max_sdu); 591dfc7175dSVladimir Oltean 59234c6adf1SPo Liu #ifdef CONFIG_FSL_ENETC_QOS 593dfc7175dSVladimir Oltean int enetc_qos_query_caps(struct net_device *ndev, void *type_data); 59434c6adf1SPo Liu int enetc_setup_tc_taprio(struct net_device *ndev, void *type_data); 59571b77a7aSClaudiu Manoil void enetc_sched_speed_set(struct enetc_ndev_priv *priv, int speed); 596c431047cSPo Liu int enetc_setup_tc_cbs(struct net_device *ndev, void *type_data); 5970d08c9ecSPo Liu int enetc_setup_tc_txtime(struct net_device *ndev, void *type_data); 598888ae5a3SPo Liu int enetc_setup_tc_block_cb(enum tc_setup_type type, void *type_data, 599888ae5a3SPo Liu void *cb_priv); 600888ae5a3SPo Liu int enetc_setup_tc_psfp(struct net_device *ndev, void *type_data); 601888ae5a3SPo Liu int enetc_psfp_init(struct enetc_ndev_priv *priv); 602888ae5a3SPo Liu int enetc_psfp_clean(struct enetc_ndev_priv *priv); 603fed38e64SVladimir Oltean int enetc_set_psfp(struct net_device *ndev, bool en); 60479e49982SPo Liu 60579e49982SPo Liu static inline void enetc_get_max_cap(struct enetc_ndev_priv *priv) 60679e49982SPo Liu { 607715bf261SVladimir Oltean struct enetc_hw *hw = &priv->si->hw; 60879e49982SPo Liu u32 reg; 60979e49982SPo Liu 610715bf261SVladimir Oltean reg = enetc_port_rd(hw, ENETC_PSIDCAPR); 61179e49982SPo Liu priv->psfp_cap.max_streamid = reg & ENETC_PSIDCAPR_MSK; 61279e49982SPo Liu /* Port stream filter capability */ 613715bf261SVladimir Oltean reg = enetc_port_rd(hw, ENETC_PSFCAPR); 61479e49982SPo Liu priv->psfp_cap.max_psfp_filter = reg & ENETC_PSFCAPR_MSK; 61579e49982SPo Liu /* Port stream gate capability */ 616715bf261SVladimir Oltean reg = enetc_port_rd(hw, ENETC_PSGCAPR); 61779e49982SPo Liu priv->psfp_cap.max_psfp_gate = (reg & ENETC_PSGCAPR_SGIT_MSK); 61879e49982SPo Liu priv->psfp_cap.max_psfp_gatelist = (reg & ENETC_PSGCAPR_GCL_MSK) >> 16; 61979e49982SPo Liu /* Port flow meter capability */ 620715bf261SVladimir Oltean reg = enetc_port_rd(hw, ENETC_PFMCAPR); 62179e49982SPo Liu priv->psfp_cap.max_psfp_meter = reg & ENETC_PFMCAPR_MSK; 62279e49982SPo Liu } 62379e49982SPo Liu 624888ae5a3SPo Liu static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 62579e49982SPo Liu { 626888ae5a3SPo Liu struct enetc_hw *hw = &priv->si->hw; 627888ae5a3SPo Liu int err; 628888ae5a3SPo Liu 629888ae5a3SPo Liu enetc_get_max_cap(priv); 630888ae5a3SPo Liu 631888ae5a3SPo Liu err = enetc_psfp_init(priv); 632888ae5a3SPo Liu if (err) 633888ae5a3SPo Liu return err; 634888ae5a3SPo Liu 63579e49982SPo Liu enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) | 63679e49982SPo Liu ENETC_PPSFPMR_PSFPEN | ENETC_PPSFPMR_VS | 63779e49982SPo Liu ENETC_PPSFPMR_PVC | ENETC_PPSFPMR_PVZC); 638888ae5a3SPo Liu 639888ae5a3SPo Liu return 0; 64079e49982SPo Liu } 64179e49982SPo Liu 642888ae5a3SPo Liu static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 64379e49982SPo Liu { 644888ae5a3SPo Liu struct enetc_hw *hw = &priv->si->hw; 645888ae5a3SPo Liu int err; 646888ae5a3SPo Liu 647888ae5a3SPo Liu err = enetc_psfp_clean(priv); 648888ae5a3SPo Liu if (err) 649888ae5a3SPo Liu return err; 650888ae5a3SPo Liu 65179e49982SPo Liu enetc_wr(hw, ENETC_PPSFPMR, enetc_rd(hw, ENETC_PPSFPMR) & 65279e49982SPo Liu ~ENETC_PPSFPMR_PSFPEN & ~ENETC_PPSFPMR_VS & 65379e49982SPo Liu ~ENETC_PPSFPMR_PVC & ~ENETC_PPSFPMR_PVZC); 654888ae5a3SPo Liu 655888ae5a3SPo Liu memset(&priv->psfp_cap, 0, sizeof(struct psfp_cap)); 656888ae5a3SPo Liu 657888ae5a3SPo Liu return 0; 65879e49982SPo Liu } 659888ae5a3SPo Liu 66034c6adf1SPo Liu #else 661dfc7175dSVladimir Oltean #define enetc_qos_query_caps(ndev, type_data) -EOPNOTSUPP 66234c6adf1SPo Liu #define enetc_setup_tc_taprio(ndev, type_data) -EOPNOTSUPP 66371b77a7aSClaudiu Manoil #define enetc_sched_speed_set(priv, speed) (void)0 664c431047cSPo Liu #define enetc_setup_tc_cbs(ndev, type_data) -EOPNOTSUPP 6650d08c9ecSPo Liu #define enetc_setup_tc_txtime(ndev, type_data) -EOPNOTSUPP 666888ae5a3SPo Liu #define enetc_setup_tc_psfp(ndev, type_data) -EOPNOTSUPP 667888ae5a3SPo Liu #define enetc_setup_tc_block_cb NULL 668888ae5a3SPo Liu 66979e49982SPo Liu #define enetc_get_max_cap(p) \ 67079e49982SPo Liu memset(&((p)->psfp_cap), 0, sizeof(struct psfp_cap)) 67179e49982SPo Liu 672888ae5a3SPo Liu static inline int enetc_psfp_enable(struct enetc_ndev_priv *priv) 673888ae5a3SPo Liu { 674888ae5a3SPo Liu return 0; 675888ae5a3SPo Liu } 676888ae5a3SPo Liu 677888ae5a3SPo Liu static inline int enetc_psfp_disable(struct enetc_ndev_priv *priv) 678888ae5a3SPo Liu { 679888ae5a3SPo Liu return 0; 680888ae5a3SPo Liu } 681fed38e64SVladimir Oltean 682fed38e64SVladimir Oltean static inline int enetc_set_psfp(struct net_device *ndev, bool en) 683fed38e64SVladimir Oltean { 684fed38e64SVladimir Oltean return 0; 685fed38e64SVladimir Oltean } 68634c6adf1SPo Liu #endif 687