101f2e4eaSScott Feldman /* 229046f9bSVasanthy Kolluri * Copyright 2008-2010 Cisco Systems, Inc. All rights reserved. 301f2e4eaSScott Feldman * Copyright 2007 Nuova Systems, Inc. All rights reserved. 401f2e4eaSScott Feldman * 501f2e4eaSScott Feldman * This program is free software; you may redistribute it and/or modify 601f2e4eaSScott Feldman * it under the terms of the GNU General Public License as published by 701f2e4eaSScott Feldman * the Free Software Foundation; version 2 of the License. 801f2e4eaSScott Feldman * 901f2e4eaSScott Feldman * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 1001f2e4eaSScott Feldman * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 1101f2e4eaSScott Feldman * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 1201f2e4eaSScott Feldman * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 1301f2e4eaSScott Feldman * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 1401f2e4eaSScott Feldman * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 1501f2e4eaSScott Feldman * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 1601f2e4eaSScott Feldman * SOFTWARE. 1701f2e4eaSScott Feldman * 1801f2e4eaSScott Feldman */ 1901f2e4eaSScott Feldman 2001f2e4eaSScott Feldman #ifndef _ENIC_RES_H_ 2101f2e4eaSScott Feldman #define _ENIC_RES_H_ 2201f2e4eaSScott Feldman 2301f2e4eaSScott Feldman #include "wq_enet_desc.h" 2401f2e4eaSScott Feldman #include "rq_enet_desc.h" 2501f2e4eaSScott Feldman #include "vnic_wq.h" 2601f2e4eaSScott Feldman #include "vnic_rq.h" 2701f2e4eaSScott Feldman 2801f2e4eaSScott Feldman #define ENIC_MIN_WQ_DESCS 64 2901f2e4eaSScott Feldman #define ENIC_MAX_WQ_DESCS 4096 3001f2e4eaSScott Feldman #define ENIC_MIN_RQ_DESCS 64 3101f2e4eaSScott Feldman #define ENIC_MAX_RQ_DESCS 4096 3201f2e4eaSScott Feldman 33*44770e11SJarod Wilson #define ENIC_MIN_MTU ETH_MIN_MTU 3401f2e4eaSScott Feldman #define ENIC_MAX_MTU 9000 3501f2e4eaSScott Feldman 3601f2e4eaSScott Feldman #define ENIC_MULTICAST_PERFECT_FILTERS 32 37319d7e84SRoopa Prabhu #define ENIC_UNICAST_PERFECT_FILTERS 32 3801f2e4eaSScott Feldman 3901f2e4eaSScott Feldman #define ENIC_NON_TSO_MAX_DESC 16 4001f2e4eaSScott Feldman 4101f2e4eaSScott Feldman #define ENIC_SETTING(enic, f) ((enic->config.flags & VENETF_##f) ? 1 : 0) 4201f2e4eaSScott Feldman 4301f2e4eaSScott Feldman static inline void enic_queue_wq_desc_ex(struct vnic_wq *wq, 4401f2e4eaSScott Feldman void *os_buf, dma_addr_t dma_addr, unsigned int len, 4501f2e4eaSScott Feldman unsigned int mss_or_csum_offset, unsigned int hdr_len, 4601f2e4eaSScott Feldman int vlan_tag_insert, unsigned int vlan_tag, 471825aca6SVasanthy Kolluri int offload_mode, int cq_entry, int sop, int eop, int loopback) 4801f2e4eaSScott Feldman { 4901f2e4eaSScott Feldman struct wq_enet_desc *desc = vnic_wq_next_desc(wq); 5092e2b469SNeel Patel u8 desc_skip_cnt = 1; 5192e2b469SNeel Patel u8 compressed_send = 0; 5292e2b469SNeel Patel u64 wrid = 0; 5301f2e4eaSScott Feldman 5401f2e4eaSScott Feldman wq_enet_desc_enc(desc, 5501f2e4eaSScott Feldman (u64)dma_addr | VNIC_PADDR_TARGET, 5601f2e4eaSScott Feldman (u16)len, 5701f2e4eaSScott Feldman (u16)mss_or_csum_offset, 5801f2e4eaSScott Feldman (u16)hdr_len, (u8)offload_mode, 5901f2e4eaSScott Feldman (u8)eop, (u8)cq_entry, 6001f2e4eaSScott Feldman 0, /* fcoe_encap */ 6101f2e4eaSScott Feldman (u8)vlan_tag_insert, 6201f2e4eaSScott Feldman (u16)vlan_tag, 631825aca6SVasanthy Kolluri (u8)loopback); 6401f2e4eaSScott Feldman 6592e2b469SNeel Patel vnic_wq_post(wq, os_buf, dma_addr, len, sop, eop, desc_skip_cnt, 6692e2b469SNeel Patel (u8)cq_entry, compressed_send, wrid); 6701f2e4eaSScott Feldman } 6801f2e4eaSScott Feldman 6901f2e4eaSScott Feldman static inline void enic_queue_wq_desc_cont(struct vnic_wq *wq, 701825aca6SVasanthy Kolluri void *os_buf, dma_addr_t dma_addr, unsigned int len, 711825aca6SVasanthy Kolluri int eop, int loopback) 7201f2e4eaSScott Feldman { 7301f2e4eaSScott Feldman enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len, 7401f2e4eaSScott Feldman 0, 0, 0, 0, 0, 751825aca6SVasanthy Kolluri eop, 0 /* !SOP */, eop, loopback); 7601f2e4eaSScott Feldman } 7701f2e4eaSScott Feldman 7801f2e4eaSScott Feldman static inline void enic_queue_wq_desc(struct vnic_wq *wq, void *os_buf, 7901f2e4eaSScott Feldman dma_addr_t dma_addr, unsigned int len, int vlan_tag_insert, 801825aca6SVasanthy Kolluri unsigned int vlan_tag, int eop, int loopback) 8101f2e4eaSScott Feldman { 8201f2e4eaSScott Feldman enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len, 8301f2e4eaSScott Feldman 0, 0, vlan_tag_insert, vlan_tag, 8401f2e4eaSScott Feldman WQ_ENET_OFFLOAD_MODE_CSUM, 851825aca6SVasanthy Kolluri eop, 1 /* SOP */, eop, loopback); 8601f2e4eaSScott Feldman } 8701f2e4eaSScott Feldman 8801f2e4eaSScott Feldman static inline void enic_queue_wq_desc_csum(struct vnic_wq *wq, 8901f2e4eaSScott Feldman void *os_buf, dma_addr_t dma_addr, unsigned int len, 9001f2e4eaSScott Feldman int ip_csum, int tcpudp_csum, int vlan_tag_insert, 911825aca6SVasanthy Kolluri unsigned int vlan_tag, int eop, int loopback) 9201f2e4eaSScott Feldman { 9301f2e4eaSScott Feldman enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len, 9401f2e4eaSScott Feldman (ip_csum ? 1 : 0) + (tcpudp_csum ? 2 : 0), 9501f2e4eaSScott Feldman 0, vlan_tag_insert, vlan_tag, 9601f2e4eaSScott Feldman WQ_ENET_OFFLOAD_MODE_CSUM, 971825aca6SVasanthy Kolluri eop, 1 /* SOP */, eop, loopback); 9801f2e4eaSScott Feldman } 9901f2e4eaSScott Feldman 10001f2e4eaSScott Feldman static inline void enic_queue_wq_desc_csum_l4(struct vnic_wq *wq, 10101f2e4eaSScott Feldman void *os_buf, dma_addr_t dma_addr, unsigned int len, 10201f2e4eaSScott Feldman unsigned int csum_offset, unsigned int hdr_len, 1031825aca6SVasanthy Kolluri int vlan_tag_insert, unsigned int vlan_tag, int eop, int loopback) 10401f2e4eaSScott Feldman { 10501f2e4eaSScott Feldman enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len, 10601f2e4eaSScott Feldman csum_offset, hdr_len, vlan_tag_insert, vlan_tag, 10701f2e4eaSScott Feldman WQ_ENET_OFFLOAD_MODE_CSUM_L4, 1081825aca6SVasanthy Kolluri eop, 1 /* SOP */, eop, loopback); 10901f2e4eaSScott Feldman } 11001f2e4eaSScott Feldman 11101f2e4eaSScott Feldman static inline void enic_queue_wq_desc_tso(struct vnic_wq *wq, 11201f2e4eaSScott Feldman void *os_buf, dma_addr_t dma_addr, unsigned int len, 11301f2e4eaSScott Feldman unsigned int mss, unsigned int hdr_len, int vlan_tag_insert, 1141825aca6SVasanthy Kolluri unsigned int vlan_tag, int eop, int loopback) 11501f2e4eaSScott Feldman { 11601f2e4eaSScott Feldman enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len, 11701f2e4eaSScott Feldman mss, hdr_len, vlan_tag_insert, vlan_tag, 11801f2e4eaSScott Feldman WQ_ENET_OFFLOAD_MODE_TSO, 1191825aca6SVasanthy Kolluri eop, 1 /* SOP */, eop, loopback); 12001f2e4eaSScott Feldman } 12101f2e4eaSScott Feldman 12201f2e4eaSScott Feldman static inline void enic_queue_rq_desc(struct vnic_rq *rq, 12301f2e4eaSScott Feldman void *os_buf, unsigned int os_buf_index, 12401f2e4eaSScott Feldman dma_addr_t dma_addr, unsigned int len) 12501f2e4eaSScott Feldman { 12601f2e4eaSScott Feldman struct rq_enet_desc *desc = vnic_rq_next_desc(rq); 12792e2b469SNeel Patel u64 wrid = 0; 12801f2e4eaSScott Feldman u8 type = os_buf_index ? 12901f2e4eaSScott Feldman RQ_ENET_TYPE_NOT_SOP : RQ_ENET_TYPE_ONLY_SOP; 13001f2e4eaSScott Feldman 13101f2e4eaSScott Feldman rq_enet_desc_enc(desc, 13201f2e4eaSScott Feldman (u64)dma_addr | VNIC_PADDR_TARGET, 13301f2e4eaSScott Feldman type, (u16)len); 13401f2e4eaSScott Feldman 13592e2b469SNeel Patel vnic_rq_post(rq, os_buf, os_buf_index, dma_addr, len, wrid); 13601f2e4eaSScott Feldman } 13701f2e4eaSScott Feldman 13801f2e4eaSScott Feldman struct enic; 13901f2e4eaSScott Feldman 14001f2e4eaSScott Feldman int enic_get_vnic_config(struct enic *); 141383ab92fSVasanthy Kolluri int enic_add_vlan(struct enic *enic, u16 vlanid); 142383ab92fSVasanthy Kolluri int enic_del_vlan(struct enic *enic, u16 vlanid); 14301f2e4eaSScott Feldman int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type, 14401f2e4eaSScott Feldman u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en, 14501f2e4eaSScott Feldman u8 ig_vlan_strip_en); 146717258baSVasanthy Kolluri int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len); 147717258baSVasanthy Kolluri int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len); 14801f2e4eaSScott Feldman void enic_get_res_counts(struct enic *enic); 14901f2e4eaSScott Feldman void enic_init_vnic_resources(struct enic *enic); 15001f2e4eaSScott Feldman int enic_alloc_vnic_resources(struct enic *); 15101f2e4eaSScott Feldman void enic_free_vnic_resources(struct enic *); 15201f2e4eaSScott Feldman 15301f2e4eaSScott Feldman #endif /* _ENIC_RES_H_ */ 154