1e0d3bafdSSri Deevi /* 2e0d3bafdSSri Deevi cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices 3e0d3bafdSSri Deevi 4e0d3bafdSSri Deevi Copyright (C) 2008 <srinivasa.deevi at conexant dot com> 5e0d3bafdSSri Deevi Based on em28xx driver 6e0d3bafdSSri Deevi 7e0d3bafdSSri Deevi This program is free software; you can redistribute it and/or modify 8e0d3bafdSSri Deevi it under the terms of the GNU General Public License as published by 9e0d3bafdSSri Deevi the Free Software Foundation; either version 2 of the License, or 10e0d3bafdSSri Deevi (at your option) any later version. 11e0d3bafdSSri Deevi 12e0d3bafdSSri Deevi This program is distributed in the hope that it will be useful, 13e0d3bafdSSri Deevi but WITHOUT ANY WARRANTY; without even the implied warranty of 14e0d3bafdSSri Deevi MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15e0d3bafdSSri Deevi GNU General Public License for more details. 16e0d3bafdSSri Deevi 17e0d3bafdSSri Deevi You should have received a copy of the GNU General Public License 18e0d3bafdSSri Deevi along with this program; if not, write to the Free Software 19e0d3bafdSSri Deevi Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 20e0d3bafdSSri Deevi */ 21e0d3bafdSSri Deevi 22e0d3bafdSSri Deevi #ifndef _CX231XX_H 23e0d3bafdSSri Deevi #define _CX231XX_H 24e0d3bafdSSri Deevi 25e0d3bafdSSri Deevi #include <linux/videodev2.h> 26b1196126SSri Deevi #include <linux/types.h> 27b1196126SSri Deevi #include <linux/ioctl.h> 28e0d3bafdSSri Deevi #include <linux/i2c.h> 2961b04cb2SMauro Carvalho Chehab #include <linux/workqueue.h> 30e0d3bafdSSri Deevi #include <linux/mutex.h> 31b7085c08SMauro Carvalho Chehab #include <linux/usb.h> 32b1196126SSri Deevi 3364fbf444SPalash Bandyopadhyay #include <media/cx2341x.h> 34b1196126SSri Deevi 35b1196126SSri Deevi #include <media/videobuf-vmalloc.h> 36b1196126SSri Deevi #include <media/v4l2-device.h> 37d2370f8eSHans Verkuil #include <media/v4l2-ctrls.h> 381d08a4faSHans Verkuil #include <media/v4l2-fh.h> 396bda9644SMauro Carvalho Chehab #include <media/rc-core.h> 409ab66912SMauro Carvalho Chehab #include <media/ir-kbd-i2c.h> 41e0d3bafdSSri Deevi #include <media/videobuf-dvb.h> 42e0d3bafdSSri Deevi 43e0d3bafdSSri Deevi #include "cx231xx-reg.h" 446e4f574bSSri Deevi #include "cx231xx-pcb-cfg.h" 45e0d3bafdSSri Deevi #include "cx231xx-conf-reg.h" 46e0d3bafdSSri Deevi 47e0d3bafdSSri Deevi #define DRIVER_NAME "cx231xx" 4844ecf1dfSDevin Heitmueller #define PWR_SLEEP_INTERVAL 10 49e0d3bafdSSri Deevi 50e0d3bafdSSri Deevi /* I2C addresses for control block in Cx231xx */ 51ecc67d10SSri Deevi #define AFE_DEVICE_ADDRESS 0x60 52ecc67d10SSri Deevi #define I2S_BLK_DEVICE_ADDRESS 0x98 53ecc67d10SSri Deevi #define VID_BLK_I2C_ADDRESS 0x88 5464fbf444SPalash Bandyopadhyay #define VERVE_I2C_ADDRESS 0x40 55e0d3bafdSSri Deevi #define DIF_USE_BASEBAND 0xFFFFFFFF 56e0d3bafdSSri Deevi 57e0d3bafdSSri Deevi /* Boards supported by driver */ 58e0d3bafdSSri Deevi #define CX231XX_BOARD_UNKNOWN 0 5964fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_CARRAERA 1 6064fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_SHELBY 2 6164fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_RDE_253S 3 6264fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_RDU_253S 4 6364fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5 6464fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_RDE_250 6 6564fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_RDU_250 7 661a50fddeSMichael Krufky #define CX231XX_BOARD_HAUPPAUGE_EXETER 8 674270c3caSDevin Heitmueller #define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9 689417bc6dSMauro Carvalho Chehab #define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10 694e105039SMauro Carvalho Chehab #define CX231XX_BOARD_PV_XCAPTURE_USB 11 70eeaaf817SMárcio Alves #define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12 712a7b6a40SIgor Novgorodov #define CX231XX_BOARD_ICONBIT_U100 13 72de8ae0d5SPeter Moon #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14 73de8ae0d5SPeter Moon #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15 7468c97bf3SAlf Høgemark #define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16 753ead1ba3SMatt Gomboc #define CX231XX_BOARD_OTG102 17 768b1255a2SJohannes Erdfelt #define CX231XX_BOARD_KWORLD_UB445_USB_HYBRID 18 77dd2e7dd2SMatthias Schwarzott #define CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx 19 789e49f7c3SMatthias Schwarzott #define CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx 20 79*809abdbfSOlli Salonen #define CX231XX_BOARD_HAUPPAUGE_955Q 21 80e0d3bafdSSri Deevi 81e0d3bafdSSri Deevi /* Limits minimum and default number of buffers */ 82e0d3bafdSSri Deevi #define CX231XX_MIN_BUF 4 83e0d3bafdSSri Deevi #define CX231XX_DEF_BUF 12 84e0d3bafdSSri Deevi #define CX231XX_DEF_VBI_BUF 6 85e0d3bafdSSri Deevi 86e0d3bafdSSri Deevi #define VBI_LINE_COUNT 17 87e0d3bafdSSri Deevi #define VBI_LINE_LENGTH 1440 88e0d3bafdSSri Deevi 89e0d3bafdSSri Deevi /*Limits the max URB message size */ 90e0d3bafdSSri Deevi #define URB_MAX_CTRL_SIZE 80 91e0d3bafdSSri Deevi 92e0d3bafdSSri Deevi /* Params for validated field */ 93e0d3bafdSSri Deevi #define CX231XX_BOARD_NOT_VALIDATED 1 94e0d3bafdSSri Deevi #define CX231XX_BOARD_VALIDATED 0 95e0d3bafdSSri Deevi 96e0d3bafdSSri Deevi /* maximum number of cx231xx boards */ 97e0d3bafdSSri Deevi #define CX231XX_MAXBOARDS 8 98e0d3bafdSSri Deevi 99e0d3bafdSSri Deevi /* maximum number of frames that can be queued */ 100e0d3bafdSSri Deevi #define CX231XX_NUM_FRAMES 5 101e0d3bafdSSri Deevi 102e0d3bafdSSri Deevi /* number of buffers for isoc transfers */ 103e0d3bafdSSri Deevi #define CX231XX_NUM_BUFS 8 104e0d3bafdSSri Deevi 105e0d3bafdSSri Deevi /* number of packets for each buffer 106e0d3bafdSSri Deevi windows requests only 40 packets .. so we better do the same 107e0d3bafdSSri Deevi this is what I found out for all alternate numbers there! 108e0d3bafdSSri Deevi */ 109e0d3bafdSSri Deevi #define CX231XX_NUM_PACKETS 40 110e0d3bafdSSri Deevi 111e0d3bafdSSri Deevi /* default alternate; 0 means choose the best */ 112e0d3bafdSSri Deevi #define CX231XX_PINOUT 0 113e0d3bafdSSri Deevi 114e0d3bafdSSri Deevi #define CX231XX_INTERLACED_DEFAULT 1 115e0d3bafdSSri Deevi 116e0d3bafdSSri Deevi /* time to wait when stopping the isoc transfer */ 117b9255176SSri Deevi #define CX231XX_URB_TIMEOUT \ 118b9255176SSri Deevi msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS) 119e0d3bafdSSri Deevi 12064fbf444SPalash Bandyopadhyay #define CX231xx_NORMS (\ 12164fbf444SPalash Bandyopadhyay V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ 12264fbf444SPalash Bandyopadhyay V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ 12364fbf444SPalash Bandyopadhyay V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ 12464fbf444SPalash Bandyopadhyay V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) 12564fbf444SPalash Bandyopadhyay 12664fbf444SPalash Bandyopadhyay #define SLEEP_S5H1432 30 12764fbf444SPalash Bandyopadhyay #define CX23417_OSC_EN 8 12864fbf444SPalash Bandyopadhyay #define CX23417_RESET 9 12964fbf444SPalash Bandyopadhyay 13064fbf444SPalash Bandyopadhyay struct cx23417_fmt { 13164fbf444SPalash Bandyopadhyay char *name; 13264fbf444SPalash Bandyopadhyay u32 fourcc; /* v4l2 format id */ 13364fbf444SPalash Bandyopadhyay int depth; 13464fbf444SPalash Bandyopadhyay int flags; 13564fbf444SPalash Bandyopadhyay u32 cxformat; 13664fbf444SPalash Bandyopadhyay }; 137e0d3bafdSSri Deevi enum cx231xx_mode { 138e0d3bafdSSri Deevi CX231XX_SUSPEND, 139e0d3bafdSSri Deevi CX231XX_ANALOG_MODE, 140e0d3bafdSSri Deevi CX231XX_DIGITAL_MODE, 141e0d3bafdSSri Deevi }; 142e0d3bafdSSri Deevi 143e0d3bafdSSri Deevi enum cx231xx_std_mode { 144e0d3bafdSSri Deevi CX231XX_TV_AIR = 0, 145e0d3bafdSSri Deevi CX231XX_TV_CABLE 146e0d3bafdSSri Deevi }; 147e0d3bafdSSri Deevi 148e0d3bafdSSri Deevi enum cx231xx_stream_state { 149e0d3bafdSSri Deevi STREAM_OFF, 150e0d3bafdSSri Deevi STREAM_INTERRUPT, 151e0d3bafdSSri Deevi STREAM_ON, 152e0d3bafdSSri Deevi }; 153e0d3bafdSSri Deevi 154e0d3bafdSSri Deevi struct cx231xx; 155e0d3bafdSSri Deevi 15664fbf444SPalash Bandyopadhyay struct cx231xx_isoc_ctl { 157e0d3bafdSSri Deevi /* max packet size of isoc transaction */ 158e0d3bafdSSri Deevi int max_pkt_size; 159e0d3bafdSSri Deevi 160e0d3bafdSSri Deevi /* number of allocated urbs */ 161e0d3bafdSSri Deevi int num_bufs; 162e0d3bafdSSri Deevi 163e0d3bafdSSri Deevi /* urb for isoc transfers */ 164e0d3bafdSSri Deevi struct urb **urb; 165e0d3bafdSSri Deevi 166e0d3bafdSSri Deevi /* transfer buffers for isoc transfer */ 167e0d3bafdSSri Deevi char **transfer_buffer; 168e0d3bafdSSri Deevi 169e0d3bafdSSri Deevi /* Last buffer command and region */ 170e0d3bafdSSri Deevi u8 cmd; 171e0d3bafdSSri Deevi int pos, size, pktsize; 172e0d3bafdSSri Deevi 173e0d3bafdSSri Deevi /* Last field: ODD or EVEN? */ 174e0d3bafdSSri Deevi int field; 175e0d3bafdSSri Deevi 176e0d3bafdSSri Deevi /* Stores incomplete commands */ 177e0d3bafdSSri Deevi u32 tmp_buf; 178e0d3bafdSSri Deevi int tmp_buf_len; 179e0d3bafdSSri Deevi 180e0d3bafdSSri Deevi /* Stores already requested buffers */ 181e0d3bafdSSri Deevi struct cx231xx_buffer *buf; 182e0d3bafdSSri Deevi 183e0d3bafdSSri Deevi /* Stores the number of received fields */ 184e0d3bafdSSri Deevi int nfields; 185e0d3bafdSSri Deevi 186e0d3bafdSSri Deevi /* isoc urb callback */ 187e0d3bafdSSri Deevi int (*isoc_copy) (struct cx231xx *dev, struct urb *urb); 188e0d3bafdSSri Deevi }; 189e0d3bafdSSri Deevi 19064fbf444SPalash Bandyopadhyay struct cx231xx_bulk_ctl { 19164fbf444SPalash Bandyopadhyay /* max packet size of bulk transaction */ 19264fbf444SPalash Bandyopadhyay int max_pkt_size; 19364fbf444SPalash Bandyopadhyay 19464fbf444SPalash Bandyopadhyay /* number of allocated urbs */ 19564fbf444SPalash Bandyopadhyay int num_bufs; 19664fbf444SPalash Bandyopadhyay 19764fbf444SPalash Bandyopadhyay /* urb for bulk transfers */ 19864fbf444SPalash Bandyopadhyay struct urb **urb; 19964fbf444SPalash Bandyopadhyay 20064fbf444SPalash Bandyopadhyay /* transfer buffers for bulk transfer */ 20164fbf444SPalash Bandyopadhyay char **transfer_buffer; 20264fbf444SPalash Bandyopadhyay 20364fbf444SPalash Bandyopadhyay /* Last buffer command and region */ 20464fbf444SPalash Bandyopadhyay u8 cmd; 20564fbf444SPalash Bandyopadhyay int pos, size, pktsize; 20664fbf444SPalash Bandyopadhyay 20764fbf444SPalash Bandyopadhyay /* Last field: ODD or EVEN? */ 20864fbf444SPalash Bandyopadhyay int field; 20964fbf444SPalash Bandyopadhyay 21064fbf444SPalash Bandyopadhyay /* Stores incomplete commands */ 21164fbf444SPalash Bandyopadhyay u32 tmp_buf; 21264fbf444SPalash Bandyopadhyay int tmp_buf_len; 21364fbf444SPalash Bandyopadhyay 21464fbf444SPalash Bandyopadhyay /* Stores already requested buffers */ 21564fbf444SPalash Bandyopadhyay struct cx231xx_buffer *buf; 21664fbf444SPalash Bandyopadhyay 21764fbf444SPalash Bandyopadhyay /* Stores the number of received fields */ 21864fbf444SPalash Bandyopadhyay int nfields; 21964fbf444SPalash Bandyopadhyay 22064fbf444SPalash Bandyopadhyay /* bulk urb callback */ 22164fbf444SPalash Bandyopadhyay int (*bulk_copy) (struct cx231xx *dev, struct urb *urb); 22264fbf444SPalash Bandyopadhyay }; 22364fbf444SPalash Bandyopadhyay 224e0d3bafdSSri Deevi struct cx231xx_fmt { 225e0d3bafdSSri Deevi char *name; 226e0d3bafdSSri Deevi u32 fourcc; /* v4l2 format id */ 227e0d3bafdSSri Deevi int depth; 228e0d3bafdSSri Deevi int reg; 229e0d3bafdSSri Deevi }; 230e0d3bafdSSri Deevi 231e0d3bafdSSri Deevi /* buffer for one video frame */ 232e0d3bafdSSri Deevi struct cx231xx_buffer { 233e0d3bafdSSri Deevi /* common v4l buffer stuff -- must be first */ 234e0d3bafdSSri Deevi struct videobuf_buffer vb; 235e0d3bafdSSri Deevi 236e0d3bafdSSri Deevi struct list_head frame; 237e0d3bafdSSri Deevi int top_field; 238e0d3bafdSSri Deevi int receiving; 239e0d3bafdSSri Deevi }; 240e0d3bafdSSri Deevi 24164fbf444SPalash Bandyopadhyay enum ps_package_head { 24264fbf444SPalash Bandyopadhyay CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0, 24364fbf444SPalash Bandyopadhyay CX231XX_NONEED_PS_PACKAGE_HEAD 24464fbf444SPalash Bandyopadhyay }; 24564fbf444SPalash Bandyopadhyay 246e0d3bafdSSri Deevi struct cx231xx_dmaqueue { 247e0d3bafdSSri Deevi struct list_head active; 248e0d3bafdSSri Deevi struct list_head queued; 249e0d3bafdSSri Deevi 250e0d3bafdSSri Deevi wait_queue_head_t wq; 251e0d3bafdSSri Deevi 252e0d3bafdSSri Deevi /* Counters to control buffer fill */ 253e0d3bafdSSri Deevi int pos; 254e0d3bafdSSri Deevi u8 is_partial_line; 255e0d3bafdSSri Deevi u8 partial_buf[8]; 256e0d3bafdSSri Deevi u8 last_sav; 257e0d3bafdSSri Deevi int current_field; 258e0d3bafdSSri Deevi u32 bytes_left_in_line; 259e0d3bafdSSri Deevi u32 lines_completed; 260e0d3bafdSSri Deevi u8 field1_done; 261e0d3bafdSSri Deevi u32 lines_per_field; 26264fbf444SPalash Bandyopadhyay 26364fbf444SPalash Bandyopadhyay /*Mpeg2 control buffer*/ 26464fbf444SPalash Bandyopadhyay u8 *p_left_data; 26564fbf444SPalash Bandyopadhyay u32 left_data_count; 26664fbf444SPalash Bandyopadhyay u8 mpeg_buffer_done; 26764fbf444SPalash Bandyopadhyay u32 mpeg_buffer_completed; 26864fbf444SPalash Bandyopadhyay enum ps_package_head add_ps_package_head; 26964fbf444SPalash Bandyopadhyay char ps_head[10]; 270e0d3bafdSSri Deevi }; 271e0d3bafdSSri Deevi 272e0d3bafdSSri Deevi /* inputs */ 273e0d3bafdSSri Deevi 274e0d3bafdSSri Deevi #define MAX_CX231XX_INPUT 4 275e0d3bafdSSri Deevi 276e0d3bafdSSri Deevi enum cx231xx_itype { 277e0d3bafdSSri Deevi CX231XX_VMUX_COMPOSITE1 = 1, 278e0d3bafdSSri Deevi CX231XX_VMUX_SVIDEO, 279e0d3bafdSSri Deevi CX231XX_VMUX_TELEVISION, 280e0d3bafdSSri Deevi CX231XX_VMUX_CABLE, 281e0d3bafdSSri Deevi CX231XX_RADIO, 282e0d3bafdSSri Deevi CX231XX_VMUX_DVB, 283e0d3bafdSSri Deevi CX231XX_VMUX_DEBUG 284e0d3bafdSSri Deevi }; 285e0d3bafdSSri Deevi 286e0d3bafdSSri Deevi enum cx231xx_v_input { 287e0d3bafdSSri Deevi CX231XX_VIN_1_1 = 0x1, 288e0d3bafdSSri Deevi CX231XX_VIN_2_1, 289e0d3bafdSSri Deevi CX231XX_VIN_3_1, 290e0d3bafdSSri Deevi CX231XX_VIN_4_1, 291e0d3bafdSSri Deevi CX231XX_VIN_1_2 = 0x01, 292e0d3bafdSSri Deevi CX231XX_VIN_2_2, 293e0d3bafdSSri Deevi CX231XX_VIN_3_2, 294e0d3bafdSSri Deevi CX231XX_VIN_1_3 = 0x1, 295e0d3bafdSSri Deevi CX231XX_VIN_2_3, 296e0d3bafdSSri Deevi CX231XX_VIN_3_3, 297e0d3bafdSSri Deevi }; 298e0d3bafdSSri Deevi 299e0d3bafdSSri Deevi /* cx231xx has two audio inputs: tuner and line in */ 300e0d3bafdSSri Deevi enum cx231xx_amux { 301e0d3bafdSSri Deevi /* This is the only entry for cx231xx tuner input */ 302e0d3bafdSSri Deevi CX231XX_AMUX_VIDEO, /* cx231xx tuner */ 303e0d3bafdSSri Deevi CX231XX_AMUX_LINE_IN, /* Line In */ 304e0d3bafdSSri Deevi }; 305e0d3bafdSSri Deevi 306e0d3bafdSSri Deevi struct cx231xx_reg_seq { 307e0d3bafdSSri Deevi unsigned char bit; 308e0d3bafdSSri Deevi unsigned char val; 309e0d3bafdSSri Deevi int sleep; 310e0d3bafdSSri Deevi }; 311e0d3bafdSSri Deevi 312e0d3bafdSSri Deevi struct cx231xx_input { 313e0d3bafdSSri Deevi enum cx231xx_itype type; 314e0d3bafdSSri Deevi unsigned int vmux; 315e0d3bafdSSri Deevi enum cx231xx_amux amux; 316e0d3bafdSSri Deevi struct cx231xx_reg_seq *gpio; 317e0d3bafdSSri Deevi }; 318e0d3bafdSSri Deevi 319e0d3bafdSSri Deevi #define INPUT(nr) (&cx231xx_boards[dev->model].input[nr]) 320e0d3bafdSSri Deevi 321e0d3bafdSSri Deevi enum cx231xx_decoder { 322e0d3bafdSSri Deevi CX231XX_NODECODER, 323e0d3bafdSSri Deevi CX231XX_AVDECODER 324e0d3bafdSSri Deevi }; 325e0d3bafdSSri Deevi 326b9255176SSri Deevi enum CX231XX_I2C_MASTER_PORT { 3279abe3b89SMatthias Schwarzott I2C_0 = 0, /* master 0 - internal connection */ 3289abe3b89SMatthias Schwarzott I2C_1 = 1, /* master 1 - used with mux */ 3299abe3b89SMatthias Schwarzott I2C_2 = 2, /* master 2 */ 3309abe3b89SMatthias Schwarzott I2C_1_MUX_1 = 3, /* master 1 - port 1 (I2C_DEMOD_EN = 0) */ 3319abe3b89SMatthias Schwarzott I2C_1_MUX_3 = 4 /* master 1 - port 3 (I2C_DEMOD_EN = 1) */ 332b9255176SSri Deevi }; 333e0d3bafdSSri Deevi 334e0d3bafdSSri Deevi struct cx231xx_board { 335e0d3bafdSSri Deevi char *name; 336e0d3bafdSSri Deevi int vchannels; 337e0d3bafdSSri Deevi int tuner_type; 338e0d3bafdSSri Deevi int tuner_addr; 339e0d3bafdSSri Deevi v4l2_std_id norm; /* tv norm */ 340e0d3bafdSSri Deevi 341e0d3bafdSSri Deevi /* demod related */ 342e0d3bafdSSri Deevi int demod_addr; 343e0d3bafdSSri Deevi u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */ 344e0d3bafdSSri Deevi 345e0d3bafdSSri Deevi /* GPIO Pins */ 346e0d3bafdSSri Deevi struct cx231xx_reg_seq *dvb_gpio; 347e0d3bafdSSri Deevi struct cx231xx_reg_seq *suspend_gpio; 348e0d3bafdSSri Deevi struct cx231xx_reg_seq *tuner_gpio; 34978bb6df6SMauro Carvalho Chehab /* Negative means don't use it */ 35078bb6df6SMauro Carvalho Chehab s8 tuner_sif_gpio; 35178bb6df6SMauro Carvalho Chehab s8 tuner_scl_gpio; 35278bb6df6SMauro Carvalho Chehab s8 tuner_sda_gpio; 353e0d3bafdSSri Deevi 354e0d3bafdSSri Deevi /* PIN ctrl */ 355e0d3bafdSSri Deevi u32 ctl_pin_status_mask; 356e0d3bafdSSri Deevi u8 agc_analog_digital_select_gpio; 357e0d3bafdSSri Deevi u32 gpio_pin_status_mask; 358e0d3bafdSSri Deevi 359e0d3bafdSSri Deevi /* i2c masters */ 360e0d3bafdSSri Deevi u8 tuner_i2c_master; 361e0d3bafdSSri Deevi u8 demod_i2c_master; 3629ab66912SMauro Carvalho Chehab u8 ir_i2c_master; 3639ab66912SMauro Carvalho Chehab 3649ab66912SMauro Carvalho Chehab /* for devices with I2C chips for IR */ 36529e3ec19SMauro Carvalho Chehab char *rc_map_name; 366e0d3bafdSSri Deevi 367e0d3bafdSSri Deevi unsigned int max_range_640_480:1; 368e0d3bafdSSri Deevi unsigned int has_dvb:1; 3692f861387SMauro Carvalho Chehab unsigned int has_417:1; 370e0d3bafdSSri Deevi unsigned int valid:1; 3712f861387SMauro Carvalho Chehab unsigned int no_alt_vanc:1; 3722f861387SMauro Carvalho Chehab unsigned int external_av:1; 373e0d3bafdSSri Deevi 374e0d3bafdSSri Deevi unsigned char xclk, i2c_speed; 375e0d3bafdSSri Deevi 376e0d3bafdSSri Deevi enum cx231xx_decoder decoder; 37788806218SDevin Heitmueller int output_mode; 378e0d3bafdSSri Deevi 379e0d3bafdSSri Deevi struct cx231xx_input input[MAX_CX231XX_INPUT]; 380e0d3bafdSSri Deevi struct cx231xx_input radio; 381b088ba65SMauro Carvalho Chehab struct rc_map *ir_codes; 382e0d3bafdSSri Deevi }; 383e0d3bafdSSri Deevi 384e0d3bafdSSri Deevi /* device states */ 385e0d3bafdSSri Deevi enum cx231xx_dev_state { 386e0d3bafdSSri Deevi DEV_INITIALIZED = 0x01, 387e0d3bafdSSri Deevi DEV_DISCONNECTED = 0x02, 388e0d3bafdSSri Deevi }; 389e0d3bafdSSri Deevi 39084b5dbf3SMauro Carvalho Chehab enum AFE_MODE { 391e0d3bafdSSri Deevi AFE_MODE_LOW_IF, 392e0d3bafdSSri Deevi AFE_MODE_BASEBAND, 393e0d3bafdSSri Deevi AFE_MODE_EU_HI_IF, 394e0d3bafdSSri Deevi AFE_MODE_US_HI_IF, 395e0d3bafdSSri Deevi AFE_MODE_JAPAN_HI_IF 396e0d3bafdSSri Deevi }; 397e0d3bafdSSri Deevi 39884b5dbf3SMauro Carvalho Chehab enum AUDIO_INPUT { 399e0d3bafdSSri Deevi AUDIO_INPUT_MUTE, 400e0d3bafdSSri Deevi AUDIO_INPUT_LINE, 401e0d3bafdSSri Deevi AUDIO_INPUT_TUNER_TV, 402e0d3bafdSSri Deevi AUDIO_INPUT_SPDIF, 403e0d3bafdSSri Deevi AUDIO_INPUT_TUNER_FM 404e0d3bafdSSri Deevi }; 405e0d3bafdSSri Deevi 406e0d3bafdSSri Deevi #define CX231XX_AUDIO_BUFS 5 40764fbf444SPalash Bandyopadhyay #define CX231XX_NUM_AUDIO_PACKETS 16 40864fbf444SPalash Bandyopadhyay #define CX231XX_ISO_NUM_AUDIO_PACKETS 64 409e0d3bafdSSri Deevi 410e0d3bafdSSri Deevi /* cx231xx extensions */ 411e0d3bafdSSri Deevi #define CX231XX_AUDIO 0x10 412e0d3bafdSSri Deevi #define CX231XX_DVB 0x20 413e0d3bafdSSri Deevi 414e0d3bafdSSri Deevi struct cx231xx_audio { 415e0d3bafdSSri Deevi char name[50]; 416e0d3bafdSSri Deevi char *transfer_buffer[CX231XX_AUDIO_BUFS]; 417e0d3bafdSSri Deevi struct urb *urb[CX231XX_AUDIO_BUFS]; 418e0d3bafdSSri Deevi struct usb_device *udev; 419e0d3bafdSSri Deevi unsigned int capture_transfer_done; 420e0d3bafdSSri Deevi struct snd_pcm_substream *capture_pcm_substream; 421e0d3bafdSSri Deevi 422e0d3bafdSSri Deevi unsigned int hwptr_done_capture; 423e0d3bafdSSri Deevi struct snd_card *sndcard; 424e0d3bafdSSri Deevi 425e0d3bafdSSri Deevi int users, shutdown; 42664fbf444SPalash Bandyopadhyay /* locks */ 427e0d3bafdSSri Deevi spinlock_t slock; 428e0d3bafdSSri Deevi 429e0d3bafdSSri Deevi int alt; /* alternate */ 430e0d3bafdSSri Deevi int max_pkt_size; /* max packet size of isoc transaction */ 431e0d3bafdSSri Deevi int num_alt; /* Number of alternative settings */ 432e0d3bafdSSri Deevi unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ 433e0d3bafdSSri Deevi u16 end_point_addr; 434e0d3bafdSSri Deevi }; 435e0d3bafdSSri Deevi 436e0d3bafdSSri Deevi struct cx231xx; 437e0d3bafdSSri Deevi 438e0d3bafdSSri Deevi struct cx231xx_fh { 4391d08a4faSHans Verkuil struct v4l2_fh fh; 440e0d3bafdSSri Deevi struct cx231xx *dev; 441e0d3bafdSSri Deevi unsigned int stream_on:1; /* Locks streams */ 442e0d3bafdSSri Deevi enum v4l2_buf_type type; 44364fbf444SPalash Bandyopadhyay 44471590765SHans Verkuil struct videobuf_queue vb_vidq; 44564fbf444SPalash Bandyopadhyay 44664fbf444SPalash Bandyopadhyay /* vbi capture */ 44764fbf444SPalash Bandyopadhyay struct videobuf_queue vidq; 44864fbf444SPalash Bandyopadhyay struct videobuf_queue vbiq; 44964fbf444SPalash Bandyopadhyay 45064fbf444SPalash Bandyopadhyay /* MPEG Encoder specifics ONLY */ 45164fbf444SPalash Bandyopadhyay 45264fbf444SPalash Bandyopadhyay atomic_t v4l_reading; 453e0d3bafdSSri Deevi }; 454e0d3bafdSSri Deevi 455b9255176SSri Deevi /*****************************************************************/ 456e0d3bafdSSri Deevi /* set/get i2c */ 457b9255176SSri Deevi /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ 458b9255176SSri Deevi #define I2C_SPEED_1M 0x0 459b9255176SSri Deevi #define I2C_SPEED_400K 0x1 460b9255176SSri Deevi #define I2C_SPEED_100K 0x2 461b9255176SSri Deevi #define I2C_SPEED_5M 0x3 462e0d3bafdSSri Deevi 463b9255176SSri Deevi /* 0-- STOP transaction */ 464b9255176SSri Deevi #define I2C_STOP 0x0 465b9255176SSri Deevi /* 1-- do not transmit STOP at end of transaction */ 466b9255176SSri Deevi #define I2C_NOSTOP 0x1 467b251e618SJustin P. Mattock /* 1--allow slave to insert clock wait states */ 468b9255176SSri Deevi #define I2C_SYNC 0x1 469e0d3bafdSSri Deevi 470e0d3bafdSSri Deevi struct cx231xx_i2c { 471e0d3bafdSSri Deevi struct cx231xx *dev; 472e0d3bafdSSri Deevi 473e0d3bafdSSri Deevi int nr; 474e0d3bafdSSri Deevi 475e0d3bafdSSri Deevi /* i2c i/o */ 476e0d3bafdSSri Deevi struct i2c_adapter i2c_adap; 477e0d3bafdSSri Deevi u32 i2c_rc; 478e0d3bafdSSri Deevi 479e0d3bafdSSri Deevi /* different settings for each bus */ 480e0d3bafdSSri Deevi u8 i2c_period; 481e0d3bafdSSri Deevi u8 i2c_nostop; 482e0d3bafdSSri Deevi u8 i2c_reserve; 483e0d3bafdSSri Deevi }; 484e0d3bafdSSri Deevi 485e0d3bafdSSri Deevi struct cx231xx_i2c_xfer_data { 486e0d3bafdSSri Deevi u8 dev_addr; 487e0d3bafdSSri Deevi u8 direction; /* 1 - IN, 0 - OUT */ 488e0d3bafdSSri Deevi u8 saddr_len; /* sub address len */ 489e0d3bafdSSri Deevi u16 saddr_dat; /* sub addr data */ 490e0d3bafdSSri Deevi u8 buf_size; /* buffer size */ 491e0d3bafdSSri Deevi u8 *p_buffer; /* pointer to the buffer */ 492e0d3bafdSSri Deevi }; 493e0d3bafdSSri Deevi 494b9255176SSri Deevi struct VENDOR_REQUEST_IN { 495e0d3bafdSSri Deevi u8 bRequest; 496e0d3bafdSSri Deevi u16 wValue; 497e0d3bafdSSri Deevi u16 wIndex; 498e0d3bafdSSri Deevi u16 wLength; 499e0d3bafdSSri Deevi u8 direction; 500e0d3bafdSSri Deevi u8 bData; 501e0d3bafdSSri Deevi u8 *pBuff; 502b9255176SSri Deevi }; 503e0d3bafdSSri Deevi 50464fbf444SPalash Bandyopadhyay struct cx231xx_tvnorm { 50564fbf444SPalash Bandyopadhyay char *name; 50664fbf444SPalash Bandyopadhyay v4l2_std_id id; 50764fbf444SPalash Bandyopadhyay u32 cxiformat; 50864fbf444SPalash Bandyopadhyay u32 cxoformat; 50964fbf444SPalash Bandyopadhyay }; 51064fbf444SPalash Bandyopadhyay 511b9255176SSri Deevi enum TRANSFER_TYPE { 512e0d3bafdSSri Deevi Raw_Video = 0, 513e0d3bafdSSri Deevi Audio, 514e0d3bafdSSri Deevi Vbi, /* VANC */ 515e0d3bafdSSri Deevi Sliced_cc, /* HANC */ 516e0d3bafdSSri Deevi TS1_serial_mode, 517e0d3bafdSSri Deevi TS2, 518e0d3bafdSSri Deevi TS1_parallel_mode 519b9255176SSri Deevi } ; 520e0d3bafdSSri Deevi 521e0d3bafdSSri Deevi struct cx231xx_video_mode { 522e0d3bafdSSri Deevi /* Isoc control struct */ 523e0d3bafdSSri Deevi struct cx231xx_dmaqueue vidq; 52464fbf444SPalash Bandyopadhyay struct cx231xx_isoc_ctl isoc_ctl; 52564fbf444SPalash Bandyopadhyay struct cx231xx_bulk_ctl bulk_ctl; 52664fbf444SPalash Bandyopadhyay /* locks */ 527e0d3bafdSSri Deevi spinlock_t slock; 528e0d3bafdSSri Deevi 529e0d3bafdSSri Deevi /* usb transfer */ 530e0d3bafdSSri Deevi int alt; /* alternate */ 531e0d3bafdSSri Deevi int max_pkt_size; /* max packet size of isoc transaction */ 532e0d3bafdSSri Deevi int num_alt; /* Number of alternative settings */ 533e0d3bafdSSri Deevi unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ 534e0d3bafdSSri Deevi u16 end_point_addr; 535e0d3bafdSSri Deevi }; 5361e451808SHans Verkuil 53764fbf444SPalash Bandyopadhyay struct cx231xx_tsport { 53864fbf444SPalash Bandyopadhyay struct cx231xx *dev; 53964fbf444SPalash Bandyopadhyay 54064fbf444SPalash Bandyopadhyay int nr; 54164fbf444SPalash Bandyopadhyay int sram_chno; 54264fbf444SPalash Bandyopadhyay 54364fbf444SPalash Bandyopadhyay struct videobuf_dvb_frontends frontends; 54464fbf444SPalash Bandyopadhyay 54564fbf444SPalash Bandyopadhyay /* dma queues */ 54664fbf444SPalash Bandyopadhyay 54764fbf444SPalash Bandyopadhyay u32 ts_packet_size; 54864fbf444SPalash Bandyopadhyay u32 ts_packet_count; 54964fbf444SPalash Bandyopadhyay 55064fbf444SPalash Bandyopadhyay int width; 55164fbf444SPalash Bandyopadhyay int height; 55264fbf444SPalash Bandyopadhyay 55364fbf444SPalash Bandyopadhyay /* locks */ 55464fbf444SPalash Bandyopadhyay spinlock_t slock; 55564fbf444SPalash Bandyopadhyay 55664fbf444SPalash Bandyopadhyay /* registers */ 55764fbf444SPalash Bandyopadhyay u32 reg_gpcnt; 55864fbf444SPalash Bandyopadhyay u32 reg_gpcnt_ctl; 55964fbf444SPalash Bandyopadhyay u32 reg_dma_ctl; 56064fbf444SPalash Bandyopadhyay u32 reg_lngth; 56164fbf444SPalash Bandyopadhyay u32 reg_hw_sop_ctrl; 56264fbf444SPalash Bandyopadhyay u32 reg_gen_ctrl; 56364fbf444SPalash Bandyopadhyay u32 reg_bd_pkt_status; 56464fbf444SPalash Bandyopadhyay u32 reg_sop_status; 56564fbf444SPalash Bandyopadhyay u32 reg_fifo_ovfl_stat; 56664fbf444SPalash Bandyopadhyay u32 reg_vld_misc; 56764fbf444SPalash Bandyopadhyay u32 reg_ts_clk_en; 56864fbf444SPalash Bandyopadhyay u32 reg_ts_int_msk; 56964fbf444SPalash Bandyopadhyay u32 reg_ts_int_stat; 57064fbf444SPalash Bandyopadhyay u32 reg_src_sel; 57164fbf444SPalash Bandyopadhyay 57264fbf444SPalash Bandyopadhyay /* Default register vals */ 57364fbf444SPalash Bandyopadhyay int pci_irqmask; 57464fbf444SPalash Bandyopadhyay u32 dma_ctl_val; 57564fbf444SPalash Bandyopadhyay u32 ts_int_msk_val; 57664fbf444SPalash Bandyopadhyay u32 gen_ctrl_val; 57764fbf444SPalash Bandyopadhyay u32 ts_clk_en_val; 57864fbf444SPalash Bandyopadhyay u32 src_sel_val; 57964fbf444SPalash Bandyopadhyay u32 vld_misc_val; 58064fbf444SPalash Bandyopadhyay u32 hw_sop_ctrl_val; 58164fbf444SPalash Bandyopadhyay 58264fbf444SPalash Bandyopadhyay /* Allow a single tsport to have multiple frontends */ 58364fbf444SPalash Bandyopadhyay u32 num_frontends; 58464fbf444SPalash Bandyopadhyay void *port_priv; 58564fbf444SPalash Bandyopadhyay }; 586e0d3bafdSSri Deevi 587e0d3bafdSSri Deevi /* main device struct */ 588e0d3bafdSSri Deevi struct cx231xx { 589e0d3bafdSSri Deevi /* generic device properties */ 590e0d3bafdSSri Deevi char name[30]; /* name (including minor) of the device */ 591e0d3bafdSSri Deevi int model; /* index in the device_data struct */ 592e0d3bafdSSri Deevi int devno; /* marks the number of this device */ 593336fea92SMauro Carvalho Chehab struct device *dev; /* pointer to USB interface's dev */ 594e0d3bafdSSri Deevi 595e0d3bafdSSri Deevi struct cx231xx_board board; 596e0d3bafdSSri Deevi 5979ab66912SMauro Carvalho Chehab /* For I2C IR support */ 598141bb0dcSMauro Carvalho Chehab struct IR_i2c_init_data init_data; 5997528cd27SMauro Carvalho Chehab struct i2c_client *ir_i2c_client; 6009ab66912SMauro Carvalho Chehab 601e0d3bafdSSri Deevi unsigned int stream_on:1; /* Locks streams */ 602e0d3bafdSSri Deevi unsigned int vbi_stream_on:1; /* Locks streams for VBI */ 603e0d3bafdSSri Deevi unsigned int has_audio_class:1; 604e0d3bafdSSri Deevi unsigned int has_alsa_audio:1; 605e0d3bafdSSri Deevi 60677e97ba2SMauro Carvalho Chehab unsigned int i2c_scan_running:1; /* true only during i2c_scan */ 60777e97ba2SMauro Carvalho Chehab 608e0d3bafdSSri Deevi struct cx231xx_fmt *format; 609e0d3bafdSSri Deevi 610b1196126SSri Deevi struct v4l2_device v4l2_dev; 611b1196126SSri Deevi struct v4l2_subdev *sd_cx25840; 612b1196126SSri Deevi struct v4l2_subdev *sd_tuner; 613d2370f8eSHans Verkuil struct v4l2_ctrl_handler ctrl_handler; 614d2370f8eSHans Verkuil struct v4l2_ctrl_handler radio_ctrl_handler; 61588b6ffedSHans Verkuil struct cx2341x_handler mpeg_ctrl_handler; 616b1196126SSri Deevi 61761b04cb2SMauro Carvalho Chehab struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */ 61861b04cb2SMauro Carvalho Chehab atomic_t stream_started; /* stream should be running if true */ 61961b04cb2SMauro Carvalho Chehab 620e0d3bafdSSri Deevi struct list_head devlist; 621e0d3bafdSSri Deevi 622e0d3bafdSSri Deevi int tuner_type; /* type of the tuner */ 623e0d3bafdSSri Deevi int tuner_addr; /* tuner address */ 624e0d3bafdSSri Deevi 625e0d3bafdSSri Deevi /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ 626e0d3bafdSSri Deevi struct cx231xx_i2c i2c_bus[3]; 62715c212ddSMatthias Schwarzott struct i2c_adapter *i2c_mux_adap[2]; 62815c212ddSMatthias Schwarzott 629e0d3bafdSSri Deevi unsigned int xc_fw_load_done:1; 630a1f26765SMatthias Schwarzott unsigned int port_3_switch_enabled:1; 63164fbf444SPalash Bandyopadhyay /* locks */ 632e0d3bafdSSri Deevi struct mutex gpio_i2c_lock; 63364fbf444SPalash Bandyopadhyay struct mutex i2c_lock; 634e0d3bafdSSri Deevi 635e0d3bafdSSri Deevi /* video for linux */ 636e0d3bafdSSri Deevi int users; /* user count for exclusive use */ 637e0d3bafdSSri Deevi struct video_device *vdev; /* video for linux device struct */ 638e0d3bafdSSri Deevi v4l2_std_id norm; /* selected tv norm */ 639e0d3bafdSSri Deevi int ctl_freq; /* selected frequency */ 640e0d3bafdSSri Deevi unsigned int ctl_ainput; /* selected audio input */ 641e0d3bafdSSri Deevi 642e0d3bafdSSri Deevi /* frame properties */ 643e0d3bafdSSri Deevi int width; /* current frame width */ 644e0d3bafdSSri Deevi int height; /* current frame height */ 645e0d3bafdSSri Deevi int interlaced; /* 1=interlace fileds, 0=just top fileds */ 646e0d3bafdSSri Deevi 647e0d3bafdSSri Deevi struct cx231xx_audio adev; 648e0d3bafdSSri Deevi 649e0d3bafdSSri Deevi /* states */ 650e0d3bafdSSri Deevi enum cx231xx_dev_state state; 651e0d3bafdSSri Deevi 652e0d3bafdSSri Deevi struct work_struct request_module_wk; 653e0d3bafdSSri Deevi 654e0d3bafdSSri Deevi /* locks */ 655e0d3bafdSSri Deevi struct mutex lock; 656e0d3bafdSSri Deevi struct mutex ctrl_urb_lock; /* protects urb_buf */ 657e0d3bafdSSri Deevi struct list_head inqueue, outqueue; 658e0d3bafdSSri Deevi wait_queue_head_t open, wait_frame, wait_stream; 659e0d3bafdSSri Deevi struct video_device *vbi_dev; 660e0d3bafdSSri Deevi struct video_device *radio_dev; 661e0d3bafdSSri Deevi 6621d058bdcSMauro Carvalho Chehab #if defined(CONFIG_MEDIA_CONTROLLER) 6631d058bdcSMauro Carvalho Chehab struct media_device *media_dev; 664b6a40e72SMauro Carvalho Chehab struct media_pad video_pad, vbi_pad; 6651d058bdcSMauro Carvalho Chehab #endif 6661d058bdcSMauro Carvalho Chehab 667e0d3bafdSSri Deevi unsigned char eedata[256]; 668e0d3bafdSSri Deevi 669e0d3bafdSSri Deevi struct cx231xx_video_mode video_mode; 670e0d3bafdSSri Deevi struct cx231xx_video_mode vbi_mode; 671e0d3bafdSSri Deevi struct cx231xx_video_mode sliced_cc_mode; 672e0d3bafdSSri Deevi struct cx231xx_video_mode ts1_mode; 673e0d3bafdSSri Deevi 67464fbf444SPalash Bandyopadhyay atomic_t devlist_count; 67564fbf444SPalash Bandyopadhyay 676e0d3bafdSSri Deevi struct usb_device *udev; /* the usb device */ 677e0d3bafdSSri Deevi char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ 678e0d3bafdSSri Deevi 679e0d3bafdSSri Deevi /* helper funcs that call usb_control_msg */ 680e0d3bafdSSri Deevi int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, 681e0d3bafdSSri Deevi char *buf, int len); 682e0d3bafdSSri Deevi int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, 683e0d3bafdSSri Deevi char *buf, int len); 684e0d3bafdSSri Deevi int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus, 685cde4362fSMauro Carvalho Chehab struct cx231xx_i2c_xfer_data *req_data); 68684b5dbf3SMauro Carvalho Chehab int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr, 68784b5dbf3SMauro Carvalho Chehab u8 *buf, u8 len); 68884b5dbf3SMauro Carvalho Chehab int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr, 68984b5dbf3SMauro Carvalho Chehab u8 *buf, u8 len); 690e0d3bafdSSri Deevi 691e0d3bafdSSri Deevi int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq); 692e0d3bafdSSri Deevi int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev); 693e0d3bafdSSri Deevi 694e0d3bafdSSri Deevi enum cx231xx_mode mode; 695e0d3bafdSSri Deevi 696e0d3bafdSSri Deevi struct cx231xx_dvb *dvb; 697e0d3bafdSSri Deevi 698e0d3bafdSSri Deevi /* Cx231xx supported PCB config's */ 699e0d3bafdSSri Deevi struct pcb_config current_pcb_config; 700e0d3bafdSSri Deevi u8 current_scenario_idx; 701e0d3bafdSSri Deevi u8 interface_count; 702e0d3bafdSSri Deevi u8 max_iad_interface_count; 703e0d3bafdSSri Deevi 704e0d3bafdSSri Deevi /* GPIO related register direction and values */ 705e0d3bafdSSri Deevi u32 gpio_dir; 706e0d3bafdSSri Deevi u32 gpio_val; 707e0d3bafdSSri Deevi 708e0d3bafdSSri Deevi /* Power Modes */ 709e0d3bafdSSri Deevi int power_mode; 710e0d3bafdSSri Deevi 711ecc67d10SSri Deevi /* afe parameters */ 712ecc67d10SSri Deevi enum AFE_MODE afe_mode; 713ecc67d10SSri Deevi u32 afe_ref_count; 714e0d3bafdSSri Deevi 715e0d3bafdSSri Deevi /* video related parameters */ 716e0d3bafdSSri Deevi u32 video_input; 717e0d3bafdSSri Deevi u32 active_mode; 718e0d3bafdSSri Deevi u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */ 719e0d3bafdSSri Deevi enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */ 720e0d3bafdSSri Deevi 72164fbf444SPalash Bandyopadhyay /*mode: digital=1 or analog=0*/ 72264fbf444SPalash Bandyopadhyay u8 mode_tv; 72364fbf444SPalash Bandyopadhyay 72464fbf444SPalash Bandyopadhyay u8 USE_ISO; 72564fbf444SPalash Bandyopadhyay struct cx231xx_tvnorm encodernorm; 72664fbf444SPalash Bandyopadhyay struct cx231xx_tsport ts1, ts2; 72764fbf444SPalash Bandyopadhyay struct video_device *v4l_device; 72864fbf444SPalash Bandyopadhyay atomic_t v4l_reader_count; 72964fbf444SPalash Bandyopadhyay u32 freq; 73064fbf444SPalash Bandyopadhyay unsigned int input; 73164fbf444SPalash Bandyopadhyay u32 cx23417_mailbox; 73264fbf444SPalash Bandyopadhyay u32 __iomem *lmmio; 73364fbf444SPalash Bandyopadhyay u8 __iomem *bmmio; 734e0d3bafdSSri Deevi }; 735e0d3bafdSSri Deevi 73664fbf444SPalash Bandyopadhyay extern struct list_head cx231xx_devlist; 73764fbf444SPalash Bandyopadhyay 738b1196126SSri Deevi #define cx25840_call(cx231xx, o, f, args...) \ 739b1196126SSri Deevi v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args) 740b1196126SSri Deevi #define tuner_call(cx231xx, o, f, args...) \ 741b1196126SSri Deevi v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args) 742b1196126SSri Deevi #define call_all(dev, o, f, args...) \ 743b1196126SSri Deevi v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args) 744b1196126SSri Deevi 745e0d3bafdSSri Deevi struct cx231xx_ops { 746e0d3bafdSSri Deevi struct list_head next; 747e0d3bafdSSri Deevi char *name; 748e0d3bafdSSri Deevi int id; 749e0d3bafdSSri Deevi int (*init) (struct cx231xx *); 750e0d3bafdSSri Deevi int (*fini) (struct cx231xx *); 751e0d3bafdSSri Deevi }; 752e0d3bafdSSri Deevi 753e0d3bafdSSri Deevi /* call back functions in dvb module */ 754e0d3bafdSSri Deevi int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq); 755e0d3bafdSSri Deevi int cx231xx_reset_analog_tuner(struct cx231xx *dev); 756e0d3bafdSSri Deevi 757e0d3bafdSSri Deevi /* Provided by cx231xx-i2c.c */ 7587c894a3bSMatthias Schwarzott void cx231xx_do_i2c_scan(struct cx231xx *dev, int i2c_port); 759e0d3bafdSSri Deevi int cx231xx_i2c_register(struct cx231xx_i2c *bus); 760e0d3bafdSSri Deevi int cx231xx_i2c_unregister(struct cx231xx_i2c *bus); 76115c212ddSMatthias Schwarzott int cx231xx_i2c_mux_register(struct cx231xx *dev, int mux_no); 76215c212ddSMatthias Schwarzott void cx231xx_i2c_mux_unregister(struct cx231xx *dev, int mux_no); 763c3c3f1aeSMatthias Schwarzott struct i2c_adapter *cx231xx_get_i2c_adap(struct cx231xx *dev, int i2c_port); 764e0d3bafdSSri Deevi 765e0d3bafdSSri Deevi /* Internal block control functions */ 76664fbf444SPalash Bandyopadhyay int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, 76764fbf444SPalash Bandyopadhyay u8 saddr_len, u32 *data, u8 data_len, int master); 76864fbf444SPalash Bandyopadhyay int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, 76964fbf444SPalash Bandyopadhyay u8 saddr_len, u32 data, u8 data_len, int master); 770e0d3bafdSSri Deevi int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, 771e0d3bafdSSri Deevi u16 saddr, u8 saddr_len, u32 *data, u8 data_len); 772e0d3bafdSSri Deevi int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, 773e0d3bafdSSri Deevi u16 saddr, u8 saddr_len, u32 data, u8 data_len); 77484b5dbf3SMauro Carvalho Chehab int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, 77584b5dbf3SMauro Carvalho Chehab u16 register_address, u8 bit_start, u8 bit_end, 77684b5dbf3SMauro Carvalho Chehab u32 value); 777e0d3bafdSSri Deevi int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, 778e0d3bafdSSri Deevi u16 saddr, u32 mask, u32 value); 779e0d3bafdSSri Deevi u32 cx231xx_set_field(u32 field_mask, u32 data); 780e0d3bafdSSri Deevi 78164fbf444SPalash Bandyopadhyay /*verve r/w*/ 78264fbf444SPalash Bandyopadhyay void initGPIO(struct cx231xx *dev); 78364fbf444SPalash Bandyopadhyay void uninitGPIO(struct cx231xx *dev); 784ecc67d10SSri Deevi /* afe related functions */ 785ecc67d10SSri Deevi int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count); 786ecc67d10SSri Deevi int cx231xx_afe_init_channels(struct cx231xx *dev); 787ecc67d10SSri Deevi int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev); 788ecc67d10SSri Deevi int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux); 789ecc67d10SSri Deevi int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode); 790ecc67d10SSri Deevi int cx231xx_afe_update_power_control(struct cx231xx *dev, 7916e4f574bSSri Deevi enum AV_MODE avmode); 792ecc67d10SSri Deevi int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input); 793e0d3bafdSSri Deevi 794ecc67d10SSri Deevi /* i2s block related functions */ 795ecc67d10SSri Deevi int cx231xx_i2s_blk_initialize(struct cx231xx *dev); 796ecc67d10SSri Deevi int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev, 7976e4f574bSSri Deevi enum AV_MODE avmode); 798ecc67d10SSri Deevi int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input); 799e0d3bafdSSri Deevi 800e0d3bafdSSri Deevi /* DIF related functions */ 801e0d3bafdSSri Deevi int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, 802e0d3bafdSSri Deevi u32 function_mode, u32 standard); 80364fbf444SPalash Bandyopadhyay void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq, 80464fbf444SPalash Bandyopadhyay u8 spectral_invert, u32 mode); 80564fbf444SPalash Bandyopadhyay u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd); 80664fbf444SPalash Bandyopadhyay void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq, 80764fbf444SPalash Bandyopadhyay u8 spectral_invert, u32 mode); 80864fbf444SPalash Bandyopadhyay void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev); 80964fbf444SPalash Bandyopadhyay void reset_s5h1432_demod(struct cx231xx *dev); 81064fbf444SPalash Bandyopadhyay void cx231xx_dump_HH_reg(struct cx231xx *dev); 81164fbf444SPalash Bandyopadhyay void update_HH_register_after_set_DIF(struct cx231xx *dev); 81264fbf444SPalash Bandyopadhyay 81364fbf444SPalash Bandyopadhyay 81464fbf444SPalash Bandyopadhyay 815e0d3bafdSSri Deevi int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard); 816e0d3bafdSSri Deevi int cx231xx_tuner_pre_channel_change(struct cx231xx *dev); 817e0d3bafdSSri Deevi int cx231xx_tuner_post_channel_change(struct cx231xx *dev); 818e0d3bafdSSri Deevi 819e0d3bafdSSri Deevi /* video parser functions */ 82084b5dbf3SMauro Carvalho Chehab u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, 82184b5dbf3SMauro Carvalho Chehab u32 *p_bytes_used); 82284b5dbf3SMauro Carvalho Chehab u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf, 82384b5dbf3SMauro Carvalho Chehab u32 *p_bytes_used); 824e0d3bafdSSri Deevi int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 825e0d3bafdSSri Deevi u8 *p_buffer, u32 bytes_to_copy); 82684b5dbf3SMauro Carvalho Chehab void cx231xx_reset_video_buffer(struct cx231xx *dev, 82784b5dbf3SMauro Carvalho Chehab struct cx231xx_dmaqueue *dma_q); 828e0d3bafdSSri Deevi u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q); 829e0d3bafdSSri Deevi u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 830e0d3bafdSSri Deevi u8 *p_line, u32 length, int field_number); 831e0d3bafdSSri Deevi u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, 832e0d3bafdSSri Deevi u8 sav_eav, u8 *p_buffer, u32 buffer_size); 833e0d3bafdSSri Deevi void cx231xx_swab(u16 *from, u16 *to, u16 len); 834e0d3bafdSSri Deevi 835e0d3bafdSSri Deevi /* Provided by cx231xx-core.c */ 836e0d3bafdSSri Deevi 837e0d3bafdSSri Deevi u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count); 838e0d3bafdSSri Deevi void cx231xx_queue_unusedframes(struct cx231xx *dev); 839e0d3bafdSSri Deevi void cx231xx_release_buffers(struct cx231xx *dev); 840e0d3bafdSSri Deevi 841e0d3bafdSSri Deevi /* read from control pipe */ 842e0d3bafdSSri Deevi int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, 843e0d3bafdSSri Deevi char *buf, int len); 844e0d3bafdSSri Deevi 845e0d3bafdSSri Deevi /* write to control pipe */ 846e0d3bafdSSri Deevi int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, 847e0d3bafdSSri Deevi char *buf, int len); 848e0d3bafdSSri Deevi int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode); 849e0d3bafdSSri Deevi 850b9255176SSri Deevi int cx231xx_send_vendor_cmd(struct cx231xx *dev, 851b9255176SSri Deevi struct VENDOR_REQUEST_IN *ven_req); 852e0d3bafdSSri Deevi int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, 853e0d3bafdSSri Deevi struct cx231xx_i2c_xfer_data *req_data); 854e0d3bafdSSri Deevi 855e0d3bafdSSri Deevi /* Gpio related functions */ 856e0d3bafdSSri Deevi int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, 857e0d3bafdSSri Deevi u8 len, u8 request, u8 direction); 858e0d3bafdSSri Deevi int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value); 85984b5dbf3SMauro Carvalho Chehab int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, 86084b5dbf3SMauro Carvalho Chehab int pin_value); 861e0d3bafdSSri Deevi 862e0d3bafdSSri Deevi int cx231xx_gpio_i2c_start(struct cx231xx *dev); 863e0d3bafdSSri Deevi int cx231xx_gpio_i2c_end(struct cx231xx *dev); 864e0d3bafdSSri Deevi int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data); 865e0d3bafdSSri Deevi int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf); 866e0d3bafdSSri Deevi int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev); 867e0d3bafdSSri Deevi int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev); 868e0d3bafdSSri Deevi int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev); 869e0d3bafdSSri Deevi 870e0d3bafdSSri Deevi int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); 871e0d3bafdSSri Deevi int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); 872e0d3bafdSSri Deevi 873e0d3bafdSSri Deevi /* audio related functions */ 87484b5dbf3SMauro Carvalho Chehab int cx231xx_set_audio_decoder_input(struct cx231xx *dev, 87584b5dbf3SMauro Carvalho Chehab enum AUDIO_INPUT audio_input); 876e0d3bafdSSri Deevi 877e0d3bafdSSri Deevi int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type); 878e0d3bafdSSri Deevi int cx231xx_set_video_alternate(struct cx231xx *dev); 879e0d3bafdSSri Deevi int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt); 88064fbf444SPalash Bandyopadhyay int is_fw_load(struct cx231xx *dev); 88164fbf444SPalash Bandyopadhyay int cx231xx_check_fw(struct cx231xx *dev); 882e0d3bafdSSri Deevi int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, 883e0d3bafdSSri Deevi int num_bufs, int max_pkt_size, 88484b5dbf3SMauro Carvalho Chehab int (*isoc_copy) (struct cx231xx *dev, 88584b5dbf3SMauro Carvalho Chehab struct urb *urb)); 88664fbf444SPalash Bandyopadhyay int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, 88764fbf444SPalash Bandyopadhyay int num_bufs, int max_pkt_size, 88864fbf444SPalash Bandyopadhyay int (*bulk_copy) (struct cx231xx *dev, 88964fbf444SPalash Bandyopadhyay struct urb *urb)); 89064fbf444SPalash Bandyopadhyay void cx231xx_stop_TS1(struct cx231xx *dev); 89164fbf444SPalash Bandyopadhyay void cx231xx_start_TS1(struct cx231xx *dev); 892e0d3bafdSSri Deevi void cx231xx_uninit_isoc(struct cx231xx *dev); 89364fbf444SPalash Bandyopadhyay void cx231xx_uninit_bulk(struct cx231xx *dev); 894e0d3bafdSSri Deevi int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode); 89564fbf444SPalash Bandyopadhyay int cx231xx_unmute_audio(struct cx231xx *dev); 89664fbf444SPalash Bandyopadhyay int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size); 89764fbf444SPalash Bandyopadhyay void cx231xx_disable656(struct cx231xx *dev); 89864fbf444SPalash Bandyopadhyay void cx231xx_enable656(struct cx231xx *dev); 89964fbf444SPalash Bandyopadhyay int cx231xx_demod_reset(struct cx231xx *dev); 900e0d3bafdSSri Deevi int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio); 901e0d3bafdSSri Deevi 902e0d3bafdSSri Deevi /* Device list functions */ 903e0d3bafdSSri Deevi void cx231xx_release_resources(struct cx231xx *dev); 904e0d3bafdSSri Deevi void cx231xx_release_analog_resources(struct cx231xx *dev); 905e0d3bafdSSri Deevi int cx231xx_register_analog_devices(struct cx231xx *dev); 906e0d3bafdSSri Deevi void cx231xx_remove_from_devlist(struct cx231xx *dev); 907e0d3bafdSSri Deevi void cx231xx_add_into_devlist(struct cx231xx *dev); 908e0d3bafdSSri Deevi void cx231xx_init_extension(struct cx231xx *dev); 909e0d3bafdSSri Deevi void cx231xx_close_extension(struct cx231xx *dev); 910e0d3bafdSSri Deevi 911e0d3bafdSSri Deevi /* hardware init functions */ 912e0d3bafdSSri Deevi int cx231xx_dev_init(struct cx231xx *dev); 913e0d3bafdSSri Deevi void cx231xx_dev_uninit(struct cx231xx *dev); 914e0d3bafdSSri Deevi void cx231xx_config_i2c(struct cx231xx *dev); 915e0d3bafdSSri Deevi int cx231xx_config(struct cx231xx *dev); 916e0d3bafdSSri Deevi 917e0d3bafdSSri Deevi /* Stream control functions */ 918e0d3bafdSSri Deevi int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask); 919e0d3bafdSSri Deevi int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask); 920e0d3bafdSSri Deevi 921e0d3bafdSSri Deevi int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type); 922e0d3bafdSSri Deevi 923e0d3bafdSSri Deevi /* Power control functions */ 9246e4f574bSSri Deevi int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode); 925e0d3bafdSSri Deevi int cx231xx_power_suspend(struct cx231xx *dev); 926e0d3bafdSSri Deevi 927e0d3bafdSSri Deevi /* chip specific control functions */ 928e0d3bafdSSri Deevi int cx231xx_init_ctrl_pin_status(struct cx231xx *dev); 92984b5dbf3SMauro Carvalho Chehab int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, 93084b5dbf3SMauro Carvalho Chehab u8 analog_or_digital); 931a6f6fb9cSMauro Carvalho Chehab int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3); 932e0d3bafdSSri Deevi 933e0d3bafdSSri Deevi /* video audio decoder related functions */ 934e0d3bafdSSri Deevi void video_mux(struct cx231xx *dev, int index); 935e0d3bafdSSri Deevi int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input); 936e0d3bafdSSri Deevi int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input); 937e0d3bafdSSri Deevi int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev); 938e0d3bafdSSri Deevi int cx231xx_set_audio_input(struct cx231xx *dev, u8 input); 939e0d3bafdSSri Deevi 940e0d3bafdSSri Deevi /* Provided by cx231xx-video.c */ 941e0d3bafdSSri Deevi int cx231xx_register_extension(struct cx231xx_ops *dev); 942e0d3bafdSSri Deevi void cx231xx_unregister_extension(struct cx231xx_ops *dev); 943e0d3bafdSSri Deevi void cx231xx_init_extension(struct cx231xx *dev); 944e0d3bafdSSri Deevi void cx231xx_close_extension(struct cx231xx *dev); 945bc08734cSHans Verkuil int cx231xx_querycap(struct file *file, void *priv, 946bc08734cSHans Verkuil struct v4l2_capability *cap); 947b86d1544SHans Verkuil int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t); 9482f73c7c5SHans Verkuil int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t); 949b86d1544SHans Verkuil int cx231xx_g_frequency(struct file *file, void *priv, 950b86d1544SHans Verkuil struct v4l2_frequency *f); 951b86d1544SHans Verkuil int cx231xx_s_frequency(struct file *file, void *priv, 952b530a447SHans Verkuil const struct v4l2_frequency *f); 953b86d1544SHans Verkuil int cx231xx_enum_input(struct file *file, void *priv, 954b86d1544SHans Verkuil struct v4l2_input *i); 955b86d1544SHans Verkuil int cx231xx_g_input(struct file *file, void *priv, unsigned int *i); 956b86d1544SHans Verkuil int cx231xx_s_input(struct file *file, void *priv, unsigned int i); 95708fe9f7dSHans Verkuil int cx231xx_g_chip_info(struct file *file, void *fh, struct v4l2_dbg_chip_info *chip); 958b86d1544SHans Verkuil int cx231xx_g_register(struct file *file, void *priv, 959b86d1544SHans Verkuil struct v4l2_dbg_register *reg); 960b86d1544SHans Verkuil int cx231xx_s_register(struct file *file, void *priv, 961977ba3b1SHans Verkuil const struct v4l2_dbg_register *reg); 962e0d3bafdSSri Deevi 963e0d3bafdSSri Deevi /* Provided by cx231xx-cards.c */ 964e0d3bafdSSri Deevi extern void cx231xx_pre_card_setup(struct cx231xx *dev); 965e0d3bafdSSri Deevi extern void cx231xx_card_setup(struct cx231xx *dev); 966e0d3bafdSSri Deevi extern struct cx231xx_board cx231xx_boards[]; 967e0d3bafdSSri Deevi extern struct usb_device_id cx231xx_id_table[]; 968e0d3bafdSSri Deevi extern const unsigned int cx231xx_bcount; 969e0d3bafdSSri Deevi int cx231xx_tuner_callback(void *ptr, int component, int command, int arg); 970e0d3bafdSSri Deevi 97164fbf444SPalash Bandyopadhyay /* cx23885-417.c */ 97264fbf444SPalash Bandyopadhyay extern int cx231xx_417_register(struct cx231xx *dev); 97364fbf444SPalash Bandyopadhyay extern void cx231xx_417_unregister(struct cx231xx *dev); 97464fbf444SPalash Bandyopadhyay 9759ab66912SMauro Carvalho Chehab /* cx23885-input.c */ 9769ab66912SMauro Carvalho Chehab 9779ab66912SMauro Carvalho Chehab #if defined(CONFIG_VIDEO_CX231XX_RC) 9789ab66912SMauro Carvalho Chehab int cx231xx_ir_init(struct cx231xx *dev); 9799ab66912SMauro Carvalho Chehab void cx231xx_ir_exit(struct cx231xx *dev); 9809ab66912SMauro Carvalho Chehab #else 9819ab66912SMauro Carvalho Chehab #define cx231xx_ir_init(dev) (0) 9829ab66912SMauro Carvalho Chehab #define cx231xx_ir_exit(dev) (0) 9839ab66912SMauro Carvalho Chehab #endif 9849ab66912SMauro Carvalho Chehab 985e0d3bafdSSri Deevi static inline unsigned int norm_maxw(struct cx231xx *dev) 986e0d3bafdSSri Deevi { 987e0d3bafdSSri Deevi if (dev->board.max_range_640_480) 988e0d3bafdSSri Deevi return 640; 989e0d3bafdSSri Deevi else 990e0d3bafdSSri Deevi return 720; 991e0d3bafdSSri Deevi } 992e0d3bafdSSri Deevi 993e0d3bafdSSri Deevi static inline unsigned int norm_maxh(struct cx231xx *dev) 994e0d3bafdSSri Deevi { 995e0d3bafdSSri Deevi if (dev->board.max_range_640_480) 996e0d3bafdSSri Deevi return 480; 997e0d3bafdSSri Deevi else 998e0d3bafdSSri Deevi return (dev->norm & V4L2_STD_625_50) ? 576 : 480; 999e0d3bafdSSri Deevi } 1000e0d3bafdSSri Deevi #endif 1001