xref: /linux/drivers/media/usb/cx231xx/cx231xx.h (revision c771600c6af14749609b49565ffb4cac2959710d)
174ba9207SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
2e0d3bafdSSri Deevi /*
3e0d3bafdSSri Deevi    cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices
4e0d3bafdSSri Deevi 
5e0d3bafdSSri Deevi    Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
6e0d3bafdSSri Deevi 	Based on em28xx driver
7e0d3bafdSSri Deevi 
8e0d3bafdSSri Deevi  */
9e0d3bafdSSri Deevi 
10e0d3bafdSSri Deevi #ifndef _CX231XX_H
11e0d3bafdSSri Deevi #define _CX231XX_H
12e0d3bafdSSri Deevi 
13e0d3bafdSSri Deevi #include <linux/videodev2.h>
14b1196126SSri Deevi #include <linux/types.h>
15b1196126SSri Deevi #include <linux/ioctl.h>
16e0d3bafdSSri Deevi #include <linux/i2c.h>
1761b04cb2SMauro Carvalho Chehab #include <linux/workqueue.h>
18e0d3bafdSSri Deevi #include <linux/mutex.h>
19b7085c08SMauro Carvalho Chehab #include <linux/usb.h>
20b1196126SSri Deevi 
21d647f0b7SMauro Carvalho Chehab #include <media/drv-intf/cx2341x.h>
22b1196126SSri Deevi 
237c617138SHans Verkuil #include <media/videobuf2-vmalloc.h>
24b1196126SSri Deevi #include <media/v4l2-device.h>
25d2370f8eSHans Verkuil #include <media/v4l2-ctrls.h>
261d08a4faSHans Verkuil #include <media/v4l2-fh.h>
276bda9644SMauro Carvalho Chehab #include <media/rc-core.h>
28b5dcee22SMauro Carvalho Chehab #include <media/i2c/ir-kbd-i2c.h>
29e0d3bafdSSri Deevi 
30e0d3bafdSSri Deevi #include "cx231xx-reg.h"
316e4f574bSSri Deevi #include "cx231xx-pcb-cfg.h"
32e0d3bafdSSri Deevi #include "cx231xx-conf-reg.h"
33e0d3bafdSSri Deevi 
34e0d3bafdSSri Deevi #define DRIVER_NAME                     "cx231xx"
3544ecf1dfSDevin Heitmueller #define PWR_SLEEP_INTERVAL              10
36e0d3bafdSSri Deevi 
37e0d3bafdSSri Deevi /* I2C addresses for control block in Cx231xx */
38ecc67d10SSri Deevi #define     AFE_DEVICE_ADDRESS		0x60
39ecc67d10SSri Deevi #define     I2S_BLK_DEVICE_ADDRESS	0x98
40ecc67d10SSri Deevi #define     VID_BLK_I2C_ADDRESS		0x88
4164fbf444SPalash Bandyopadhyay #define     VERVE_I2C_ADDRESS           0x40
42e0d3bafdSSri Deevi #define     DIF_USE_BASEBAND            0xFFFFFFFF
43e0d3bafdSSri Deevi 
44e0d3bafdSSri Deevi /* Boards supported by driver */
45e0d3bafdSSri Deevi #define CX231XX_BOARD_UNKNOWN		    0
4664fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_CARRAERA	1
4764fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_SHELBY	2
4864fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_RDE_253S	3
4964fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_RDU_253S	4
5064fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_VIDEO_GRABBER	5
5164fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_RDE_250	6
5264fbf444SPalash Bandyopadhyay #define CX231XX_BOARD_CNXT_RDU_250	7
531a50fddeSMichael Krufky #define CX231XX_BOARD_HAUPPAUGE_EXETER  8
544270c3caSDevin Heitmueller #define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9
559417bc6dSMauro Carvalho Chehab #define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10
564e105039SMauro Carvalho Chehab #define CX231XX_BOARD_PV_XCAPTURE_USB 11
57eeaaf817SMárcio Alves #define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12
582a7b6a40SIgor Novgorodov #define CX231XX_BOARD_ICONBIT_U100 13
59de8ae0d5SPeter Moon #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14
60de8ae0d5SPeter Moon #define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15
6168c97bf3SAlf Høgemark #define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16
623ead1ba3SMatt Gomboc #define CX231XX_BOARD_OTG102 17
638b1255a2SJohannes Erdfelt #define CX231XX_BOARD_KWORLD_UB445_USB_HYBRID 18
64dd2e7dd2SMatthias Schwarzott #define CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx 19
659e49f7c3SMatthias Schwarzott #define CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx 20
66809abdbfSOlli Salonen #define CX231XX_BOARD_HAUPPAUGE_955Q 21
67eee1d06dSTommi Rantala #define CX231XX_BOARD_TERRATEC_GRABBY 22
68a096fd64SOleh Kravchenko #define CX231XX_BOARD_EVROMEDIA_FULL_HYBRID_FULLHD 23
690f42b331SOleh Kravchenko #define CX231XX_BOARD_ASTROMETA_T2HYBRID 24
70fdda0109SRomain Reignier #define CX231XX_BOARD_THE_IMAGING_SOURCE_DFG_USB2_PRO 25
71c5bef50eSBrad Love #define CX231XX_BOARD_HAUPPAUGE_935C 26
7219fbf1baSBrad Love #define CX231XX_BOARD_HAUPPAUGE_975 27
73e0d3bafdSSri Deevi 
74e0d3bafdSSri Deevi /* Limits minimum and default number of buffers */
75e0d3bafdSSri Deevi #define CX231XX_MIN_BUF                 4
76e0d3bafdSSri Deevi #define CX231XX_DEF_BUF                 12
77e0d3bafdSSri Deevi #define CX231XX_DEF_VBI_BUF             6
78e0d3bafdSSri Deevi 
79e0d3bafdSSri Deevi #define VBI_LINE_COUNT                  17
80e0d3bafdSSri Deevi #define VBI_LINE_LENGTH                 1440
81e0d3bafdSSri Deevi 
82e0d3bafdSSri Deevi /*Limits the max URB message size */
83e0d3bafdSSri Deevi #define URB_MAX_CTRL_SIZE               80
84e0d3bafdSSri Deevi 
85e0d3bafdSSri Deevi /* Params for validated field */
86e0d3bafdSSri Deevi #define CX231XX_BOARD_NOT_VALIDATED     1
87e0d3bafdSSri Deevi #define CX231XX_BOARD_VALIDATED		0
88e0d3bafdSSri Deevi 
89e0d3bafdSSri Deevi /* maximum number of cx231xx boards */
90e0d3bafdSSri Deevi #define CX231XX_MAXBOARDS               8
91e0d3bafdSSri Deevi 
92e0d3bafdSSri Deevi /* maximum number of frames that can be queued */
93e0d3bafdSSri Deevi #define CX231XX_NUM_FRAMES              5
94e0d3bafdSSri Deevi 
95e0d3bafdSSri Deevi /* number of buffers for isoc transfers */
96e0d3bafdSSri Deevi #define CX231XX_NUM_BUFS                8
97e0d3bafdSSri Deevi 
98e0d3bafdSSri Deevi /* number of packets for each buffer
99e0d3bafdSSri Deevi    windows requests only 40 packets .. so we better do the same
100e0d3bafdSSri Deevi    this is what I found out for all alternate numbers there!
101e0d3bafdSSri Deevi  */
102e0d3bafdSSri Deevi #define CX231XX_NUM_PACKETS             40
103e0d3bafdSSri Deevi 
104e0d3bafdSSri Deevi /* default alternate; 0 means choose the best */
105e0d3bafdSSri Deevi #define CX231XX_PINOUT                  0
106e0d3bafdSSri Deevi 
107e0d3bafdSSri Deevi #define CX231XX_INTERLACED_DEFAULT      1
108e0d3bafdSSri Deevi 
109e0d3bafdSSri Deevi /* time to wait when stopping the isoc transfer */
110b9255176SSri Deevi #define CX231XX_URB_TIMEOUT		\
111b9255176SSri Deevi 		msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS)
112e0d3bafdSSri Deevi 
11364fbf444SPalash Bandyopadhyay #define CX231xx_NORMS (\
11464fbf444SPalash Bandyopadhyay 	V4L2_STD_NTSC_M |  V4L2_STD_NTSC_M_JP |  V4L2_STD_NTSC_443 | \
11564fbf444SPalash Bandyopadhyay 	V4L2_STD_PAL_BG |  V4L2_STD_PAL_DK    |  V4L2_STD_PAL_I    | \
11664fbf444SPalash Bandyopadhyay 	V4L2_STD_PAL_M  |  V4L2_STD_PAL_N     |  V4L2_STD_PAL_Nc   | \
11764fbf444SPalash Bandyopadhyay 	V4L2_STD_PAL_60 |  V4L2_STD_SECAM_L   |  V4L2_STD_SECAM_DK)
11864fbf444SPalash Bandyopadhyay 
11964fbf444SPalash Bandyopadhyay #define SLEEP_S5H1432    30
12064fbf444SPalash Bandyopadhyay #define CX23417_OSC_EN   8
12164fbf444SPalash Bandyopadhyay #define CX23417_RESET    9
12264fbf444SPalash Bandyopadhyay 
1232b651ba6SJinjie Ruan #define EP5_BUF_SIZE     4096
1242b651ba6SJinjie Ruan #define EP5_TIMEOUT_MS   2000
1252b651ba6SJinjie Ruan 
12664fbf444SPalash Bandyopadhyay struct cx23417_fmt {
12764fbf444SPalash Bandyopadhyay 	u32   fourcc;          /* v4l2 format id */
12864fbf444SPalash Bandyopadhyay 	int   depth;
12964fbf444SPalash Bandyopadhyay 	int   flags;
13064fbf444SPalash Bandyopadhyay 	u32   cxformat;
13164fbf444SPalash Bandyopadhyay };
132e0d3bafdSSri Deevi enum cx231xx_mode {
133e0d3bafdSSri Deevi 	CX231XX_SUSPEND,
134e0d3bafdSSri Deevi 	CX231XX_ANALOG_MODE,
135e0d3bafdSSri Deevi 	CX231XX_DIGITAL_MODE,
136e0d3bafdSSri Deevi };
137e0d3bafdSSri Deevi 
138e0d3bafdSSri Deevi enum cx231xx_std_mode {
139e0d3bafdSSri Deevi 	CX231XX_TV_AIR = 0,
140e0d3bafdSSri Deevi 	CX231XX_TV_CABLE
141e0d3bafdSSri Deevi };
142e0d3bafdSSri Deevi 
143e0d3bafdSSri Deevi enum cx231xx_stream_state {
144e0d3bafdSSri Deevi 	STREAM_OFF,
145e0d3bafdSSri Deevi 	STREAM_INTERRUPT,
146e0d3bafdSSri Deevi 	STREAM_ON,
147e0d3bafdSSri Deevi };
148e0d3bafdSSri Deevi 
149e0d3bafdSSri Deevi struct cx231xx;
150e0d3bafdSSri Deevi 
15164fbf444SPalash Bandyopadhyay struct cx231xx_isoc_ctl {
152e0d3bafdSSri Deevi 	/* max packet size of isoc transaction */
153e0d3bafdSSri Deevi 	int max_pkt_size;
154e0d3bafdSSri Deevi 
155e0d3bafdSSri Deevi 	/* number of allocated urbs */
156e0d3bafdSSri Deevi 	int num_bufs;
157e0d3bafdSSri Deevi 
158e0d3bafdSSri Deevi 	/* urb for isoc transfers */
159e0d3bafdSSri Deevi 	struct urb **urb;
160e0d3bafdSSri Deevi 
161e0d3bafdSSri Deevi 	/* transfer buffers for isoc transfer */
162e0d3bafdSSri Deevi 	char **transfer_buffer;
163e0d3bafdSSri Deevi 
164e0d3bafdSSri Deevi 	/* Last buffer command and region */
165e0d3bafdSSri Deevi 	u8 cmd;
166e0d3bafdSSri Deevi 	int pos, size, pktsize;
167e0d3bafdSSri Deevi 
168e0d3bafdSSri Deevi 	/* Last field: ODD or EVEN? */
169e0d3bafdSSri Deevi 	int field;
170e0d3bafdSSri Deevi 
171e0d3bafdSSri Deevi 	/* Stores incomplete commands */
172e0d3bafdSSri Deevi 	u32 tmp_buf;
173e0d3bafdSSri Deevi 	int tmp_buf_len;
174e0d3bafdSSri Deevi 
175e0d3bafdSSri Deevi 	/* Stores already requested buffers */
176e0d3bafdSSri Deevi 	struct cx231xx_buffer *buf;
177e0d3bafdSSri Deevi 
178e0d3bafdSSri Deevi 	/* Stores the number of received fields */
179e0d3bafdSSri Deevi 	int nfields;
180e0d3bafdSSri Deevi 
181e0d3bafdSSri Deevi 	/* isoc urb callback */
182e0d3bafdSSri Deevi 	int (*isoc_copy) (struct cx231xx *dev, struct urb *urb);
183e0d3bafdSSri Deevi };
184e0d3bafdSSri Deevi 
18564fbf444SPalash Bandyopadhyay struct cx231xx_bulk_ctl {
18664fbf444SPalash Bandyopadhyay 	/* max packet size of bulk transaction */
18764fbf444SPalash Bandyopadhyay 	int max_pkt_size;
18864fbf444SPalash Bandyopadhyay 
18964fbf444SPalash Bandyopadhyay 	/* number of allocated urbs */
19064fbf444SPalash Bandyopadhyay 	int num_bufs;
19164fbf444SPalash Bandyopadhyay 
19264fbf444SPalash Bandyopadhyay 	/* urb for bulk transfers */
19364fbf444SPalash Bandyopadhyay 	struct urb **urb;
19464fbf444SPalash Bandyopadhyay 
19564fbf444SPalash Bandyopadhyay 	/* transfer buffers for bulk transfer */
19664fbf444SPalash Bandyopadhyay 	char **transfer_buffer;
19764fbf444SPalash Bandyopadhyay 
19864fbf444SPalash Bandyopadhyay 	/* Last buffer command and region */
19964fbf444SPalash Bandyopadhyay 	u8 cmd;
20064fbf444SPalash Bandyopadhyay 	int pos, size, pktsize;
20164fbf444SPalash Bandyopadhyay 
20264fbf444SPalash Bandyopadhyay 	/* Last field: ODD or EVEN? */
20364fbf444SPalash Bandyopadhyay 	int field;
20464fbf444SPalash Bandyopadhyay 
20564fbf444SPalash Bandyopadhyay 	/* Stores incomplete commands */
20664fbf444SPalash Bandyopadhyay 	u32 tmp_buf;
20764fbf444SPalash Bandyopadhyay 	int tmp_buf_len;
20864fbf444SPalash Bandyopadhyay 
20964fbf444SPalash Bandyopadhyay 	/* Stores already requested buffers */
21064fbf444SPalash Bandyopadhyay 	struct cx231xx_buffer *buf;
21164fbf444SPalash Bandyopadhyay 
21264fbf444SPalash Bandyopadhyay 	/* Stores the number of received fields */
21364fbf444SPalash Bandyopadhyay 	int nfields;
21464fbf444SPalash Bandyopadhyay 
21564fbf444SPalash Bandyopadhyay 	/* bulk urb callback */
21664fbf444SPalash Bandyopadhyay 	int (*bulk_copy) (struct cx231xx *dev, struct urb *urb);
21764fbf444SPalash Bandyopadhyay };
21864fbf444SPalash Bandyopadhyay 
219e0d3bafdSSri Deevi struct cx231xx_fmt {
220e0d3bafdSSri Deevi 	char *name;
221e0d3bafdSSri Deevi 	u32 fourcc;		/* v4l2 format id */
222e0d3bafdSSri Deevi 	int depth;
223e0d3bafdSSri Deevi 	int reg;
224e0d3bafdSSri Deevi };
225e0d3bafdSSri Deevi 
226e0d3bafdSSri Deevi /* buffer for one video frame */
227e0d3bafdSSri Deevi struct cx231xx_buffer {
228e0d3bafdSSri Deevi 	/* common v4l buffer stuff -- must be first */
2297c617138SHans Verkuil 	struct vb2_v4l2_buffer vb;
2307c617138SHans Verkuil 	struct list_head list;
231e0d3bafdSSri Deevi 	struct list_head frame;
232e0d3bafdSSri Deevi 	int top_field;
233e0d3bafdSSri Deevi 	int receiving;
234e0d3bafdSSri Deevi };
235e0d3bafdSSri Deevi 
23664fbf444SPalash Bandyopadhyay enum ps_package_head {
23764fbf444SPalash Bandyopadhyay 	CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0,
23864fbf444SPalash Bandyopadhyay 	CX231XX_NONEED_PS_PACKAGE_HEAD
23964fbf444SPalash Bandyopadhyay };
24064fbf444SPalash Bandyopadhyay 
241e0d3bafdSSri Deevi struct cx231xx_dmaqueue {
242e0d3bafdSSri Deevi 	struct list_head active;
243e0d3bafdSSri Deevi 
244e0d3bafdSSri Deevi 	wait_queue_head_t wq;
245e0d3bafdSSri Deevi 
246e0d3bafdSSri Deevi 	/* Counters to control buffer fill */
247e0d3bafdSSri Deevi 	int pos;
248e0d3bafdSSri Deevi 	u8 is_partial_line;
249e0d3bafdSSri Deevi 	u8 partial_buf[8];
250e0d3bafdSSri Deevi 	u8 last_sav;
251e0d3bafdSSri Deevi 	int current_field;
252e0d3bafdSSri Deevi 	u32 bytes_left_in_line;
253e0d3bafdSSri Deevi 	u32 lines_completed;
254e0d3bafdSSri Deevi 	u8 field1_done;
255e0d3bafdSSri Deevi 	u32 lines_per_field;
2567c617138SHans Verkuil 	u32 sequence;
25764fbf444SPalash Bandyopadhyay 
25864fbf444SPalash Bandyopadhyay 	/*Mpeg2 control buffer*/
25964fbf444SPalash Bandyopadhyay 	u8 *p_left_data;
26064fbf444SPalash Bandyopadhyay 	u32 left_data_count;
26164fbf444SPalash Bandyopadhyay 	u8 mpeg_buffer_done;
26264fbf444SPalash Bandyopadhyay 	u32 mpeg_buffer_completed;
26364fbf444SPalash Bandyopadhyay 	enum ps_package_head add_ps_package_head;
26464fbf444SPalash Bandyopadhyay 	char ps_head[10];
265e0d3bafdSSri Deevi };
266e0d3bafdSSri Deevi 
267e0d3bafdSSri Deevi /* inputs */
268e0d3bafdSSri Deevi 
269e0d3bafdSSri Deevi #define MAX_CX231XX_INPUT               4
270e0d3bafdSSri Deevi 
271e0d3bafdSSri Deevi enum cx231xx_itype {
272e0d3bafdSSri Deevi 	CX231XX_VMUX_COMPOSITE1 = 1,
273e0d3bafdSSri Deevi 	CX231XX_VMUX_SVIDEO,
274e0d3bafdSSri Deevi 	CX231XX_VMUX_TELEVISION,
275e0d3bafdSSri Deevi 	CX231XX_VMUX_CABLE,
276e0d3bafdSSri Deevi 	CX231XX_RADIO,
277e0d3bafdSSri Deevi 	CX231XX_VMUX_DVB,
278e0d3bafdSSri Deevi };
279e0d3bafdSSri Deevi 
280e0d3bafdSSri Deevi enum cx231xx_v_input {
281e0d3bafdSSri Deevi 	CX231XX_VIN_1_1 = 0x1,
282e0d3bafdSSri Deevi 	CX231XX_VIN_2_1,
283e0d3bafdSSri Deevi 	CX231XX_VIN_3_1,
284e0d3bafdSSri Deevi 	CX231XX_VIN_4_1,
285e0d3bafdSSri Deevi 	CX231XX_VIN_1_2 = 0x01,
286e0d3bafdSSri Deevi 	CX231XX_VIN_2_2,
287e0d3bafdSSri Deevi 	CX231XX_VIN_3_2,
288e0d3bafdSSri Deevi 	CX231XX_VIN_1_3 = 0x1,
289e0d3bafdSSri Deevi 	CX231XX_VIN_2_3,
290e0d3bafdSSri Deevi 	CX231XX_VIN_3_3,
291e0d3bafdSSri Deevi };
292e0d3bafdSSri Deevi 
293e0d3bafdSSri Deevi /* cx231xx has two audio inputs: tuner and line in */
294e0d3bafdSSri Deevi enum cx231xx_amux {
295e0d3bafdSSri Deevi 	/* This is the only entry for cx231xx tuner input */
296e0d3bafdSSri Deevi 	CX231XX_AMUX_VIDEO,	/* cx231xx tuner */
297e0d3bafdSSri Deevi 	CX231XX_AMUX_LINE_IN,	/* Line In */
298e0d3bafdSSri Deevi };
299e0d3bafdSSri Deevi 
300e0d3bafdSSri Deevi struct cx231xx_reg_seq {
301e0d3bafdSSri Deevi 	unsigned char bit;
302e0d3bafdSSri Deevi 	unsigned char val;
303e0d3bafdSSri Deevi 	int sleep;
304e0d3bafdSSri Deevi };
305e0d3bafdSSri Deevi 
306e0d3bafdSSri Deevi struct cx231xx_input {
307e0d3bafdSSri Deevi 	enum cx231xx_itype type;
308e0d3bafdSSri Deevi 	unsigned int vmux;
309e0d3bafdSSri Deevi 	enum cx231xx_amux amux;
310e0d3bafdSSri Deevi 	struct cx231xx_reg_seq *gpio;
311e0d3bafdSSri Deevi };
312e0d3bafdSSri Deevi 
313e0d3bafdSSri Deevi #define INPUT(nr) (&cx231xx_boards[dev->model].input[nr])
314e0d3bafdSSri Deevi 
315e0d3bafdSSri Deevi enum cx231xx_decoder {
316e0d3bafdSSri Deevi 	CX231XX_NODECODER,
317e0d3bafdSSri Deevi 	CX231XX_AVDECODER
318e0d3bafdSSri Deevi };
319e0d3bafdSSri Deevi 
320b9255176SSri Deevi enum CX231XX_I2C_MASTER_PORT {
3219abe3b89SMatthias Schwarzott 	I2C_0 = 0,       /* master 0 - internal connection */
3229abe3b89SMatthias Schwarzott 	I2C_1 = 1,       /* master 1 - used with mux */
3239abe3b89SMatthias Schwarzott 	I2C_2 = 2,       /* master 2 */
3249abe3b89SMatthias Schwarzott 	I2C_1_MUX_1 = 3, /* master 1 - port 1 (I2C_DEMOD_EN = 0) */
3259abe3b89SMatthias Schwarzott 	I2C_1_MUX_3 = 4  /* master 1 - port 3 (I2C_DEMOD_EN = 1) */
326b9255176SSri Deevi };
327e0d3bafdSSri Deevi 
328e0d3bafdSSri Deevi struct cx231xx_board {
329e0d3bafdSSri Deevi 	char *name;
330e0d3bafdSSri Deevi 	int vchannels;
331e0d3bafdSSri Deevi 	int tuner_type;
332e0d3bafdSSri Deevi 	int tuner_addr;
333e0d3bafdSSri Deevi 	v4l2_std_id norm;	/* tv norm */
334e0d3bafdSSri Deevi 
335e0d3bafdSSri Deevi 	/* demod related */
336e0d3bafdSSri Deevi 	int demod_addr;
3372af04244SBrad Love 	int demod_addr2;
338e0d3bafdSSri Deevi 	u8 demod_xfer_mode;	/* 0 - Serial; 1 - parallel */
339e0d3bafdSSri Deevi 
340e0d3bafdSSri Deevi 	/* GPIO Pins */
341e0d3bafdSSri Deevi 	struct cx231xx_reg_seq *dvb_gpio;
342e0d3bafdSSri Deevi 	struct cx231xx_reg_seq *suspend_gpio;
343e0d3bafdSSri Deevi 	struct cx231xx_reg_seq *tuner_gpio;
34478bb6df6SMauro Carvalho Chehab 		/* Negative means don't use it */
34578bb6df6SMauro Carvalho Chehab 	s8 tuner_sif_gpio;
34678bb6df6SMauro Carvalho Chehab 	s8 tuner_scl_gpio;
34778bb6df6SMauro Carvalho Chehab 	s8 tuner_sda_gpio;
348e0d3bafdSSri Deevi 
349e0d3bafdSSri Deevi 	/* PIN ctrl */
350e0d3bafdSSri Deevi 	u32 ctl_pin_status_mask;
351e0d3bafdSSri Deevi 	u8 agc_analog_digital_select_gpio;
352e0d3bafdSSri Deevi 	u32 gpio_pin_status_mask;
353e0d3bafdSSri Deevi 
354e0d3bafdSSri Deevi 	/* i2c masters */
355e0d3bafdSSri Deevi 	u8 tuner_i2c_master;
356e0d3bafdSSri Deevi 	u8 demod_i2c_master;
3579ab66912SMauro Carvalho Chehab 	u8 ir_i2c_master;
3589ab66912SMauro Carvalho Chehab 
3599ab66912SMauro Carvalho Chehab 	/* for devices with I2C chips for IR */
36029e3ec19SMauro Carvalho Chehab 	char *rc_map_name;
361e0d3bafdSSri Deevi 
362e0d3bafdSSri Deevi 	unsigned int max_range_640_480:1;
363e0d3bafdSSri Deevi 	unsigned int has_dvb:1;
3642f861387SMauro Carvalho Chehab 	unsigned int has_417:1;
365e0d3bafdSSri Deevi 	unsigned int valid:1;
3662f861387SMauro Carvalho Chehab 	unsigned int no_alt_vanc:1;
3672f861387SMauro Carvalho Chehab 	unsigned int external_av:1;
368e0d3bafdSSri Deevi 
369e0d3bafdSSri Deevi 	unsigned char xclk, i2c_speed;
370e0d3bafdSSri Deevi 
371e0d3bafdSSri Deevi 	enum cx231xx_decoder decoder;
37288806218SDevin Heitmueller 	int output_mode;
373e0d3bafdSSri Deevi 
374e0d3bafdSSri Deevi 	struct cx231xx_input input[MAX_CX231XX_INPUT];
375e0d3bafdSSri Deevi 	struct cx231xx_input radio;
376b088ba65SMauro Carvalho Chehab 	struct rc_map *ir_codes;
377e0d3bafdSSri Deevi };
378e0d3bafdSSri Deevi 
379e0d3bafdSSri Deevi /* device states */
380e0d3bafdSSri Deevi enum cx231xx_dev_state {
381e0d3bafdSSri Deevi 	DEV_INITIALIZED = 0x01,
382e0d3bafdSSri Deevi 	DEV_DISCONNECTED = 0x02,
383e0d3bafdSSri Deevi };
384e0d3bafdSSri Deevi 
38584b5dbf3SMauro Carvalho Chehab enum AFE_MODE {
386e0d3bafdSSri Deevi 	AFE_MODE_LOW_IF,
387e0d3bafdSSri Deevi 	AFE_MODE_BASEBAND,
388e0d3bafdSSri Deevi 	AFE_MODE_EU_HI_IF,
389e0d3bafdSSri Deevi 	AFE_MODE_US_HI_IF,
390e0d3bafdSSri Deevi 	AFE_MODE_JAPAN_HI_IF
391e0d3bafdSSri Deevi };
392e0d3bafdSSri Deevi 
39384b5dbf3SMauro Carvalho Chehab enum AUDIO_INPUT {
394e0d3bafdSSri Deevi 	AUDIO_INPUT_MUTE,
395e0d3bafdSSri Deevi 	AUDIO_INPUT_LINE,
396e0d3bafdSSri Deevi 	AUDIO_INPUT_TUNER_TV,
397e0d3bafdSSri Deevi 	AUDIO_INPUT_SPDIF,
398e0d3bafdSSri Deevi 	AUDIO_INPUT_TUNER_FM
399e0d3bafdSSri Deevi };
400e0d3bafdSSri Deevi 
401e0d3bafdSSri Deevi #define CX231XX_AUDIO_BUFS              5
40264fbf444SPalash Bandyopadhyay #define CX231XX_NUM_AUDIO_PACKETS       16
40364fbf444SPalash Bandyopadhyay #define CX231XX_ISO_NUM_AUDIO_PACKETS	64
404e0d3bafdSSri Deevi 
405e0d3bafdSSri Deevi /* cx231xx extensions */
406e0d3bafdSSri Deevi #define CX231XX_AUDIO                   0x10
407e0d3bafdSSri Deevi #define CX231XX_DVB                     0x20
408e0d3bafdSSri Deevi 
409e0d3bafdSSri Deevi struct cx231xx_audio {
410e0d3bafdSSri Deevi 	char name[50];
411e0d3bafdSSri Deevi 	char *transfer_buffer[CX231XX_AUDIO_BUFS];
412e0d3bafdSSri Deevi 	struct urb *urb[CX231XX_AUDIO_BUFS];
413e0d3bafdSSri Deevi 	struct usb_device *udev;
414e0d3bafdSSri Deevi 	unsigned int capture_transfer_done;
415e0d3bafdSSri Deevi 	struct snd_pcm_substream *capture_pcm_substream;
416e0d3bafdSSri Deevi 
417e0d3bafdSSri Deevi 	unsigned int hwptr_done_capture;
418e0d3bafdSSri Deevi 	struct snd_card *sndcard;
419e0d3bafdSSri Deevi 
420e0d3bafdSSri Deevi 	int users, shutdown;
42164fbf444SPalash Bandyopadhyay 	/* locks */
422e0d3bafdSSri Deevi 	spinlock_t slock;
423e0d3bafdSSri Deevi 
424e0d3bafdSSri Deevi 	int alt;		/* alternate */
425e0d3bafdSSri Deevi 	int max_pkt_size;	/* max packet size of isoc transaction */
426e0d3bafdSSri Deevi 	int num_alt;		/* Number of alternative settings */
427e0d3bafdSSri Deevi 	unsigned int *alt_max_pkt_size;	/* array of wMaxPacketSize */
428e0d3bafdSSri Deevi 	u16 end_point_addr;
429e0d3bafdSSri Deevi };
430e0d3bafdSSri Deevi 
431b9255176SSri Deevi /*****************************************************************/
432e0d3bafdSSri Deevi /* set/get i2c */
433b9255176SSri Deevi /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
434b9255176SSri Deevi #define I2C_SPEED_1M            0x0
435b9255176SSri Deevi #define I2C_SPEED_400K          0x1
436b9255176SSri Deevi #define I2C_SPEED_100K          0x2
437b9255176SSri Deevi #define I2C_SPEED_5M            0x3
438e0d3bafdSSri Deevi 
439b9255176SSri Deevi /* 0-- STOP transaction */
440b9255176SSri Deevi #define I2C_STOP                0x0
441b9255176SSri Deevi /* 1-- do not transmit STOP at end of transaction */
442b9255176SSri Deevi #define I2C_NOSTOP              0x1
443b251e618SJustin P. Mattock /* 1--allow slave to insert clock wait states */
444b9255176SSri Deevi #define I2C_SYNC                0x1
445e0d3bafdSSri Deevi 
446e0d3bafdSSri Deevi struct cx231xx_i2c {
447e0d3bafdSSri Deevi 	struct cx231xx *dev;
448e0d3bafdSSri Deevi 
449e0d3bafdSSri Deevi 	int nr;
450e0d3bafdSSri Deevi 
451e0d3bafdSSri Deevi 	/* i2c i/o */
452e0d3bafdSSri Deevi 	struct i2c_adapter i2c_adap;
45354b1b41fSPeter Rosin 	int i2c_rc;
454e0d3bafdSSri Deevi 
455e0d3bafdSSri Deevi 	/* different settings for each bus */
456e0d3bafdSSri Deevi 	u8 i2c_period;
457e0d3bafdSSri Deevi 	u8 i2c_nostop;
458e0d3bafdSSri Deevi 	u8 i2c_reserve;
459e0d3bafdSSri Deevi };
460e0d3bafdSSri Deevi 
461e0d3bafdSSri Deevi struct cx231xx_i2c_xfer_data {
462e0d3bafdSSri Deevi 	u8 dev_addr;
463e0d3bafdSSri Deevi 	u8 direction;		/* 1 - IN, 0 - OUT */
464e0d3bafdSSri Deevi 	u8 saddr_len;		/* sub address len */
465e0d3bafdSSri Deevi 	u16 saddr_dat;		/* sub addr data */
466e0d3bafdSSri Deevi 	u8 buf_size;		/* buffer size */
467e0d3bafdSSri Deevi 	u8 *p_buffer;		/* pointer to the buffer */
468e0d3bafdSSri Deevi };
469e0d3bafdSSri Deevi 
470b9255176SSri Deevi struct VENDOR_REQUEST_IN {
471e0d3bafdSSri Deevi 	u8 bRequest;
472e0d3bafdSSri Deevi 	u16 wValue;
473e0d3bafdSSri Deevi 	u16 wIndex;
474e0d3bafdSSri Deevi 	u16 wLength;
475e0d3bafdSSri Deevi 	u8 direction;
476e0d3bafdSSri Deevi 	u8 bData;
477e0d3bafdSSri Deevi 	u8 *pBuff;
478b9255176SSri Deevi };
479e0d3bafdSSri Deevi 
48064fbf444SPalash Bandyopadhyay struct cx231xx_tvnorm {
48164fbf444SPalash Bandyopadhyay 	char		*name;
48264fbf444SPalash Bandyopadhyay 	v4l2_std_id	id;
48364fbf444SPalash Bandyopadhyay 	u32		cxiformat;
48464fbf444SPalash Bandyopadhyay 	u32		cxoformat;
48564fbf444SPalash Bandyopadhyay };
48664fbf444SPalash Bandyopadhyay 
487b9255176SSri Deevi enum TRANSFER_TYPE {
488e0d3bafdSSri Deevi 	Raw_Video = 0,
489e0d3bafdSSri Deevi 	Audio,
490e0d3bafdSSri Deevi 	Vbi,			/* VANC */
491e0d3bafdSSri Deevi 	Sliced_cc,		/* HANC */
492e0d3bafdSSri Deevi 	TS1_serial_mode,
493e0d3bafdSSri Deevi 	TS2,
494e0d3bafdSSri Deevi 	TS1_parallel_mode
495b9255176SSri Deevi } ;
496e0d3bafdSSri Deevi 
497e0d3bafdSSri Deevi struct cx231xx_video_mode {
498e0d3bafdSSri Deevi 	/* Isoc control struct */
499e0d3bafdSSri Deevi 	struct cx231xx_dmaqueue vidq;
50064fbf444SPalash Bandyopadhyay 	struct cx231xx_isoc_ctl isoc_ctl;
50164fbf444SPalash Bandyopadhyay 	struct cx231xx_bulk_ctl bulk_ctl;
50264fbf444SPalash Bandyopadhyay 	/* locks */
503e0d3bafdSSri Deevi 	spinlock_t slock;
504e0d3bafdSSri Deevi 
505e0d3bafdSSri Deevi 	/* usb transfer */
506e0d3bafdSSri Deevi 	int alt;		/* alternate */
507e0d3bafdSSri Deevi 	int max_pkt_size;	/* max packet size of isoc transaction */
508e0d3bafdSSri Deevi 	int num_alt;		/* Number of alternative settings */
509e0d3bafdSSri Deevi 	unsigned int *alt_max_pkt_size;	/* array of wMaxPacketSize */
510e0d3bafdSSri Deevi 	u16 end_point_addr;
511e0d3bafdSSri Deevi };
5121e451808SHans Verkuil 
51364fbf444SPalash Bandyopadhyay struct cx231xx_tsport {
51464fbf444SPalash Bandyopadhyay 	struct cx231xx *dev;
51564fbf444SPalash Bandyopadhyay 
51664fbf444SPalash Bandyopadhyay 	int                        nr;
51764fbf444SPalash Bandyopadhyay 	int                        sram_chno;
51864fbf444SPalash Bandyopadhyay 
51964fbf444SPalash Bandyopadhyay 	/* dma queues */
52064fbf444SPalash Bandyopadhyay 
52164fbf444SPalash Bandyopadhyay 	u32                        ts_packet_size;
52264fbf444SPalash Bandyopadhyay 	u32                        ts_packet_count;
52364fbf444SPalash Bandyopadhyay 
52464fbf444SPalash Bandyopadhyay 	int                        width;
52564fbf444SPalash Bandyopadhyay 	int                        height;
52664fbf444SPalash Bandyopadhyay 
52764fbf444SPalash Bandyopadhyay 	/* locks */
52864fbf444SPalash Bandyopadhyay 	spinlock_t                 slock;
52964fbf444SPalash Bandyopadhyay 
53064fbf444SPalash Bandyopadhyay 	/* registers */
53164fbf444SPalash Bandyopadhyay 	u32                        reg_gpcnt;
53264fbf444SPalash Bandyopadhyay 	u32                        reg_gpcnt_ctl;
53364fbf444SPalash Bandyopadhyay 	u32                        reg_dma_ctl;
53464fbf444SPalash Bandyopadhyay 	u32                        reg_lngth;
53564fbf444SPalash Bandyopadhyay 	u32                        reg_hw_sop_ctrl;
53664fbf444SPalash Bandyopadhyay 	u32                        reg_gen_ctrl;
53764fbf444SPalash Bandyopadhyay 	u32                        reg_bd_pkt_status;
53864fbf444SPalash Bandyopadhyay 	u32                        reg_sop_status;
53964fbf444SPalash Bandyopadhyay 	u32                        reg_fifo_ovfl_stat;
54064fbf444SPalash Bandyopadhyay 	u32                        reg_vld_misc;
54164fbf444SPalash Bandyopadhyay 	u32                        reg_ts_clk_en;
54264fbf444SPalash Bandyopadhyay 	u32                        reg_ts_int_msk;
54364fbf444SPalash Bandyopadhyay 	u32                        reg_ts_int_stat;
54464fbf444SPalash Bandyopadhyay 	u32                        reg_src_sel;
54564fbf444SPalash Bandyopadhyay 
54664fbf444SPalash Bandyopadhyay 	/* Default register vals */
54764fbf444SPalash Bandyopadhyay 	int                        pci_irqmask;
54864fbf444SPalash Bandyopadhyay 	u32                        dma_ctl_val;
54964fbf444SPalash Bandyopadhyay 	u32                        ts_int_msk_val;
55064fbf444SPalash Bandyopadhyay 	u32                        gen_ctrl_val;
55164fbf444SPalash Bandyopadhyay 	u32                        ts_clk_en_val;
55264fbf444SPalash Bandyopadhyay 	u32                        src_sel_val;
55364fbf444SPalash Bandyopadhyay 	u32                        vld_misc_val;
55464fbf444SPalash Bandyopadhyay 	u32                        hw_sop_ctrl_val;
55564fbf444SPalash Bandyopadhyay 
55664fbf444SPalash Bandyopadhyay 	/* Allow a single tsport to have multiple frontends */
55764fbf444SPalash Bandyopadhyay 	u32                        num_frontends;
55864fbf444SPalash Bandyopadhyay 	void                       *port_priv;
55964fbf444SPalash Bandyopadhyay };
560e0d3bafdSSri Deevi 
561e0d3bafdSSri Deevi /* main device struct */
562e0d3bafdSSri Deevi struct cx231xx {
563e0d3bafdSSri Deevi 	/* generic device properties */
564e0d3bafdSSri Deevi 	char name[30];		/* name (including minor) of the device */
565e0d3bafdSSri Deevi 	int model;		/* index in the device_data struct */
566e0d3bafdSSri Deevi 	int devno;		/* marks the number of this device */
567336fea92SMauro Carvalho Chehab 	struct device *dev;	/* pointer to USB interface's dev */
568e0d3bafdSSri Deevi 
569e0d3bafdSSri Deevi 	struct cx231xx_board board;
570e0d3bafdSSri Deevi 
5719ab66912SMauro Carvalho Chehab 	/* For I2C IR support */
572141bb0dcSMauro Carvalho Chehab 	struct IR_i2c_init_data    init_data;
5737528cd27SMauro Carvalho Chehab 	struct i2c_client          *ir_i2c_client;
5749ab66912SMauro Carvalho Chehab 
575e0d3bafdSSri Deevi 	unsigned int stream_on:1;	/* Locks streams */
576e0d3bafdSSri Deevi 	unsigned int vbi_stream_on:1;	/* Locks streams for VBI */
577e0d3bafdSSri Deevi 	unsigned int has_audio_class:1;
578e0d3bafdSSri Deevi 	unsigned int has_alsa_audio:1;
579e0d3bafdSSri Deevi 
58077e97ba2SMauro Carvalho Chehab 	unsigned int i2c_scan_running:1; /* true only during i2c_scan */
58177e97ba2SMauro Carvalho Chehab 
582e0d3bafdSSri Deevi 	struct cx231xx_fmt *format;
583e0d3bafdSSri Deevi 
584b1196126SSri Deevi 	struct v4l2_device v4l2_dev;
585b1196126SSri Deevi 	struct v4l2_subdev *sd_cx25840;
586b1196126SSri Deevi 	struct v4l2_subdev *sd_tuner;
587d2370f8eSHans Verkuil 	struct v4l2_ctrl_handler ctrl_handler;
588d2370f8eSHans Verkuil 	struct v4l2_ctrl_handler radio_ctrl_handler;
58988b6ffedSHans Verkuil 	struct cx2341x_handler mpeg_ctrl_handler;
590b1196126SSri Deevi 
59161b04cb2SMauro Carvalho Chehab 	struct work_struct wq_trigger;		/* Trigger to start/stop audio for alsa module */
59261b04cb2SMauro Carvalho Chehab 	atomic_t	   stream_started;	/* stream should be running if true */
59361b04cb2SMauro Carvalho Chehab 
594e0d3bafdSSri Deevi 	struct list_head devlist;
595e0d3bafdSSri Deevi 
596e0d3bafdSSri Deevi 	int tuner_type;		/* type of the tuner */
597e0d3bafdSSri Deevi 	int tuner_addr;		/* tuner address */
598e0d3bafdSSri Deevi 
599e0d3bafdSSri Deevi 	/* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
600e0d3bafdSSri Deevi 	struct cx231xx_i2c i2c_bus[3];
60105e0dfd0SPeter Rosin 	struct i2c_mux_core *muxc;
60215c212ddSMatthias Schwarzott 	struct i2c_adapter *i2c_mux_adap[2];
60315c212ddSMatthias Schwarzott 
604e0d3bafdSSri Deevi 	unsigned int xc_fw_load_done:1;
605a1f26765SMatthias Schwarzott 	unsigned int port_3_switch_enabled:1;
60664fbf444SPalash Bandyopadhyay 	/* locks */
607e0d3bafdSSri Deevi 	struct mutex gpio_i2c_lock;
60864fbf444SPalash Bandyopadhyay 	struct mutex i2c_lock;
609e0d3bafdSSri Deevi 
610e0d3bafdSSri Deevi 	/* video for linux */
611e0d3bafdSSri Deevi 	int users;		/* user count for exclusive use */
61260acf187SHans Verkuil 	struct video_device vdev;	/* video for linux device struct */
613e0d3bafdSSri Deevi 	v4l2_std_id norm;	/* selected tv norm */
614e0d3bafdSSri Deevi 	int ctl_freq;		/* selected frequency */
615e0d3bafdSSri Deevi 	unsigned int ctl_ainput;	/* selected audio input */
616e0d3bafdSSri Deevi 
617e0d3bafdSSri Deevi 	/* frame properties */
618e0d3bafdSSri Deevi 	int width;		/* current frame width */
619e0d3bafdSSri Deevi 	int height;		/* current frame height */
6203e4d8f48SMauro Carvalho Chehab 	int interlaced;		/* 1=interlace fields, 0=just top fields */
6217c617138SHans Verkuil 	unsigned int size;
622e0d3bafdSSri Deevi 
623e0d3bafdSSri Deevi 	struct cx231xx_audio adev;
624e0d3bafdSSri Deevi 
625e0d3bafdSSri Deevi 	/* states */
626e0d3bafdSSri Deevi 	enum cx231xx_dev_state state;
627e0d3bafdSSri Deevi 
628e0d3bafdSSri Deevi 	struct work_struct request_module_wk;
629e0d3bafdSSri Deevi 
630e0d3bafdSSri Deevi 	/* locks */
631e0d3bafdSSri Deevi 	struct mutex lock;
632e0d3bafdSSri Deevi 	struct mutex ctrl_urb_lock;	/* protects urb_buf */
633e0d3bafdSSri Deevi 	struct list_head inqueue, outqueue;
634e0d3bafdSSri Deevi 	wait_queue_head_t open, wait_frame, wait_stream;
63560acf187SHans Verkuil 	struct video_device vbi_dev;
63660acf187SHans Verkuil 	struct video_device radio_dev;
637e0d3bafdSSri Deevi 
6381d058bdcSMauro Carvalho Chehab #if defined(CONFIG_MEDIA_CONTROLLER)
6391d058bdcSMauro Carvalho Chehab 	struct media_device *media_dev;
640b6a40e72SMauro Carvalho Chehab 	struct media_pad video_pad, vbi_pad;
6416168309aSMauro Carvalho Chehab 	struct media_entity input_ent[MAX_CX231XX_INPUT];
6426168309aSMauro Carvalho Chehab 	struct media_pad input_pad[MAX_CX231XX_INPUT];
6431d058bdcSMauro Carvalho Chehab #endif
6441d058bdcSMauro Carvalho Chehab 
6457c617138SHans Verkuil 	struct vb2_queue vidq;
6467c617138SHans Verkuil 	struct vb2_queue vbiq;
6477c617138SHans Verkuil 
648e0d3bafdSSri Deevi 	unsigned char eedata[256];
649e0d3bafdSSri Deevi 
650e0d3bafdSSri Deevi 	struct cx231xx_video_mode video_mode;
651e0d3bafdSSri Deevi 	struct cx231xx_video_mode vbi_mode;
652e0d3bafdSSri Deevi 	struct cx231xx_video_mode sliced_cc_mode;
653e0d3bafdSSri Deevi 	struct cx231xx_video_mode ts1_mode;
654e0d3bafdSSri Deevi 
65564fbf444SPalash Bandyopadhyay 	atomic_t devlist_count;
65664fbf444SPalash Bandyopadhyay 
657e0d3bafdSSri Deevi 	struct usb_device *udev;	/* the usb device */
658e0d3bafdSSri Deevi 	char urb_buf[URB_MAX_CTRL_SIZE];	/* urb control msg buffer */
659e0d3bafdSSri Deevi 
660e0d3bafdSSri Deevi 	/* helper funcs that call usb_control_msg */
661e0d3bafdSSri Deevi 	int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
662e0d3bafdSSri Deevi 				      char *buf, int len);
663e0d3bafdSSri Deevi 	int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
664e0d3bafdSSri Deevi 				       char *buf, int len);
665e0d3bafdSSri Deevi 	int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus,
666cde4362fSMauro Carvalho Chehab 				struct cx231xx_i2c_xfer_data *req_data);
66784b5dbf3SMauro Carvalho Chehab 	int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr,
66884b5dbf3SMauro Carvalho Chehab 				      u8 *buf, u8 len);
66984b5dbf3SMauro Carvalho Chehab 	int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr,
67084b5dbf3SMauro Carvalho Chehab 				       u8 *buf, u8 len);
671e0d3bafdSSri Deevi 
672e0d3bafdSSri Deevi 	int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq);
673e0d3bafdSSri Deevi 	int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev);
674e0d3bafdSSri Deevi 
675e0d3bafdSSri Deevi 	enum cx231xx_mode mode;
676e0d3bafdSSri Deevi 
677e0d3bafdSSri Deevi 	struct cx231xx_dvb *dvb;
678e0d3bafdSSri Deevi 
679e0d3bafdSSri Deevi 	/* Cx231xx supported PCB config's */
680e0d3bafdSSri Deevi 	struct pcb_config current_pcb_config;
681e0d3bafdSSri Deevi 	u8 current_scenario_idx;
682e0d3bafdSSri Deevi 	u8 interface_count;
683e0d3bafdSSri Deevi 	u8 max_iad_interface_count;
684e0d3bafdSSri Deevi 
685e0d3bafdSSri Deevi 	/* GPIO related register direction and values */
686e0d3bafdSSri Deevi 	u32 gpio_dir;
687e0d3bafdSSri Deevi 	u32 gpio_val;
688e0d3bafdSSri Deevi 
689e0d3bafdSSri Deevi 	/* Power Modes */
690e0d3bafdSSri Deevi 	int power_mode;
691e0d3bafdSSri Deevi 
692ecc67d10SSri Deevi 	/* afe parameters */
693ecc67d10SSri Deevi 	enum AFE_MODE afe_mode;
694ecc67d10SSri Deevi 	u32 afe_ref_count;
695e0d3bafdSSri Deevi 
696e0d3bafdSSri Deevi 	/* video related parameters */
697e0d3bafdSSri Deevi 	u32 video_input;
698e0d3bafdSSri Deevi 	u32 active_mode;
699e0d3bafdSSri Deevi 	u8 vbi_or_sliced_cc_mode;	/* 0 - vbi ; 1 - sliced cc mode */
700e0d3bafdSSri Deevi 	enum cx231xx_std_mode std_mode;	/* 0 - Air; 1 - cable */
701e0d3bafdSSri Deevi 
70264fbf444SPalash Bandyopadhyay 	/*mode: digital=1 or analog=0*/
70364fbf444SPalash Bandyopadhyay 	u8 mode_tv;
70464fbf444SPalash Bandyopadhyay 
70564fbf444SPalash Bandyopadhyay 	u8 USE_ISO;
70664fbf444SPalash Bandyopadhyay 	struct cx231xx_tvnorm      encodernorm;
70764fbf444SPalash Bandyopadhyay 	struct cx231xx_tsport      ts1, ts2;
7087c617138SHans Verkuil 	struct vb2_queue	   mpegq;
70960acf187SHans Verkuil 	struct video_device        v4l_device;
71064fbf444SPalash Bandyopadhyay 	atomic_t                   v4l_reader_count;
71164fbf444SPalash Bandyopadhyay 	u32                        freq;
71264fbf444SPalash Bandyopadhyay 	unsigned int               input;
71364fbf444SPalash Bandyopadhyay 	u32                        cx23417_mailbox;
71464fbf444SPalash Bandyopadhyay 	u32                        __iomem *lmmio;
71564fbf444SPalash Bandyopadhyay 	u8                         __iomem *bmmio;
716e0d3bafdSSri Deevi };
717e0d3bafdSSri Deevi 
71864fbf444SPalash Bandyopadhyay extern struct list_head cx231xx_devlist;
71964fbf444SPalash Bandyopadhyay 
720b1196126SSri Deevi #define cx25840_call(cx231xx, o, f, args...) \
721b1196126SSri Deevi 	v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args)
722b1196126SSri Deevi #define tuner_call(cx231xx, o, f, args...) \
723b1196126SSri Deevi 	v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args)
724b1196126SSri Deevi #define call_all(dev, o, f, args...) \
725b1196126SSri Deevi 	v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args)
726b1196126SSri Deevi 
727e0d3bafdSSri Deevi struct cx231xx_ops {
728e0d3bafdSSri Deevi 	struct list_head next;
729e0d3bafdSSri Deevi 	char *name;
730e0d3bafdSSri Deevi 	int id;
731e0d3bafdSSri Deevi 	int (*init) (struct cx231xx *);
732e0d3bafdSSri Deevi 	int (*fini) (struct cx231xx *);
733e0d3bafdSSri Deevi };
734e0d3bafdSSri Deevi 
735e0d3bafdSSri Deevi /* call back functions in dvb module */
736e0d3bafdSSri Deevi int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq);
737e0d3bafdSSri Deevi int cx231xx_reset_analog_tuner(struct cx231xx *dev);
738e0d3bafdSSri Deevi 
739e0d3bafdSSri Deevi /* Provided by cx231xx-i2c.c */
7407c894a3bSMatthias Schwarzott void cx231xx_do_i2c_scan(struct cx231xx *dev, int i2c_port);
741e0d3bafdSSri Deevi int cx231xx_i2c_register(struct cx231xx_i2c *bus);
74222469022SPeter Rosin void cx231xx_i2c_unregister(struct cx231xx_i2c *bus);
74305e0dfd0SPeter Rosin int cx231xx_i2c_mux_create(struct cx231xx *dev);
74415c212ddSMatthias Schwarzott int cx231xx_i2c_mux_register(struct cx231xx *dev, int mux_no);
74505e0dfd0SPeter Rosin void cx231xx_i2c_mux_unregister(struct cx231xx *dev);
746c3c3f1aeSMatthias Schwarzott struct i2c_adapter *cx231xx_get_i2c_adap(struct cx231xx *dev, int i2c_port);
747e0d3bafdSSri Deevi 
748e0d3bafdSSri Deevi /* Internal block control functions */
74964fbf444SPalash Bandyopadhyay int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
75064fbf444SPalash Bandyopadhyay 		 u8 saddr_len, u32 *data, u8 data_len, int master);
75164fbf444SPalash Bandyopadhyay int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
75264fbf444SPalash Bandyopadhyay 		 u8 saddr_len, u32 data, u8 data_len, int master);
753e0d3bafdSSri Deevi int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr,
754e0d3bafdSSri Deevi 			  u16 saddr, u8 saddr_len, u32 *data, u8 data_len);
755e0d3bafdSSri Deevi int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr,
756e0d3bafdSSri Deevi 			   u16 saddr, u8 saddr_len, u32 data, u8 data_len);
75784b5dbf3SMauro Carvalho Chehab int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
75884b5dbf3SMauro Carvalho Chehab 			   u16 register_address, u8 bit_start, u8 bit_end,
75984b5dbf3SMauro Carvalho Chehab 			   u32 value);
760e0d3bafdSSri Deevi int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
761e0d3bafdSSri Deevi 					u16 saddr, u32 mask, u32 value);
762e0d3bafdSSri Deevi u32 cx231xx_set_field(u32 field_mask, u32 data);
763e0d3bafdSSri Deevi 
76464fbf444SPalash Bandyopadhyay /*verve r/w*/
76564fbf444SPalash Bandyopadhyay void initGPIO(struct cx231xx *dev);
76664fbf444SPalash Bandyopadhyay void uninitGPIO(struct cx231xx *dev);
767ecc67d10SSri Deevi /* afe related functions */
768ecc67d10SSri Deevi int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count);
769ecc67d10SSri Deevi int cx231xx_afe_init_channels(struct cx231xx *dev);
770ecc67d10SSri Deevi int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev);
771ecc67d10SSri Deevi int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux);
772ecc67d10SSri Deevi int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode);
773ecc67d10SSri Deevi int cx231xx_afe_update_power_control(struct cx231xx *dev,
7746e4f574bSSri Deevi 					enum AV_MODE avmode);
775ecc67d10SSri Deevi int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input);
776e0d3bafdSSri Deevi 
777ecc67d10SSri Deevi /* i2s block related functions */
778ecc67d10SSri Deevi int cx231xx_i2s_blk_initialize(struct cx231xx *dev);
779ecc67d10SSri Deevi int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev,
7806e4f574bSSri Deevi 					enum AV_MODE avmode);
781ecc67d10SSri Deevi int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input);
782e0d3bafdSSri Deevi 
783e0d3bafdSSri Deevi /* DIF related functions */
784e0d3bafdSSri Deevi int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
785e0d3bafdSSri Deevi 					  u32 function_mode, u32 standard);
78664fbf444SPalash Bandyopadhyay void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
78764fbf444SPalash Bandyopadhyay 					 u8 spectral_invert, u32 mode);
78864fbf444SPalash Bandyopadhyay u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd);
78964fbf444SPalash Bandyopadhyay void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
79064fbf444SPalash Bandyopadhyay 					 u8 spectral_invert, u32 mode);
79164fbf444SPalash Bandyopadhyay void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev);
79264fbf444SPalash Bandyopadhyay void reset_s5h1432_demod(struct cx231xx *dev);
79364fbf444SPalash Bandyopadhyay void update_HH_register_after_set_DIF(struct cx231xx *dev);
79464fbf444SPalash Bandyopadhyay 
79564fbf444SPalash Bandyopadhyay 
79664fbf444SPalash Bandyopadhyay 
797e0d3bafdSSri Deevi int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard);
798e0d3bafdSSri Deevi int cx231xx_tuner_pre_channel_change(struct cx231xx *dev);
799e0d3bafdSSri Deevi int cx231xx_tuner_post_channel_change(struct cx231xx *dev);
800e0d3bafdSSri Deevi 
801e0d3bafdSSri Deevi /* video parser functions */
80284b5dbf3SMauro Carvalho Chehab u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size,
80384b5dbf3SMauro Carvalho Chehab 			     u32 *p_bytes_used);
80484b5dbf3SMauro Carvalho Chehab u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
80584b5dbf3SMauro Carvalho Chehab 				 u32 *p_bytes_used);
806e0d3bafdSSri Deevi int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
807e0d3bafdSSri Deevi 		    u8 *p_buffer, u32 bytes_to_copy);
80884b5dbf3SMauro Carvalho Chehab void cx231xx_reset_video_buffer(struct cx231xx *dev,
80984b5dbf3SMauro Carvalho Chehab 				struct cx231xx_dmaqueue *dma_q);
810e0d3bafdSSri Deevi u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q);
811e0d3bafdSSri Deevi u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
812e0d3bafdSSri Deevi 			    u8 *p_line, u32 length, int field_number);
813e0d3bafdSSri Deevi u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
814e0d3bafdSSri Deevi 			   u8 sav_eav, u8 *p_buffer, u32 buffer_size);
815e0d3bafdSSri Deevi void cx231xx_swab(u16 *from, u16 *to, u16 len);
816e0d3bafdSSri Deevi 
817e0d3bafdSSri Deevi /* Provided by cx231xx-core.c */
818e0d3bafdSSri Deevi 
819e0d3bafdSSri Deevi u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count);
820e0d3bafdSSri Deevi void cx231xx_queue_unusedframes(struct cx231xx *dev);
821e0d3bafdSSri Deevi void cx231xx_release_buffers(struct cx231xx *dev);
822e0d3bafdSSri Deevi 
823e0d3bafdSSri Deevi /* read from control pipe */
824e0d3bafdSSri Deevi int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
825e0d3bafdSSri Deevi 			  char *buf, int len);
826e0d3bafdSSri Deevi 
827e0d3bafdSSri Deevi /* write to control pipe */
828e0d3bafdSSri Deevi int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
829e0d3bafdSSri Deevi 			   char *buf, int len);
830e0d3bafdSSri Deevi int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode);
831e0d3bafdSSri Deevi 
832b9255176SSri Deevi int cx231xx_send_vendor_cmd(struct cx231xx *dev,
833b9255176SSri Deevi 				struct VENDOR_REQUEST_IN *ven_req);
834e0d3bafdSSri Deevi int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
835e0d3bafdSSri Deevi 				struct cx231xx_i2c_xfer_data *req_data);
836e0d3bafdSSri Deevi 
837e0d3bafdSSri Deevi /* Gpio related functions */
838e0d3bafdSSri Deevi int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
839e0d3bafdSSri Deevi 			  u8 len, u8 request, u8 direction);
840e0d3bafdSSri Deevi int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value);
84184b5dbf3SMauro Carvalho Chehab int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number,
84284b5dbf3SMauro Carvalho Chehab 			       int pin_value);
843e0d3bafdSSri Deevi 
844e0d3bafdSSri Deevi int cx231xx_gpio_i2c_start(struct cx231xx *dev);
845e0d3bafdSSri Deevi int cx231xx_gpio_i2c_end(struct cx231xx *dev);
846e0d3bafdSSri Deevi int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data);
847e0d3bafdSSri Deevi int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf);
848e0d3bafdSSri Deevi int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev);
849e0d3bafdSSri Deevi int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev);
850e0d3bafdSSri Deevi int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev);
851e0d3bafdSSri Deevi 
852e0d3bafdSSri Deevi int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
853e0d3bafdSSri Deevi int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
854e0d3bafdSSri Deevi 
855e0d3bafdSSri Deevi /* audio related functions */
85684b5dbf3SMauro Carvalho Chehab int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
85784b5dbf3SMauro Carvalho Chehab 				    enum AUDIO_INPUT audio_input);
858e0d3bafdSSri Deevi 
859e0d3bafdSSri Deevi int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type);
860e0d3bafdSSri Deevi int cx231xx_set_video_alternate(struct cx231xx *dev);
861e0d3bafdSSri Deevi int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt);
86264fbf444SPalash Bandyopadhyay int is_fw_load(struct cx231xx *dev);
86364fbf444SPalash Bandyopadhyay int cx231xx_check_fw(struct cx231xx *dev);
864e0d3bafdSSri Deevi int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
865e0d3bafdSSri Deevi 		      int num_bufs, int max_pkt_size,
86684b5dbf3SMauro Carvalho Chehab 		      int (*isoc_copy) (struct cx231xx *dev,
86784b5dbf3SMauro Carvalho Chehab 					struct urb *urb));
86864fbf444SPalash Bandyopadhyay int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
86964fbf444SPalash Bandyopadhyay 		      int num_bufs, int max_pkt_size,
87064fbf444SPalash Bandyopadhyay 		      int (*bulk_copy) (struct cx231xx *dev,
87164fbf444SPalash Bandyopadhyay 					struct urb *urb));
87264fbf444SPalash Bandyopadhyay void cx231xx_stop_TS1(struct cx231xx *dev);
87364fbf444SPalash Bandyopadhyay void cx231xx_start_TS1(struct cx231xx *dev);
874e0d3bafdSSri Deevi void cx231xx_uninit_isoc(struct cx231xx *dev);
87564fbf444SPalash Bandyopadhyay void cx231xx_uninit_bulk(struct cx231xx *dev);
876e0d3bafdSSri Deevi int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode);
87764fbf444SPalash Bandyopadhyay int cx231xx_unmute_audio(struct cx231xx *dev);
87864fbf444SPalash Bandyopadhyay int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size);
87964fbf444SPalash Bandyopadhyay void cx231xx_disable656(struct cx231xx *dev);
88064fbf444SPalash Bandyopadhyay void cx231xx_enable656(struct cx231xx *dev);
88164fbf444SPalash Bandyopadhyay int cx231xx_demod_reset(struct cx231xx *dev);
882e0d3bafdSSri Deevi int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio);
883e0d3bafdSSri Deevi 
884e0d3bafdSSri Deevi /* Device list functions */
885e0d3bafdSSri Deevi void cx231xx_release_resources(struct cx231xx *dev);
886e0d3bafdSSri Deevi void cx231xx_release_analog_resources(struct cx231xx *dev);
887e0d3bafdSSri Deevi int cx231xx_register_analog_devices(struct cx231xx *dev);
888e0d3bafdSSri Deevi void cx231xx_remove_from_devlist(struct cx231xx *dev);
889e0d3bafdSSri Deevi void cx231xx_add_into_devlist(struct cx231xx *dev);
890e0d3bafdSSri Deevi void cx231xx_init_extension(struct cx231xx *dev);
891e0d3bafdSSri Deevi void cx231xx_close_extension(struct cx231xx *dev);
892e0d3bafdSSri Deevi 
893e0d3bafdSSri Deevi /* hardware init functions */
894e0d3bafdSSri Deevi int cx231xx_dev_init(struct cx231xx *dev);
895e0d3bafdSSri Deevi void cx231xx_dev_uninit(struct cx231xx *dev);
896e0d3bafdSSri Deevi void cx231xx_config_i2c(struct cx231xx *dev);
897e0d3bafdSSri Deevi int cx231xx_config(struct cx231xx *dev);
898e0d3bafdSSri Deevi 
899e0d3bafdSSri Deevi /* Stream control functions */
900e0d3bafdSSri Deevi int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask);
901e0d3bafdSSri Deevi int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask);
902e0d3bafdSSri Deevi 
903e0d3bafdSSri Deevi int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type);
904e0d3bafdSSri Deevi 
905e0d3bafdSSri Deevi /* Power control functions */
9066e4f574bSSri Deevi int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode);
907e0d3bafdSSri Deevi 
908e0d3bafdSSri Deevi /* chip specific control functions */
909e0d3bafdSSri Deevi int cx231xx_init_ctrl_pin_status(struct cx231xx *dev);
91084b5dbf3SMauro Carvalho Chehab int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
91184b5dbf3SMauro Carvalho Chehab 					      u8 analog_or_digital);
912a6f6fb9cSMauro Carvalho Chehab int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3);
913e0d3bafdSSri Deevi 
914e0d3bafdSSri Deevi /* video audio decoder related functions */
915e0d3bafdSSri Deevi void video_mux(struct cx231xx *dev, int index);
916e0d3bafdSSri Deevi int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input);
917*d30bb4b4SFabio Luongo int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u32 input);
918e0d3bafdSSri Deevi int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev);
919e0d3bafdSSri Deevi int cx231xx_set_audio_input(struct cx231xx *dev, u8 input);
920e0d3bafdSSri Deevi 
921e0d3bafdSSri Deevi /* Provided by cx231xx-video.c */
922e0d3bafdSSri Deevi int cx231xx_register_extension(struct cx231xx_ops *dev);
923e0d3bafdSSri Deevi void cx231xx_unregister_extension(struct cx231xx_ops *dev);
924e0d3bafdSSri Deevi void cx231xx_init_extension(struct cx231xx *dev);
925e0d3bafdSSri Deevi void cx231xx_close_extension(struct cx231xx *dev);
9266168309aSMauro Carvalho Chehab void cx231xx_v4l2_create_entities(struct cx231xx *dev);
927bc08734cSHans Verkuil int cx231xx_querycap(struct file *file, void *priv,
928bc08734cSHans Verkuil 			   struct v4l2_capability *cap);
929b86d1544SHans Verkuil int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t);
9302f73c7c5SHans Verkuil int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t);
931b86d1544SHans Verkuil int cx231xx_g_frequency(struct file *file, void *priv,
932b86d1544SHans Verkuil 			      struct v4l2_frequency *f);
933b86d1544SHans Verkuil int cx231xx_s_frequency(struct file *file, void *priv,
934b530a447SHans Verkuil 			      const struct v4l2_frequency *f);
935b86d1544SHans Verkuil int cx231xx_enum_input(struct file *file, void *priv,
936b86d1544SHans Verkuil 			     struct v4l2_input *i);
937b86d1544SHans Verkuil int cx231xx_g_input(struct file *file, void *priv, unsigned int *i);
938b86d1544SHans Verkuil int cx231xx_s_input(struct file *file, void *priv, unsigned int i);
93908fe9f7dSHans Verkuil int cx231xx_g_chip_info(struct file *file, void *fh, struct v4l2_dbg_chip_info *chip);
940b86d1544SHans Verkuil int cx231xx_g_register(struct file *file, void *priv,
941b86d1544SHans Verkuil 			     struct v4l2_dbg_register *reg);
942b86d1544SHans Verkuil int cx231xx_s_register(struct file *file, void *priv,
943977ba3b1SHans Verkuil 			     const struct v4l2_dbg_register *reg);
944e0d3bafdSSri Deevi 
945e0d3bafdSSri Deevi /* Provided by cx231xx-cards.c */
946e0d3bafdSSri Deevi extern void cx231xx_pre_card_setup(struct cx231xx *dev);
947e0d3bafdSSri Deevi extern void cx231xx_card_setup(struct cx231xx *dev);
948e0d3bafdSSri Deevi extern struct cx231xx_board cx231xx_boards[];
949e0d3bafdSSri Deevi extern struct usb_device_id cx231xx_id_table[];
950e0d3bafdSSri Deevi int cx231xx_tuner_callback(void *ptr, int component, int command, int arg);
951e0d3bafdSSri Deevi 
95264fbf444SPalash Bandyopadhyay /* cx23885-417.c                                               */
95364fbf444SPalash Bandyopadhyay extern int cx231xx_417_register(struct cx231xx *dev);
95464fbf444SPalash Bandyopadhyay extern void cx231xx_417_unregister(struct cx231xx *dev);
95564fbf444SPalash Bandyopadhyay 
9569ab66912SMauro Carvalho Chehab /* cx23885-input.c                                             */
9579ab66912SMauro Carvalho Chehab 
9589ab66912SMauro Carvalho Chehab #if defined(CONFIG_VIDEO_CX231XX_RC)
9599ab66912SMauro Carvalho Chehab int cx231xx_ir_init(struct cx231xx *dev);
9609ab66912SMauro Carvalho Chehab void cx231xx_ir_exit(struct cx231xx *dev);
9619ab66912SMauro Carvalho Chehab #else
cx231xx_ir_init(struct cx231xx * dev)96227eb5e24SHans Verkuil static inline int cx231xx_ir_init(struct cx231xx *dev)
96327eb5e24SHans Verkuil {
96427eb5e24SHans Verkuil 	return 0;
96527eb5e24SHans Verkuil }
cx231xx_ir_exit(struct cx231xx * dev)96627eb5e24SHans Verkuil static inline void cx231xx_ir_exit(struct cx231xx *dev) {}
9679ab66912SMauro Carvalho Chehab #endif
9689ab66912SMauro Carvalho Chehab 
norm_maxw(struct cx231xx * dev)969e0d3bafdSSri Deevi static inline unsigned int norm_maxw(struct cx231xx *dev)
970e0d3bafdSSri Deevi {
971e0d3bafdSSri Deevi 	if (dev->board.max_range_640_480)
972e0d3bafdSSri Deevi 		return 640;
973e0d3bafdSSri Deevi 	else
974e0d3bafdSSri Deevi 		return 720;
975e0d3bafdSSri Deevi }
976e0d3bafdSSri Deevi 
norm_maxh(struct cx231xx * dev)977e0d3bafdSSri Deevi static inline unsigned int norm_maxh(struct cx231xx *dev)
978e0d3bafdSSri Deevi {
979e0d3bafdSSri Deevi 	if (dev->board.max_range_640_480)
980e0d3bafdSSri Deevi 		return 480;
981e0d3bafdSSri Deevi 	else
982e0d3bafdSSri Deevi 		return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
983e0d3bafdSSri Deevi }
984e0d3bafdSSri Deevi #endif
985