19c92ab61SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */ 2f7e7b48eSJacob Chen /* 3*e90c9612SAndy Yan * Copyright (C) Rockchip Electronics Co., Ltd. 4f7e7b48eSJacob Chen * Author: Jacob Chen <jacob-chen@iotwrt.com> 5f7e7b48eSJacob Chen */ 6f7e7b48eSJacob Chen #ifndef __RGA_H__ 7f7e7b48eSJacob Chen #define __RGA_H__ 8f7e7b48eSJacob Chen 9f7e7b48eSJacob Chen #include <linux/platform_device.h> 10f7e7b48eSJacob Chen #include <media/videobuf2-v4l2.h> 11f7e7b48eSJacob Chen #include <media/v4l2-ctrls.h> 12f7e7b48eSJacob Chen #include <media/v4l2-device.h> 13f7e7b48eSJacob Chen 14f7e7b48eSJacob Chen #define RGA_NAME "rockchip-rga" 15f7e7b48eSJacob Chen 16f7e7b48eSJacob Chen struct rga_fmt { 17f7e7b48eSJacob Chen u32 fourcc; 18f7e7b48eSJacob Chen int depth; 19f7e7b48eSJacob Chen u8 uv_factor; 20f7e7b48eSJacob Chen u8 y_div; 21f7e7b48eSJacob Chen u8 x_div; 22f7e7b48eSJacob Chen u8 color_swap; 23f7e7b48eSJacob Chen u8 hw_format; 24f7e7b48eSJacob Chen }; 25f7e7b48eSJacob Chen 26f7e7b48eSJacob Chen struct rga_frame { 27f7e7b48eSJacob Chen /* Original dimensions */ 28f7e7b48eSJacob Chen u32 width; 29f7e7b48eSJacob Chen u32 height; 30f7e7b48eSJacob Chen u32 colorspace; 31f7e7b48eSJacob Chen 32f7e7b48eSJacob Chen /* Crop */ 33f7e7b48eSJacob Chen struct v4l2_rect crop; 34f7e7b48eSJacob Chen 35f7e7b48eSJacob Chen /* Image format */ 36f7e7b48eSJacob Chen struct rga_fmt *fmt; 37a61ff67fSMichael Tretter struct v4l2_pix_format_mplane pix; 38f7e7b48eSJacob Chen 39f7e7b48eSJacob Chen /* Variables that can calculated once and reused */ 40f7e7b48eSJacob Chen u32 stride; 41f7e7b48eSJacob Chen u32 size; 42f7e7b48eSJacob Chen }; 43f7e7b48eSJacob Chen 4477f2e2b2SMichael Tretter struct rga_dma_desc { 4577f2e2b2SMichael Tretter u32 addr; 4677f2e2b2SMichael Tretter }; 4777f2e2b2SMichael Tretter 48f7e7b48eSJacob Chen struct rockchip_rga_version { 49f7e7b48eSJacob Chen u32 major; 50f7e7b48eSJacob Chen u32 minor; 51f7e7b48eSJacob Chen }; 52f7e7b48eSJacob Chen 53f7e7b48eSJacob Chen struct rga_ctx { 54f7e7b48eSJacob Chen struct v4l2_fh fh; 55f7e7b48eSJacob Chen struct rockchip_rga *rga; 56f7e7b48eSJacob Chen struct rga_frame in; 57f7e7b48eSJacob Chen struct rga_frame out; 58f7e7b48eSJacob Chen struct v4l2_ctrl_handler ctrl_handler; 59f7e7b48eSJacob Chen 6058154dbdSMichael Tretter int osequence; 6158154dbdSMichael Tretter int csequence; 6258154dbdSMichael Tretter 63f7e7b48eSJacob Chen /* Control values */ 64f7e7b48eSJacob Chen u32 op; 65f7e7b48eSJacob Chen u32 hflip; 66f7e7b48eSJacob Chen u32 vflip; 67f7e7b48eSJacob Chen u32 rotate; 68f7e7b48eSJacob Chen u32 fill_color; 69f7e7b48eSJacob Chen }; 70f7e7b48eSJacob Chen 71f7e7b48eSJacob Chen struct rockchip_rga { 72f7e7b48eSJacob Chen struct v4l2_device v4l2_dev; 73f7e7b48eSJacob Chen struct v4l2_m2m_dev *m2m_dev; 74f7e7b48eSJacob Chen struct video_device *vfd; 75f7e7b48eSJacob Chen 76f7e7b48eSJacob Chen struct device *dev; 77f7e7b48eSJacob Chen struct regmap *grf; 78f7e7b48eSJacob Chen void __iomem *regs; 79f7e7b48eSJacob Chen struct clk *sclk; 80f7e7b48eSJacob Chen struct clk *aclk; 81f7e7b48eSJacob Chen struct clk *hclk; 82f7e7b48eSJacob Chen struct rockchip_rga_version version; 83f7e7b48eSJacob Chen 84f7e7b48eSJacob Chen /* vfd lock */ 85f7e7b48eSJacob Chen struct mutex mutex; 86f7e7b48eSJacob Chen /* ctrl parm lock */ 87f7e7b48eSJacob Chen spinlock_t ctrl_lock; 88f7e7b48eSJacob Chen 89f7e7b48eSJacob Chen struct rga_ctx *curr; 90f7e7b48eSJacob Chen dma_addr_t cmdbuf_phy; 91f7e7b48eSJacob Chen void *cmdbuf_virt; 92f7e7b48eSJacob Chen }; 93f7e7b48eSJacob Chen 9425783e2aSMichael Tretter struct rga_addr_offset { 9525783e2aSMichael Tretter unsigned int y_off; 9625783e2aSMichael Tretter unsigned int u_off; 9725783e2aSMichael Tretter unsigned int v_off; 9825783e2aSMichael Tretter }; 9925783e2aSMichael Tretter 1006040702aSMichael Tretter struct rga_vb_buffer { 1016040702aSMichael Tretter struct vb2_v4l2_buffer vb_buf; 1026040702aSMichael Tretter struct list_head queue; 1036040702aSMichael Tretter 1046040702aSMichael Tretter /* RGA MMU mapping for this buffer */ 1056040702aSMichael Tretter struct rga_dma_desc *dma_desc; 1066040702aSMichael Tretter dma_addr_t dma_desc_pa; 1076040702aSMichael Tretter size_t n_desc; 10825783e2aSMichael Tretter 10925783e2aSMichael Tretter /* Plane offsets of this buffer into the mapping */ 11025783e2aSMichael Tretter struct rga_addr_offset offset; 1116040702aSMichael Tretter }; 1126040702aSMichael Tretter 1136040702aSMichael Tretter static inline struct rga_vb_buffer *vb_to_rga(struct vb2_v4l2_buffer *vb) 1146040702aSMichael Tretter { 1156040702aSMichael Tretter return container_of(vb, struct rga_vb_buffer, vb_buf); 1166040702aSMichael Tretter } 1176040702aSMichael Tretter 118f7e7b48eSJacob Chen struct rga_frame *rga_get_frame(struct rga_ctx *ctx, enum v4l2_buf_type type); 119f7e7b48eSJacob Chen 120f7e7b48eSJacob Chen /* RGA Buffers Manage */ 121f7e7b48eSJacob Chen extern const struct vb2_ops rga_qops; 122f7e7b48eSJacob Chen 123f7e7b48eSJacob Chen /* RGA Hardware */ 124f7e7b48eSJacob Chen static inline void rga_write(struct rockchip_rga *rga, u32 reg, u32 value) 125f7e7b48eSJacob Chen { 126f7e7b48eSJacob Chen writel(value, rga->regs + reg); 127f7e7b48eSJacob Chen }; 128f7e7b48eSJacob Chen 129f7e7b48eSJacob Chen static inline u32 rga_read(struct rockchip_rga *rga, u32 reg) 130f7e7b48eSJacob Chen { 131f7e7b48eSJacob Chen return readl(rga->regs + reg); 132f7e7b48eSJacob Chen }; 133f7e7b48eSJacob Chen 134f7e7b48eSJacob Chen static inline void rga_mod(struct rockchip_rga *rga, u32 reg, u32 val, u32 mask) 135f7e7b48eSJacob Chen { 136f7e7b48eSJacob Chen u32 temp = rga_read(rga, reg) & ~(mask); 137f7e7b48eSJacob Chen 138f7e7b48eSJacob Chen temp |= val & mask; 139f7e7b48eSJacob Chen rga_write(rga, reg, temp); 140f7e7b48eSJacob Chen }; 141f7e7b48eSJacob Chen 1426040702aSMichael Tretter void rga_hw_start(struct rockchip_rga *rga, 1436040702aSMichael Tretter struct rga_vb_buffer *src, struct rga_vb_buffer *dst); 144f7e7b48eSJacob Chen 145f7e7b48eSJacob Chen #endif 146