xref: /linux/drivers/infiniband/hw/hfi1/mad.h (revision ab93e0dd72c37d378dd936f031ffb83ff2bd87ce)
13ec648c6SKrzysztof Kozlowski /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
277241056SMike Marciniszyn /*
3bf90aaddSMichael J. Ruhl  * Copyright(c) 2015 - 2017 Intel Corporation.
477241056SMike Marciniszyn  */
5145eba1aSCai Huoqing 
677241056SMike Marciniszyn #ifndef _HFI1_MAD_H
777241056SMike Marciniszyn #define _HFI1_MAD_H
877241056SMike Marciniszyn 
977241056SMike Marciniszyn #include <rdma/ib_pma.h>
1077241056SMike Marciniszyn #include <rdma/opa_smi.h>
1177241056SMike Marciniszyn #include <rdma/opa_port_info.h>
1277241056SMike Marciniszyn #include "opa_compat.h"
1377241056SMike Marciniszyn 
1471a1d624SJubin John /*
1571a1d624SJubin John  * OPA Traps
1671a1d624SJubin John  */
1771a1d624SJubin John #define OPA_TRAP_GID_NOW_IN_SERVICE             cpu_to_be16(64)
1871a1d624SJubin John #define OPA_TRAP_GID_OUT_OF_SERVICE             cpu_to_be16(65)
1971a1d624SJubin John #define OPA_TRAP_ADD_MULTICAST_GROUP            cpu_to_be16(66)
2071a1d624SJubin John #define OPA_TRAL_DEL_MULTICAST_GROUP            cpu_to_be16(67)
2171a1d624SJubin John #define OPA_TRAP_UNPATH                         cpu_to_be16(68)
2271a1d624SJubin John #define OPA_TRAP_REPATH                         cpu_to_be16(69)
2371a1d624SJubin John #define OPA_TRAP_PORT_CHANGE_STATE              cpu_to_be16(128)
2471a1d624SJubin John #define OPA_TRAP_LINK_INTEGRITY                 cpu_to_be16(129)
2571a1d624SJubin John #define OPA_TRAP_EXCESSIVE_BUFFER_OVERRUN       cpu_to_be16(130)
2671a1d624SJubin John #define OPA_TRAP_FLOW_WATCHDOG                  cpu_to_be16(131)
2771a1d624SJubin John #define OPA_TRAP_CHANGE_CAPABILITY              cpu_to_be16(144)
2871a1d624SJubin John #define OPA_TRAP_CHANGE_SYSGUID                 cpu_to_be16(145)
2971a1d624SJubin John #define OPA_TRAP_BAD_M_KEY                      cpu_to_be16(256)
3071a1d624SJubin John #define OPA_TRAP_BAD_P_KEY                      cpu_to_be16(257)
3171a1d624SJubin John #define OPA_TRAP_BAD_Q_KEY                      cpu_to_be16(258)
3271a1d624SJubin John #define OPA_TRAP_SWITCH_BAD_PKEY                cpu_to_be16(259)
3371a1d624SJubin John #define OPA_SMA_TRAP_DATA_LINK_WIDTH            cpu_to_be16(2048)
3477241056SMike Marciniszyn 
3571a1d624SJubin John /*
3671a1d624SJubin John  * Generic trap/notice other local changes flags (trap 144).
3771a1d624SJubin John  */
3871a1d624SJubin John #define	OPA_NOTICE_TRAP_LWDE_CHG        0x08 /* Link Width Downgrade Enable
3971a1d624SJubin John 					      * changed
4071a1d624SJubin John 					      */
4171a1d624SJubin John #define OPA_NOTICE_TRAP_LSE_CHG         0x04 /* Link Speed Enable changed */
4271a1d624SJubin John #define OPA_NOTICE_TRAP_LWE_CHG         0x02 /* Link Width Enable changed */
4371a1d624SJubin John #define OPA_NOTICE_TRAP_NODE_DESC_CHG   0x01
4471a1d624SJubin John 
4571a1d624SJubin John struct opa_mad_notice_attr {
4671a1d624SJubin John 	u8 generic_type;
4771a1d624SJubin John 	u8 prod_type_msb;
4871a1d624SJubin John 	__be16 prod_type_lsb;
4971a1d624SJubin John 	__be16 trap_num;
5071a1d624SJubin John 	__be16 toggle_count;
5171a1d624SJubin John 	__be32 issuer_lid;
5271a1d624SJubin John 	__be32 reserved1;
5371a1d624SJubin John 	union ib_gid issuer_gid;
5471a1d624SJubin John 
5571a1d624SJubin John 	union {
5671a1d624SJubin John 		struct {
5771a1d624SJubin John 			u8	details[64];
5871a1d624SJubin John 		} raw_data;
5971a1d624SJubin John 
6071a1d624SJubin John 		struct {
6171a1d624SJubin John 			union ib_gid	gid;
6271a1d624SJubin John 		} __packed ntc_64_65_66_67;
6371a1d624SJubin John 
6471a1d624SJubin John 		struct {
6571a1d624SJubin John 			__be32	lid;
6671a1d624SJubin John 		} __packed ntc_128;
6771a1d624SJubin John 
6871a1d624SJubin John 		struct {
6971a1d624SJubin John 			__be32	lid;		/* where violation happened */
7071a1d624SJubin John 			u8	port_num;	/* where violation happened */
7171a1d624SJubin John 		} __packed ntc_129_130_131;
7271a1d624SJubin John 
7371a1d624SJubin John 		struct {
7471a1d624SJubin John 			__be32	lid;		/* LID where change occurred */
7571a1d624SJubin John 			__be32	new_cap_mask;	/* new capability mask */
7671a1d624SJubin John 			__be16	reserved2;
77cb49366fSVishwanathapura, Niranjana 			__be16	cap_mask3;
7871a1d624SJubin John 			__be16	change_flags;	/* low 4 bits only */
7971a1d624SJubin John 		} __packed ntc_144;
8071a1d624SJubin John 
8171a1d624SJubin John 		struct {
8271a1d624SJubin John 			__be64	new_sys_guid;
8371a1d624SJubin John 			__be32	lid;		/* lid where sys guid changed */
8471a1d624SJubin John 		} __packed ntc_145;
8571a1d624SJubin John 
8671a1d624SJubin John 		struct {
8771a1d624SJubin John 			__be32	lid;
8871a1d624SJubin John 			__be32	dr_slid;
8971a1d624SJubin John 			u8	method;
9071a1d624SJubin John 			u8	dr_trunc_hop;
9171a1d624SJubin John 			__be16	attr_id;
9271a1d624SJubin John 			__be32	attr_mod;
9371a1d624SJubin John 			__be64	mkey;
9471a1d624SJubin John 			u8	dr_rtn_path[30];
9571a1d624SJubin John 		} __packed ntc_256;
9671a1d624SJubin John 
9771a1d624SJubin John 		struct {
9871a1d624SJubin John 			__be32		lid1;
9971a1d624SJubin John 			__be32		lid2;
10071a1d624SJubin John 			__be32		key;
10171a1d624SJubin John 			u8		sl;	/* SL: high 5 bits */
10271a1d624SJubin John 			u8		reserved3[3];
10371a1d624SJubin John 			union ib_gid	gid1;
10471a1d624SJubin John 			union ib_gid	gid2;
10571a1d624SJubin John 			__be32		qp1;	/* high 8 bits reserved */
10671a1d624SJubin John 			__be32		qp2;	/* high 8 bits reserved */
10771a1d624SJubin John 		} __packed ntc_257_258;
10871a1d624SJubin John 
10971a1d624SJubin John 		struct {
11071a1d624SJubin John 			__be16		flags;	/* low 8 bits reserved */
11171a1d624SJubin John 			__be16		pkey;
11271a1d624SJubin John 			__be32		lid1;
11371a1d624SJubin John 			__be32		lid2;
11471a1d624SJubin John 			u8		sl;	/* SL: high 5 bits */
11571a1d624SJubin John 			u8		reserved4[3];
11671a1d624SJubin John 			union ib_gid	gid1;
11771a1d624SJubin John 			union ib_gid	gid2;
11871a1d624SJubin John 			__be32		qp1;	/* high 8 bits reserved */
11971a1d624SJubin John 			__be32		qp2;	/* high 8 bits reserved */
12071a1d624SJubin John 		} __packed ntc_259;
12171a1d624SJubin John 
12271a1d624SJubin John 		struct {
12371a1d624SJubin John 			__be32	lid;
12471a1d624SJubin John 		} __packed ntc_2048;
12571a1d624SJubin John 
12671a1d624SJubin John 	};
12771a1d624SJubin John };
12877241056SMike Marciniszyn 
12977241056SMike Marciniszyn #define IB_VLARB_LOWPRI_0_31    1
13077241056SMike Marciniszyn #define IB_VLARB_LOWPRI_32_63   2
13177241056SMike Marciniszyn #define IB_VLARB_HIGHPRI_0_31   3
13277241056SMike Marciniszyn #define IB_VLARB_HIGHPRI_32_63  4
13377241056SMike Marciniszyn 
13477241056SMike Marciniszyn #define OPA_MAX_PREEMPT_CAP         32
13577241056SMike Marciniszyn #define OPA_VLARB_LOW_ELEMENTS       0
13677241056SMike Marciniszyn #define OPA_VLARB_HIGH_ELEMENTS      1
13777241056SMike Marciniszyn #define OPA_VLARB_PREEMPT_ELEMENTS   2
13877241056SMike Marciniszyn #define OPA_VLARB_PREEMPT_MATRIX     3
13977241056SMike Marciniszyn 
14077241056SMike Marciniszyn #define IB_PMA_PORT_COUNTERS_CONG       cpu_to_be16(0xFF00)
14107190076SKamenee Arumugam #define LINK_SPEED_25G		1
14207190076SKamenee Arumugam #define LINK_SPEED_12_5G	2
14307190076SKamenee Arumugam #define LINK_WIDTH_DEFAULT	4
14407190076SKamenee Arumugam #define DECIMAL_FACTORING	1000
14507190076SKamenee Arumugam /*
14607190076SKamenee Arumugam  * The default link width is multiplied by 1000
14707190076SKamenee Arumugam  * to get accurate value after division.
14807190076SKamenee Arumugam  */
14907190076SKamenee Arumugam #define FACTOR_LINK_WIDTH	(LINK_WIDTH_DEFAULT * DECIMAL_FACTORING)
15077241056SMike Marciniszyn 
15177241056SMike Marciniszyn struct ib_pma_portcounters_cong {
15277241056SMike Marciniszyn 	u8 reserved;
15377241056SMike Marciniszyn 	u8 reserved1;
15477241056SMike Marciniszyn 	__be16 port_check_rate;
15577241056SMike Marciniszyn 	__be16 symbol_error_counter;
15677241056SMike Marciniszyn 	u8 link_error_recovery_counter;
15777241056SMike Marciniszyn 	u8 link_downed_counter;
15877241056SMike Marciniszyn 	__be16 port_rcv_errors;
15977241056SMike Marciniszyn 	__be16 port_rcv_remphys_errors;
16077241056SMike Marciniszyn 	__be16 port_rcv_switch_relay_errors;
16177241056SMike Marciniszyn 	__be16 port_xmit_discards;
16277241056SMike Marciniszyn 	u8 port_xmit_constraint_errors;
16377241056SMike Marciniszyn 	u8 port_rcv_constraint_errors;
16477241056SMike Marciniszyn 	u8 reserved2;
16577241056SMike Marciniszyn 	u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
16677241056SMike Marciniszyn 	__be16 reserved3;
16777241056SMike Marciniszyn 	__be16 vl15_dropped;
16877241056SMike Marciniszyn 	__be64 port_xmit_data;
16977241056SMike Marciniszyn 	__be64 port_rcv_data;
17077241056SMike Marciniszyn 	__be64 port_xmit_packets;
17177241056SMike Marciniszyn 	__be64 port_rcv_packets;
17277241056SMike Marciniszyn 	__be64 port_xmit_wait;
17377241056SMike Marciniszyn 	__be64 port_adr_events;
17477241056SMike Marciniszyn } __packed;
17577241056SMike Marciniszyn 
17677241056SMike Marciniszyn #define IB_SMP_UNSUP_VERSION    cpu_to_be16(0x0004)
17777241056SMike Marciniszyn #define IB_SMP_UNSUP_METHOD     cpu_to_be16(0x0008)
17877241056SMike Marciniszyn #define IB_SMP_UNSUP_METH_ATTR  cpu_to_be16(0x000C)
17977241056SMike Marciniszyn #define IB_SMP_INVALID_FIELD    cpu_to_be16(0x001C)
18077241056SMike Marciniszyn 
18177241056SMike Marciniszyn #define OPA_MAX_PREEMPT_CAP         32
18277241056SMike Marciniszyn #define OPA_VLARB_LOW_ELEMENTS       0
18377241056SMike Marciniszyn #define OPA_VLARB_HIGH_ELEMENTS      1
18477241056SMike Marciniszyn #define OPA_VLARB_PREEMPT_ELEMENTS   2
18577241056SMike Marciniszyn #define OPA_VLARB_PREEMPT_MATRIX     3
18677241056SMike Marciniszyn 
18777241056SMike Marciniszyn #define HFI1_XMIT_RATE_UNSUPPORTED               0x0
18877241056SMike Marciniszyn #define HFI1_XMIT_RATE_PICO                      0x7
18977241056SMike Marciniszyn /* number of 4nsec cycles equaling 2secs */
19077241056SMike Marciniszyn #define HFI1_CONG_TIMER_PSINTERVAL               0x1DCD64EC
19177241056SMike Marciniszyn 
19277241056SMike Marciniszyn #define IB_CC_SVCTYPE_RC 0x0
19377241056SMike Marciniszyn #define IB_CC_SVCTYPE_UC 0x1
19477241056SMike Marciniszyn #define IB_CC_SVCTYPE_RD 0x2
19577241056SMike Marciniszyn #define IB_CC_SVCTYPE_UD 0x3
19677241056SMike Marciniszyn 
19777241056SMike Marciniszyn /*
19877241056SMike Marciniszyn  * There should be an equivalent IB #define for the following, but
19977241056SMike Marciniszyn  * I cannot find it.
20077241056SMike Marciniszyn  */
20177241056SMike Marciniszyn #define OPA_CC_LOG_TYPE_HFI	2
20277241056SMike Marciniszyn 
20377241056SMike Marciniszyn struct opa_hfi1_cong_log_event_internal {
20477241056SMike Marciniszyn 	u32 lqpn;
20577241056SMike Marciniszyn 	u32 rqpn;
20677241056SMike Marciniszyn 	u8 sl;
20777241056SMike Marciniszyn 	u8 svc_type;
20877241056SMike Marciniszyn 	u32 rlid;
209d61ea075SMike Marciniszyn 	u64 timestamp; /* wider than 32 bits to detect 32 bit rollover */
21077241056SMike Marciniszyn };
21177241056SMike Marciniszyn 
21277241056SMike Marciniszyn struct opa_hfi1_cong_log_event {
21377241056SMike Marciniszyn 	u8 local_qp_cn_entry[3];
21477241056SMike Marciniszyn 	u8 remote_qp_number_cn_entry[3];
21577241056SMike Marciniszyn 	u8 sl_svc_type_cn_entry; /* 5 bits SL, 3 bits svc type */
21677241056SMike Marciniszyn 	u8 reserved;
21777241056SMike Marciniszyn 	__be32 remote_lid_cn_entry;
21877241056SMike Marciniszyn 	__be32 timestamp_cn_entry;
21977241056SMike Marciniszyn } __packed;
22077241056SMike Marciniszyn 
22177241056SMike Marciniszyn #define OPA_CONG_LOG_ELEMS	96
22277241056SMike Marciniszyn 
22377241056SMike Marciniszyn struct opa_hfi1_cong_log {
22477241056SMike Marciniszyn 	u8 log_type;
22577241056SMike Marciniszyn 	u8 congestion_flags;
22677241056SMike Marciniszyn 	__be16 threshold_event_counter;
22777241056SMike Marciniszyn 	__be32 current_time_stamp;
22877241056SMike Marciniszyn 	u8 threshold_cong_event_map[OPA_MAX_SLS / 8];
22977241056SMike Marciniszyn 	struct opa_hfi1_cong_log_event events[OPA_CONG_LOG_ELEMS];
23077241056SMike Marciniszyn } __packed;
23177241056SMike Marciniszyn 
23277241056SMike Marciniszyn #define IB_CC_TABLE_CAP_DEFAULT 31
23377241056SMike Marciniszyn 
23477241056SMike Marciniszyn /* Port control flags */
23577241056SMike Marciniszyn #define IB_CC_CCS_PC_SL_BASED 0x01
23677241056SMike Marciniszyn 
23777241056SMike Marciniszyn struct opa_congestion_setting_entry {
23877241056SMike Marciniszyn 	u8 ccti_increase;
23977241056SMike Marciniszyn 	u8 reserved;
24077241056SMike Marciniszyn 	__be16 ccti_timer;
24177241056SMike Marciniszyn 	u8 trigger_threshold;
24277241056SMike Marciniszyn 	u8 ccti_min; /* min CCTI for cc table */
24377241056SMike Marciniszyn } __packed;
24477241056SMike Marciniszyn 
24577241056SMike Marciniszyn struct opa_congestion_setting_entry_shadow {
24677241056SMike Marciniszyn 	u8 ccti_increase;
24777241056SMike Marciniszyn 	u8 reserved;
24877241056SMike Marciniszyn 	u16 ccti_timer;
24977241056SMike Marciniszyn 	u8 trigger_threshold;
25077241056SMike Marciniszyn 	u8 ccti_min; /* min CCTI for cc table */
25177241056SMike Marciniszyn } __packed;
25277241056SMike Marciniszyn 
25377241056SMike Marciniszyn struct opa_congestion_setting_attr {
25477241056SMike Marciniszyn 	__be32 control_map;
25577241056SMike Marciniszyn 	__be16 port_control;
25677241056SMike Marciniszyn 	struct opa_congestion_setting_entry entries[OPA_MAX_SLS];
25777241056SMike Marciniszyn } __packed;
25877241056SMike Marciniszyn 
25977241056SMike Marciniszyn struct opa_congestion_setting_attr_shadow {
26077241056SMike Marciniszyn 	u32 control_map;
26177241056SMike Marciniszyn 	u16 port_control;
26277241056SMike Marciniszyn 	struct opa_congestion_setting_entry_shadow entries[OPA_MAX_SLS];
26377241056SMike Marciniszyn } __packed;
26477241056SMike Marciniszyn 
26577241056SMike Marciniszyn #define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
26677241056SMike Marciniszyn #define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
26777241056SMike Marciniszyn 
26877241056SMike Marciniszyn /* 64 Congestion Control table entries in a single MAD */
26977241056SMike Marciniszyn #define IB_CCT_ENTRIES 64
27077241056SMike Marciniszyn #define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
27177241056SMike Marciniszyn 
27277241056SMike Marciniszyn struct ib_cc_table_entry {
27377241056SMike Marciniszyn 	__be16 entry; /* shift:2, multiplier:14 */
27477241056SMike Marciniszyn };
27577241056SMike Marciniszyn 
27677241056SMike Marciniszyn struct ib_cc_table_entry_shadow {
27777241056SMike Marciniszyn 	u16 entry; /* shift:2, multiplier:14 */
27877241056SMike Marciniszyn };
27977241056SMike Marciniszyn 
28077241056SMike Marciniszyn struct ib_cc_table_attr {
28177241056SMike Marciniszyn 	__be16 ccti_limit; /* max CCTI for cc table */
28277241056SMike Marciniszyn 	struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
28377241056SMike Marciniszyn } __packed;
28477241056SMike Marciniszyn 
28577241056SMike Marciniszyn struct ib_cc_table_attr_shadow {
28677241056SMike Marciniszyn 	u16 ccti_limit; /* max CCTI for cc table */
28777241056SMike Marciniszyn 	struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES];
28877241056SMike Marciniszyn } __packed;
28977241056SMike Marciniszyn 
29077241056SMike Marciniszyn #define CC_TABLE_SHADOW_MAX \
29177241056SMike Marciniszyn 	(IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
29277241056SMike Marciniszyn 
29377241056SMike Marciniszyn struct cc_table_shadow {
29477241056SMike Marciniszyn 	u16 ccti_limit; /* max CCTI for cc table */
29577241056SMike Marciniszyn 	struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX];
29677241056SMike Marciniszyn } __packed;
29777241056SMike Marciniszyn 
29877241056SMike Marciniszyn /*
29977241056SMike Marciniszyn  * struct cc_state combines the (active) per-port congestion control
30077241056SMike Marciniszyn  * table, and the (active) per-SL congestion settings. cc_state data
30177241056SMike Marciniszyn  * may need to be read in code paths that we want to be fast, so it
30277241056SMike Marciniszyn  * is an RCU protected structure.
30377241056SMike Marciniszyn  */
30477241056SMike Marciniszyn struct cc_state {
30577241056SMike Marciniszyn 	struct rcu_head rcu;
30677241056SMike Marciniszyn 	struct cc_table_shadow cct;
30777241056SMike Marciniszyn 	struct opa_congestion_setting_attr_shadow cong_setting;
30877241056SMike Marciniszyn };
30977241056SMike Marciniszyn 
31077241056SMike Marciniszyn /*
31177241056SMike Marciniszyn  * OPA BufferControl MAD
31277241056SMike Marciniszyn  */
31377241056SMike Marciniszyn 
31477241056SMike Marciniszyn /* attribute modifier macros */
31577241056SMike Marciniszyn #define OPA_AM_NPORT_SHIFT	24
31677241056SMike Marciniszyn #define OPA_AM_NPORT_MASK	0xff
31777241056SMike Marciniszyn #define OPA_AM_NPORT_SMASK	(OPA_AM_NPORT_MASK << OPA_AM_NPORT_SHIFT)
31877241056SMike Marciniszyn #define OPA_AM_NPORT(am)	(((am) >> OPA_AM_NPORT_SHIFT) & \
31977241056SMike Marciniszyn 					OPA_AM_NPORT_MASK)
32077241056SMike Marciniszyn 
32177241056SMike Marciniszyn #define OPA_AM_NBLK_SHIFT	24
32277241056SMike Marciniszyn #define OPA_AM_NBLK_MASK	0xff
32377241056SMike Marciniszyn #define OPA_AM_NBLK_SMASK	(OPA_AM_NBLK_MASK << OPA_AM_NBLK_SHIFT)
32477241056SMike Marciniszyn #define OPA_AM_NBLK(am)		(((am) >> OPA_AM_NBLK_SHIFT) & \
32577241056SMike Marciniszyn 					OPA_AM_NBLK_MASK)
32677241056SMike Marciniszyn 
32777241056SMike Marciniszyn #define OPA_AM_START_BLK_SHIFT	0
32877241056SMike Marciniszyn #define OPA_AM_START_BLK_MASK	0xff
32977241056SMike Marciniszyn #define OPA_AM_START_BLK_SMASK	(OPA_AM_START_BLK_MASK << \
33077241056SMike Marciniszyn 					OPA_AM_START_BLK_SHIFT)
33177241056SMike Marciniszyn #define OPA_AM_START_BLK(am)	(((am) >> OPA_AM_START_BLK_SHIFT) & \
33277241056SMike Marciniszyn 					OPA_AM_START_BLK_MASK)
33377241056SMike Marciniszyn 
33477241056SMike Marciniszyn #define OPA_AM_PORTNUM_SHIFT	0
33577241056SMike Marciniszyn #define OPA_AM_PORTNUM_MASK	0xff
33677241056SMike Marciniszyn #define OPA_AM_PORTNUM_SMASK	(OPA_AM_PORTNUM_MASK << OPA_AM_PORTNUM_SHIFT)
33777241056SMike Marciniszyn #define OPA_AM_PORTNUM(am)	(((am) >> OPA_AM_PORTNUM_SHIFT) & \
33877241056SMike Marciniszyn 					OPA_AM_PORTNUM_MASK)
33977241056SMike Marciniszyn 
34077241056SMike Marciniszyn #define OPA_AM_ASYNC_SHIFT	12
34177241056SMike Marciniszyn #define OPA_AM_ASYNC_MASK	0x1
34277241056SMike Marciniszyn #define OPA_AM_ASYNC_SMASK	(OPA_AM_ASYNC_MASK << OPA_AM_ASYNC_SHIFT)
34377241056SMike Marciniszyn #define OPA_AM_ASYNC(am)	(((am) >> OPA_AM_ASYNC_SHIFT) & \
34477241056SMike Marciniszyn 					OPA_AM_ASYNC_MASK)
34577241056SMike Marciniszyn 
34677241056SMike Marciniszyn #define OPA_AM_START_SM_CFG_SHIFT	9
34777241056SMike Marciniszyn #define OPA_AM_START_SM_CFG_MASK	0x1
34877241056SMike Marciniszyn #define OPA_AM_START_SM_CFG_SMASK	(OPA_AM_START_SM_CFG_MASK << \
34977241056SMike Marciniszyn 						OPA_AM_START_SM_CFG_SHIFT)
35077241056SMike Marciniszyn #define OPA_AM_START_SM_CFG(am)		(((am) >> OPA_AM_START_SM_CFG_SHIFT) \
35177241056SMike Marciniszyn 						& OPA_AM_START_SM_CFG_MASK)
35277241056SMike Marciniszyn 
35377241056SMike Marciniszyn #define OPA_AM_CI_ADDR_SHIFT	19
35477241056SMike Marciniszyn #define OPA_AM_CI_ADDR_MASK	0xfff
35577241056SMike Marciniszyn #define OPA_AM_CI_ADDR_SMASK	(OPA_AM_CI_ADDR_MASK << OPA_CI_ADDR_SHIFT)
35677241056SMike Marciniszyn #define OPA_AM_CI_ADDR(am)	(((am) >> OPA_AM_CI_ADDR_SHIFT) & \
35777241056SMike Marciniszyn 					OPA_AM_CI_ADDR_MASK)
35877241056SMike Marciniszyn 
35977241056SMike Marciniszyn #define OPA_AM_CI_LEN_SHIFT	13
36077241056SMike Marciniszyn #define OPA_AM_CI_LEN_MASK	0x3f
36177241056SMike Marciniszyn #define OPA_AM_CI_LEN_SMASK	(OPA_AM_CI_LEN_MASK << OPA_CI_LEN_SHIFT)
36277241056SMike Marciniszyn #define OPA_AM_CI_LEN(am)	(((am) >> OPA_AM_CI_LEN_SHIFT) & \
36377241056SMike Marciniszyn 					OPA_AM_CI_LEN_MASK)
36477241056SMike Marciniszyn 
36577241056SMike Marciniszyn /* error info macros */
36677241056SMike Marciniszyn #define OPA_EI_STATUS_SMASK	0x80
36777241056SMike Marciniszyn #define OPA_EI_CODE_SMASK	0x0f
36877241056SMike Marciniszyn 
36977241056SMike Marciniszyn struct vl_limit {
37077241056SMike Marciniszyn 	__be16 dedicated;
37177241056SMike Marciniszyn 	__be16 shared;
37277241056SMike Marciniszyn };
37377241056SMike Marciniszyn 
37477241056SMike Marciniszyn struct buffer_control {
37577241056SMike Marciniszyn 	__be16 reserved;
37677241056SMike Marciniszyn 	__be16 overall_shared_limit;
37777241056SMike Marciniszyn 	struct vl_limit vl[OPA_MAX_VLS];
37877241056SMike Marciniszyn };
37977241056SMike Marciniszyn 
38077241056SMike Marciniszyn struct sc2vlnt {
38177241056SMike Marciniszyn 	u8 vlnt[32]; /* 5 bit VL, 3 bits reserved */
38277241056SMike Marciniszyn };
38377241056SMike Marciniszyn 
38477241056SMike Marciniszyn /*
38577241056SMike Marciniszyn  * The PortSamplesControl.CounterMasks field is an array of 3 bit fields
38677241056SMike Marciniszyn  * which specify the N'th counter's capabilities. See ch. 16.1.3.2.
38777241056SMike Marciniszyn  * We support 5 counters which only count the mandatory quantities.
38877241056SMike Marciniszyn  */
38977241056SMike Marciniszyn #define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
39077241056SMike Marciniszyn #define COUNTER_MASK0_9 \
39177241056SMike Marciniszyn 	cpu_to_be32(COUNTER_MASK(1, 0) | \
39277241056SMike Marciniszyn 		    COUNTER_MASK(1, 1) | \
39377241056SMike Marciniszyn 		    COUNTER_MASK(1, 2) | \
39477241056SMike Marciniszyn 		    COUNTER_MASK(1, 3) | \
39577241056SMike Marciniszyn 		    COUNTER_MASK(1, 4))
39677241056SMike Marciniszyn 
3971fb7f897SMark Bloch void hfi1_event_pkey_change(struct hfi1_devdata *dd, u32 port);
3988064135eSKees Cook void hfi1_handle_trap_timer(struct timer_list *t);
39907190076SKamenee Arumugam u16 tx_link_width(u16 link_width);
40007190076SKamenee Arumugam u64 get_xmit_wait_counters(struct hfi1_pportdata *ppd, u16 link_width,
40107190076SKamenee Arumugam 			   u16 link_speed, int vl);
40207190076SKamenee Arumugam /**
40307190076SKamenee Arumugam  * get_link_speed - determine whether 12.5G or 25G speed
40407190076SKamenee Arumugam  * @link_speed: the speed of active link
40507190076SKamenee Arumugam  * @return: Return 2 if link speed identified as 12.5G
40607190076SKamenee Arumugam  * or return 1 if link speed is 25G.
40707190076SKamenee Arumugam  *
40807190076SKamenee Arumugam  * The function indirectly calculate required link speed
40907190076SKamenee Arumugam  * value for convert_xmit_counter function. If the link
41007190076SKamenee Arumugam  * speed is 25G, the function return as 1 as it is required
41107190076SKamenee Arumugam  * by xmit counter conversion formula :-( 25G / link_speed).
41207190076SKamenee Arumugam  * This conversion will provide value 1 if current
41307190076SKamenee Arumugam  * link speed is 25G or 2 if 12.5G.This is done to avoid
41407190076SKamenee Arumugam  * 12.5 float number conversion.
41507190076SKamenee Arumugam  */
get_link_speed(u16 link_speed)41607190076SKamenee Arumugam static inline u16 get_link_speed(u16 link_speed)
41707190076SKamenee Arumugam {
41807190076SKamenee Arumugam 	return (link_speed == 1) ?
41907190076SKamenee Arumugam 		 LINK_SPEED_12_5G : LINK_SPEED_25G;
42007190076SKamenee Arumugam }
42134d351f8SSebastian Sanchez 
42207190076SKamenee Arumugam /**
42307190076SKamenee Arumugam  * convert_xmit_counter - calculate flit times for given xmit counter
42407190076SKamenee Arumugam  * value
42507190076SKamenee Arumugam  * @xmit_wait_val: current xmit counter value
42607190076SKamenee Arumugam  * @link_width: width of active link
42707190076SKamenee Arumugam  * @link_speed: speed of active link
42807190076SKamenee Arumugam  * @return: return xmit counter value in flit times.
42907190076SKamenee Arumugam  */
convert_xmit_counter(u64 xmit_wait_val,u16 link_width,u16 link_speed)43007190076SKamenee Arumugam static inline u64 convert_xmit_counter(u64 xmit_wait_val, u16 link_width,
43107190076SKamenee Arumugam 				       u16 link_speed)
43207190076SKamenee Arumugam {
43307190076SKamenee Arumugam 	return (xmit_wait_val * 2 * (FACTOR_LINK_WIDTH / link_width)
43407190076SKamenee Arumugam 		 * link_speed) / DECIMAL_FACTORING;
43507190076SKamenee Arumugam }
43677241056SMike Marciniszyn #endif				/* _HFI1_MAD_H */
437