1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * AMD MP2 common macros and structures 4 * 5 * Copyright (c) 2022, Advanced Micro Devices, Inc. 6 * All Rights Reserved. 7 * 8 * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com> 9 */ 10 #ifndef AMD_SFH_COMMON_H 11 #define AMD_SFH_COMMON_H 12 13 #include <linux/pci.h> 14 #include "amd_sfh_hid.h" 15 16 #define PCI_DEVICE_ID_AMD_MP2 0x15E4 17 #define PCI_DEVICE_ID_AMD_MP2_1_1 0x164A 18 19 #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4)) 20 #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4)) 21 22 #define AMD_C2P_MSG_V1(regno) (0x10900 + ((regno) * 4)) 23 #define AMD_P2C_MSG_V1(regno) (0x10500 + ((regno) * 4)) 24 25 #define SENSOR_ENABLED 4 26 #define SENSOR_DISABLED 5 27 28 #define AMD_SFH_IDLE_LOOP 200 29 30 enum cmd_id { 31 NO_OP, 32 ENABLE_SENSOR, 33 DISABLE_SENSOR, 34 STOP_ALL_SENSORS = 8, 35 }; 36 37 struct amd_mp2_sensor_info { 38 u8 sensor_idx; 39 u32 period; 40 dma_addr_t dma_address; 41 }; 42 43 struct sfh_dev_status { 44 bool is_hpd_present; 45 bool is_als_present; 46 bool is_sra_present; 47 }; 48 49 struct amd_mp2_dev { 50 struct pci_dev *pdev; 51 struct amdtp_cl_data *cl_data; 52 void __iomem *mmio; 53 void __iomem *vsbase; 54 const struct amd_sfh1_1_ops *sfh1_1_ops; 55 struct amd_mp2_ops *mp2_ops; 56 struct amd_input_data in_data; 57 /* mp2 active control status */ 58 u32 mp2_acs; 59 struct sfh_dev_status dev_en; 60 struct work_struct work; 61 u8 init_done; 62 u8 rver; 63 }; 64 65 struct amd_mp2_ops { 66 void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info); 67 void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx); 68 void (*stop_all)(struct amd_mp2_dev *privdata); 69 int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts); 70 void (*clear_intr)(struct amd_mp2_dev *privdata); 71 int (*init_intr)(struct amd_mp2_dev *privdata); 72 int (*discovery_status)(struct amd_mp2_dev *privdata); 73 void (*suspend)(struct amd_mp2_dev *mp2); 74 void (*resume)(struct amd_mp2_dev *mp2); 75 void (*remove)(void *privdata); 76 int (*get_rep_desc)(int sensor_idx, u8 rep_desc[]); 77 u32 (*get_desc_sz)(int sensor_idx, int descriptor_name); 78 u8 (*get_feat_rep)(int sensor_idx, int report_id, u8 *feature_report); 79 u8 (*get_in_rep)(u8 current_index, int sensor_idx, int report_id, 80 struct amd_input_data *in_data); 81 }; 82 83 void amd_sfh_work(struct work_struct *work); 84 void amd_sfh_work_buffer(struct work_struct *work); 85 void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata); 86 int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata); 87 void amd_sfh_clear_intr(struct amd_mp2_dev *privdata); 88 int amd_sfh_irq_init(struct amd_mp2_dev *privdata); 89 90 static inline u64 amd_get_c2p_val(struct amd_mp2_dev *mp2, u32 idx) 91 { 92 return mp2->rver == 1 ? AMD_C2P_MSG_V1(idx) : AMD_C2P_MSG(idx); 93 } 94 95 static inline u64 amd_get_p2c_val(struct amd_mp2_dev *mp2, u32 idx) 96 { 97 return mp2->rver == 1 ? AMD_P2C_MSG_V1(idx) : AMD_P2C_MSG(idx); 98 } 99 #endif 100