1dd08ebf6SMatthew Brost /* SPDX-License-Identifier: MIT */ 2dd08ebf6SMatthew Brost /* 3dd08ebf6SMatthew Brost * Copyright © 2022 Intel Corporation 4dd08ebf6SMatthew Brost */ 5dd08ebf6SMatthew Brost 6dd08ebf6SMatthew Brost #ifndef _XE_TUNING_ 7dd08ebf6SMatthew Brost #define _XE_TUNING_ 8dd08ebf6SMatthew Brost 9*067a974fSTvrtko Ursulin struct drm_printer; 10dd08ebf6SMatthew Brost struct xe_gt; 113dbec470SLucas De Marchi struct xe_hw_engine; 12dd08ebf6SMatthew Brost 13*067a974fSTvrtko Ursulin int xe_tuning_init(struct xe_gt *gt); 14dd08ebf6SMatthew Brost void xe_tuning_process_gt(struct xe_gt *gt); 15a617b304SMatt Atwood void xe_tuning_process_engine(struct xe_hw_engine *hwe); 163dbec470SLucas De Marchi void xe_tuning_process_lrc(struct xe_hw_engine *hwe); 17*067a974fSTvrtko Ursulin void xe_tuning_dump(struct xe_gt *gt, struct drm_printer *p); 18dd08ebf6SMatthew Brost 19dd08ebf6SMatthew Brost #endif 20