xref: /linux/drivers/gpu/drm/xe/xe_hw_engine_group.h (revision c771600c6af14749609b49565ffb4cac2959710d)
1f784750cSFrancois Dugast /* SPDX-License-Identifier: MIT */
2f784750cSFrancois Dugast /*
3f784750cSFrancois Dugast  * Copyright © 2024 Intel Corporation
4f784750cSFrancois Dugast  */
5f784750cSFrancois Dugast 
6f784750cSFrancois Dugast #ifndef _XE_HW_ENGINE_GROUP_H_
7f784750cSFrancois Dugast #define _XE_HW_ENGINE_GROUP_H_
8f784750cSFrancois Dugast 
9f784750cSFrancois Dugast #include "xe_hw_engine_group_types.h"
10f784750cSFrancois Dugast 
11f784750cSFrancois Dugast struct drm_device;
127970cb36SFrancois Dugast struct xe_exec_queue;
13f784750cSFrancois Dugast struct xe_gt;
14f784750cSFrancois Dugast 
15f784750cSFrancois Dugast int xe_hw_engine_setup_groups(struct xe_gt *gt);
16f784750cSFrancois Dugast 
177970cb36SFrancois Dugast int xe_hw_engine_group_add_exec_queue(struct xe_hw_engine_group *group, struct xe_exec_queue *q);
187970cb36SFrancois Dugast void xe_hw_engine_group_del_exec_queue(struct xe_hw_engine_group *group, struct xe_exec_queue *q);
197970cb36SFrancois Dugast 
20770bd1d3SFrancois Dugast int xe_hw_engine_group_get_mode(struct xe_hw_engine_group *group,
21770bd1d3SFrancois Dugast 				enum xe_hw_engine_group_execution_mode new_mode,
22770bd1d3SFrancois Dugast 				enum xe_hw_engine_group_execution_mode *previous_mode);
23770bd1d3SFrancois Dugast void xe_hw_engine_group_put(struct xe_hw_engine_group *group);
24770bd1d3SFrancois Dugast 
25d16ef1a1SFrancois Dugast enum xe_hw_engine_group_execution_mode
26d16ef1a1SFrancois Dugast xe_hw_engine_group_find_exec_mode(struct xe_exec_queue *q);
27d16ef1a1SFrancois Dugast void xe_hw_engine_group_resume_faulting_lr_jobs(struct xe_hw_engine_group *group);
28d16ef1a1SFrancois Dugast 
29f784750cSFrancois Dugast #endif
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