1 /* SPDX-License-Identifier: MIT 2 * 3 * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. 4 */ 5 #include "priv.h" 6 7 #include <nvhw/ref/gh100/pri_nv_xal_ep.h> 8 9 static void 10 gh100_instmem_set_bar0_window_addr(struct nvkm_device *device, u64 addr) 11 { 12 nvkm_wr32(device, NV_XAL_EP_BAR0_WINDOW, addr >> NV_XAL_EP_BAR0_WINDOW_BASE_SHIFT); 13 } 14 15 static const struct nvkm_instmem_func 16 gh100_instmem = { 17 .fini = nv50_instmem_fini, 18 .memory_new = nv50_instobj_new, 19 .memory_wrap = nv50_instobj_wrap, 20 .set_bar0_window_addr = gh100_instmem_set_bar0_window_addr, 21 }; 22 23 int 24 gh100_instmem_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, 25 struct nvkm_instmem **pimem) 26 { 27 return r535_instmem_new(&gh100_instmem, device, type, inst, pimem); 28 } 29