1*8a8b1ec5SBen Skeggs /* SPDX-License-Identifier: MIT 2*8a8b1ec5SBen Skeggs * 3*8a8b1ec5SBen Skeggs * Copyright (c) 2025, NVIDIA CORPORATION. All rights reserved. 4*8a8b1ec5SBen Skeggs */ 5*8a8b1ec5SBen Skeggs #ifndef __NVKM_RM_RPC_H__ 6*8a8b1ec5SBen Skeggs #define __NVKM_RM_RPC_H__ 7*8a8b1ec5SBen Skeggs #include "rm.h" 8*8a8b1ec5SBen Skeggs 9*8a8b1ec5SBen Skeggs #define to_payload_hdr(p, header) \ 10*8a8b1ec5SBen Skeggs container_of((void *)p, typeof(*header), params) 11*8a8b1ec5SBen Skeggs 12*8a8b1ec5SBen Skeggs int r535_gsp_rpc_poll(struct nvkm_gsp *, u32 fn); 13*8a8b1ec5SBen Skeggs 14*8a8b1ec5SBen Skeggs struct nvfw_gsp_rpc *r535_gsp_msg_recv(struct nvkm_gsp *, int fn, u32 gsp_rpc_len); 15*8a8b1ec5SBen Skeggs int r535_gsp_msg_ntfy_add(struct nvkm_gsp *, u32 fn, nvkm_gsp_msg_ntfy_func, void *priv); 16*8a8b1ec5SBen Skeggs 17*8a8b1ec5SBen Skeggs int r535_rpc_status_to_errno(uint32_t rpc_status); 18*8a8b1ec5SBen Skeggs #endif 19