1017e6e29SBen Skeggs #ifndef __NV04_DISPLAY_H__ 2017e6e29SBen Skeggs #define __NV04_DISPLAY_H__ 3017e6e29SBen Skeggs 451a3d342SBen Skeggs #include <subdev/bios/pll.h> 551a3d342SBen Skeggs 677145f1cSBen Skeggs #include "nouveau_display.h" 777145f1cSBen Skeggs 8017e6e29SBen Skeggs enum nv04_fp_display_regs { 9017e6e29SBen Skeggs FP_DISPLAY_END, 10017e6e29SBen Skeggs FP_TOTAL, 11017e6e29SBen Skeggs FP_CRTC, 12017e6e29SBen Skeggs FP_SYNC_START, 13017e6e29SBen Skeggs FP_SYNC_END, 14017e6e29SBen Skeggs FP_VALID_START, 15017e6e29SBen Skeggs FP_VALID_END 16017e6e29SBen Skeggs }; 17017e6e29SBen Skeggs 18017e6e29SBen Skeggs struct nv04_crtc_reg { 19017e6e29SBen Skeggs unsigned char MiscOutReg; 20017e6e29SBen Skeggs uint8_t CRTC[0xa0]; 21017e6e29SBen Skeggs uint8_t CR58[0x10]; 22017e6e29SBen Skeggs uint8_t Sequencer[5]; 23017e6e29SBen Skeggs uint8_t Graphics[9]; 24017e6e29SBen Skeggs uint8_t Attribute[21]; 25017e6e29SBen Skeggs unsigned char DAC[768]; 26017e6e29SBen Skeggs 27017e6e29SBen Skeggs /* PCRTC regs */ 28017e6e29SBen Skeggs uint32_t fb_start; 29017e6e29SBen Skeggs uint32_t crtc_cfg; 30017e6e29SBen Skeggs uint32_t cursor_cfg; 31017e6e29SBen Skeggs uint32_t gpio_ext; 32017e6e29SBen Skeggs uint32_t crtc_830; 33017e6e29SBen Skeggs uint32_t crtc_834; 34017e6e29SBen Skeggs uint32_t crtc_850; 35017e6e29SBen Skeggs uint32_t crtc_eng_ctrl; 36017e6e29SBen Skeggs 37017e6e29SBen Skeggs /* PRAMDAC regs */ 38017e6e29SBen Skeggs uint32_t nv10_cursync; 39*be83cd4eSBen Skeggs struct nvkm_pll_vals pllvals; 40017e6e29SBen Skeggs uint32_t ramdac_gen_ctrl; 41017e6e29SBen Skeggs uint32_t ramdac_630; 42017e6e29SBen Skeggs uint32_t ramdac_634; 43017e6e29SBen Skeggs uint32_t tv_setup; 44017e6e29SBen Skeggs uint32_t tv_vtotal; 45017e6e29SBen Skeggs uint32_t tv_vskew; 46017e6e29SBen Skeggs uint32_t tv_vsync_delay; 47017e6e29SBen Skeggs uint32_t tv_htotal; 48017e6e29SBen Skeggs uint32_t tv_hskew; 49017e6e29SBen Skeggs uint32_t tv_hsync_delay; 50017e6e29SBen Skeggs uint32_t tv_hsync_delay2; 51017e6e29SBen Skeggs uint32_t fp_horiz_regs[7]; 52017e6e29SBen Skeggs uint32_t fp_vert_regs[7]; 53017e6e29SBen Skeggs uint32_t dither; 54017e6e29SBen Skeggs uint32_t fp_control; 55017e6e29SBen Skeggs uint32_t dither_regs[6]; 56017e6e29SBen Skeggs uint32_t fp_debug_0; 57017e6e29SBen Skeggs uint32_t fp_debug_1; 58017e6e29SBen Skeggs uint32_t fp_debug_2; 59017e6e29SBen Skeggs uint32_t fp_margin_color; 60017e6e29SBen Skeggs uint32_t ramdac_8c0; 61017e6e29SBen Skeggs uint32_t ramdac_a20; 62017e6e29SBen Skeggs uint32_t ramdac_a24; 63017e6e29SBen Skeggs uint32_t ramdac_a34; 64017e6e29SBen Skeggs uint32_t ctv_regs[38]; 65017e6e29SBen Skeggs }; 66017e6e29SBen Skeggs 67017e6e29SBen Skeggs struct nv04_output_reg { 68017e6e29SBen Skeggs uint32_t output; 69017e6e29SBen Skeggs int head; 70017e6e29SBen Skeggs }; 71017e6e29SBen Skeggs 72017e6e29SBen Skeggs struct nv04_mode_state { 73017e6e29SBen Skeggs struct nv04_crtc_reg crtc_reg[2]; 74017e6e29SBen Skeggs uint32_t pllsel; 75017e6e29SBen Skeggs uint32_t sel_clk; 76017e6e29SBen Skeggs }; 77017e6e29SBen Skeggs 78017e6e29SBen Skeggs struct nv04_display { 79017e6e29SBen Skeggs struct nv04_mode_state mode_reg; 80017e6e29SBen Skeggs struct nv04_mode_state saved_reg; 81017e6e29SBen Skeggs uint32_t saved_vga_font[4][16384]; 82017e6e29SBen Skeggs uint32_t dac_users[4]; 8378ae0ad4SBen Skeggs struct nouveau_bo *image[2]; 84017e6e29SBen Skeggs }; 85017e6e29SBen Skeggs 8677145f1cSBen Skeggs static inline struct nv04_display * 8777145f1cSBen Skeggs nv04_display(struct drm_device *dev) 8877145f1cSBen Skeggs { 8977145f1cSBen Skeggs return nouveau_display(dev)->priv; 9077145f1cSBen Skeggs } 9177145f1cSBen Skeggs 92017e6e29SBen Skeggs /* nv04_display.c */ 93017e6e29SBen Skeggs int nv04_display_create(struct drm_device *); 94017e6e29SBen Skeggs void nv04_display_destroy(struct drm_device *); 95017e6e29SBen Skeggs int nv04_display_init(struct drm_device *); 96017e6e29SBen Skeggs void nv04_display_fini(struct drm_device *); 97017e6e29SBen Skeggs 98017e6e29SBen Skeggs /* nv04_crtc.c */ 99017e6e29SBen Skeggs int nv04_crtc_create(struct drm_device *, int index); 100017e6e29SBen Skeggs 101017e6e29SBen Skeggs /* nv04_dac.c */ 102017e6e29SBen Skeggs int nv04_dac_create(struct drm_connector *, struct dcb_output *); 103017e6e29SBen Skeggs uint32_t nv17_dac_sample_load(struct drm_encoder *encoder); 104017e6e29SBen Skeggs int nv04_dac_output_offset(struct drm_encoder *encoder); 105017e6e29SBen Skeggs void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable); 106017e6e29SBen Skeggs bool nv04_dac_in_use(struct drm_encoder *encoder); 107017e6e29SBen Skeggs 108017e6e29SBen Skeggs /* nv04_dfp.c */ 109017e6e29SBen Skeggs int nv04_dfp_create(struct drm_connector *, struct dcb_output *); 110017e6e29SBen Skeggs int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_output *dcbent); 111017e6e29SBen Skeggs void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_output *dcbent, 112017e6e29SBen Skeggs int head, bool dl); 113017e6e29SBen Skeggs void nv04_dfp_disable(struct drm_device *dev, int head); 114017e6e29SBen Skeggs void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode); 115017e6e29SBen Skeggs 116017e6e29SBen Skeggs /* nv04_tv.c */ 117017e6e29SBen Skeggs int nv04_tv_identify(struct drm_device *dev, int i2c_index); 118017e6e29SBen Skeggs int nv04_tv_create(struct drm_connector *, struct dcb_output *); 119017e6e29SBen Skeggs 120017e6e29SBen Skeggs /* nv17_tv.c */ 121017e6e29SBen Skeggs int nv17_tv_create(struct drm_connector *, struct dcb_output *); 122017e6e29SBen Skeggs 123515de6b2SIlia Mirkin /* overlay.c */ 124515de6b2SIlia Mirkin void nouveau_overlay_init(struct drm_device *dev); 125515de6b2SIlia Mirkin 12677145f1cSBen Skeggs static inline bool 12777145f1cSBen Skeggs nv_two_heads(struct drm_device *dev) 12877145f1cSBen Skeggs { 12977145f1cSBen Skeggs struct nouveau_drm *drm = nouveau_drm(dev); 130ffbab09bSVille Syrjälä const int impl = dev->pdev->device & 0x0ff0; 13177145f1cSBen Skeggs 132967e7bdeSBen Skeggs if (drm->device.info.family >= NV_DEVICE_INFO_V0_CELSIUS && impl != 0x0100 && 13377145f1cSBen Skeggs impl != 0x0150 && impl != 0x01a0 && impl != 0x0200) 13477145f1cSBen Skeggs return true; 13577145f1cSBen Skeggs 13677145f1cSBen Skeggs return false; 13777145f1cSBen Skeggs } 13877145f1cSBen Skeggs 13977145f1cSBen Skeggs static inline bool 14077145f1cSBen Skeggs nv_gf4_disp_arch(struct drm_device *dev) 14177145f1cSBen Skeggs { 142ffbab09bSVille Syrjälä return nv_two_heads(dev) && (dev->pdev->device & 0x0ff0) != 0x0110; 14377145f1cSBen Skeggs } 14477145f1cSBen Skeggs 14577145f1cSBen Skeggs static inline bool 14677145f1cSBen Skeggs nv_two_reg_pll(struct drm_device *dev) 14777145f1cSBen Skeggs { 14877145f1cSBen Skeggs struct nouveau_drm *drm = nouveau_drm(dev); 149ffbab09bSVille Syrjälä const int impl = dev->pdev->device & 0x0ff0; 15077145f1cSBen Skeggs 151967e7bdeSBen Skeggs if (impl == 0x0310 || impl == 0x0340 || drm->device.info.family >= NV_DEVICE_INFO_V0_CURIE) 15277145f1cSBen Skeggs return true; 15377145f1cSBen Skeggs return false; 15477145f1cSBen Skeggs } 15577145f1cSBen Skeggs 15677145f1cSBen Skeggs static inline bool 15777145f1cSBen Skeggs nv_match_device(struct drm_device *dev, unsigned device, 15877145f1cSBen Skeggs unsigned sub_vendor, unsigned sub_device) 15977145f1cSBen Skeggs { 16077145f1cSBen Skeggs return dev->pdev->device == device && 16177145f1cSBen Skeggs dev->pdev->subsystem_vendor == sub_vendor && 16277145f1cSBen Skeggs dev->pdev->subsystem_device == sub_device; 16377145f1cSBen Skeggs } 16477145f1cSBen Skeggs 16577145f1cSBen Skeggs #include <subdev/bios.h> 16677145f1cSBen Skeggs #include <subdev/bios/init.h> 16777145f1cSBen Skeggs 16877145f1cSBen Skeggs static inline void 16977145f1cSBen Skeggs nouveau_bios_run_init_table(struct drm_device *dev, u16 table, 17077145f1cSBen Skeggs struct dcb_output *outp, int crtc) 17177145f1cSBen Skeggs { 172db2bec18SBen Skeggs struct nouveau_drm *drm = nouveau_drm(dev); 173*be83cd4eSBen Skeggs struct nvkm_bios *bios = nvxx_bios(&drm->device); 17477145f1cSBen Skeggs struct nvbios_init init = { 17577145f1cSBen Skeggs .subdev = nv_subdev(bios), 17677145f1cSBen Skeggs .bios = bios, 17777145f1cSBen Skeggs .offset = table, 17877145f1cSBen Skeggs .outp = outp, 17977145f1cSBen Skeggs .crtc = crtc, 18077145f1cSBen Skeggs .execute = 1, 18177145f1cSBen Skeggs }; 18277145f1cSBen Skeggs 18377145f1cSBen Skeggs nvbios_exec(&init); 18477145f1cSBen Skeggs } 18577145f1cSBen Skeggs 186017e6e29SBen Skeggs #endif 187