xref: /linux/drivers/gpu/drm/msm/hdmi/hdmi_phy_8960.c (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*caab277bSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2c8afe684SRob Clark /*
3c8afe684SRob Clark  * Copyright (C) 2013 Red Hat
4c8afe684SRob Clark  * Author: Rob Clark <robdclark@gmail.com>
5c8afe684SRob Clark  */
6c8afe684SRob Clark 
7c8afe684SRob Clark #include "hdmi.h"
8c8afe684SRob Clark 
hdmi_phy_8960_powerup(struct hdmi_phy * phy,unsigned long int pixclock)9c8afe684SRob Clark static void hdmi_phy_8960_powerup(struct hdmi_phy *phy,
10c8afe684SRob Clark 				  unsigned long int pixclock)
11c8afe684SRob Clark {
12034fbcc3SRob Clark 	DBG("pixclock: %lu", pixclock);
13034fbcc3SRob Clark 
14ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x00);
15ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG0, 0x1b);
16ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG1, 0xf2);
17ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG4, 0x00);
18ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG5, 0x00);
19ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG6, 0x00);
20ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG7, 0x00);
21ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG8, 0x00);
22ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG9, 0x00);
23ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG10, 0x00);
24ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG11, 0x00);
25ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG3, 0x20);
26c8afe684SRob Clark }
27c8afe684SRob Clark 
hdmi_phy_8960_powerdown(struct hdmi_phy * phy)28c8afe684SRob Clark static void hdmi_phy_8960_powerdown(struct hdmi_phy *phy)
29c8afe684SRob Clark {
30034fbcc3SRob Clark 	DBG("");
31034fbcc3SRob Clark 
32ba3d7bf3SArchit Taneja 	hdmi_phy_write(phy, REG_HDMI_8960_PHY_REG2, 0x7f);
33c8afe684SRob Clark }
34c8afe684SRob Clark 
3515b4a452SArchit Taneja static const char * const hdmi_phy_8960_reg_names[] = {
3615b4a452SArchit Taneja 	"core-vdda",
3715b4a452SArchit Taneja };
3815b4a452SArchit Taneja 
3915b4a452SArchit Taneja static const char * const hdmi_phy_8960_clk_names[] = {
40aede1e9eSRob Clark 	"slave_iface",
4115b4a452SArchit Taneja };
4215b4a452SArchit Taneja 
43fcda50c8SArnd Bergmann const struct hdmi_phy_cfg msm_hdmi_phy_8960_cfg = {
4415b4a452SArchit Taneja 	.type = MSM_HDMI_PHY_8960,
4515b4a452SArchit Taneja 	.powerup = hdmi_phy_8960_powerup,
4615b4a452SArchit Taneja 	.powerdown = hdmi_phy_8960_powerdown,
4715b4a452SArchit Taneja 	.reg_names = hdmi_phy_8960_reg_names,
4815b4a452SArchit Taneja 	.num_regs = ARRAY_SIZE(hdmi_phy_8960_reg_names),
4915b4a452SArchit Taneja 	.clk_names = hdmi_phy_8960_clk_names,
5015b4a452SArchit Taneja 	.num_clks = ARRAY_SIZE(hdmi_phy_8960_clk_names),
5115b4a452SArchit Taneja };
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