xref: /linux/drivers/gpu/drm/hisilicon/hibmc/dp/dp_hw.h (revision e78f70bad29c5ae1e1076698b690b15794e9b81e)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /* Copyright (c) 2024 Hisilicon Limited. */
3 
4 #ifndef DP_KAPI_H
5 #define DP_KAPI_H
6 
7 #include <linux/types.h>
8 #include <linux/delay.h>
9 #include <drm/drm_device.h>
10 #include <drm/drm_encoder.h>
11 #include <drm/drm_connector.h>
12 #include <drm/drm_print.h>
13 #include <drm/display/drm_dp_helper.h>
14 
15 struct hibmc_dp_dev;
16 
17 enum hibmc_dp_cbar_pattern {
18 	CBAR_COLOR_BAR,
19 	CBAR_WHITE,
20 	CBAR_RED,
21 	CBAR_ORANGE,
22 	CBAR_YELLOW,
23 	CBAR_GREEN,
24 	CBAR_CYAN,
25 	CBAR_BLUE,
26 	CBAR_PURPLE,
27 	CBAR_BLACK,
28 };
29 
30 struct hibmc_dp_color_raw {
31 	enum hibmc_dp_cbar_pattern pattern;
32 	u32 r_value;
33 	u32 g_value;
34 	u32 b_value;
35 };
36 
37 struct hibmc_dp_cbar_cfg {
38 	u8 enable;
39 	u8 self_timing;
40 	u8 dynamic_rate; /* 0:static, 1-255(frame):dynamic */
41 	enum hibmc_dp_cbar_pattern pattern;
42 };
43 
44 struct hibmc_dp {
45 	struct hibmc_dp_dev *dp_dev;
46 	struct drm_device *drm_dev;
47 	struct drm_encoder encoder;
48 	struct drm_connector connector;
49 	void __iomem *mmio;
50 	struct drm_dp_aux aux;
51 	struct hibmc_dp_cbar_cfg cfg;
52 	u32 irq_status;
53 };
54 
55 int hibmc_dp_hw_init(struct hibmc_dp *dp);
56 int hibmc_dp_mode_set(struct hibmc_dp *dp, struct drm_display_mode *mode);
57 void hibmc_dp_display_en(struct hibmc_dp *dp, bool enable);
58 void hibmc_dp_set_cbar(struct hibmc_dp *dp, const struct hibmc_dp_cbar_cfg *cfg);
59 void hibmc_dp_reset_link(struct hibmc_dp *dp);
60 void hibmc_dp_hpd_cfg(struct hibmc_dp *dp);
61 void hibmc_dp_enable_int(struct hibmc_dp *dp);
62 void hibmc_dp_disable_int(struct hibmc_dp *dp);
63 
64 #endif
65