xref: /linux/drivers/gpu/drm/ast/ast_post.h (revision 820845ce37b0fb8a4b43a7fbe745e59f6199fb27)
1 /* SPDX-License-Identifier: MIT */
2 
3 #ifndef AST_POST_H
4 #define AST_POST_H
5 
6 #include <linux/limits.h>
7 #include <linux/types.h>
8 
9 struct ast_device;
10 
11 /* DRAM timing tables */
12 struct ast_dramstruct {
13 	u16 index;
14 	u32 data;
15 };
16 
17 /* hardware fields */
18 #define __AST_DRAMSTRUCT_DRAM_TYPE      0x0004
19 
20 /* control commands */
21 #define __AST_DRAMSTRUCT_UDELAY         0xff00
22 #define __AST_DRAMSTRUCT_INVALID        0xffff
23 
24 #define __AST_DRAMSTRUCT_INDEX(_name) \
25 	(__AST_DRAMSTRUCT_ ## _name)
26 
27 #define AST_DRAMSTRUCT_INIT(_name, _value) \
28 	{ __AST_DRAMSTRUCT_INDEX(_name), (_value) }
29 
30 #define AST_DRAMSTRUCT_UDELAY(_usecs) \
31 	AST_DRAMSTRUCT_INIT(UDELAY, _usecs)
32 #define AST_DRAMSTRUCT_INVALID \
33 	AST_DRAMSTRUCT_INIT(INVALID, U32_MAX)
34 
35 #define AST_DRAMSTRUCT_IS(_entry, _name) \
36 	((_entry)->index == __AST_DRAMSTRUCT_INDEX(_name))
37 
38 u32 __ast_mindwm(void __iomem *regs, u32 r);
39 void __ast_moutdwm(void __iomem *regs, u32 r, u32 v);
40 
41 bool mmc_test(struct ast_device *ast, u32 datagen, u8 test_ctl);
42 bool mmc_test_burst(struct ast_device *ast, u32 datagen);
43 
44 /* ast_2000.c */
45 void ast_2000_set_def_ext_reg(struct ast_device *ast);
46 
47 /* ast_2300.c */
48 void ast_2300_set_def_ext_reg(struct ast_device *ast);
49 
50 #endif
51