179df9413SEvan Quan /* 279df9413SEvan Quan * Copyright 2018 Advanced Micro Devices, Inc. 379df9413SEvan Quan * 479df9413SEvan Quan * Permission is hereby granted, free of charge, to any person obtaining a 579df9413SEvan Quan * copy of this software and associated documentation files (the "Software"), 679df9413SEvan Quan * to deal in the Software without restriction, including without limitation 779df9413SEvan Quan * the rights to use, copy, modify, merge, publish, distribute, sublicense, 879df9413SEvan Quan * and/or sell copies of the Software, and to permit persons to whom the 979df9413SEvan Quan * Software is furnished to do so, subject to the following conditions: 1079df9413SEvan Quan * 1179df9413SEvan Quan * The above copyright notice and this permission notice shall be included in 1279df9413SEvan Quan * all copies or substantial portions of the Software. 1379df9413SEvan Quan * 1479df9413SEvan Quan * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 1579df9413SEvan Quan * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 1679df9413SEvan Quan * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 1779df9413SEvan Quan * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 1879df9413SEvan Quan * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 1979df9413SEvan Quan * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 2079df9413SEvan Quan * OTHER DEALINGS IN THE SOFTWARE. 2179df9413SEvan Quan * 2279df9413SEvan Quan */ 2379df9413SEvan Quan 2479df9413SEvan Quan #ifndef VEGA20_PP_SMC_H 2579df9413SEvan Quan #define VEGA20_PP_SMC_H 2679df9413SEvan Quan 2779df9413SEvan Quan #pragma pack(push, 1) 2879df9413SEvan Quan 2979df9413SEvan Quan // SMU Response Codes: 3079df9413SEvan Quan #define PPSMC_Result_OK 0x1 3179df9413SEvan Quan #define PPSMC_Result_Failed 0xFF 3279df9413SEvan Quan #define PPSMC_Result_UnknownCmd 0xFE 3379df9413SEvan Quan #define PPSMC_Result_CmdRejectedPrereq 0xFD 3479df9413SEvan Quan #define PPSMC_Result_CmdRejectedBusy 0xFC 3579df9413SEvan Quan 3679df9413SEvan Quan // Message Definitions: 3779df9413SEvan Quan #define PPSMC_MSG_TestMessage 0x1 3879df9413SEvan Quan #define PPSMC_MSG_GetSmuVersion 0x2 3979df9413SEvan Quan #define PPSMC_MSG_GetDriverIfVersion 0x3 4079df9413SEvan Quan #define PPSMC_MSG_SetAllowedFeaturesMaskLow 0x4 4179df9413SEvan Quan #define PPSMC_MSG_SetAllowedFeaturesMaskHigh 0x5 4279df9413SEvan Quan #define PPSMC_MSG_EnableAllSmuFeatures 0x6 4379df9413SEvan Quan #define PPSMC_MSG_DisableAllSmuFeatures 0x7 4479df9413SEvan Quan #define PPSMC_MSG_EnableSmuFeaturesLow 0x8 4579df9413SEvan Quan #define PPSMC_MSG_EnableSmuFeaturesHigh 0x9 4679df9413SEvan Quan #define PPSMC_MSG_DisableSmuFeaturesLow 0xA 4779df9413SEvan Quan #define PPSMC_MSG_DisableSmuFeaturesHigh 0xB 4879df9413SEvan Quan #define PPSMC_MSG_GetEnabledSmuFeaturesLow 0xC 4979df9413SEvan Quan #define PPSMC_MSG_GetEnabledSmuFeaturesHigh 0xD 5079df9413SEvan Quan #define PPSMC_MSG_SetWorkloadMask 0xE 5179df9413SEvan Quan #define PPSMC_MSG_SetPptLimit 0xF 5279df9413SEvan Quan #define PPSMC_MSG_SetDriverDramAddrHigh 0x10 5379df9413SEvan Quan #define PPSMC_MSG_SetDriverDramAddrLow 0x11 5479df9413SEvan Quan #define PPSMC_MSG_SetToolsDramAddrHigh 0x12 5579df9413SEvan Quan #define PPSMC_MSG_SetToolsDramAddrLow 0x13 5679df9413SEvan Quan #define PPSMC_MSG_TransferTableSmu2Dram 0x14 5779df9413SEvan Quan #define PPSMC_MSG_TransferTableDram2Smu 0x15 5879df9413SEvan Quan #define PPSMC_MSG_UseDefaultPPTable 0x16 5979df9413SEvan Quan #define PPSMC_MSG_UseBackupPPTable 0x17 6079df9413SEvan Quan #define PPSMC_MSG_RunBtc 0x18 6179df9413SEvan Quan #define PPSMC_MSG_RequestI2CBus 0x19 6279df9413SEvan Quan #define PPSMC_MSG_ReleaseI2CBus 0x1A 6379df9413SEvan Quan #define PPSMC_MSG_SetFloorSocVoltage 0x21 6479df9413SEvan Quan #define PPSMC_MSG_SoftReset 0x22 6579df9413SEvan Quan #define PPSMC_MSG_StartBacoMonitor 0x23 6679df9413SEvan Quan #define PPSMC_MSG_CancelBacoMonitor 0x24 6779df9413SEvan Quan #define PPSMC_MSG_EnterBaco 0x25 6879df9413SEvan Quan #define PPSMC_MSG_SetSoftMinByFreq 0x26 6979df9413SEvan Quan #define PPSMC_MSG_SetSoftMaxByFreq 0x27 7079df9413SEvan Quan #define PPSMC_MSG_SetHardMinByFreq 0x28 7179df9413SEvan Quan #define PPSMC_MSG_SetHardMaxByFreq 0x29 7279df9413SEvan Quan #define PPSMC_MSG_GetMinDpmFreq 0x2A 7379df9413SEvan Quan #define PPSMC_MSG_GetMaxDpmFreq 0x2B 7479df9413SEvan Quan #define PPSMC_MSG_GetDpmFreqByIndex 0x2C 7579df9413SEvan Quan #define PPSMC_MSG_GetDpmClockFreq 0x2D 7679df9413SEvan Quan #define PPSMC_MSG_GetSsVoltageByDpm 0x2E 7779df9413SEvan Quan #define PPSMC_MSG_SetMemoryChannelConfig 0x2F 7879df9413SEvan Quan #define PPSMC_MSG_SetGeminiMode 0x30 7979df9413SEvan Quan #define PPSMC_MSG_SetGeminiApertureHigh 0x31 8079df9413SEvan Quan #define PPSMC_MSG_SetGeminiApertureLow 0x32 8179df9413SEvan Quan #define PPSMC_MSG_SetMinLinkDpmByIndex 0x33 8279df9413SEvan Quan #define PPSMC_MSG_OverridePcieParameters 0x34 8379df9413SEvan Quan #define PPSMC_MSG_OverDriveSetPercentage 0x35 8479df9413SEvan Quan #define PPSMC_MSG_SetMinDeepSleepDcefclk 0x36 8579df9413SEvan Quan #define PPSMC_MSG_ReenableAcDcInterrupt 0x37 8679df9413SEvan Quan #define PPSMC_MSG_NotifyPowerSource 0x38 8779df9413SEvan Quan #define PPSMC_MSG_SetUclkFastSwitch 0x39 8879df9413SEvan Quan #define PPSMC_MSG_SetUclkDownHyst 0x3A 8979df9413SEvan Quan //#define PPSMC_MSG_GfxDeviceDriverReset 0x3B 9079df9413SEvan Quan #define PPSMC_MSG_GetCurrentRpm 0x3C 9179df9413SEvan Quan #define PPSMC_MSG_SetVideoFps 0x3D 9279df9413SEvan Quan #define PPSMC_MSG_SetTjMax 0x3E 9379df9413SEvan Quan #define PPSMC_MSG_SetFanTemperatureTarget 0x3F 9479df9413SEvan Quan #define PPSMC_MSG_PrepareMp1ForUnload 0x40 9579df9413SEvan Quan #define PPSMC_MSG_DramLogSetDramAddrHigh 0x41 9679df9413SEvan Quan #define PPSMC_MSG_DramLogSetDramAddrLow 0x42 9779df9413SEvan Quan #define PPSMC_MSG_DramLogSetDramSize 0x43 9879df9413SEvan Quan #define PPSMC_MSG_SetFanMaxRpm 0x44 9979df9413SEvan Quan #define PPSMC_MSG_SetFanMinPwm 0x45 10079df9413SEvan Quan #define PPSMC_MSG_ConfigureGfxDidt 0x46 10179df9413SEvan Quan #define PPSMC_MSG_NumOfDisplays 0x47 10279df9413SEvan Quan #define PPSMC_MSG_RemoveMargins 0x48 10379df9413SEvan Quan #define PPSMC_MSG_ReadSerialNumTop32 0x49 10479df9413SEvan Quan #define PPSMC_MSG_ReadSerialNumBottom32 0x4A 10579df9413SEvan Quan #define PPSMC_MSG_SetSystemVirtualDramAddrHigh 0x4B 10679df9413SEvan Quan #define PPSMC_MSG_SetSystemVirtualDramAddrLow 0x4C 10779df9413SEvan Quan #define PPSMC_MSG_WaflTest 0x4D 1083c7eda0bSEvan Quan #define PPSMC_MSG_SetFclkGfxClkRatio 0x4E 1093c7eda0bSEvan Quan // Unused ID 0x4F to 0x50 11079df9413SEvan Quan #define PPSMC_MSG_AllowGfxOff 0x51 11179df9413SEvan Quan #define PPSMC_MSG_DisallowGfxOff 0x52 11279df9413SEvan Quan #define PPSMC_MSG_GetPptLimit 0x53 11379df9413SEvan Quan #define PPSMC_MSG_GetDcModeMaxDpmFreq 0x54 11479df9413SEvan Quan #define PPSMC_MSG_GetDebugData 0x55 11579df9413SEvan Quan #define PPSMC_MSG_SetXgmiMode 0x56 11679df9413SEvan Quan #define PPSMC_MSG_RunAfllBtc 0x57 11779df9413SEvan Quan #define PPSMC_MSG_ExitBaco 0x58 11879df9413SEvan Quan #define PPSMC_MSG_PrepareMp1ForReset 0x59 11979df9413SEvan Quan #define PPSMC_MSG_PrepareMp1ForShutdown 0x5A 12079df9413SEvan Quan #define PPSMC_MSG_SetMGpuFanBoostLimitRpm 0x5D 121b1f82cb2SEvan Quan #define PPSMC_MSG_GetAVFSVoltageByDpm 0x5F 1220c5ccf14SEvan Quan #define PPSMC_MSG_BacoWorkAroundFlushVDCI 0x60 123*06615f9aSEvan Quan #define PPSMC_MSG_DFCstateControl 0x63 124*06615f9aSEvan Quan #define PPSMC_Message_Count 0x64 12579df9413SEvan Quan 12679df9413SEvan Quan typedef uint32_t PPSMC_Result; 12779df9413SEvan Quan typedef uint32_t PPSMC_Msg; 12879df9413SEvan Quan 12979df9413SEvan Quan #pragma pack(pop) 13079df9413SEvan Quan 13179df9413SEvan Quan #endif 132