1 // SPDX-License-Identifier: MIT 2 // 3 // Copyright 2024 Advanced Micro Devices, Inc. 4 5 #include "dce110/dce110_hwseq.h" 6 #include "dcn10/dcn10_hwseq.h" 7 #include "dcn20/dcn20_hwseq.h" 8 #include "dcn21/dcn21_hwseq.h" 9 #include "dcn30/dcn30_hwseq.h" 10 #include "dcn31/dcn31_hwseq.h" 11 #include "dcn32/dcn32_hwseq.h" 12 #include "dcn401/dcn401_hwseq.h" 13 #include "dcn401_init.h" 14 15 static const struct hw_sequencer_funcs dcn401_funcs = { 16 .program_gamut_remap = dcn401_program_gamut_remap, 17 .init_hw = dcn401_init_hw, 18 .apply_ctx_to_hw = dce110_apply_ctx_to_hw, 19 .apply_ctx_for_surface = NULL, 20 .program_front_end_for_ctx = dcn20_program_front_end_for_ctx, 21 .wait_for_pending_cleared = dcn10_wait_for_pending_cleared, 22 .post_unlock_program_front_end = dcn20_post_unlock_program_front_end, 23 .update_plane_addr = dcn20_update_plane_addr, 24 .update_dchub = dcn10_update_dchub, 25 .update_pending_status = dcn10_update_pending_status, 26 .program_output_csc = dcn20_program_output_csc, 27 .trigger_3dlut_dma_load = dcn401_trigger_3dlut_dma_load, 28 .enable_accelerated_mode = dce110_enable_accelerated_mode, 29 .enable_timing_synchronization = dcn10_enable_timing_synchronization, 30 .enable_per_frame_crtc_position_reset = dcn10_enable_per_frame_crtc_position_reset, 31 .update_info_frame = dcn31_update_info_frame, 32 .send_immediate_sdp_message = dcn10_send_immediate_sdp_message, 33 .enable_stream = dcn401_enable_stream, 34 .disable_stream = dce110_disable_stream, 35 .unblank_stream = dcn401_unblank_stream, 36 .blank_stream = dce110_blank_stream, 37 .enable_audio_stream = dce110_enable_audio_stream, 38 .disable_audio_stream = dce110_disable_audio_stream, 39 .disable_plane = dcn20_disable_plane, 40 .pipe_control_lock = dcn20_pipe_control_lock, 41 .interdependent_update_lock = dcn401_interdependent_update_lock, 42 .cursor_lock = dcn10_cursor_lock, 43 .prepare_bandwidth = dcn401_prepare_bandwidth, 44 .optimize_bandwidth = dcn401_optimize_bandwidth, 45 .update_bandwidth = dcn20_update_bandwidth, 46 .set_drr = dcn10_set_drr, 47 .get_position = dcn10_get_position, 48 .set_static_screen_control = dcn31_set_static_screen_control, 49 .setup_stereo = dcn10_setup_stereo, 50 .set_avmute = dcn30_set_avmute, 51 .log_hw_state = dcn10_log_hw_state, 52 .get_hw_state = dcn10_get_hw_state, 53 .clear_status_bits = dcn10_clear_status_bits, 54 .wait_for_mpcc_disconnect = dcn10_wait_for_mpcc_disconnect, 55 .edp_backlight_control = dce110_edp_backlight_control, 56 .edp_power_control = dce110_edp_power_control, 57 .edp_wait_for_hpd_ready = dce110_edp_wait_for_hpd_ready, 58 .edp_wait_for_T12 = dce110_edp_wait_for_T12, 59 .set_cursor_position = dcn401_set_cursor_position, 60 .set_cursor_attribute = dcn10_set_cursor_attribute, 61 .set_cursor_sdr_white_level = dcn10_set_cursor_sdr_white_level, 62 .setup_periodic_interrupt = dcn10_setup_periodic_interrupt, 63 .set_clock = dcn10_set_clock, 64 .get_clock = dcn10_get_clock, 65 .program_triplebuffer = dcn20_program_triple_buffer, 66 .enable_writeback = dcn30_enable_writeback, 67 .disable_writeback = dcn30_disable_writeback, 68 .update_writeback = dcn30_update_writeback, 69 .mmhubbub_warmup = dcn30_mmhubbub_warmup, 70 .dmdata_status_done = dcn20_dmdata_status_done, 71 .program_dmdata_engine = dcn30_program_dmdata_engine, 72 .set_dmdata_attributes = dcn20_set_dmdata_attributes, 73 .init_sys_ctx = dcn20_init_sys_ctx, 74 .init_vm_ctx = dcn20_init_vm_ctx, 75 .set_flip_control_gsl = dcn20_set_flip_control_gsl, 76 .get_vupdate_offset_from_vsync = dcn10_get_vupdate_offset_from_vsync, 77 .calc_vupdate_position = dcn10_calc_vupdate_position, 78 .apply_idle_power_optimizations = dcn401_apply_idle_power_optimizations, 79 .does_plane_fit_in_mall = NULL, 80 .set_backlight_level = dcn21_set_backlight_level, 81 .set_abm_immediate_disable = dcn21_set_abm_immediate_disable, 82 .hardware_release = dcn401_hardware_release, 83 .set_pipe = dcn21_set_pipe, 84 .enable_lvds_link_output = dce110_enable_lvds_link_output, 85 .enable_tmds_link_output = dce110_enable_tmds_link_output, 86 .enable_dp_link_output = dce110_enable_dp_link_output, 87 .disable_link_output = dcn32_disable_link_output, 88 .set_disp_pattern_generator = dcn30_set_disp_pattern_generator, 89 .get_dcc_en_bits = dcn10_get_dcc_en_bits, 90 .enable_phantom_streams = dcn32_enable_phantom_streams, 91 .disable_phantom_streams = dcn32_disable_phantom_streams, 92 .update_visual_confirm_color = dcn10_update_visual_confirm_color, 93 .update_phantom_vp_position = dcn32_update_phantom_vp_position, 94 .update_dsc_pg = dcn32_update_dsc_pg, 95 .apply_update_flags_for_phantom = dcn32_apply_update_flags_for_phantom, 96 .blank_phantom = dcn32_blank_phantom, 97 .wait_for_dcc_meta_propagation = dcn401_wait_for_dcc_meta_propagation, 98 .is_pipe_topology_transition_seamless = dcn32_is_pipe_topology_transition_seamless, 99 .fams2_global_control_lock = dcn401_fams2_global_control_lock, 100 .fams2_update_config = dcn401_fams2_update_config, 101 .fams2_global_control_lock_fast = dcn401_fams2_global_control_lock_fast, 102 .program_outstanding_updates = dcn401_program_outstanding_updates, 103 }; 104 105 static const struct hwseq_private_funcs dcn401_private_funcs = { 106 .init_pipes = dcn10_init_pipes, 107 .plane_atomic_disconnect = dcn10_plane_atomic_disconnect, 108 .update_mpcc = dcn20_update_mpcc, 109 .set_input_transfer_func = dcn32_set_input_transfer_func, 110 .set_output_transfer_func = dcn401_set_output_transfer_func, 111 .power_down = dce110_power_down, 112 .enable_display_power_gating = dcn10_dummy_display_power_gating, 113 .blank_pixel_data = dcn20_blank_pixel_data, 114 .reset_hw_ctx_wrap = dcn20_reset_hw_ctx_wrap, 115 .enable_stream_timing = dcn401_enable_stream_timing, 116 .edp_backlight_control = dce110_edp_backlight_control, 117 .setup_vupdate_interrupt = dcn20_setup_vupdate_interrupt, 118 .did_underflow_occur = dcn10_did_underflow_occur, 119 .init_blank = dcn32_init_blank, 120 .disable_vga = dcn20_disable_vga, 121 .bios_golden_init = dcn10_bios_golden_init, 122 .plane_atomic_disable = dcn20_plane_atomic_disable, 123 .plane_atomic_power_down = dcn10_plane_atomic_power_down, 124 .enable_power_gating_plane = dcn32_enable_power_gating_plane, 125 .hubp_pg_control = dcn32_hubp_pg_control, 126 .program_all_writeback_pipes_in_tree = dcn30_program_all_writeback_pipes_in_tree, 127 .update_odm = dcn401_update_odm, 128 .dsc_pg_control = dcn32_dsc_pg_control, 129 .dsc_pg_status = dcn32_dsc_pg_status, 130 .set_hdr_multiplier = dcn10_set_hdr_multiplier, 131 .verify_allow_pstate_change_high = dcn10_verify_allow_pstate_change_high, 132 .wait_for_blank_complete = dcn20_wait_for_blank_complete, 133 .dccg_init = dcn20_dccg_init, 134 .set_mcm_luts = dcn401_set_mcm_luts, 135 .program_mall_pipe_config = dcn32_program_mall_pipe_config, 136 .update_mall_sel = dcn32_update_mall_sel, 137 .calculate_dccg_k1_k2_values = NULL, 138 .apply_single_controller_ctx_to_hw = dce110_apply_single_controller_ctx_to_hw, 139 .reset_back_end_for_pipe = dcn20_reset_back_end_for_pipe, 140 .populate_mcm_luts = NULL, 141 }; 142 143 void dcn401_hw_sequencer_init_functions(struct dc *dc) 144 { 145 dc->hwss = dcn401_funcs; 146 dc->hwseq->funcs = dcn401_private_funcs; 147 } 148