1547aad32SSaleemkhan Jamadar /* 2547aad32SSaleemkhan Jamadar * Copyright 2023 Advanced Micro Devices, Inc. 3547aad32SSaleemkhan Jamadar * 4547aad32SSaleemkhan Jamadar * Permission is hereby granted, free of charge, to any person obtaining a 5547aad32SSaleemkhan Jamadar * copy of this software and associated documentation files (the "Software"), 6547aad32SSaleemkhan Jamadar * to deal in the Software without restriction, including without limitation 7547aad32SSaleemkhan Jamadar * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8547aad32SSaleemkhan Jamadar * and/or sell copies of the Software, and to permit persons to whom the 9547aad32SSaleemkhan Jamadar * Software is furnished to do so, subject to the following conditions: 10547aad32SSaleemkhan Jamadar * 11547aad32SSaleemkhan Jamadar * The above copyright notice and this permission notice shall be included in 12547aad32SSaleemkhan Jamadar * all copies or substantial portions of the Software. 13547aad32SSaleemkhan Jamadar * 14547aad32SSaleemkhan Jamadar * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15547aad32SSaleemkhan Jamadar * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16547aad32SSaleemkhan Jamadar * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17547aad32SSaleemkhan Jamadar * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18547aad32SSaleemkhan Jamadar * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19547aad32SSaleemkhan Jamadar * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20547aad32SSaleemkhan Jamadar * OTHER DEALINGS IN THE SOFTWARE. 21547aad32SSaleemkhan Jamadar * 22547aad32SSaleemkhan Jamadar */ 23547aad32SSaleemkhan Jamadar 24547aad32SSaleemkhan Jamadar #ifndef __VCN_V4_0_5_H__ 25547aad32SSaleemkhan Jamadar #define __VCN_V4_0_5_H__ 26547aad32SSaleemkhan Jamadar 27547aad32SSaleemkhan Jamadar enum amdgpu_vcn_v4_0_5_sub_block { 28547aad32SSaleemkhan Jamadar AMDGPU_VCN_V4_0_5_VCPU_VCODEC = 0, 29547aad32SSaleemkhan Jamadar 30547aad32SSaleemkhan Jamadar AMDGPU_VCN_V4_0_5_MAX_SUB_BLOCK, 31547aad32SSaleemkhan Jamadar }; 32547aad32SSaleemkhan Jamadar 33547aad32SSaleemkhan Jamadar extern const struct amdgpu_ip_block_version vcn_v4_0_5_ip_block; 34547aad32SSaleemkhan Jamadar 35547aad32SSaleemkhan Jamadar #endif /* __VCN_V4_0_5_H__ */ 36