1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright 2014 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, 18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 20 * USE OR OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * The above copyright notice and this permission notice (including the 23 * next paragraph) shall be included in all copies or substantial portions 24 * of the Software. 25 * 26 */ 27 /* 28 * Authors: 29 * Christian König <christian.koenig@amd.com> 30 */ 31 32 #include <linux/dma-fence-chain.h> 33 34 #include "amdgpu.h" 35 #include "amdgpu_trace.h" 36 #include "amdgpu_amdkfd.h" 37 38 struct amdgpu_sync_entry { 39 struct hlist_node node; 40 struct dma_fence *fence; 41 }; 42 43 static struct kmem_cache *amdgpu_sync_slab; 44 45 /** 46 * amdgpu_sync_create - zero init sync object 47 * 48 * @sync: sync object to initialize 49 * 50 * Just clear the sync object for now. 51 */ 52 void amdgpu_sync_create(struct amdgpu_sync *sync) 53 { 54 hash_init(sync->fences); 55 } 56 57 /** 58 * amdgpu_sync_same_dev - test if fence belong to us 59 * 60 * @adev: amdgpu device to use for the test 61 * @f: fence to test 62 * 63 * Test if the fence was issued by us. 64 */ 65 static bool amdgpu_sync_same_dev(struct amdgpu_device *adev, 66 struct dma_fence *f) 67 { 68 struct drm_sched_fence *s_fence = to_drm_sched_fence(f); 69 70 if (s_fence) { 71 struct amdgpu_ring *ring; 72 73 ring = container_of(s_fence->sched, struct amdgpu_ring, sched); 74 return ring->adev == adev; 75 } 76 77 return false; 78 } 79 80 /** 81 * amdgpu_sync_get_owner - extract the owner of a fence 82 * 83 * @f: fence get the owner from 84 * 85 * Extract who originally created the fence. 86 */ 87 static void *amdgpu_sync_get_owner(struct dma_fence *f) 88 { 89 struct drm_sched_fence *s_fence; 90 struct amdgpu_amdkfd_fence *kfd_fence; 91 92 if (!f) 93 return AMDGPU_FENCE_OWNER_UNDEFINED; 94 95 s_fence = to_drm_sched_fence(f); 96 if (s_fence) 97 return s_fence->owner; 98 99 kfd_fence = to_amdgpu_amdkfd_fence(f); 100 if (kfd_fence) 101 return AMDGPU_FENCE_OWNER_KFD; 102 103 return AMDGPU_FENCE_OWNER_UNDEFINED; 104 } 105 106 /** 107 * amdgpu_sync_keep_later - Keep the later fence 108 * 109 * @keep: existing fence to test 110 * @fence: new fence 111 * 112 * Either keep the existing fence or the new one, depending which one is later. 113 */ 114 static void amdgpu_sync_keep_later(struct dma_fence **keep, 115 struct dma_fence *fence) 116 { 117 if (*keep && dma_fence_is_later(*keep, fence)) 118 return; 119 120 dma_fence_put(*keep); 121 *keep = dma_fence_get(fence); 122 } 123 124 /** 125 * amdgpu_sync_add_later - add the fence to the hash 126 * 127 * @sync: sync object to add the fence to 128 * @f: fence to add 129 * 130 * Tries to add the fence to an existing hash entry. Returns true when an entry 131 * was found, false otherwise. 132 */ 133 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f) 134 { 135 struct amdgpu_sync_entry *e; 136 137 hash_for_each_possible(sync->fences, e, node, f->context) { 138 if (dma_fence_is_signaled(e->fence)) { 139 dma_fence_put(e->fence); 140 e->fence = dma_fence_get(f); 141 return true; 142 } 143 144 if (likely(e->fence->context == f->context)) { 145 amdgpu_sync_keep_later(&e->fence, f); 146 return true; 147 } 148 } 149 return false; 150 } 151 152 /** 153 * amdgpu_sync_fence - remember to sync to this fence 154 * 155 * @sync: sync object to add fence to 156 * @f: fence to sync to 157 * @flags: memory allocation flags to use when allocating sync entry 158 * 159 * Add the fence to the sync object. 160 */ 161 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f, 162 gfp_t flags) 163 { 164 struct amdgpu_sync_entry *e; 165 166 if (!f) 167 return 0; 168 169 if (amdgpu_sync_add_later(sync, f)) 170 return 0; 171 172 e = kmem_cache_alloc(amdgpu_sync_slab, flags); 173 if (!e) 174 return -ENOMEM; 175 176 hash_add(sync->fences, &e->node, f->context); 177 e->fence = dma_fence_get(f); 178 return 0; 179 } 180 181 /* Determine based on the owner and mode if we should sync to a fence or not */ 182 static bool amdgpu_sync_test_fence(struct amdgpu_device *adev, 183 enum amdgpu_sync_mode mode, 184 void *owner, struct dma_fence *f) 185 { 186 void *fence_owner = amdgpu_sync_get_owner(f); 187 188 /* Always sync to moves, no matter what */ 189 if (fence_owner == AMDGPU_FENCE_OWNER_UNDEFINED) 190 return true; 191 192 /* We only want to trigger KFD eviction fences on 193 * evict or move jobs. Skip KFD fences otherwise. 194 */ 195 if (fence_owner == AMDGPU_FENCE_OWNER_KFD && 196 owner != AMDGPU_FENCE_OWNER_UNDEFINED) 197 return false; 198 199 /* Never sync to VM updates either. */ 200 if (fence_owner == AMDGPU_FENCE_OWNER_VM && 201 owner != AMDGPU_FENCE_OWNER_UNDEFINED && 202 owner != AMDGPU_FENCE_OWNER_KFD) 203 return false; 204 205 /* Ignore fences depending on the sync mode */ 206 switch (mode) { 207 case AMDGPU_SYNC_ALWAYS: 208 return true; 209 210 case AMDGPU_SYNC_NE_OWNER: 211 if (amdgpu_sync_same_dev(adev, f) && 212 fence_owner == owner) 213 return false; 214 break; 215 216 case AMDGPU_SYNC_EQ_OWNER: 217 if (amdgpu_sync_same_dev(adev, f) && 218 fence_owner != owner) 219 return false; 220 break; 221 222 case AMDGPU_SYNC_EXPLICIT: 223 return false; 224 } 225 226 WARN(debug_evictions && fence_owner == AMDGPU_FENCE_OWNER_KFD, 227 "Adding eviction fence to sync obj"); 228 return true; 229 } 230 231 /** 232 * amdgpu_sync_resv - sync to a reservation object 233 * 234 * @adev: amdgpu device 235 * @sync: sync object to add fences from reservation object to 236 * @resv: reservation object with embedded fence 237 * @mode: how owner affects which fences we sync to 238 * @owner: owner of the planned job submission 239 * 240 * Sync to the fence 241 */ 242 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync, 243 struct dma_resv *resv, enum amdgpu_sync_mode mode, 244 void *owner) 245 { 246 struct dma_resv_iter cursor; 247 struct dma_fence *f; 248 int r; 249 250 if (resv == NULL) 251 return -EINVAL; 252 253 /* TODO: Use DMA_RESV_USAGE_READ here */ 254 dma_resv_for_each_fence(&cursor, resv, DMA_RESV_USAGE_BOOKKEEP, f) { 255 dma_fence_chain_for_each(f, f) { 256 struct dma_fence *tmp = dma_fence_chain_contained(f); 257 258 if (amdgpu_sync_test_fence(adev, mode, owner, tmp)) { 259 r = amdgpu_sync_fence(sync, f, GFP_KERNEL); 260 dma_fence_put(f); 261 if (r) 262 return r; 263 break; 264 } 265 } 266 } 267 return 0; 268 } 269 270 /** 271 * amdgpu_sync_kfd - sync to KFD fences 272 * 273 * @sync: sync object to add KFD fences to 274 * @resv: reservation object with KFD fences 275 * 276 * Extract all KFD fences and add them to the sync object. 277 */ 278 int amdgpu_sync_kfd(struct amdgpu_sync *sync, struct dma_resv *resv) 279 { 280 struct dma_resv_iter cursor; 281 struct dma_fence *f; 282 int r = 0; 283 284 dma_resv_iter_begin(&cursor, resv, DMA_RESV_USAGE_BOOKKEEP); 285 dma_resv_for_each_fence_unlocked(&cursor, f) { 286 void *fence_owner = amdgpu_sync_get_owner(f); 287 288 if (fence_owner != AMDGPU_FENCE_OWNER_KFD) 289 continue; 290 291 r = amdgpu_sync_fence(sync, f, GFP_KERNEL); 292 if (r) 293 break; 294 } 295 dma_resv_iter_end(&cursor); 296 297 return r; 298 } 299 300 /* Free the entry back to the slab */ 301 static void amdgpu_sync_entry_free(struct amdgpu_sync_entry *e) 302 { 303 hash_del(&e->node); 304 dma_fence_put(e->fence); 305 kmem_cache_free(amdgpu_sync_slab, e); 306 } 307 308 /** 309 * amdgpu_sync_peek_fence - get the next fence not signaled yet 310 * 311 * @sync: the sync object 312 * @ring: optional ring to use for test 313 * 314 * Returns the next fence not signaled yet without removing it from the sync 315 * object. 316 */ 317 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync, 318 struct amdgpu_ring *ring) 319 { 320 struct amdgpu_sync_entry *e; 321 struct hlist_node *tmp; 322 int i; 323 324 hash_for_each_safe(sync->fences, i, tmp, e, node) { 325 struct dma_fence *f = e->fence; 326 struct drm_sched_fence *s_fence = to_drm_sched_fence(f); 327 328 if (dma_fence_is_signaled(f)) { 329 amdgpu_sync_entry_free(e); 330 continue; 331 } 332 if (ring && s_fence) { 333 /* For fences from the same ring it is sufficient 334 * when they are scheduled. 335 */ 336 if (s_fence->sched == &ring->sched) { 337 if (dma_fence_is_signaled(&s_fence->scheduled)) 338 continue; 339 340 return &s_fence->scheduled; 341 } 342 } 343 344 return f; 345 } 346 347 return NULL; 348 } 349 350 /** 351 * amdgpu_sync_get_fence - get the next fence from the sync object 352 * 353 * @sync: sync object to use 354 * 355 * Get and removes the next fence from the sync object not signaled yet. 356 */ 357 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync) 358 { 359 struct amdgpu_sync_entry *e; 360 struct hlist_node *tmp; 361 struct dma_fence *f; 362 int i; 363 364 hash_for_each_safe(sync->fences, i, tmp, e, node) { 365 366 f = e->fence; 367 368 hash_del(&e->node); 369 kmem_cache_free(amdgpu_sync_slab, e); 370 371 if (!dma_fence_is_signaled(f)) 372 return f; 373 374 dma_fence_put(f); 375 } 376 return NULL; 377 } 378 379 /** 380 * amdgpu_sync_clone - clone a sync object 381 * 382 * @source: sync object to clone 383 * @clone: pointer to destination sync object 384 * 385 * Adds references to all unsignaled fences in @source to @clone. Also 386 * removes signaled fences from @source while at it. 387 */ 388 int amdgpu_sync_clone(struct amdgpu_sync *source, struct amdgpu_sync *clone) 389 { 390 struct amdgpu_sync_entry *e; 391 struct hlist_node *tmp; 392 struct dma_fence *f; 393 int i, r; 394 395 hash_for_each_safe(source->fences, i, tmp, e, node) { 396 f = e->fence; 397 if (!dma_fence_is_signaled(f)) { 398 r = amdgpu_sync_fence(clone, f, GFP_KERNEL); 399 if (r) 400 return r; 401 } else { 402 amdgpu_sync_entry_free(e); 403 } 404 } 405 406 return 0; 407 } 408 409 /** 410 * amdgpu_sync_move - move all fences from src to dst 411 * 412 * @src: source of the fences, empty after function 413 * @dst: destination for the fences 414 * 415 * Moves all fences from source to destination. All fences in destination are 416 * freed and source is empty after the function call. 417 */ 418 void amdgpu_sync_move(struct amdgpu_sync *src, struct amdgpu_sync *dst) 419 { 420 unsigned int i; 421 422 amdgpu_sync_free(dst); 423 424 for (i = 0; i < HASH_SIZE(src->fences); ++i) 425 hlist_move_list(&src->fences[i], &dst->fences[i]); 426 } 427 428 /** 429 * amdgpu_sync_push_to_job - push fences into job 430 * @sync: sync object to get the fences from 431 * @job: job to push the fences into 432 * 433 * Add all unsignaled fences from sync to job. 434 */ 435 int amdgpu_sync_push_to_job(struct amdgpu_sync *sync, struct amdgpu_job *job) 436 { 437 struct amdgpu_sync_entry *e; 438 struct hlist_node *tmp; 439 struct dma_fence *f; 440 int i, r; 441 442 hash_for_each_safe(sync->fences, i, tmp, e, node) { 443 f = e->fence; 444 if (dma_fence_is_signaled(f)) { 445 amdgpu_sync_entry_free(e); 446 continue; 447 } 448 449 dma_fence_get(f); 450 r = drm_sched_job_add_dependency(&job->base, f); 451 if (r) { 452 dma_fence_put(f); 453 return r; 454 } 455 } 456 return 0; 457 } 458 459 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr) 460 { 461 struct amdgpu_sync_entry *e; 462 struct hlist_node *tmp; 463 int i, r; 464 465 hash_for_each_safe(sync->fences, i, tmp, e, node) { 466 r = dma_fence_wait(e->fence, intr); 467 if (r) 468 return r; 469 470 amdgpu_sync_entry_free(e); 471 } 472 473 return 0; 474 } 475 476 /** 477 * amdgpu_sync_free - free the sync object 478 * 479 * @sync: sync object to use 480 * 481 * Free the sync object. 482 */ 483 void amdgpu_sync_free(struct amdgpu_sync *sync) 484 { 485 struct amdgpu_sync_entry *e; 486 struct hlist_node *tmp; 487 unsigned int i; 488 489 hash_for_each_safe(sync->fences, i, tmp, e, node) 490 amdgpu_sync_entry_free(e); 491 } 492 493 /** 494 * amdgpu_sync_init - init sync object subsystem 495 * 496 * Allocate the slab allocator. 497 */ 498 int amdgpu_sync_init(void) 499 { 500 amdgpu_sync_slab = KMEM_CACHE(amdgpu_sync_entry, SLAB_HWCACHE_ALIGN); 501 if (!amdgpu_sync_slab) 502 return -ENOMEM; 503 504 return 0; 505 } 506 507 /** 508 * amdgpu_sync_fini - fini sync object subsystem 509 * 510 * Free the slab allocator. 511 */ 512 void amdgpu_sync_fini(void) 513 { 514 kmem_cache_destroy(amdgpu_sync_slab); 515 } 516