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Name Date Size #Lines LOC

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tests/16-Jun-2025-

KconfigD16-Jun-20259.3 KiB

MakefileD16-Jun-20252.3 KiB

altera-cvp.cD16-Jun-202518.9 KiB

altera-fpga2sdram.cD16-Jun-20254.8 KiB

altera-freeze-bridge.cD16-Jun-20256.7 KiB

altera-hps2fpga.cD16-Jun-20255.6 KiB

altera-pr-ip-core-plat.cD16-Jun-20251.2 KiB

altera-pr-ip-core.cD16-Jun-20254.7 KiB

altera-ps-spi.cD16-Jun-20257.4 KiB

dfl-afu-dma-region.cD16-Jun-202510.1 KiB

dfl-afu-error.cD16-Jun-20256.2 KiB

dfl-afu-main.cD16-Jun-202523.3 KiB

dfl-afu-region.cD16-Jun-20254.1 KiB

dfl-afu.hD16-Jun-20253.1 KiB

dfl-fme-br.cD16-Jun-20252.4 KiB

dfl-fme-error.cD16-Jun-20259.9 KiB

dfl-fme-main.cD16-Jun-202519.2 KiB

dfl-fme-mgr.cD16-Jun-20258.8 KiB

dfl-fme-perf.cD16-Jun-202529.5 KiB

dfl-fme-pr.cD16-Jun-202511.3 KiB

dfl-fme-pr.hD16-Jun-20252 KiB

dfl-fme-region.cD16-Jun-20252.1 KiB

dfl-fme.hD16-Jun-20251.3 KiB

dfl-n3000-nios.cD16-Jun-202517.7 KiB

dfl-pci.cD16-Jun-202511.5 KiB

dfl.cD16-Jun-202548.7 KiB

dfl.hD16-Jun-202518 KiB

fpga-bridge.cD16-Jun-202510.4 KiB

fpga-mgr.cD16-Jun-202525.7 KiB

fpga-region.cD16-Jun-20257.6 KiB

ice40-spi.cD16-Jun-20255.3 KiB

intel-m10-bmc-sec-update.cD16-Jun-202519.6 KiB

lattice-sysconfig-spi.cD16-Jun-20253.8 KiB

lattice-sysconfig.cD16-Jun-20258.7 KiB

lattice-sysconfig.hD16-Jun-20251.4 KiB

machxo2-spi.cD16-Jun-20259.3 KiB

microchip-spi.cD16-Jun-20259.7 KiB

of-fpga-region.cD16-Jun-202512.1 KiB

socfpga-a10.cD16-Jun-202515.1 KiB

socfpga.cD16-Jun-202516.7 KiB

stratix10-soc.cD16-Jun-202511.8 KiB

ts73xx-fpga.cD16-Jun-20253.4 KiB

versal-fpga.cD16-Jun-20252 KiB

xilinx-core.cD16-Jun-20255.5 KiB

xilinx-core.hD16-Jun-2025690

xilinx-pr-decoupler.cD16-Jun-20254.1 KiB

xilinx-selectmap.cD16-Jun-20252.6 KiB

xilinx-spi.cD16-Jun-20251.8 KiB

zynq-fpga.cD16-Jun-202517 KiB

zynqmp-fpga.cD16-Jun-20253.2 KiB