173d5fc92SNishad Saraf // SPDX-License-Identifier: GPL-2.0-or-later 273d5fc92SNishad Saraf /* 373d5fc92SNishad Saraf * Copyright (C) 2023-2024, Advanced Micro Devices, Inc. 473d5fc92SNishad Saraf */ 573d5fc92SNishad Saraf 673d5fc92SNishad Saraf #ifndef __QDMA_REGS_DEF_H 773d5fc92SNishad Saraf #define __QDMA_REGS_DEF_H 873d5fc92SNishad Saraf 973d5fc92SNishad Saraf #include "qdma.h" 1073d5fc92SNishad Saraf 1173d5fc92SNishad Saraf const struct qdma_reg qdma_regos_default[QDMA_REGO_MAX] = { 1273d5fc92SNishad Saraf [QDMA_REGO_CTXT_DATA] = QDMA_REGO(0x804, 8), 1373d5fc92SNishad Saraf [QDMA_REGO_CTXT_CMD] = QDMA_REGO(0x844, 1), 1473d5fc92SNishad Saraf [QDMA_REGO_CTXT_MASK] = QDMA_REGO(0x824, 8), 1573d5fc92SNishad Saraf [QDMA_REGO_MM_H2C_CTRL] = QDMA_REGO(0x1004, 1), 1673d5fc92SNishad Saraf [QDMA_REGO_MM_C2H_CTRL] = QDMA_REGO(0x1204, 1), 1773d5fc92SNishad Saraf [QDMA_REGO_QUEUE_COUNT] = QDMA_REGO(0x120, 1), 1873d5fc92SNishad Saraf [QDMA_REGO_RING_SIZE] = QDMA_REGO(0x204, 1), 1973d5fc92SNishad Saraf [QDMA_REGO_H2C_PIDX] = QDMA_REGO(0x18004, 1), 2073d5fc92SNishad Saraf [QDMA_REGO_C2H_PIDX] = QDMA_REGO(0x18008, 1), 2173d5fc92SNishad Saraf [QDMA_REGO_INTR_CIDX] = QDMA_REGO(0x18000, 1), 2273d5fc92SNishad Saraf [QDMA_REGO_FUNC_ID] = QDMA_REGO(0x12c, 1), 2373d5fc92SNishad Saraf [QDMA_REGO_ERR_INT] = QDMA_REGO(0xb04, 1), 2473d5fc92SNishad Saraf [QDMA_REGO_ERR_STAT] = QDMA_REGO(0x248, 1), 2573d5fc92SNishad Saraf }; 2673d5fc92SNishad Saraf 2773d5fc92SNishad Saraf const struct qdma_reg_field qdma_regfs_default[QDMA_REGF_MAX] = { 2873d5fc92SNishad Saraf /* QDMA_REGO_CTXT_DATA fields */ 2973d5fc92SNishad Saraf [QDMA_REGF_IRQ_ENABLE] = QDMA_REGF(53, 53), 3073d5fc92SNishad Saraf [QDMA_REGF_WBK_ENABLE] = QDMA_REGF(52, 52), 3173d5fc92SNishad Saraf [QDMA_REGF_WBI_CHECK] = QDMA_REGF(34, 34), 3273d5fc92SNishad Saraf [QDMA_REGF_IRQ_ARM] = QDMA_REGF(16, 16), 3373d5fc92SNishad Saraf [QDMA_REGF_IRQ_VEC] = QDMA_REGF(138, 128), 3473d5fc92SNishad Saraf [QDMA_REGF_IRQ_AGG] = QDMA_REGF(139, 139), 3573d5fc92SNishad Saraf [QDMA_REGF_WBI_INTVL_ENABLE] = QDMA_REGF(35, 35), 3673d5fc92SNishad Saraf [QDMA_REGF_MRKR_DISABLE] = QDMA_REGF(62, 62), 3773d5fc92SNishad Saraf [QDMA_REGF_QUEUE_ENABLE] = QDMA_REGF(32, 32), 3873d5fc92SNishad Saraf [QDMA_REGF_QUEUE_MODE] = QDMA_REGF(63, 63), 3973d5fc92SNishad Saraf [QDMA_REGF_DESC_BASE] = QDMA_REGF(127, 64), 4073d5fc92SNishad Saraf [QDMA_REGF_DESC_SIZE] = QDMA_REGF(49, 48), 4173d5fc92SNishad Saraf [QDMA_REGF_RING_ID] = QDMA_REGF(47, 44), 4273d5fc92SNishad Saraf [QDMA_REGF_QUEUE_BASE] = QDMA_REGF(11, 0), 4373d5fc92SNishad Saraf [QDMA_REGF_QUEUE_MAX] = QDMA_REGF(44, 32), 4473d5fc92SNishad Saraf [QDMA_REGF_FUNCTION_ID] = QDMA_REGF(24, 17), 4573d5fc92SNishad Saraf [QDMA_REGF_INTR_AGG_BASE] = QDMA_REGF(66, 15), 4673d5fc92SNishad Saraf [QDMA_REGF_INTR_VECTOR] = QDMA_REGF(11, 1), 4773d5fc92SNishad Saraf [QDMA_REGF_INTR_SIZE] = QDMA_REGF(69, 67), 4873d5fc92SNishad Saraf [QDMA_REGF_INTR_VALID] = QDMA_REGF(0, 0), 4973d5fc92SNishad Saraf [QDMA_REGF_INTR_COLOR] = QDMA_REGF(14, 14), 5073d5fc92SNishad Saraf [QDMA_REGF_INTR_FUNCTION_ID] = QDMA_REGF(125, 114), 5173d5fc92SNishad Saraf /* QDMA_REGO_CTXT_CMD fields */ 5273d5fc92SNishad Saraf [QDMA_REGF_CMD_INDX] = QDMA_REGF(19, 7), 5373d5fc92SNishad Saraf [QDMA_REGF_CMD_CMD] = QDMA_REGF(6, 5), 5473d5fc92SNishad Saraf [QDMA_REGF_CMD_TYPE] = QDMA_REGF(4, 1), 5573d5fc92SNishad Saraf [QDMA_REGF_CMD_BUSY] = QDMA_REGF(0, 0), 5673d5fc92SNishad Saraf /* QDMA_REGO_QUEUE_COUNT fields */ 5773d5fc92SNishad Saraf [QDMA_REGF_QUEUE_COUNT] = QDMA_REGF(11, 0), 5873d5fc92SNishad Saraf /* QDMA_REGO_ERR_INT fields */ 5973d5fc92SNishad Saraf [QDMA_REGF_ERR_INT_FUNC] = QDMA_REGF(11, 0), 6073d5fc92SNishad Saraf [QDMA_REGF_ERR_INT_VEC] = QDMA_REGF(22, 12), 6173d5fc92SNishad Saraf [QDMA_REGF_ERR_INT_ARM] = QDMA_REGF(24, 24), 6273d5fc92SNishad Saraf }; 6373d5fc92SNishad Saraf 6473d5fc92SNishad Saraf #endif /* __QDMA_REGS_DEF_H */ 65