1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * elanfreq: cpufreq driver for the AMD ELAN family 4 * 5 * (c) Copyright 2002 Robert Schwebel <r.schwebel@pengutronix.de> 6 * 7 * Parts of this code are (c) Sven Geggus <sven@geggus.net> 8 * 9 * All Rights Reserved. 10 * 11 * 2002-02-13: - initial revision for 2.4.18-pre9 by Robert Schwebel 12 */ 13 14 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 15 16 #include <linux/kernel.h> 17 #include <linux/module.h> 18 #include <linux/init.h> 19 20 #include <linux/delay.h> 21 #include <linux/cpufreq.h> 22 23 #include <asm/cpu_device_id.h> 24 #include <linux/timex.h> 25 #include <linux/io.h> 26 27 #define REG_CSCIR 0x22 /* Chip Setup and Control Index Register */ 28 #define REG_CSCDR 0x23 /* Chip Setup and Control Data Register */ 29 30 /* Module parameter */ 31 static int max_freq; 32 33 struct s_elan_multiplier { 34 int clock; /* frequency in kHz */ 35 int val40h; /* PMU Force Mode register */ 36 int val80h; /* CPU Clock Speed Register */ 37 }; 38 39 /* 40 * It is important that the frequencies 41 * are listed in ascending order here! 42 */ 43 static struct s_elan_multiplier elan_multiplier[] = { 44 {1000, 0x02, 0x18}, 45 {2000, 0x02, 0x10}, 46 {4000, 0x02, 0x08}, 47 {8000, 0x00, 0x00}, 48 {16000, 0x00, 0x02}, 49 {33000, 0x00, 0x04}, 50 {66000, 0x01, 0x04}, 51 {99000, 0x01, 0x05} 52 }; 53 54 static struct cpufreq_frequency_table elanfreq_table[] = { 55 {0, 0, 1000}, 56 {0, 1, 2000}, 57 {0, 2, 4000}, 58 {0, 3, 8000}, 59 {0, 4, 16000}, 60 {0, 5, 33000}, 61 {0, 6, 66000}, 62 {0, 7, 99000}, 63 {0, 0, CPUFREQ_TABLE_END}, 64 }; 65 66 67 /** 68 * elanfreq_get_cpu_frequency: determine current cpu speed 69 * 70 * Finds out at which frequency the CPU of the Elan SOC runs 71 * at the moment. Frequencies from 1 to 33 MHz are generated 72 * the normal way, 66 and 99 MHz are called "Hyperspeed Mode" 73 * and have the rest of the chip running with 33 MHz. 74 */ 75 76 static unsigned int elanfreq_get_cpu_frequency(unsigned int cpu) 77 { 78 u8 clockspeed_reg; /* Clock Speed Register */ 79 80 local_irq_disable(); 81 outb_p(0x80, REG_CSCIR); 82 clockspeed_reg = inb_p(REG_CSCDR); 83 local_irq_enable(); 84 85 if ((clockspeed_reg & 0xE0) == 0xE0) 86 return 0; 87 88 /* Are we in CPU clock multiplied mode (66/99 MHz)? */ 89 if ((clockspeed_reg & 0xE0) == 0xC0) { 90 if ((clockspeed_reg & 0x01) == 0) 91 return 66000; 92 else 93 return 99000; 94 } 95 96 /* 33 MHz is not 32 MHz... */ 97 if ((clockspeed_reg & 0xE0) == 0xA0) 98 return 33000; 99 100 return (1<<((clockspeed_reg & 0xE0) >> 5)) * 1000; 101 } 102 103 104 static int elanfreq_target(struct cpufreq_policy *policy, 105 unsigned int state) 106 { 107 /* 108 * Access to the Elan's internal registers is indexed via 109 * 0x22: Chip Setup & Control Register Index Register (CSCI) 110 * 0x23: Chip Setup & Control Register Data Register (CSCD) 111 * 112 */ 113 114 /* 115 * 0x40 is the Power Management Unit's Force Mode Register. 116 * Bit 6 enables Hyperspeed Mode (66/100 MHz core frequency) 117 */ 118 119 local_irq_disable(); 120 outb_p(0x40, REG_CSCIR); /* Disable hyperspeed mode */ 121 outb_p(0x00, REG_CSCDR); 122 local_irq_enable(); /* wait till internal pipelines and */ 123 udelay(1000); /* buffers have cleaned up */ 124 125 local_irq_disable(); 126 127 /* now, set the CPU clock speed register (0x80) */ 128 outb_p(0x80, REG_CSCIR); 129 outb_p(elan_multiplier[state].val80h, REG_CSCDR); 130 131 /* now, the hyperspeed bit in PMU Force Mode Register (0x40) */ 132 outb_p(0x40, REG_CSCIR); 133 outb_p(elan_multiplier[state].val40h, REG_CSCDR); 134 udelay(10000); 135 local_irq_enable(); 136 137 return 0; 138 } 139 /* 140 * Module init and exit code 141 */ 142 143 static int elanfreq_cpu_init(struct cpufreq_policy *policy) 144 { 145 struct cpuinfo_x86 *c = &cpu_data(0); 146 struct cpufreq_frequency_table *pos; 147 148 /* capability check */ 149 if ((c->x86_vendor != X86_VENDOR_AMD) || 150 (c->x86 != 4) || (c->x86_model != 10)) 151 return -ENODEV; 152 153 /* max freq */ 154 if (!max_freq) 155 max_freq = elanfreq_get_cpu_frequency(0); 156 157 /* table init */ 158 cpufreq_for_each_entry(pos, elanfreq_table) 159 if (pos->frequency > max_freq) 160 pos->frequency = CPUFREQ_ENTRY_INVALID; 161 162 policy->freq_table = elanfreq_table; 163 return 0; 164 } 165 166 167 #ifndef MODULE 168 /** 169 * elanfreq_setup - elanfreq command line parameter parsing 170 * 171 * elanfreq command line parameter. Use: 172 * elanfreq=66000 173 * to set the maximum CPU frequency to 66 MHz. Note that in 174 * case you do not give this boot parameter, the maximum 175 * frequency will fall back to _current_ CPU frequency which 176 * might be lower. If you build this as a module, use the 177 * max_freq module parameter instead. 178 */ 179 static int __init elanfreq_setup(char *str) 180 { 181 max_freq = simple_strtoul(str, &str, 0); 182 pr_warn("You're using the deprecated elanfreq command line option. Use elanfreq.max_freq instead, please!\n"); 183 return 1; 184 } 185 __setup("elanfreq=", elanfreq_setup); 186 #endif 187 188 189 static struct cpufreq_driver elanfreq_driver = { 190 .get = elanfreq_get_cpu_frequency, 191 .flags = CPUFREQ_NO_AUTO_DYNAMIC_SWITCHING, 192 .verify = cpufreq_generic_frequency_table_verify, 193 .target_index = elanfreq_target, 194 .init = elanfreq_cpu_init, 195 .name = "elanfreq", 196 }; 197 198 static const struct x86_cpu_id elan_id[] = { 199 X86_MATCH_VENDOR_FAM_MODEL(AMD, 4, 10, NULL), 200 {} 201 }; 202 MODULE_DEVICE_TABLE(x86cpu, elan_id); 203 204 static int __init elanfreq_init(void) 205 { 206 if (!x86_match_cpu(elan_id)) 207 return -ENODEV; 208 return cpufreq_register_driver(&elanfreq_driver); 209 } 210 211 212 static void __exit elanfreq_exit(void) 213 { 214 cpufreq_unregister_driver(&elanfreq_driver); 215 } 216 217 218 module_param(max_freq, int, 0444); 219 220 MODULE_LICENSE("GPL"); 221 MODULE_AUTHOR("Robert Schwebel <r.schwebel@pengutronix.de>, " 222 "Sven Geggus <sven@geggus.net>"); 223 MODULE_DESCRIPTION("cpufreq driver for AMD's Elan CPUs"); 224 225 module_init(elanfreq_init); 226 module_exit(elanfreq_exit); 227