1edab7204SEmil Renner Berthing /* SPDX-License-Identifier: GPL-2.0 */ 2edab7204SEmil Renner Berthing #ifndef __CLK_STARFIVE_JH7110_H 3edab7204SEmil Renner Berthing #define __CLK_STARFIVE_JH7110_H 4edab7204SEmil Renner Berthing 5edab7204SEmil Renner Berthing #include "clk-starfive-jh71x0.h" 6edab7204SEmil Renner Berthing 781279f5dSXingyu Wu /* top clocks of ISP/VOUT domain from JH7110 SYSCRG */ 881279f5dSXingyu Wu struct jh7110_top_sysclk { 981279f5dSXingyu Wu struct clk_bulk_data *top_clks; 1081279f5dSXingyu Wu int top_clks_num; 1181279f5dSXingyu Wu }; 1281279f5dSXingyu Wu 13edab7204SEmil Renner Berthing int jh7110_reset_controller_register(struct jh71x0_clk_priv *priv, 14edab7204SEmil Renner Berthing const char *adev_name, 15edab7204SEmil Renner Berthing u32 adev_id); 16edab7204SEmil Renner Berthing 17edab7204SEmil Renner Berthing #endif 18