1fc219502SChun-Jie Chen // SPDX-License-Identifier: GPL-2.0-only 2fc219502SChun-Jie Chen // 3fc219502SChun-Jie Chen // Copyright (c) 2022 MediaTek Inc. 4fc219502SChun-Jie Chen // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> 5fc219502SChun-Jie Chen 6fc219502SChun-Jie Chen #include <linux/clk-provider.h> 7fc219502SChun-Jie Chen #include <linux/platform_device.h> 8fc219502SChun-Jie Chen #include <dt-bindings/clock/mt8186-clk.h> 9fc219502SChun-Jie Chen 10fc219502SChun-Jie Chen #include "clk-gate.h" 11fc219502SChun-Jie Chen #include "clk-mtk.h" 12fc219502SChun-Jie Chen 13fc219502SChun-Jie Chen static const struct mtk_gate_regs venc_cg_regs = { 14fc219502SChun-Jie Chen .set_ofs = 0x4, 15fc219502SChun-Jie Chen .clr_ofs = 0x8, 16fc219502SChun-Jie Chen .sta_ofs = 0x0, 17fc219502SChun-Jie Chen }; 18fc219502SChun-Jie Chen 19fc219502SChun-Jie Chen #define GATE_VENC(_id, _name, _parent, _shift) \ 20fc219502SChun-Jie Chen GATE_MTK(_id, _name, _parent, &venc_cg_regs, _shift, &mtk_clk_gate_ops_setclr_inv) 21fc219502SChun-Jie Chen 22fc219502SChun-Jie Chen static const struct mtk_gate venc_clks[] = { 23fc219502SChun-Jie Chen GATE_VENC(CLK_VENC_CKE0_LARB, "venc_cke0_larb", "top_venc", 0), 24fc219502SChun-Jie Chen GATE_VENC(CLK_VENC_CKE1_VENC, "venc_cke1_venc", "top_venc", 4), 25fc219502SChun-Jie Chen GATE_VENC(CLK_VENC_CKE2_JPGENC, "venc_cke2_jpgenc", "top_venc", 8), 26fc219502SChun-Jie Chen GATE_VENC(CLK_VENC_CKE5_GALS, "venc_cke5_gals", "top_venc", 28), 27fc219502SChun-Jie Chen }; 28fc219502SChun-Jie Chen 29fc219502SChun-Jie Chen static const struct mtk_clk_desc venc_desc = { 30fc219502SChun-Jie Chen .clks = venc_clks, 31fc219502SChun-Jie Chen .num_clks = ARRAY_SIZE(venc_clks), 32fc219502SChun-Jie Chen }; 33fc219502SChun-Jie Chen 34fc219502SChun-Jie Chen static const struct of_device_id of_match_clk_mt8186_venc[] = { 35fc219502SChun-Jie Chen { 36fc219502SChun-Jie Chen .compatible = "mediatek,mt8186-vencsys", 37fc219502SChun-Jie Chen .data = &venc_desc, 38fc219502SChun-Jie Chen }, { 39fc219502SChun-Jie Chen /* sentinel */ 40fc219502SChun-Jie Chen } 41fc219502SChun-Jie Chen }; 4265c9ad77SAngeloGioacchino Del Regno MODULE_DEVICE_TABLE(of, of_match_clk_mt8186_venc); 43fc219502SChun-Jie Chen 44fc219502SChun-Jie Chen static struct platform_driver clk_mt8186_venc_drv = { 45fc219502SChun-Jie Chen .probe = mtk_clk_simple_probe, 46f00b45dbSUwe Kleine-König .remove = mtk_clk_simple_remove, 47fc219502SChun-Jie Chen .driver = { 48fc219502SChun-Jie Chen .name = "clk-mt8186-venc", 49fc219502SChun-Jie Chen .of_match_table = of_match_clk_mt8186_venc, 50fc219502SChun-Jie Chen }, 51fc219502SChun-Jie Chen }; 52164d240dSAngeloGioacchino Del Regno module_platform_driver(clk_mt8186_venc_drv); 53f5100c41SAngeloGioacchino Del Regno 54f5100c41SAngeloGioacchino Del Regno MODULE_DESCRIPTION("MediaTek MT8186 Video Encoders clocks driver"); 55a451da86SAngeloGioacchino Del Regno MODULE_LICENSE("GPL"); 56