1*1ea2a20eSOded Gabbay /* SPDX-License-Identifier: GPL-2.0 2*1ea2a20eSOded Gabbay * 3*1ea2a20eSOded Gabbay * Copyright 2016-2018 HabanaLabs, Ltd. 4*1ea2a20eSOded Gabbay * All Rights Reserved. 5*1ea2a20eSOded Gabbay * 6*1ea2a20eSOded Gabbay */ 7*1ea2a20eSOded Gabbay 8*1ea2a20eSOded Gabbay /************************************ 9*1ea2a20eSOded Gabbay ** This is an auto-generated file ** 10*1ea2a20eSOded Gabbay ** DO NOT EDIT BELOW ** 11*1ea2a20eSOded Gabbay ************************************/ 12*1ea2a20eSOded Gabbay 13*1ea2a20eSOded Gabbay #ifndef ASIC_REG_DMA_NRTR_MASKS_H_ 14*1ea2a20eSOded Gabbay #define ASIC_REG_DMA_NRTR_MASKS_H_ 15*1ea2a20eSOded Gabbay 16*1ea2a20eSOded Gabbay /* 17*1ea2a20eSOded Gabbay ***************************************** 18*1ea2a20eSOded Gabbay * DMA_NRTR (Prototype: IF_NRTR) 19*1ea2a20eSOded Gabbay ***************************************** 20*1ea2a20eSOded Gabbay */ 21*1ea2a20eSOded Gabbay 22*1ea2a20eSOded Gabbay /* DMA_NRTR_HBW_MAX_CRED */ 23*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_MAX_CRED_WR_RQ_SHIFT 0 24*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_MAX_CRED_WR_RQ_MASK 0x3F 25*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_MAX_CRED_WR_RS_SHIFT 8 26*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_MAX_CRED_WR_RS_MASK 0x3F00 27*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_MAX_CRED_RD_RQ_SHIFT 16 28*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_MAX_CRED_RD_RQ_MASK 0x3F0000 29*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_MAX_CRED_RD_RS_SHIFT 24 30*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_MAX_CRED_RD_RS_MASK 0x3F000000 31*1ea2a20eSOded Gabbay 32*1ea2a20eSOded Gabbay /* DMA_NRTR_LBW_MAX_CRED */ 33*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_MAX_CRED_WR_RQ_SHIFT 0 34*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_MAX_CRED_WR_RQ_MASK 0x3F 35*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_MAX_CRED_WR_RS_SHIFT 8 36*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_MAX_CRED_WR_RS_MASK 0x3F00 37*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_MAX_CRED_RD_RQ_SHIFT 16 38*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_MAX_CRED_RD_RQ_MASK 0x3F0000 39*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_MAX_CRED_RD_RS_SHIFT 24 40*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_MAX_CRED_RD_RS_MASK 0x3F000000 41*1ea2a20eSOded Gabbay 42*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_E_ARB */ 43*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_W_SHIFT 0 44*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_W_MASK 0x7 45*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_S_SHIFT 8 46*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_S_MASK 0x700 47*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_N_SHIFT 16 48*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_N_MASK 0x70000 49*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_L_SHIFT 24 50*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_L_MASK 0x7000000 51*1ea2a20eSOded Gabbay 52*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_W_ARB */ 53*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_E_SHIFT 0 54*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_E_MASK 0x7 55*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_S_SHIFT 8 56*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_S_MASK 0x700 57*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_N_SHIFT 16 58*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_N_MASK 0x70000 59*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_L_SHIFT 24 60*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_L_MASK 0x7000000 61*1ea2a20eSOded Gabbay 62*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_N_ARB */ 63*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_W_SHIFT 0 64*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_W_MASK 0x7 65*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_E_SHIFT 8 66*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_E_MASK 0x700 67*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_S_SHIFT 16 68*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_S_MASK 0x70000 69*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_L_SHIFT 24 70*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_L_MASK 0x7000000 71*1ea2a20eSOded Gabbay 72*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_S_ARB */ 73*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_W_SHIFT 0 74*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_W_MASK 0x7 75*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_E_SHIFT 8 76*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_E_MASK 0x700 77*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_N_SHIFT 16 78*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_N_MASK 0x70000 79*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_L_SHIFT 24 80*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_L_MASK 0x7000000 81*1ea2a20eSOded Gabbay 82*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_L_ARB */ 83*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_W_SHIFT 0 84*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_W_MASK 0x7 85*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_E_SHIFT 8 86*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_E_MASK 0x700 87*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_S_SHIFT 16 88*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_S_MASK 0x70000 89*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_N_SHIFT 24 90*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_N_MASK 0x7000000 91*1ea2a20eSOded Gabbay 92*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_E_ARB_MAX */ 93*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_MAX_CREDIT_SHIFT 0 94*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_E_ARB_MAX_CREDIT_MASK 0x3F 95*1ea2a20eSOded Gabbay 96*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_W_ARB_MAX */ 97*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_MAX_CREDIT_SHIFT 0 98*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_W_ARB_MAX_CREDIT_MASK 0x3F 99*1ea2a20eSOded Gabbay 100*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_N_ARB_MAX */ 101*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_MAX_CREDIT_SHIFT 0 102*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_N_ARB_MAX_CREDIT_MASK 0x3F 103*1ea2a20eSOded Gabbay 104*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_S_ARB_MAX */ 105*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_MAX_CREDIT_SHIFT 0 106*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_S_ARB_MAX_CREDIT_MASK 0x3F 107*1ea2a20eSOded Gabbay 108*1ea2a20eSOded Gabbay /* DMA_NRTR_DBG_L_ARB_MAX */ 109*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_MAX_CREDIT_SHIFT 0 110*1ea2a20eSOded Gabbay #define DMA_NRTR_DBG_L_ARB_MAX_CREDIT_MASK 0x3F 111*1ea2a20eSOded Gabbay 112*1ea2a20eSOded Gabbay /* DMA_NRTR_SPLIT_COEF */ 113*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_COEF_VAL_SHIFT 0 114*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_COEF_VAL_MASK 0xFFFF 115*1ea2a20eSOded Gabbay 116*1ea2a20eSOded Gabbay /* DMA_NRTR_SPLIT_CFG */ 117*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_FORCE_WAK_ORDER_SHIFT 0 118*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_FORCE_WAK_ORDER_MASK 0x1 119*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_FORCE_STRONG_ORDER_SHIFT 1 120*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_FORCE_STRONG_ORDER_MASK 0x2 121*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_DEFAULT_MESH_SHIFT 2 122*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_DEFAULT_MESH_MASK 0xC 123*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_RD_RATE_LIM_EN_SHIFT 4 124*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_RD_RATE_LIM_EN_MASK 0x10 125*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_WR_RATE_LIM_EN_SHIFT 5 126*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_WR_RATE_LIM_EN_MASK 0x20 127*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_B2B_OPT_SHIFT 6 128*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_CFG_B2B_OPT_MASK 0x1C0 129*1ea2a20eSOded Gabbay 130*1ea2a20eSOded Gabbay /* DMA_NRTR_SPLIT_RD_SAT */ 131*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_RD_SAT_VAL_SHIFT 0 132*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_RD_SAT_VAL_MASK 0xFFFF 133*1ea2a20eSOded Gabbay 134*1ea2a20eSOded Gabbay /* DMA_NRTR_SPLIT_RD_RST_TOKEN */ 135*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_RD_RST_TOKEN_VAL_SHIFT 0 136*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_RD_RST_TOKEN_VAL_MASK 0xFFFF 137*1ea2a20eSOded Gabbay 138*1ea2a20eSOded Gabbay /* DMA_NRTR_SPLIT_RD_TIMEOUT */ 139*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_RD_TIMEOUT_VAL_SHIFT 0 140*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_RD_TIMEOUT_VAL_MASK 0xFFFFFFFF 141*1ea2a20eSOded Gabbay 142*1ea2a20eSOded Gabbay /* DMA_NRTR_SPLIT_WR_SAT */ 143*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_WR_SAT_VAL_SHIFT 0 144*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_WR_SAT_VAL_MASK 0xFFFF 145*1ea2a20eSOded Gabbay 146*1ea2a20eSOded Gabbay /* DMA_NRTR_WPLIT_WR_TST_TOLEN */ 147*1ea2a20eSOded Gabbay #define DMA_NRTR_WPLIT_WR_TST_TOLEN_VAL_SHIFT 0 148*1ea2a20eSOded Gabbay #define DMA_NRTR_WPLIT_WR_TST_TOLEN_VAL_MASK 0xFFFF 149*1ea2a20eSOded Gabbay 150*1ea2a20eSOded Gabbay /* DMA_NRTR_SPLIT_WR_TIMEOUT */ 151*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_WR_TIMEOUT_VAL_SHIFT 0 152*1ea2a20eSOded Gabbay #define DMA_NRTR_SPLIT_WR_TIMEOUT_VAL_MASK 0xFFFFFFFF 153*1ea2a20eSOded Gabbay 154*1ea2a20eSOded Gabbay /* DMA_NRTR_HBW_RANGE_HIT */ 155*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_HIT_IND_SHIFT 0 156*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_HIT_IND_MASK 0xFF 157*1ea2a20eSOded Gabbay 158*1ea2a20eSOded Gabbay /* DMA_NRTR_HBW_RANGE_MASK_L */ 159*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_MASK_L_VAL_SHIFT 0 160*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_MASK_L_VAL_MASK 0xFFFFFFFF 161*1ea2a20eSOded Gabbay 162*1ea2a20eSOded Gabbay /* DMA_NRTR_HBW_RANGE_MASK_H */ 163*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_MASK_H_VAL_SHIFT 0 164*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_MASK_H_VAL_MASK 0x3FFFF 165*1ea2a20eSOded Gabbay 166*1ea2a20eSOded Gabbay /* DMA_NRTR_HBW_RANGE_BASE_L */ 167*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_BASE_L_VAL_SHIFT 0 168*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_BASE_L_VAL_MASK 0xFFFFFFFF 169*1ea2a20eSOded Gabbay 170*1ea2a20eSOded Gabbay /* DMA_NRTR_HBW_RANGE_BASE_H */ 171*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_BASE_H_VAL_SHIFT 0 172*1ea2a20eSOded Gabbay #define DMA_NRTR_HBW_RANGE_BASE_H_VAL_MASK 0x3FFFF 173*1ea2a20eSOded Gabbay 174*1ea2a20eSOded Gabbay /* DMA_NRTR_LBW_RANGE_HIT */ 175*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_RANGE_HIT_IND_SHIFT 0 176*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_RANGE_HIT_IND_MASK 0xFFFF 177*1ea2a20eSOded Gabbay 178*1ea2a20eSOded Gabbay /* DMA_NRTR_LBW_RANGE_MASK */ 179*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_RANGE_MASK_VAL_SHIFT 0 180*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_RANGE_MASK_VAL_MASK 0x3FFFFFF 181*1ea2a20eSOded Gabbay 182*1ea2a20eSOded Gabbay /* DMA_NRTR_LBW_RANGE_BASE */ 183*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_RANGE_BASE_VAL_SHIFT 0 184*1ea2a20eSOded Gabbay #define DMA_NRTR_LBW_RANGE_BASE_VAL_MASK 0x3FFFFFF 185*1ea2a20eSOded Gabbay 186*1ea2a20eSOded Gabbay /* DMA_NRTR_RGLTR */ 187*1ea2a20eSOded Gabbay #define DMA_NRTR_RGLTR_WR_EN_SHIFT 0 188*1ea2a20eSOded Gabbay #define DMA_NRTR_RGLTR_WR_EN_MASK 0x1 189*1ea2a20eSOded Gabbay #define DMA_NRTR_RGLTR_RD_EN_SHIFT 4 190*1ea2a20eSOded Gabbay #define DMA_NRTR_RGLTR_RD_EN_MASK 0x10 191*1ea2a20eSOded Gabbay 192*1ea2a20eSOded Gabbay /* DMA_NRTR_RGLTR_WR_RESULT */ 193*1ea2a20eSOded Gabbay #define DMA_NRTR_RGLTR_WR_RESULT_VAL_SHIFT 0 194*1ea2a20eSOded Gabbay #define DMA_NRTR_RGLTR_WR_RESULT_VAL_MASK 0xFF 195*1ea2a20eSOded Gabbay 196*1ea2a20eSOded Gabbay /* DMA_NRTR_RGLTR_RD_RESULT */ 197*1ea2a20eSOded Gabbay #define DMA_NRTR_RGLTR_RD_RESULT_VAL_SHIFT 0 198*1ea2a20eSOded Gabbay #define DMA_NRTR_RGLTR_RD_RESULT_VAL_MASK 0xFF 199*1ea2a20eSOded Gabbay 200*1ea2a20eSOded Gabbay /* DMA_NRTR_SCRAMB_EN */ 201*1ea2a20eSOded Gabbay #define DMA_NRTR_SCRAMB_EN_VAL_SHIFT 0 202*1ea2a20eSOded Gabbay #define DMA_NRTR_SCRAMB_EN_VAL_MASK 0x1 203*1ea2a20eSOded Gabbay 204*1ea2a20eSOded Gabbay /* DMA_NRTR_NON_LIN_SCRAMB */ 205*1ea2a20eSOded Gabbay #define DMA_NRTR_NON_LIN_SCRAMB_EN_SHIFT 0 206*1ea2a20eSOded Gabbay #define DMA_NRTR_NON_LIN_SCRAMB_EN_MASK 0x1 207*1ea2a20eSOded Gabbay 208*1ea2a20eSOded Gabbay #endif /* ASIC_REG_DMA_NRTR_MASKS_H_ */ 209