1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * x86_emulate.h 4 * 5 * Generic x86 (32-bit and 64-bit) instruction decoder and emulator. 6 * 7 * Copyright (c) 2005 Keir Fraser 8 * 9 * From: xen-unstable 10676:af9809f51f81a3c43f276f00c81a52ef558afda4 10 */ 11 12 #ifndef _ASM_X86_KVM_X86_EMULATE_H 13 #define _ASM_X86_KVM_X86_EMULATE_H 14 15 #include <asm/desc_defs.h> 16 #include "fpu.h" 17 18 struct x86_emulate_ctxt; 19 enum x86_intercept; 20 enum x86_intercept_stage; 21 22 struct x86_exception { 23 u8 vector; 24 bool error_code_valid; 25 u16 error_code; 26 bool nested_page_fault; 27 u64 address; /* cr2 or nested page fault gpa */ 28 u8 async_page_fault; 29 unsigned long exit_qualification; 30 }; 31 32 /* 33 * This struct is used to carry enough information from the instruction 34 * decoder to main KVM so that a decision can be made whether the 35 * instruction needs to be intercepted or not. 36 */ 37 struct x86_instruction_info { 38 u8 intercept; /* which intercept */ 39 u8 rep_prefix; /* rep prefix? */ 40 u8 modrm_mod; /* mod part of modrm */ 41 u8 modrm_reg; /* index of register used */ 42 u8 modrm_rm; /* rm part of modrm */ 43 u64 src_val; /* value of source operand */ 44 u64 dst_val; /* value of destination operand */ 45 u8 src_bytes; /* size of source operand */ 46 u8 dst_bytes; /* size of destination operand */ 47 u8 src_type; /* type of source operand */ 48 u8 dst_type; /* type of destination operand */ 49 u8 ad_bytes; /* size of src/dst address */ 50 u64 next_rip; /* rip following the instruction */ 51 }; 52 53 /* 54 * x86_emulate_ops: 55 * 56 * These operations represent the instruction emulator's interface to memory. 57 * There are two categories of operation: those that act on ordinary memory 58 * regions (*_std), and those that act on memory regions known to require 59 * special treatment or emulation (*_emulated). 60 * 61 * The emulator assumes that an instruction accesses only one 'emulated memory' 62 * location, that this location is the given linear faulting address (cr2), and 63 * that this is one of the instruction's data operands. Instruction fetches and 64 * stack operations are assumed never to access emulated memory. The emulator 65 * automatically deduces which operand of a string-move operation is accessing 66 * emulated memory, and assumes that the other operand accesses normal memory. 67 * 68 * NOTES: 69 * 1. The emulator isn't very smart about emulated vs. standard memory. 70 * 'Emulated memory' access addresses should be checked for sanity. 71 * 'Normal memory' accesses may fault, and the caller must arrange to 72 * detect and handle reentrancy into the emulator via recursive faults. 73 * Accesses may be unaligned and may cross page boundaries. 74 * 2. If the access fails (cannot emulate, or a standard access faults) then 75 * it is up to the memop to propagate the fault to the guest VM via 76 * some out-of-band mechanism, unknown to the emulator. The memop signals 77 * failure by returning X86EMUL_PROPAGATE_FAULT to the emulator, which will 78 * then immediately bail. 79 * 3. Valid access sizes are 1, 2, 4 and 8 bytes. On x86/32 systems only 80 * cmpxchg8b_emulated need support 8-byte accesses. 81 * 4. The emulator cannot handle 64-bit mode emulation on an x86/32 system. 82 */ 83 /* Access completed successfully: continue emulation as normal. */ 84 #define X86EMUL_CONTINUE 0 85 /* Access is unhandleable: bail from emulation and return error to caller. */ 86 #define X86EMUL_UNHANDLEABLE 1 87 /* Terminate emulation but return success to the caller. */ 88 #define X86EMUL_PROPAGATE_FAULT 2 /* propagate a generated fault to guest */ 89 #define X86EMUL_RETRY_INSTR 3 /* retry the instruction for some reason */ 90 #define X86EMUL_CMPXCHG_FAILED 4 /* cmpxchg did not see expected value */ 91 #define X86EMUL_IO_NEEDED 5 /* IO is needed to complete emulation */ 92 #define X86EMUL_INTERCEPTED 6 /* Intercepted by nested VMCB/VMCS */ 93 /* Emulation during event vectoring is unhandleable. */ 94 #define X86EMUL_UNHANDLEABLE_VECTORING 7 95 96 /* x86-specific emulation flags */ 97 #define X86EMUL_F_WRITE BIT(0) 98 #define X86EMUL_F_FETCH BIT(1) 99 #define X86EMUL_F_IMPLICIT BIT(2) 100 #define X86EMUL_F_INVLPG BIT(3) 101 #define X86EMUL_F_MSR BIT(4) 102 #define X86EMUL_F_DT_LOAD BIT(5) 103 104 struct x86_emulate_ops { 105 void (*vm_bugged)(struct x86_emulate_ctxt *ctxt); 106 /* 107 * read_gpr: read a general purpose register (rax - r15) 108 * 109 * @reg: gpr number. 110 */ 111 ulong (*read_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg); 112 /* 113 * write_gpr: write a general purpose register (rax - r15) 114 * 115 * @reg: gpr number. 116 * @val: value to write. 117 */ 118 void (*write_gpr)(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val); 119 /* 120 * read_std: Read bytes of standard (non-emulated/special) memory. 121 * Used for descriptor reading. 122 * @addr: [IN ] Linear address from which to read. 123 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 124 * @bytes: [IN ] Number of bytes to read from memory. 125 * @system:[IN ] Whether the access is forced to be at CPL0. 126 */ 127 int (*read_std)(struct x86_emulate_ctxt *ctxt, 128 unsigned long addr, void *val, 129 unsigned int bytes, 130 struct x86_exception *fault, bool system); 131 132 /* 133 * write_std: Write bytes of standard (non-emulated/special) memory. 134 * Used for descriptor writing. 135 * @addr: [IN ] Linear address to which to write. 136 * @val: [OUT] Value write to memory, zero-extended to 'u_long'. 137 * @bytes: [IN ] Number of bytes to write to memory. 138 * @system:[IN ] Whether the access is forced to be at CPL0. 139 */ 140 int (*write_std)(struct x86_emulate_ctxt *ctxt, 141 unsigned long addr, void *val, unsigned int bytes, 142 struct x86_exception *fault, bool system); 143 /* 144 * fetch: Read bytes of standard (non-emulated/special) memory. 145 * Used for instruction fetch. 146 * @addr: [IN ] Linear address from which to read. 147 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 148 * @bytes: [IN ] Number of bytes to read from memory. 149 */ 150 int (*fetch)(struct x86_emulate_ctxt *ctxt, 151 unsigned long addr, void *val, unsigned int bytes, 152 struct x86_exception *fault); 153 154 /* 155 * read_emulated: Read bytes from emulated/special memory area. 156 * @addr: [IN ] Linear address from which to read. 157 * @val: [OUT] Value read from memory, zero-extended to 'u_long'. 158 * @bytes: [IN ] Number of bytes to read from memory. 159 */ 160 int (*read_emulated)(struct x86_emulate_ctxt *ctxt, 161 unsigned long addr, void *val, unsigned int bytes, 162 struct x86_exception *fault); 163 164 /* 165 * write_emulated: Write bytes to emulated/special memory area. 166 * @addr: [IN ] Linear address to which to write. 167 * @val: [IN ] Value to write to memory (low-order bytes used as 168 * required). 169 * @bytes: [IN ] Number of bytes to write to memory. 170 */ 171 int (*write_emulated)(struct x86_emulate_ctxt *ctxt, 172 unsigned long addr, const void *val, 173 unsigned int bytes, 174 struct x86_exception *fault); 175 176 /* 177 * cmpxchg_emulated: Emulate an atomic (LOCKed) CMPXCHG operation on an 178 * emulated/special memory area. 179 * @addr: [IN ] Linear address to access. 180 * @old: [IN ] Value expected to be current at @addr. 181 * @new: [IN ] Value to write to @addr. 182 * @bytes: [IN ] Number of bytes to access using CMPXCHG. 183 */ 184 int (*cmpxchg_emulated)(struct x86_emulate_ctxt *ctxt, 185 unsigned long addr, 186 const void *old, 187 const void *new, 188 unsigned int bytes, 189 struct x86_exception *fault); 190 void (*invlpg)(struct x86_emulate_ctxt *ctxt, ulong addr); 191 192 int (*pio_in_emulated)(struct x86_emulate_ctxt *ctxt, 193 int size, unsigned short port, void *val, 194 unsigned int count); 195 196 int (*pio_out_emulated)(struct x86_emulate_ctxt *ctxt, 197 int size, unsigned short port, const void *val, 198 unsigned int count); 199 200 bool (*get_segment)(struct x86_emulate_ctxt *ctxt, u16 *selector, 201 struct desc_struct *desc, u32 *base3, int seg); 202 void (*set_segment)(struct x86_emulate_ctxt *ctxt, u16 selector, 203 struct desc_struct *desc, u32 base3, int seg); 204 unsigned long (*get_cached_segment_base)(struct x86_emulate_ctxt *ctxt, 205 int seg); 206 void (*get_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 207 void (*get_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 208 void (*set_gdt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 209 void (*set_idt)(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt); 210 ulong (*get_cr)(struct x86_emulate_ctxt *ctxt, int cr); 211 int (*set_cr)(struct x86_emulate_ctxt *ctxt, int cr, ulong val); 212 int (*cpl)(struct x86_emulate_ctxt *ctxt); 213 ulong (*get_dr)(struct x86_emulate_ctxt *ctxt, int dr); 214 int (*set_dr)(struct x86_emulate_ctxt *ctxt, int dr, ulong value); 215 int (*set_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 data); 216 int (*get_msr_with_filter)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 217 int (*get_msr)(struct x86_emulate_ctxt *ctxt, u32 msr_index, u64 *pdata); 218 int (*check_rdpmc_early)(struct x86_emulate_ctxt *ctxt, u32 pmc); 219 int (*read_pmc)(struct x86_emulate_ctxt *ctxt, u32 pmc, u64 *pdata); 220 void (*halt)(struct x86_emulate_ctxt *ctxt); 221 void (*wbinvd)(struct x86_emulate_ctxt *ctxt); 222 int (*fix_hypercall)(struct x86_emulate_ctxt *ctxt); 223 int (*intercept)(struct x86_emulate_ctxt *ctxt, 224 struct x86_instruction_info *info, 225 enum x86_intercept_stage stage); 226 227 bool (*get_cpuid)(struct x86_emulate_ctxt *ctxt, u32 *eax, u32 *ebx, 228 u32 *ecx, u32 *edx, bool exact_only); 229 bool (*guest_has_movbe)(struct x86_emulate_ctxt *ctxt); 230 bool (*guest_has_fxsr)(struct x86_emulate_ctxt *ctxt); 231 bool (*guest_has_rdpid)(struct x86_emulate_ctxt *ctxt); 232 bool (*guest_cpuid_is_intel_compatible)(struct x86_emulate_ctxt *ctxt); 233 234 void (*set_nmi_mask)(struct x86_emulate_ctxt *ctxt, bool masked); 235 236 bool (*is_smm)(struct x86_emulate_ctxt *ctxt); 237 bool (*is_guest_mode)(struct x86_emulate_ctxt *ctxt); 238 int (*leave_smm)(struct x86_emulate_ctxt *ctxt); 239 void (*triple_fault)(struct x86_emulate_ctxt *ctxt); 240 int (*set_xcr)(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr); 241 242 gva_t (*get_untagged_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 243 unsigned int flags); 244 245 bool (*is_canonical_addr)(struct x86_emulate_ctxt *ctxt, gva_t addr, 246 unsigned int flags); 247 }; 248 249 /* Type, address-of, and value of an instruction's operand. */ 250 struct operand { 251 enum { OP_REG, OP_MEM, OP_MEM_STR, OP_IMM, OP_XMM, OP_MM, OP_NONE } type; 252 unsigned int bytes; 253 unsigned int count; 254 union { 255 unsigned long orig_val; 256 u64 orig_val64; 257 }; 258 union { 259 unsigned long *reg; 260 struct segmented_address { 261 ulong ea; 262 unsigned seg; 263 } mem; 264 unsigned xmm; 265 unsigned mm; 266 } addr; 267 union { 268 unsigned long val; 269 u64 val64; 270 char valptr[sizeof(sse128_t)]; 271 sse128_t vec_val; 272 u64 mm_val; 273 void *data; 274 }; 275 }; 276 277 struct fetch_cache { 278 u8 data[15]; 279 u8 *ptr; 280 u8 *end; 281 }; 282 283 struct read_cache { 284 u8 data[1024]; 285 unsigned long pos; 286 unsigned long end; 287 }; 288 289 /* Execution mode, passed to the emulator. */ 290 enum x86emul_mode { 291 X86EMUL_MODE_REAL, /* Real mode. */ 292 X86EMUL_MODE_VM86, /* Virtual 8086 mode. */ 293 X86EMUL_MODE_PROT16, /* 16-bit protected mode. */ 294 X86EMUL_MODE_PROT32, /* 32-bit protected mode. */ 295 X86EMUL_MODE_PROT64, /* 64-bit (long) mode. */ 296 }; 297 298 /* 299 * fastop functions are declared as taking a never-defined fastop parameter, 300 * so they can't be called from C directly. 301 */ 302 struct fastop; 303 304 typedef void (*fastop_t)(struct fastop *); 305 306 /* 307 * The emulator's _regs array tracks only the GPRs, i.e. excludes RIP. RIP is 308 * tracked/accessed via _eip, and except for RIP relative addressing, which 309 * also uses _eip, RIP cannot be a register operand nor can it be an operand in 310 * a ModRM or SIB byte. 311 */ 312 #ifdef CONFIG_X86_64 313 #define NR_EMULATOR_GPRS 16 314 #else 315 #define NR_EMULATOR_GPRS 8 316 #endif 317 318 struct x86_emulate_ctxt { 319 void *vcpu; 320 const struct x86_emulate_ops *ops; 321 322 /* Register state before/after emulation. */ 323 unsigned long eflags; 324 unsigned long eip; /* eip before instruction emulation */ 325 /* Emulated execution mode, represented by an X86EMUL_MODE value. */ 326 enum x86emul_mode mode; 327 328 /* interruptibility state, as a result of execution of STI or MOV SS */ 329 int interruptibility; 330 331 bool perm_ok; /* do not check permissions if true */ 332 bool tf; /* TF value before instruction (after for syscall/sysret) */ 333 334 bool have_exception; 335 struct x86_exception exception; 336 337 /* GPA available */ 338 bool gpa_available; 339 gpa_t gpa_val; 340 341 /* 342 * decode cache 343 */ 344 345 /* current opcode length in bytes */ 346 u8 opcode_len; 347 u8 b; 348 u8 intercept; 349 u8 op_bytes; 350 u8 ad_bytes; 351 union { 352 int (*execute)(struct x86_emulate_ctxt *ctxt); 353 fastop_t fop; 354 }; 355 int (*check_perm)(struct x86_emulate_ctxt *ctxt); 356 357 bool rip_relative; 358 u8 rex_prefix; 359 u8 lock_prefix; 360 u8 rep_prefix; 361 /* bitmaps of registers in _regs[] that can be read */ 362 u16 regs_valid; 363 /* bitmaps of registers in _regs[] that have been written */ 364 u16 regs_dirty; 365 /* modrm */ 366 u8 modrm; 367 u8 modrm_mod; 368 u8 modrm_reg; 369 u8 modrm_rm; 370 u8 modrm_seg; 371 u8 seg_override; 372 u64 d; 373 unsigned long _eip; 374 375 /* Here begins the usercopy section. */ 376 struct operand src; 377 struct operand src2; 378 struct operand dst; 379 struct operand memop; 380 unsigned long _regs[NR_EMULATOR_GPRS]; 381 struct operand *memopp; 382 struct fetch_cache fetch; 383 struct read_cache io_read; 384 struct read_cache mem_read; 385 bool is_branch; 386 }; 387 388 #define KVM_EMULATOR_BUG_ON(cond, ctxt) \ 389 ({ \ 390 int __ret = (cond); \ 391 \ 392 if (WARN_ON_ONCE(__ret)) \ 393 ctxt->ops->vm_bugged(ctxt); \ 394 unlikely(__ret); \ 395 }) 396 397 /* Repeat String Operation Prefix */ 398 #define REPE_PREFIX 0xf3 399 #define REPNE_PREFIX 0xf2 400 401 /* CPUID vendors */ 402 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx 0x68747541 403 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx 0x444d4163 404 #define X86EMUL_CPUID_VENDOR_AuthenticAMD_edx 0x69746e65 405 406 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx 0x69444d41 407 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx 0x21726574 408 #define X86EMUL_CPUID_VENDOR_AMDisbetterI_edx 0x74656273 409 410 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ebx 0x6f677948 411 #define X86EMUL_CPUID_VENDOR_HygonGenuine_ecx 0x656e6975 412 #define X86EMUL_CPUID_VENDOR_HygonGenuine_edx 0x6e65476e 413 414 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ebx 0x756e6547 415 #define X86EMUL_CPUID_VENDOR_GenuineIntel_ecx 0x6c65746e 416 #define X86EMUL_CPUID_VENDOR_GenuineIntel_edx 0x49656e69 417 418 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ebx 0x746e6543 419 #define X86EMUL_CPUID_VENDOR_CentaurHauls_ecx 0x736c7561 420 #define X86EMUL_CPUID_VENDOR_CentaurHauls_edx 0x48727561 421 422 static inline bool is_guest_vendor_intel(u32 ebx, u32 ecx, u32 edx) 423 { 424 return ebx == X86EMUL_CPUID_VENDOR_GenuineIntel_ebx && 425 ecx == X86EMUL_CPUID_VENDOR_GenuineIntel_ecx && 426 edx == X86EMUL_CPUID_VENDOR_GenuineIntel_edx; 427 } 428 429 static inline bool is_guest_vendor_amd(u32 ebx, u32 ecx, u32 edx) 430 { 431 return (ebx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ebx && 432 ecx == X86EMUL_CPUID_VENDOR_AuthenticAMD_ecx && 433 edx == X86EMUL_CPUID_VENDOR_AuthenticAMD_edx) || 434 (ebx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ebx && 435 ecx == X86EMUL_CPUID_VENDOR_AMDisbetterI_ecx && 436 edx == X86EMUL_CPUID_VENDOR_AMDisbetterI_edx); 437 } 438 439 static inline bool is_guest_vendor_hygon(u32 ebx, u32 ecx, u32 edx) 440 { 441 return ebx == X86EMUL_CPUID_VENDOR_HygonGenuine_ebx && 442 ecx == X86EMUL_CPUID_VENDOR_HygonGenuine_ecx && 443 edx == X86EMUL_CPUID_VENDOR_HygonGenuine_edx; 444 } 445 446 enum x86_intercept_stage { 447 X86_ICTP_NONE = 0, /* Allow zero-init to not match anything */ 448 X86_ICPT_PRE_EXCEPT, 449 X86_ICPT_POST_EXCEPT, 450 X86_ICPT_POST_MEMACCESS, 451 }; 452 453 enum x86_intercept { 454 x86_intercept_none, 455 x86_intercept_cr_read, 456 x86_intercept_cr_write, 457 x86_intercept_clts, 458 x86_intercept_lmsw, 459 x86_intercept_smsw, 460 x86_intercept_dr_read, 461 x86_intercept_dr_write, 462 x86_intercept_lidt, 463 x86_intercept_sidt, 464 x86_intercept_lgdt, 465 x86_intercept_sgdt, 466 x86_intercept_lldt, 467 x86_intercept_sldt, 468 x86_intercept_ltr, 469 x86_intercept_str, 470 x86_intercept_rdtsc, 471 x86_intercept_rdpmc, 472 x86_intercept_pushf, 473 x86_intercept_popf, 474 x86_intercept_cpuid, 475 x86_intercept_rsm, 476 x86_intercept_iret, 477 x86_intercept_intn, 478 x86_intercept_invd, 479 x86_intercept_pause, 480 x86_intercept_hlt, 481 x86_intercept_invlpg, 482 x86_intercept_invlpga, 483 x86_intercept_vmrun, 484 x86_intercept_vmload, 485 x86_intercept_vmsave, 486 x86_intercept_vmmcall, 487 x86_intercept_stgi, 488 x86_intercept_clgi, 489 x86_intercept_skinit, 490 x86_intercept_rdtscp, 491 x86_intercept_rdpid, 492 x86_intercept_icebp, 493 x86_intercept_wbinvd, 494 x86_intercept_monitor, 495 x86_intercept_mwait, 496 x86_intercept_rdmsr, 497 x86_intercept_wrmsr, 498 x86_intercept_in, 499 x86_intercept_ins, 500 x86_intercept_out, 501 x86_intercept_outs, 502 x86_intercept_xsetbv, 503 504 nr_x86_intercepts 505 }; 506 507 /* Host execution mode. */ 508 #if defined(CONFIG_X86_32) 509 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT32 510 #elif defined(CONFIG_X86_64) 511 #define X86EMUL_MODE_HOST X86EMUL_MODE_PROT64 512 #endif 513 514 int x86_decode_insn(struct x86_emulate_ctxt *ctxt, void *insn, int insn_len, int emulation_type); 515 bool x86_page_table_writing_insn(struct x86_emulate_ctxt *ctxt); 516 #define EMULATION_FAILED -1 517 #define EMULATION_OK 0 518 #define EMULATION_RESTART 1 519 #define EMULATION_INTERCEPTED 2 520 void init_decode_cache(struct x86_emulate_ctxt *ctxt); 521 int x86_emulate_insn(struct x86_emulate_ctxt *ctxt); 522 int emulator_task_switch(struct x86_emulate_ctxt *ctxt, 523 u16 tss_selector, int idt_index, int reason, 524 bool has_error_code, u32 error_code); 525 int emulate_int_real(struct x86_emulate_ctxt *ctxt, int irq); 526 void emulator_invalidate_register_cache(struct x86_emulate_ctxt *ctxt); 527 void emulator_writeback_register_cache(struct x86_emulate_ctxt *ctxt); 528 bool emulator_can_use_gpa(struct x86_emulate_ctxt *ctxt); 529 530 static inline ulong reg_read(struct x86_emulate_ctxt *ctxt, unsigned nr) 531 { 532 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 533 nr &= NR_EMULATOR_GPRS - 1; 534 535 if (!(ctxt->regs_valid & (1 << nr))) { 536 ctxt->regs_valid |= 1 << nr; 537 ctxt->_regs[nr] = ctxt->ops->read_gpr(ctxt, nr); 538 } 539 return ctxt->_regs[nr]; 540 } 541 542 static inline ulong *reg_write(struct x86_emulate_ctxt *ctxt, unsigned nr) 543 { 544 if (KVM_EMULATOR_BUG_ON(nr >= NR_EMULATOR_GPRS, ctxt)) 545 nr &= NR_EMULATOR_GPRS - 1; 546 547 BUILD_BUG_ON(sizeof(ctxt->regs_dirty) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 548 BUILD_BUG_ON(sizeof(ctxt->regs_valid) * BITS_PER_BYTE < NR_EMULATOR_GPRS); 549 550 ctxt->regs_valid |= 1 << nr; 551 ctxt->regs_dirty |= 1 << nr; 552 return &ctxt->_regs[nr]; 553 } 554 555 static inline ulong *reg_rmw(struct x86_emulate_ctxt *ctxt, unsigned nr) 556 { 557 reg_read(ctxt, nr); 558 return reg_write(ctxt, nr); 559 } 560 561 #endif /* _ASM_X86_KVM_X86_EMULATE_H */ 562