xref: /linux/arch/sh/kernel/cpu/sh4a/setup-sh7770.c (revision af777ce42d3d51cdef353ce296d6f99dc503feef) ! 
1 /*
2  * SH7770 Setup
3  *
4  *  Copyright (C) 2006 - 2008  Paul Mundt
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 #include <linux/platform_device.h>
11 #include <linux/init.h>
12 #include <linux/serial.h>
13 #include <linux/serial_sci.h>
14 #include <linux/sh_timer.h>
15 
16 static struct plat_sci_port sci_platform_data[] = {
17 	{
18 		.mapbase	= 0xff923000,
19 		.flags		= UPF_BOOT_AUTOCONF,
20 		.type		= PORT_SCIF,
21 		.irqs		= { 61, 61, 61, 61 },
22 	}, {
23 		.mapbase	= 0xff924000,
24 		.flags		= UPF_BOOT_AUTOCONF,
25 		.type		= PORT_SCIF,
26 		.irqs		= { 62, 62, 62, 62 },
27 	}, {
28 		.mapbase	= 0xff925000,
29 		.flags		= UPF_BOOT_AUTOCONF,
30 		.type		= PORT_SCIF,
31 		.irqs		= { 63, 63, 63, 63 },
32 	}, {
33 		.mapbase	= 0xff926000,
34 		.flags		= UPF_BOOT_AUTOCONF,
35 		.type		= PORT_SCIF,
36 		.irqs		= { 64, 64, 64, 64 },
37 	}, {
38 		.mapbase	= 0xff927000,
39 		.flags		= UPF_BOOT_AUTOCONF,
40 		.type		= PORT_SCIF,
41 		.irqs		= { 65, 65, 65, 65 },
42 	}, {
43 		.mapbase	= 0xff928000,
44 		.flags		= UPF_BOOT_AUTOCONF,
45 		.type		= PORT_SCIF,
46 		.irqs		= { 66, 66, 66, 66 },
47 	}, {
48 		.mapbase	= 0xff929000,
49 		.flags		= UPF_BOOT_AUTOCONF,
50 		.type		= PORT_SCIF,
51 		.irqs		= { 67, 67, 67, 67 },
52 	}, {
53 		.mapbase	= 0xff92a000,
54 		.flags		= UPF_BOOT_AUTOCONF,
55 		.type		= PORT_SCIF,
56 		.irqs		= { 68, 68, 68, 68 },
57 	}, {
58 		.mapbase	= 0xff92b000,
59 		.flags		= UPF_BOOT_AUTOCONF,
60 		.type		= PORT_SCIF,
61 		.irqs		= { 69, 69, 69, 69 },
62 	}, {
63 		.mapbase	= 0xff92c000,
64 		.flags		= UPF_BOOT_AUTOCONF,
65 		.type		= PORT_SCIF,
66 		.irqs		= { 70, 70, 70, 70 },
67 	}, {
68 		.flags = 0,
69 	}
70 };
71 
72 static struct platform_device sci_device = {
73 	.name		= "sh-sci",
74 	.id		= -1,
75 	.dev		= {
76 		.platform_data	= sci_platform_data,
77 	},
78 };
79 
80 static struct sh_timer_config tmu0_platform_data = {
81 	.name = "TMU0",
82 	.channel_offset = 0x04,
83 	.timer_bit = 0,
84 	.clk = "peripheral_clk",
85 	.clockevent_rating = 200,
86 };
87 
88 static struct resource tmu0_resources[] = {
89 	[0] = {
90 		.name	= "TMU0",
91 		.start	= 0xffd80008,
92 		.end	= 0xffd80013,
93 		.flags	= IORESOURCE_MEM,
94 	},
95 	[1] = {
96 		.start	= 16,
97 		.flags	= IORESOURCE_IRQ,
98 	},
99 };
100 
101 static struct platform_device tmu0_device = {
102 	.name		= "sh_tmu",
103 	.id		= 0,
104 	.dev = {
105 		.platform_data	= &tmu0_platform_data,
106 	},
107 	.resource	= tmu0_resources,
108 	.num_resources	= ARRAY_SIZE(tmu0_resources),
109 };
110 
111 static struct sh_timer_config tmu1_platform_data = {
112 	.name = "TMU1",
113 	.channel_offset = 0x10,
114 	.timer_bit = 1,
115 	.clk = "peripheral_clk",
116 	.clocksource_rating = 200,
117 };
118 
119 static struct resource tmu1_resources[] = {
120 	[0] = {
121 		.name	= "TMU1",
122 		.start	= 0xffd80014,
123 		.end	= 0xffd8001f,
124 		.flags	= IORESOURCE_MEM,
125 	},
126 	[1] = {
127 		.start	= 17,
128 		.flags	= IORESOURCE_IRQ,
129 	},
130 };
131 
132 static struct platform_device tmu1_device = {
133 	.name		= "sh_tmu",
134 	.id		= 1,
135 	.dev = {
136 		.platform_data	= &tmu1_platform_data,
137 	},
138 	.resource	= tmu1_resources,
139 	.num_resources	= ARRAY_SIZE(tmu1_resources),
140 };
141 
142 static struct sh_timer_config tmu2_platform_data = {
143 	.name = "TMU2",
144 	.channel_offset = 0x1c,
145 	.timer_bit = 2,
146 	.clk = "peripheral_clk",
147 };
148 
149 static struct resource tmu2_resources[] = {
150 	[0] = {
151 		.name	= "TMU2",
152 		.start	= 0xffd80020,
153 		.end	= 0xffd8002f,
154 		.flags	= IORESOURCE_MEM,
155 	},
156 	[1] = {
157 		.start	= 18,
158 		.flags	= IORESOURCE_IRQ,
159 	},
160 };
161 
162 static struct platform_device tmu2_device = {
163 	.name		= "sh_tmu",
164 	.id		= 2,
165 	.dev = {
166 		.platform_data	= &tmu2_platform_data,
167 	},
168 	.resource	= tmu2_resources,
169 	.num_resources	= ARRAY_SIZE(tmu2_resources),
170 };
171 
172 static struct sh_timer_config tmu3_platform_data = {
173 	.name = "TMU3",
174 	.channel_offset = 0x04,
175 	.timer_bit = 0,
176 	.clk = "peripheral_clk",
177 };
178 
179 static struct resource tmu3_resources[] = {
180 	[0] = {
181 		.name	= "TMU3",
182 		.start	= 0xffd81008,
183 		.end	= 0xffd81013,
184 		.flags	= IORESOURCE_MEM,
185 	},
186 	[1] = {
187 		.start	= 19,
188 		.flags	= IORESOURCE_IRQ,
189 	},
190 };
191 
192 static struct platform_device tmu3_device = {
193 	.name		= "sh_tmu",
194 	.id		= 3,
195 	.dev = {
196 		.platform_data	= &tmu3_platform_data,
197 	},
198 	.resource	= tmu3_resources,
199 	.num_resources	= ARRAY_SIZE(tmu3_resources),
200 };
201 
202 static struct sh_timer_config tmu4_platform_data = {
203 	.name = "TMU4",
204 	.channel_offset = 0x10,
205 	.timer_bit = 1,
206 	.clk = "peripheral_clk",
207 };
208 
209 static struct resource tmu4_resources[] = {
210 	[0] = {
211 		.name	= "TMU4",
212 		.start	= 0xffd81014,
213 		.end	= 0xffd8101f,
214 		.flags	= IORESOURCE_MEM,
215 	},
216 	[1] = {
217 		.start	= 20,
218 		.flags	= IORESOURCE_IRQ,
219 	},
220 };
221 
222 static struct platform_device tmu4_device = {
223 	.name		= "sh_tmu",
224 	.id		= 4,
225 	.dev = {
226 		.platform_data	= &tmu4_platform_data,
227 	},
228 	.resource	= tmu4_resources,
229 	.num_resources	= ARRAY_SIZE(tmu4_resources),
230 };
231 
232 static struct sh_timer_config tmu5_platform_data = {
233 	.name = "TMU5",
234 	.channel_offset = 0x1c,
235 	.timer_bit = 2,
236 	.clk = "peripheral_clk",
237 };
238 
239 static struct resource tmu5_resources[] = {
240 	[0] = {
241 		.name	= "TMU5",
242 		.start	= 0xffd81020,
243 		.end	= 0xffd8102f,
244 		.flags	= IORESOURCE_MEM,
245 	},
246 	[1] = {
247 		.start	= 21,
248 		.flags	= IORESOURCE_IRQ,
249 	},
250 };
251 
252 static struct platform_device tmu5_device = {
253 	.name		= "sh_tmu",
254 	.id		= 5,
255 	.dev = {
256 		.platform_data	= &tmu5_platform_data,
257 	},
258 	.resource	= tmu5_resources,
259 	.num_resources	= ARRAY_SIZE(tmu5_resources),
260 };
261 
262 static struct sh_timer_config tmu6_platform_data = {
263 	.name = "TMU6",
264 	.channel_offset = 0x04,
265 	.timer_bit = 0,
266 	.clk = "peripheral_clk",
267 };
268 
269 static struct resource tmu6_resources[] = {
270 	[0] = {
271 		.name	= "TMU6",
272 		.start	= 0xffd82008,
273 		.end	= 0xffd82013,
274 		.flags	= IORESOURCE_MEM,
275 	},
276 	[1] = {
277 		.start	= 22,
278 		.flags	= IORESOURCE_IRQ,
279 	},
280 };
281 
282 static struct platform_device tmu6_device = {
283 	.name		= "sh_tmu",
284 	.id		= 6,
285 	.dev = {
286 		.platform_data	= &tmu6_platform_data,
287 	},
288 	.resource	= tmu6_resources,
289 	.num_resources	= ARRAY_SIZE(tmu6_resources),
290 };
291 
292 static struct sh_timer_config tmu7_platform_data = {
293 	.name = "TMU7",
294 	.channel_offset = 0x10,
295 	.timer_bit = 1,
296 	.clk = "peripheral_clk",
297 };
298 
299 static struct resource tmu7_resources[] = {
300 	[0] = {
301 		.name	= "TMU7",
302 		.start	= 0xffd82014,
303 		.end	= 0xffd8201f,
304 		.flags	= IORESOURCE_MEM,
305 	},
306 	[1] = {
307 		.start	= 23,
308 		.flags	= IORESOURCE_IRQ,
309 	},
310 };
311 
312 static struct platform_device tmu7_device = {
313 	.name		= "sh_tmu",
314 	.id		= 7,
315 	.dev = {
316 		.platform_data	= &tmu7_platform_data,
317 	},
318 	.resource	= tmu7_resources,
319 	.num_resources	= ARRAY_SIZE(tmu7_resources),
320 };
321 
322 static struct sh_timer_config tmu8_platform_data = {
323 	.name = "TMU8",
324 	.channel_offset = 0x1c,
325 	.timer_bit = 2,
326 	.clk = "peripheral_clk",
327 };
328 
329 static struct resource tmu8_resources[] = {
330 	[0] = {
331 		.name	= "TMU8",
332 		.start	= 0xffd82020,
333 		.end	= 0xffd8202b,
334 		.flags	= IORESOURCE_MEM,
335 	},
336 	[1] = {
337 		.start	= 24,
338 		.flags	= IORESOURCE_IRQ,
339 	},
340 };
341 
342 static struct platform_device tmu8_device = {
343 	.name		= "sh_tmu",
344 	.id		= 8,
345 	.dev = {
346 		.platform_data	= &tmu8_platform_data,
347 	},
348 	.resource	= tmu8_resources,
349 	.num_resources	= ARRAY_SIZE(tmu8_resources),
350 };
351 
352 static struct platform_device *sh7770_devices[] __initdata = {
353 	&tmu0_device,
354 	&tmu1_device,
355 	&tmu2_device,
356 	&tmu3_device,
357 	&tmu4_device,
358 	&tmu5_device,
359 	&tmu6_device,
360 	&tmu7_device,
361 	&tmu8_device,
362 	&sci_device,
363 };
364 
365 static int __init sh7770_devices_setup(void)
366 {
367 	return platform_add_devices(sh7770_devices,
368 				    ARRAY_SIZE(sh7770_devices));
369 }
370 __initcall(sh7770_devices_setup);
371 
372 static struct platform_device *sh7770_early_devices[] __initdata = {
373 	&tmu0_device,
374 	&tmu1_device,
375 	&tmu2_device,
376 	&tmu3_device,
377 	&tmu4_device,
378 	&tmu5_device,
379 	&tmu6_device,
380 	&tmu7_device,
381 	&tmu8_device,
382 };
383 
384 void __init plat_early_device_setup(void)
385 {
386 	early_platform_add_devices(sh7770_early_devices,
387 				   ARRAY_SIZE(sh7770_early_devices));
388 }
389 
390 void __init plat_irq_setup(void)
391 {
392 }
393