xref: /linux/arch/riscv/include/uapi/asm/perf_regs.h (revision 976e3645923bdd2fe7893aae33fd7a21098bfb28)
1*98a93b0bSMao Han /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2*98a93b0bSMao Han /* Copyright (C) 2019 Hangzhou C-SKY Microsystems co.,ltd. */
3*98a93b0bSMao Han 
4*98a93b0bSMao Han #ifndef _ASM_RISCV_PERF_REGS_H
5*98a93b0bSMao Han #define _ASM_RISCV_PERF_REGS_H
6*98a93b0bSMao Han 
7*98a93b0bSMao Han enum perf_event_riscv_regs {
8*98a93b0bSMao Han 	PERF_REG_RISCV_PC,
9*98a93b0bSMao Han 	PERF_REG_RISCV_RA,
10*98a93b0bSMao Han 	PERF_REG_RISCV_SP,
11*98a93b0bSMao Han 	PERF_REG_RISCV_GP,
12*98a93b0bSMao Han 	PERF_REG_RISCV_TP,
13*98a93b0bSMao Han 	PERF_REG_RISCV_T0,
14*98a93b0bSMao Han 	PERF_REG_RISCV_T1,
15*98a93b0bSMao Han 	PERF_REG_RISCV_T2,
16*98a93b0bSMao Han 	PERF_REG_RISCV_S0,
17*98a93b0bSMao Han 	PERF_REG_RISCV_S1,
18*98a93b0bSMao Han 	PERF_REG_RISCV_A0,
19*98a93b0bSMao Han 	PERF_REG_RISCV_A1,
20*98a93b0bSMao Han 	PERF_REG_RISCV_A2,
21*98a93b0bSMao Han 	PERF_REG_RISCV_A3,
22*98a93b0bSMao Han 	PERF_REG_RISCV_A4,
23*98a93b0bSMao Han 	PERF_REG_RISCV_A5,
24*98a93b0bSMao Han 	PERF_REG_RISCV_A6,
25*98a93b0bSMao Han 	PERF_REG_RISCV_A7,
26*98a93b0bSMao Han 	PERF_REG_RISCV_S2,
27*98a93b0bSMao Han 	PERF_REG_RISCV_S3,
28*98a93b0bSMao Han 	PERF_REG_RISCV_S4,
29*98a93b0bSMao Han 	PERF_REG_RISCV_S5,
30*98a93b0bSMao Han 	PERF_REG_RISCV_S6,
31*98a93b0bSMao Han 	PERF_REG_RISCV_S7,
32*98a93b0bSMao Han 	PERF_REG_RISCV_S8,
33*98a93b0bSMao Han 	PERF_REG_RISCV_S9,
34*98a93b0bSMao Han 	PERF_REG_RISCV_S10,
35*98a93b0bSMao Han 	PERF_REG_RISCV_S11,
36*98a93b0bSMao Han 	PERF_REG_RISCV_T3,
37*98a93b0bSMao Han 	PERF_REG_RISCV_T4,
38*98a93b0bSMao Han 	PERF_REG_RISCV_T5,
39*98a93b0bSMao Han 	PERF_REG_RISCV_T6,
40*98a93b0bSMao Han 	PERF_REG_RISCV_MAX,
41*98a93b0bSMao Han };
42*98a93b0bSMao Han #endif /* _ASM_RISCV_PERF_REGS_H */
43