xref: /linux/arch/riscv/boot/dts/microchip/mpfs-beaglev-fire-fabric.dtsi (revision c771600c6af14749609b49565ffb4cac2959710d)
13f41368fSConor Dooley// SPDX-License-Identifier: (GPL-2.0 OR MIT)
23f41368fSConor Dooley
33f41368fSConor Dooley/ {
43f41368fSConor Dooley	fabric_clk3: fabric-clk3 {
53f41368fSConor Dooley		compatible = "fixed-clock";
63f41368fSConor Dooley		#clock-cells = <0>;
73f41368fSConor Dooley		clock-frequency = <50000000>;
83f41368fSConor Dooley	};
93f41368fSConor Dooley
103f41368fSConor Dooley	fabric_clk1: fabric-clk1 {
113f41368fSConor Dooley		compatible = "fixed-clock";
123f41368fSConor Dooley		#clock-cells = <0>;
133f41368fSConor Dooley		clock-frequency = <125000000>;
143f41368fSConor Dooley	};
153f41368fSConor Dooley
163f41368fSConor Dooley	fabric-bus@40000000 {
173f41368fSConor Dooley		compatible = "simple-bus";
183f41368fSConor Dooley		#address-cells = <2>;
193f41368fSConor Dooley		#size-cells = <2>;
203f41368fSConor Dooley		ranges = <0x0 0x40000000 0x0 0x40000000 0x0 0x20000000>, /* FIC3-FAB */
213f41368fSConor Dooley			 <0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>, /* FIC0, LO */
223f41368fSConor Dooley			 <0x0 0xe0000000 0x0 0xe0000000 0x0 0x20000000>, /* FIC1, LO */
233f41368fSConor Dooley			 <0x20 0x0 0x20 0x0 0x10 0x0>, /* FIC0,HI */
243f41368fSConor Dooley			 <0x30 0x0 0x30 0x0 0x10 0x0>; /* FIC1,HI */
253f41368fSConor Dooley
263f41368fSConor Dooley		cape_gpios_p8: gpio@41100000 {
273f41368fSConor Dooley			compatible = "microchip,coregpio-rtl-v3";
283f41368fSConor Dooley			reg = <0x0 0x41100000 0x0 0x1000>;
293f41368fSConor Dooley			clocks = <&fabric_clk3>;
303f41368fSConor Dooley			gpio-controller;
313f41368fSConor Dooley			#gpio-cells = <2>;
323f41368fSConor Dooley			ngpios = <16>;
333f41368fSConor Dooley			gpio-line-names = "P8_PIN31", "P8_PIN32", "P8_PIN33", "P8_PIN34",
343f41368fSConor Dooley					  "P8_PIN35", "P8_PIN36", "P8_PIN37", "P8_PIN38",
353f41368fSConor Dooley					  "P8_PIN39", "P8_PIN40", "P8_PIN41", "P8_PIN42",
363f41368fSConor Dooley					  "P8_PIN43", "P8_PIN44", "P8_PIN45", "P8_PIN46";
373f41368fSConor Dooley		};
383f41368fSConor Dooley
393f41368fSConor Dooley		cape_gpios_p9: gpio@41200000 {
403f41368fSConor Dooley			compatible = "microchip,coregpio-rtl-v3";
413f41368fSConor Dooley			reg = <0x0 0x41200000 0x0 0x1000>;
423f41368fSConor Dooley			clocks = <&fabric_clk3>;
433f41368fSConor Dooley			gpio-controller;
443f41368fSConor Dooley			#gpio-cells = <2>;
453f41368fSConor Dooley			ngpios = <20>;
463f41368fSConor Dooley			gpio-line-names = "P9_PIN11", "P9_PIN12", "P9_PIN13", "P9_PIN14",
473f41368fSConor Dooley					  "P9_PIN15", "P9_PIN16", "P9_PIN17", "P9_PIN18",
483f41368fSConor Dooley					  "P9_PIN21", "P9_PIN22", "P9_PIN23", "P9_PIN24",
493f41368fSConor Dooley					  "P9_PIN25", "P9_PIN26", "P9_PIN27", "P9_PIN28",
503f41368fSConor Dooley					  "P9_PIN29", "P9_PIN31", "P9_PIN41", "P9_PIN42";
513f41368fSConor Dooley		};
523f41368fSConor Dooley
533f41368fSConor Dooley		hsi_gpios: gpio@44000000 {
543f41368fSConor Dooley			compatible = "microchip,coregpio-rtl-v3";
553f41368fSConor Dooley			reg = <0x0 0x44000000 0x0 0x1000>;
563f41368fSConor Dooley			clocks = <&fabric_clk3>;
573f41368fSConor Dooley			gpio-controller;
583f41368fSConor Dooley			#gpio-cells = <2>;
593f41368fSConor Dooley			ngpios = <20>;
603f41368fSConor Dooley			gpio-line-names = "B0_HSIO70N", "B0_HSIO71N", "B0_HSIO83N",
613f41368fSConor Dooley					  "B0_HSIO73N_C2P_CLKN", "B0_HSIO70P", "B0_HSIO71P",
623f41368fSConor Dooley					  "B0_HSIO83P", "B0_HSIO73N_C2P_CLKP", "XCVR1_RX_VALID",
633f41368fSConor Dooley					  "XCVR1_LOCK", "XCVR1_ERROR", "XCVR2_RX_VALID",
643f41368fSConor Dooley					  "XCVR2_LOCK", "XCVR2_ERROR", "XCVR3_RX_VALID",
653f41368fSConor Dooley					  "XCVR3_LOCK", "XCVR3_ERROR", "XCVR_0B_REF_CLK_PLL_LOCK",
663f41368fSConor Dooley					  "XCVR_0C_REF_CLK_PLL_LOCK", "B0_HSIO81N";
673f41368fSConor Dooley		};
683f41368fSConor Dooley	};
693f41368fSConor Dooley
703f41368fSConor Dooley	refclk_ccc: cccrefclk {
713f41368fSConor Dooley		compatible = "fixed-clock";
723f41368fSConor Dooley		#clock-cells = <0>;
733f41368fSConor Dooley	};
743f41368fSConor Dooley};
753f41368fSConor Dooley
763f41368fSConor Dooley&ccc_nw {
773f41368fSConor Dooley	clocks = <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>, <&refclk_ccc>,
783f41368fSConor Dooley		 <&refclk_ccc>, <&refclk_ccc>;
793f41368fSConor Dooley	clock-names = "pll0_ref0", "pll0_ref1", "pll1_ref0", "pll1_ref1",
803f41368fSConor Dooley		      "dll0_ref", "dll1_ref";
813f41368fSConor Dooley	status = "okay";
823f41368fSConor Dooley};
83