xref: /linux/arch/mips/include/asm/sibyte/sb1250_defs.h (revision 75bf465f0bc33e9b776a46d6a1b9b990f5fb7c37)
1*1a59d1b8SThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */
21da177e4SLinus Torvalds /*  *********************************************************************
31da177e4SLinus Torvalds     *  SB1250 Board Support Package
41da177e4SLinus Torvalds     *
51da177e4SLinus Torvalds     *  Global constants and macros		File: sb1250_defs.h
61da177e4SLinus Torvalds     *
71da177e4SLinus Torvalds     *  This file contains macros and definitions used by the other
81da177e4SLinus Torvalds     *  include files.
91da177e4SLinus Torvalds     *
101da177e4SLinus Torvalds     *  SB1250 specification level:  User's manual 1/02/02
111da177e4SLinus Torvalds     *
121da177e4SLinus Torvalds     *********************************************************************
131da177e4SLinus Torvalds     *
141da177e4SLinus Torvalds     *  Copyright 2000,2001,2002,2003
151da177e4SLinus Torvalds     *  Broadcom Corporation. All rights reserved.
161da177e4SLinus Torvalds     *
171da177e4SLinus Torvalds     ********************************************************************* */
181da177e4SLinus Torvalds 
191da177e4SLinus Torvalds #ifndef _SB1250_DEFS_H
201da177e4SLinus Torvalds #define _SB1250_DEFS_H
211da177e4SLinus Torvalds 
221da177e4SLinus Torvalds /*
231da177e4SLinus Torvalds  * These headers require ANSI C89 string concatenation, and GCC or other
241da177e4SLinus Torvalds  * 'long long' (64-bit integer) support.
251da177e4SLinus Torvalds  */
261da177e4SLinus Torvalds #if !defined(__STDC__) && !defined(_MSC_VER)
271da177e4SLinus Torvalds #error SiByte headers require ANSI C89 support
281da177e4SLinus Torvalds #endif
291da177e4SLinus Torvalds 
301da177e4SLinus Torvalds 
311da177e4SLinus Torvalds /*  *********************************************************************
321da177e4SLinus Torvalds     *  Macros for feature tests, used to enable include file features
331da177e4SLinus Torvalds     *  for chip features only present in certain chip revisions.
341da177e4SLinus Torvalds     *
351da177e4SLinus Torvalds     *  SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision
361da177e4SLinus Torvalds     *  which is to be exposed by the headers.  If undefined, it defaults to
371da177e4SLinus Torvalds     *  "all features."
381da177e4SLinus Torvalds     *
391da177e4SLinus Torvalds     *  Use like:
401da177e4SLinus Torvalds     *
411da177e4SLinus Torvalds     *	 #define SIBYTE_HDR_FEATURES	SIBYTE_HDR_FMASK_112x_PASS1
421da177e4SLinus Torvalds     *
431da177e4SLinus Torvalds     *		Generate defines only for that revision of chip.
441da177e4SLinus Torvalds     *
451da177e4SLinus Torvalds     *	 #if SIBYTE_HDR_FEATURE(chip,pass)
461da177e4SLinus Torvalds     *
471da177e4SLinus Torvalds     *		True if header features for that revision or later of
481da177e4SLinus Torvalds     *		that particular chip type are enabled in SIBYTE_HDR_FEATURES.
491da177e4SLinus Torvalds     *		(Use this to bracket #defines for features present in a given
501da177e4SLinus Torvalds     *		revision and later.)
511da177e4SLinus Torvalds     *
521da177e4SLinus Torvalds     *		Note that there is no implied ordering between chip types.
531da177e4SLinus Torvalds     *
541da177e4SLinus Torvalds     *		Note also that 'chip' and 'pass' must textually exactly
551da177e4SLinus Torvalds     *		match the defines below.  So, for example,
561da177e4SLinus Torvalds     *		SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but
571da177e4SLinus Torvalds     *		SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons).
581da177e4SLinus Torvalds     *
591da177e4SLinus Torvalds     *	 #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass)
601da177e4SLinus Torvalds     *
611da177e4SLinus Torvalds     *		Same as SIBYTE_HDR_FEATURE, but true for the named revision
621da177e4SLinus Torvalds     *		and earlier revisions of the named chip type.
631da177e4SLinus Torvalds     *
641da177e4SLinus Torvalds     *	 #if SIBYTE_HDR_FEATURE_EXACT(chip,pass)
651da177e4SLinus Torvalds     *
661da177e4SLinus Torvalds     *		Same as SIBYTE_HDR_FEATURE, but only true for the named
671da177e4SLinus Torvalds     *		revision of the named chip type.  (Note that this CANNOT
681da177e4SLinus Torvalds     *		be used to verify that you're compiling only for that
691da177e4SLinus Torvalds     *		particular chip/revision.  It will be true any time this
701da177e4SLinus Torvalds     *		chip/revision is included in SIBYTE_HDR_FEATURES.)
711da177e4SLinus Torvalds     *
721da177e4SLinus Torvalds     *	 #if SIBYTE_HDR_FEATURE_CHIP(chip)
731da177e4SLinus Torvalds     *
741da177e4SLinus Torvalds     *		True if header features for (any revision of) that chip type
751da177e4SLinus Torvalds     *		are enabled in SIBYTE_HDR_FEATURES.  (Use this to bracket
761da177e4SLinus Torvalds     *		#defines for features specific to a given chip type.)
771da177e4SLinus Torvalds     *
781da177e4SLinus Torvalds     *  Mask values currently include room for additional revisions of each
791da177e4SLinus Torvalds     *  chip type, but can be renumbered at will.  Note that they MUST fit
801da177e4SLinus Torvalds     *  into 31 bits and may not include C type constructs, for safe use in
811da177e4SLinus Torvalds     *  CPP conditionals.  Bit positions within chip types DO indicate
821da177e4SLinus Torvalds     *  ordering, so be careful when adding support for new minor revs.
831da177e4SLinus Torvalds     ********************************************************************* */
841da177e4SLinus Torvalds 
854cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1250_ALL		0x000000ff
864cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1250_PASS1		0x00000001
874cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1250_PASS2		0x00000002
884cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1250_PASS3		0x00000004
891da177e4SLinus Torvalds 
904cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_112x_ALL		0x00000f00
914cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_112x_PASS1		0x00000100
924cbf2beaSAndrew Isaacson 
934cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1480_ALL		0x0000f000
944cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1480_PASS1		0x00001000
954cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1480_PASS2		0x00002000
961da177e4SLinus Torvalds 
971da177e4SLinus Torvalds /* Bit mask for chip/revision.	(use _ALL for all revisions of a chip).	 */
981da177e4SLinus Torvalds #define SIBYTE_HDR_FMASK(chip, pass)					\
991da177e4SLinus Torvalds     (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass)
1001da177e4SLinus Torvalds #define SIBYTE_HDR_FMASK_ALLREVS(chip)					\
1011da177e4SLinus Torvalds     (SIBYTE_HDR_FMASK_ ## chip ## _ALL)
1021da177e4SLinus Torvalds 
1034cbf2beaSAndrew Isaacson /* Default constant value for all chips, all revisions */
1041da177e4SLinus Torvalds #define SIBYTE_HDR_FMASK_ALL						\
1054cbf2beaSAndrew Isaacson     (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL		\
1064cbf2beaSAndrew Isaacson      | SIBYTE_HDR_FMASK_1480_ALL)
1074cbf2beaSAndrew Isaacson 
1084cbf2beaSAndrew Isaacson /* This one is used for the "original" BCM1250/BCM112x chips.  We use this
1094cbf2beaSAndrew Isaacson    to weed out constants and macros that do not exist on later chips like
1104cbf2beaSAndrew Isaacson    the BCM1480	*/
1114cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1250_112x_ALL					\
1121da177e4SLinus Torvalds     (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL)
1134cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL
1141da177e4SLinus Torvalds 
1151da177e4SLinus Torvalds #ifndef SIBYTE_HDR_FEATURES
1161da177e4SLinus Torvalds #define SIBYTE_HDR_FEATURES			SIBYTE_HDR_FMASK_ALL
1171da177e4SLinus Torvalds #endif
1181da177e4SLinus Torvalds 
1191da177e4SLinus Torvalds 
1201da177e4SLinus Torvalds /* Bit mask for revisions of chip exclusively before the named revision.  */
1211da177e4SLinus Torvalds #define SIBYTE_HDR_FMASK_BEFORE(chip, pass)				\
1221da177e4SLinus Torvalds     ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip))
1231da177e4SLinus Torvalds 
1241da177e4SLinus Torvalds /* Bit mask for revisions of chip exclusively after the named revision.	 */
1251da177e4SLinus Torvalds #define SIBYTE_HDR_FMASK_AFTER(chip, pass)				\
1261da177e4SLinus Torvalds     (~(SIBYTE_HDR_FMASK(chip, pass)					\
1271da177e4SLinus Torvalds      | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip))
1281da177e4SLinus Torvalds 
1291da177e4SLinus Torvalds 
1301da177e4SLinus Torvalds /* True if header features enabled for (any revision of) that chip type.  */
1311da177e4SLinus Torvalds #define SIBYTE_HDR_FEATURE_CHIP(chip)					\
1321da177e4SLinus Torvalds     (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES))
1331da177e4SLinus Torvalds 
1344cbf2beaSAndrew Isaacson /* True for all versions of the BCM1250 and BCM1125, but not true for
1354cbf2beaSAndrew Isaacson    anything else */
1364cbf2beaSAndrew Isaacson #define SIBYTE_HDR_FEATURE_1250_112x \
1374cbf2beaSAndrew Isaacson       (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x))
1384cbf2beaSAndrew Isaacson /*    (!!  (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */
1394cbf2beaSAndrew Isaacson 
1401da177e4SLinus Torvalds /* True if header features enabled for that rev or later, inclusive.  */
1411da177e4SLinus Torvalds #define SIBYTE_HDR_FEATURE(chip, pass)					\
1421da177e4SLinus Torvalds     (!! ((SIBYTE_HDR_FMASK(chip, pass)					\
1431da177e4SLinus Torvalds 	  | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES))
1441da177e4SLinus Torvalds 
1451da177e4SLinus Torvalds /* True if header features enabled for exactly that rev.  */
1461da177e4SLinus Torvalds #define SIBYTE_HDR_FEATURE_EXACT(chip, pass)				\
1471da177e4SLinus Torvalds     (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES))
1481da177e4SLinus Torvalds 
1491da177e4SLinus Torvalds /* True if header features enabled for that rev or before, inclusive.  */
1501da177e4SLinus Torvalds #define SIBYTE_HDR_FEATURE_UP_TO(chip, pass)				\
1511da177e4SLinus Torvalds     (!! ((SIBYTE_HDR_FMASK(chip, pass)					\
1521da177e4SLinus Torvalds 	 | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES))
1531da177e4SLinus Torvalds 
1541da177e4SLinus Torvalds 
1551da177e4SLinus Torvalds /*  *********************************************************************
1561da177e4SLinus Torvalds     *  Naming schemes for constants in these files:
1571da177e4SLinus Torvalds     *
1581da177e4SLinus Torvalds     *  M_xxx	       MASK constant (identifies bits in a register).
1591da177e4SLinus Torvalds     *		       For multi-bit fields, all bits in the field will
1601da177e4SLinus Torvalds     *		       be set.
1611da177e4SLinus Torvalds     *
1621da177e4SLinus Torvalds     *  K_xxx	       "Code" constant (value for data in a multi-bit
1631da177e4SLinus Torvalds     *		       field).	The value is right justified.
1641da177e4SLinus Torvalds     *
1651da177e4SLinus Torvalds     *  V_xxx	       "Value" constant.  This is the same as the
1661da177e4SLinus Torvalds     *		       corresponding "K_xxx" constant, except it is
1671da177e4SLinus Torvalds     *		       shifted to the correct position in the register.
1681da177e4SLinus Torvalds     *
1691da177e4SLinus Torvalds     *  S_xxx	       SHIFT constant.	This is the number of bits that
1701da177e4SLinus Torvalds     *		       a field value (code) needs to be shifted
1711da177e4SLinus Torvalds     *		       (towards the left) to put the value in the right
1721da177e4SLinus Torvalds     *		       position for the register.
1731da177e4SLinus Torvalds     *
1741da177e4SLinus Torvalds     *  A_xxx	       ADDRESS constant.  This will be a physical
1751da177e4SLinus Torvalds     *		       address.	 Use the PHYS_TO_K1 macro to generate
1761da177e4SLinus Torvalds     *		       a K1SEG address.
1771da177e4SLinus Torvalds     *
1781da177e4SLinus Torvalds     *  R_xxx	       RELATIVE offset constant.  This is an offset from
1791da177e4SLinus Torvalds     *		       an A_xxx constant (usually the first register in
1801da177e4SLinus Torvalds     *		       a group).
1811da177e4SLinus Torvalds     *
1821da177e4SLinus Torvalds     *  G_xxx(X)	       GET value.  This macro obtains a multi-bit field
1831da177e4SLinus Torvalds     *		       from a register, masks it, and shifts it to
1841da177e4SLinus Torvalds     *		       the bottom of the register (retrieving a K_xxx
1851da177e4SLinus Torvalds     *		       value, for example).
1861da177e4SLinus Torvalds     *
1871da177e4SLinus Torvalds     *  V_xxx(X)	       VALUE.  This macro computes the value of a
1881da177e4SLinus Torvalds     *		       K_xxx constant shifted to the correct position
1891da177e4SLinus Torvalds     *		       in the register.
1901da177e4SLinus Torvalds     ********************************************************************* */
1911da177e4SLinus Torvalds 
1921da177e4SLinus Torvalds 
1931da177e4SLinus Torvalds 
1941da177e4SLinus Torvalds 
1951da177e4SLinus Torvalds /*
1961da177e4SLinus Torvalds  * Cast to 64-bit number.  Presumably the syntax is different in
1971da177e4SLinus Torvalds  * assembly language.
1981da177e4SLinus Torvalds  *
1991da177e4SLinus Torvalds  * Note: you'll need to define uint32_t and uint64_t in your headers.
2001da177e4SLinus Torvalds  */
2011da177e4SLinus Torvalds 
20236396f3cSRalf Baechle #if !defined(__ASSEMBLY__)
2031da177e4SLinus Torvalds #define _SB_MAKE64(x) ((uint64_t)(x))
2041da177e4SLinus Torvalds #define _SB_MAKE32(x) ((uint32_t)(x))
2051da177e4SLinus Torvalds #else
2061da177e4SLinus Torvalds #define _SB_MAKE64(x) (x)
2071da177e4SLinus Torvalds #define _SB_MAKE32(x) (x)
2081da177e4SLinus Torvalds #endif
2091da177e4SLinus Torvalds 
2101da177e4SLinus Torvalds 
2111da177e4SLinus Torvalds /*
2121da177e4SLinus Torvalds  * Make a mask for 1 bit at position 'n'
2131da177e4SLinus Torvalds  */
2141da177e4SLinus Torvalds 
2151da177e4SLinus Torvalds #define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n))
2161da177e4SLinus Torvalds #define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n))
2171da177e4SLinus Torvalds 
2181da177e4SLinus Torvalds /*
2191da177e4SLinus Torvalds  * Make a mask for 'v' bits at position 'n'
2201da177e4SLinus Torvalds  */
2211da177e4SLinus Torvalds 
2221da177e4SLinus Torvalds #define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n))
2231da177e4SLinus Torvalds #define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n))
2241da177e4SLinus Torvalds 
2251da177e4SLinus Torvalds /*
2261da177e4SLinus Torvalds  * Make a value at 'v' at bit position 'n'
2271da177e4SLinus Torvalds  */
2281da177e4SLinus Torvalds 
2291da177e4SLinus Torvalds #define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n))
2301da177e4SLinus Torvalds #define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n))
2311da177e4SLinus Torvalds 
2321da177e4SLinus Torvalds #define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n))
2331da177e4SLinus Torvalds #define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n))
2341da177e4SLinus Torvalds 
2351da177e4SLinus Torvalds /*
2361da177e4SLinus Torvalds  * Macros to read/write on-chip registers
2371da177e4SLinus Torvalds  * XXX should we do the PHYS_TO_K1 here?
2381da177e4SLinus Torvalds  */
2391da177e4SLinus Torvalds 
2401da177e4SLinus Torvalds 
24136396f3cSRalf Baechle #if defined(__mips64) && !defined(__ASSEMBLY__)
2421da177e4SLinus Torvalds #define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val)
2431da177e4SLinus Torvalds #define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr)))
24436396f3cSRalf Baechle #endif /* __ASSEMBLY__ */
2451da177e4SLinus Torvalds 
2461da177e4SLinus Torvalds #endif
247