xref: /linux/arch/mips/include/asm/mach-loongson64/irq.h (revision 4f2c0a4acffbec01079c28f839422e64ddeff004)
1b2441318SGreg Kroah-Hartman /* SPDX-License-Identifier: GPL-2.0 */
230ad29bbSHuacai Chen #ifndef __ASM_MACH_LOONGSON64_IRQ_H_
330ad29bbSHuacai Chen #define __ASM_MACH_LOONGSON64_IRQ_H_
4d788bfa9SHuacai Chen 
5d788bfa9SHuacai Chen /* cpu core interrupt numbers */
6925a5675SHuacai Chen #define NR_IRQS_LEGACY		16
7925a5675SHuacai Chen #define NR_MIPS_CPU_IRQS	8
8055444c2SHuacai Chen #define NR_MAX_CHAINED_IRQS	40 /* Chained IRQs means those not directly used by devices */
9055444c2SHuacai Chen #define NR_IRQS			(NR_IRQS_LEGACY + NR_MIPS_CPU_IRQS + NR_MAX_CHAINED_IRQS + 256)
10bcdd75c5SHuacai Chen #define MAX_IO_PICS		1
11925a5675SHuacai Chen #define MIPS_CPU_IRQ_BASE 	NR_IRQS_LEGACY
12*0858ed03SHuacai Chen #define GSI_MIN_CPU_IRQ		0
13d788bfa9SHuacai Chen 
14863be3c3Sbibo mao #include <asm/mach-generic/irq.h>
158bec3875SJiaxun Yang 
1630ad29bbSHuacai Chen #endif /* __ASM_MACH_LOONGSON64_IRQ_H_ */
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