xref: /linux/arch/mips/boot/dts/brcm/bcm7346.dtsi (revision 69ca2b81c2f63eb48eccdf70a4433641c5041527)
18945e37eSKevin Cernekee/ {
28945e37eSKevin Cernekee	#address-cells = <1>;
38945e37eSKevin Cernekee	#size-cells = <1>;
48945e37eSKevin Cernekee	compatible = "brcm,bcm7346";
58945e37eSKevin Cernekee
68945e37eSKevin Cernekee	cpus {
78945e37eSKevin Cernekee		#address-cells = <1>;
88945e37eSKevin Cernekee		#size-cells = <0>;
98945e37eSKevin Cernekee
108945e37eSKevin Cernekee		mips-hpt-frequency = <163125000>;
118945e37eSKevin Cernekee
128945e37eSKevin Cernekee		cpu@0 {
138945e37eSKevin Cernekee			compatible = "brcm,bmips5000";
148945e37eSKevin Cernekee			device_type = "cpu";
158945e37eSKevin Cernekee			reg = <0>;
168945e37eSKevin Cernekee		};
178945e37eSKevin Cernekee
188945e37eSKevin Cernekee		cpu@1 {
198945e37eSKevin Cernekee			compatible = "brcm,bmips5000";
208945e37eSKevin Cernekee			device_type = "cpu";
218945e37eSKevin Cernekee			reg = <1>;
228945e37eSKevin Cernekee		};
238945e37eSKevin Cernekee	};
248945e37eSKevin Cernekee
258945e37eSKevin Cernekee	aliases {
268945e37eSKevin Cernekee		uart0 = &uart0;
278945e37eSKevin Cernekee	};
288945e37eSKevin Cernekee
298945e37eSKevin Cernekee	cpu_intc: cpu_intc {
308945e37eSKevin Cernekee		#address-cells = <0>;
318945e37eSKevin Cernekee		compatible = "mti,cpu-interrupt-controller";
328945e37eSKevin Cernekee
338945e37eSKevin Cernekee		interrupt-controller;
348945e37eSKevin Cernekee		#interrupt-cells = <1>;
358945e37eSKevin Cernekee	};
368945e37eSKevin Cernekee
378945e37eSKevin Cernekee	clocks {
388945e37eSKevin Cernekee		uart_clk: uart_clk {
398945e37eSKevin Cernekee			compatible = "fixed-clock";
408945e37eSKevin Cernekee			#clock-cells = <0>;
418945e37eSKevin Cernekee			clock-frequency = <81000000>;
428945e37eSKevin Cernekee		};
438945e37eSKevin Cernekee	};
448945e37eSKevin Cernekee
458945e37eSKevin Cernekee	rdb {
468945e37eSKevin Cernekee		#address-cells = <1>;
478945e37eSKevin Cernekee		#size-cells = <1>;
488945e37eSKevin Cernekee
498945e37eSKevin Cernekee		compatible = "simple-bus";
508945e37eSKevin Cernekee		ranges = <0 0x10000000 0x01000000>;
518945e37eSKevin Cernekee
528945e37eSKevin Cernekee		periph_intc: periph_intc@411400 {
538945e37eSKevin Cernekee			compatible = "brcm,bcm7038-l1-intc";
548945e37eSKevin Cernekee			reg = <0x411400 0x30>, <0x411600 0x30>;
558945e37eSKevin Cernekee
568945e37eSKevin Cernekee			interrupt-controller;
578945e37eSKevin Cernekee			#interrupt-cells = <1>;
588945e37eSKevin Cernekee
598945e37eSKevin Cernekee			interrupt-parent = <&cpu_intc>;
608945e37eSKevin Cernekee			interrupts = <2>, <3>;
618945e37eSKevin Cernekee		};
628945e37eSKevin Cernekee
638945e37eSKevin Cernekee		sun_l2_intc: sun_l2_intc@403000 {
648945e37eSKevin Cernekee			compatible = "brcm,l2-intc";
658945e37eSKevin Cernekee			reg = <0x403000 0x30>;
668945e37eSKevin Cernekee			interrupt-controller;
678945e37eSKevin Cernekee			#interrupt-cells = <1>;
688945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
698945e37eSKevin Cernekee			interrupts = <51>;
708945e37eSKevin Cernekee		};
718945e37eSKevin Cernekee
728945e37eSKevin Cernekee		gisb-arb@400000 {
738945e37eSKevin Cernekee			compatible = "brcm,bcm7400-gisb-arb";
748945e37eSKevin Cernekee			reg = <0x400000 0xdc>;
758945e37eSKevin Cernekee			native-endian;
768945e37eSKevin Cernekee			interrupt-parent = <&sun_l2_intc>;
778945e37eSKevin Cernekee			interrupts = <0>, <2>;
788945e37eSKevin Cernekee			brcm,gisb-arb-master-mask = <0x673>;
798945e37eSKevin Cernekee			brcm,gisb-arb-master-names = "ssp_0", "cpu_0", "bsp_0",
808945e37eSKevin Cernekee						     "rdc_0", "raaga_0",
818945e37eSKevin Cernekee						     "jtag_0", "svd_0";
828945e37eSKevin Cernekee		};
838945e37eSKevin Cernekee
848945e37eSKevin Cernekee		upg_irq0_intc: upg_irq0_intc@406780 {
858945e37eSKevin Cernekee			compatible = "brcm,bcm7120-l2-intc";
868945e37eSKevin Cernekee			reg = <0x406780 0x8>;
878945e37eSKevin Cernekee
8839d9b6b2SJaedon Shin			brcm,int-map-mask = <0x44>, <0xf000000>;
898945e37eSKevin Cernekee			brcm,int-fwd-mask = <0x70000>;
908945e37eSKevin Cernekee
918945e37eSKevin Cernekee			interrupt-controller;
928945e37eSKevin Cernekee			#interrupt-cells = <1>;
938945e37eSKevin Cernekee
948945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
9539d9b6b2SJaedon Shin			interrupts = <59>, <57>;
9639d9b6b2SJaedon Shin			interrupt-names = "upg_main", "upg_bsc";
9739d9b6b2SJaedon Shin		};
9839d9b6b2SJaedon Shin
9939d9b6b2SJaedon Shin		upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
10039d9b6b2SJaedon Shin			compatible = "brcm,bcm7120-l2-intc";
10139d9b6b2SJaedon Shin			reg = <0x408b80 0x8>;
10239d9b6b2SJaedon Shin
10339d9b6b2SJaedon Shin			brcm,int-map-mask = <0x40>, <0x8000000>, <0x100000>;
10439d9b6b2SJaedon Shin			brcm,int-fwd-mask = <0>;
10539d9b6b2SJaedon Shin			brcm,irq-can-wake;
10639d9b6b2SJaedon Shin
10739d9b6b2SJaedon Shin			interrupt-controller;
10839d9b6b2SJaedon Shin			#interrupt-cells = <1>;
10939d9b6b2SJaedon Shin
11039d9b6b2SJaedon Shin			interrupt-parent = <&periph_intc>;
11139d9b6b2SJaedon Shin			interrupts = <60>, <58>, <62>;
11239d9b6b2SJaedon Shin			interrupt-names = "upg_main_aon", "upg_bsc_aon",
11339d9b6b2SJaedon Shin					  "upg_spi";
1148945e37eSKevin Cernekee		};
1158945e37eSKevin Cernekee
1168945e37eSKevin Cernekee		sun_top_ctrl: syscon@404000 {
1178945e37eSKevin Cernekee			compatible = "brcm,bcm7346-sun-top-ctrl", "syscon";
1188945e37eSKevin Cernekee			reg = <0x404000 0x51c>;
11925d6463eSMark Brown			native-endian;
1208945e37eSKevin Cernekee		};
1218945e37eSKevin Cernekee
1228945e37eSKevin Cernekee		reboot {
1238945e37eSKevin Cernekee			compatible = "brcm,brcmstb-reboot";
1248945e37eSKevin Cernekee			syscon = <&sun_top_ctrl 0x304 0x308>;
1258945e37eSKevin Cernekee		};
1268945e37eSKevin Cernekee
1278945e37eSKevin Cernekee		uart0: serial@406900 {
1288945e37eSKevin Cernekee			compatible = "ns16550a";
1298945e37eSKevin Cernekee			reg = <0x406900 0x20>;
1308945e37eSKevin Cernekee			reg-io-width = <0x4>;
1318945e37eSKevin Cernekee			reg-shift = <0x2>;
1328945e37eSKevin Cernekee			native-endian;
1338945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
1348945e37eSKevin Cernekee			interrupts = <64>;
1358945e37eSKevin Cernekee			clocks = <&uart_clk>;
1368945e37eSKevin Cernekee			status = "disabled";
1378945e37eSKevin Cernekee		};
1388945e37eSKevin Cernekee
1398bac078cSJaedon Shin		uart1: serial@406940 {
1408bac078cSJaedon Shin			compatible = "ns16550a";
1418bac078cSJaedon Shin			reg = <0x406940 0x20>;
1428bac078cSJaedon Shin			reg-io-width = <0x4>;
1438bac078cSJaedon Shin			reg-shift = <0x2>;
1448bac078cSJaedon Shin			native-endian;
1458bac078cSJaedon Shin			interrupt-parent = <&periph_intc>;
1468bac078cSJaedon Shin			interrupts = <65>;
1478bac078cSJaedon Shin			clocks = <&uart_clk>;
1488bac078cSJaedon Shin			status = "disabled";
1498bac078cSJaedon Shin		};
1508bac078cSJaedon Shin
1518bac078cSJaedon Shin		uart2: serial@406980 {
1528bac078cSJaedon Shin			compatible = "ns16550a";
1538bac078cSJaedon Shin			reg = <0x406980 0x20>;
1548bac078cSJaedon Shin			reg-io-width = <0x4>;
1558bac078cSJaedon Shin			reg-shift = <0x2>;
1568bac078cSJaedon Shin			native-endian;
1578bac078cSJaedon Shin			interrupt-parent = <&periph_intc>;
1588bac078cSJaedon Shin			interrupts = <66>;
1598bac078cSJaedon Shin			clocks = <&uart_clk>;
1608bac078cSJaedon Shin			status = "disabled";
1618bac078cSJaedon Shin		};
1628bac078cSJaedon Shin
16339d9b6b2SJaedon Shin		bsca: i2c@406200 {
16439d9b6b2SJaedon Shin		      clock-frequency = <390000>;
16539d9b6b2SJaedon Shin		      compatible = "brcm,brcmstb-i2c";
16639d9b6b2SJaedon Shin		      interrupt-parent = <&upg_irq0_intc>;
16739d9b6b2SJaedon Shin		      reg = <0x406200 0x58>;
16839d9b6b2SJaedon Shin		      interrupts = <24>;
16939d9b6b2SJaedon Shin		      interrupt-names = "upg_bsca";
17039d9b6b2SJaedon Shin		      status = "disabled";
17139d9b6b2SJaedon Shin		};
17239d9b6b2SJaedon Shin
17339d9b6b2SJaedon Shin		bscb: i2c@406280 {
17439d9b6b2SJaedon Shin		      clock-frequency = <390000>;
17539d9b6b2SJaedon Shin		      compatible = "brcm,brcmstb-i2c";
17639d9b6b2SJaedon Shin		      interrupt-parent = <&upg_irq0_intc>;
17739d9b6b2SJaedon Shin		      reg = <0x406280 0x58>;
17839d9b6b2SJaedon Shin		      interrupts = <25>;
17939d9b6b2SJaedon Shin		      interrupt-names = "upg_bscb";
18039d9b6b2SJaedon Shin		      status = "disabled";
18139d9b6b2SJaedon Shin		};
18239d9b6b2SJaedon Shin
18339d9b6b2SJaedon Shin		bscc: i2c@406300 {
18439d9b6b2SJaedon Shin		      clock-frequency = <390000>;
18539d9b6b2SJaedon Shin		      compatible = "brcm,brcmstb-i2c";
18639d9b6b2SJaedon Shin		      interrupt-parent = <&upg_irq0_intc>;
18739d9b6b2SJaedon Shin		      reg = <0x406300 0x58>;
18839d9b6b2SJaedon Shin		      interrupts = <26>;
18939d9b6b2SJaedon Shin		      interrupt-names = "upg_bscc";
19039d9b6b2SJaedon Shin		      status = "disabled";
19139d9b6b2SJaedon Shin		};
19239d9b6b2SJaedon Shin
19339d9b6b2SJaedon Shin		bscd: i2c@406380 {
19439d9b6b2SJaedon Shin		      clock-frequency = <390000>;
19539d9b6b2SJaedon Shin		      compatible = "brcm,brcmstb-i2c";
19639d9b6b2SJaedon Shin		      interrupt-parent = <&upg_irq0_intc>;
19739d9b6b2SJaedon Shin		      reg = <0x406380 0x58>;
19839d9b6b2SJaedon Shin		      interrupts = <27>;
19939d9b6b2SJaedon Shin		      interrupt-names = "upg_bscd";
20039d9b6b2SJaedon Shin		      status = "disabled";
20139d9b6b2SJaedon Shin		};
20239d9b6b2SJaedon Shin
20339d9b6b2SJaedon Shin		bsce: i2c@408980 {
20439d9b6b2SJaedon Shin		      clock-frequency = <390000>;
20539d9b6b2SJaedon Shin		      compatible = "brcm,brcmstb-i2c";
20639d9b6b2SJaedon Shin		      interrupt-parent = <&upg_aon_irq0_intc>;
20739d9b6b2SJaedon Shin		      reg = <0x408980 0x58>;
20839d9b6b2SJaedon Shin		      interrupts = <27>;
20939d9b6b2SJaedon Shin		      interrupt-names = "upg_bsce";
21039d9b6b2SJaedon Shin		      status = "disabled";
21139d9b6b2SJaedon Shin		};
21239d9b6b2SJaedon Shin
2138945e37eSKevin Cernekee		enet0: ethernet@430000 {
2148945e37eSKevin Cernekee			phy-mode = "internal";
2158945e37eSKevin Cernekee			phy-handle = <&phy1>;
2168945e37eSKevin Cernekee			mac-address = [ 00 10 18 36 23 1a ];
2178945e37eSKevin Cernekee			compatible = "brcm,genet-v2";
2188945e37eSKevin Cernekee			#address-cells = <0x1>;
2198945e37eSKevin Cernekee			#size-cells = <0x1>;
2208945e37eSKevin Cernekee			reg = <0x430000 0x4c8c>;
2218945e37eSKevin Cernekee			interrupts = <24>, <25>;
2228945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
2238945e37eSKevin Cernekee			status = "disabled";
2248945e37eSKevin Cernekee
2258945e37eSKevin Cernekee			mdio@e14 {
2268945e37eSKevin Cernekee				compatible = "brcm,genet-mdio-v2";
2278945e37eSKevin Cernekee				#address-cells = <0x1>;
2288945e37eSKevin Cernekee				#size-cells = <0x0>;
2298945e37eSKevin Cernekee				reg = <0xe14 0x8>;
2308945e37eSKevin Cernekee
2318945e37eSKevin Cernekee				phy1: ethernet-phy@1 {
2328945e37eSKevin Cernekee					max-speed = <100>;
2338945e37eSKevin Cernekee					reg = <0x1>;
2348945e37eSKevin Cernekee					compatible = "brcm,40nm-ephy",
2358945e37eSKevin Cernekee						"ethernet-phy-ieee802.3-c22";
2368945e37eSKevin Cernekee				};
2378945e37eSKevin Cernekee			};
2388945e37eSKevin Cernekee		};
2398945e37eSKevin Cernekee
2408945e37eSKevin Cernekee		ehci0: usb@480300 {
2418945e37eSKevin Cernekee			compatible = "brcm,bcm7346-ehci", "generic-ehci";
2428945e37eSKevin Cernekee			reg = <0x480300 0x100>;
2438945e37eSKevin Cernekee			native-endian;
2448945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
2458945e37eSKevin Cernekee			interrupts = <68>;
2468945e37eSKevin Cernekee			status = "disabled";
2478945e37eSKevin Cernekee		};
2488945e37eSKevin Cernekee
2498945e37eSKevin Cernekee		ohci0: usb@480400 {
2508945e37eSKevin Cernekee			compatible = "brcm,bcm7346-ohci", "generic-ohci";
2518945e37eSKevin Cernekee			reg = <0x480400 0x100>;
2528945e37eSKevin Cernekee			native-endian;
2538945e37eSKevin Cernekee			no-big-frame-no;
2548945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
2558945e37eSKevin Cernekee			interrupts = <70>;
2568945e37eSKevin Cernekee			status = "disabled";
2578945e37eSKevin Cernekee		};
2588945e37eSKevin Cernekee
2598945e37eSKevin Cernekee		ehci1: usb@480500 {
2608945e37eSKevin Cernekee			compatible = "brcm,bcm7346-ehci", "generic-ehci";
2618945e37eSKevin Cernekee			reg = <0x480500 0x100>;
2628945e37eSKevin Cernekee			native-endian;
2638945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
2648945e37eSKevin Cernekee			interrupts = <69>;
2658945e37eSKevin Cernekee			status = "disabled";
2668945e37eSKevin Cernekee		};
2678945e37eSKevin Cernekee
2688945e37eSKevin Cernekee		ohci1: usb@480600 {
2698945e37eSKevin Cernekee			compatible = "brcm,bcm7346-ohci", "generic-ohci";
2708945e37eSKevin Cernekee			reg = <0x480600 0x100>;
2718945e37eSKevin Cernekee			native-endian;
2728945e37eSKevin Cernekee			no-big-frame-no;
2738945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
2748945e37eSKevin Cernekee			interrupts = <71>;
2758945e37eSKevin Cernekee			status = "disabled";
2768945e37eSKevin Cernekee		};
2778945e37eSKevin Cernekee
2788945e37eSKevin Cernekee		ehci2: usb@490300 {
2798945e37eSKevin Cernekee			compatible = "brcm,bcm7346-ehci", "generic-ehci";
2808945e37eSKevin Cernekee			reg = <0x490300 0x100>;
2818945e37eSKevin Cernekee			native-endian;
2828945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
2838945e37eSKevin Cernekee			interrupts = <73>;
2848945e37eSKevin Cernekee			status = "disabled";
2858945e37eSKevin Cernekee		};
2868945e37eSKevin Cernekee
2878945e37eSKevin Cernekee		ohci2: usb@490400 {
2888945e37eSKevin Cernekee			compatible = "brcm,bcm7346-ohci", "generic-ohci";
2898945e37eSKevin Cernekee			reg = <0x490400 0x100>;
2908945e37eSKevin Cernekee			native-endian;
2918945e37eSKevin Cernekee			no-big-frame-no;
2928945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
2938945e37eSKevin Cernekee			interrupts = <75>;
2948945e37eSKevin Cernekee			status = "disabled";
2958945e37eSKevin Cernekee		};
2968945e37eSKevin Cernekee
2978945e37eSKevin Cernekee		ehci3: usb@490500 {
2988945e37eSKevin Cernekee			compatible = "brcm,bcm7346-ehci", "generic-ehci";
2998945e37eSKevin Cernekee			reg = <0x490500 0x100>;
3008945e37eSKevin Cernekee			native-endian;
3018945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
3028945e37eSKevin Cernekee			interrupts = <74>;
3038945e37eSKevin Cernekee			status = "disabled";
3048945e37eSKevin Cernekee		};
3058945e37eSKevin Cernekee
3068945e37eSKevin Cernekee		ohci3: usb@490600 {
3078945e37eSKevin Cernekee			compatible = "brcm,bcm7346-ohci", "generic-ohci";
3088945e37eSKevin Cernekee			reg = <0x490600 0x100>;
3098945e37eSKevin Cernekee			native-endian;
3108945e37eSKevin Cernekee			no-big-frame-no;
3118945e37eSKevin Cernekee			interrupt-parent = <&periph_intc>;
3128945e37eSKevin Cernekee			interrupts = <76>;
3138945e37eSKevin Cernekee			status = "disabled";
3148945e37eSKevin Cernekee		};
31519e88101SJaedon Shin
31619e88101SJaedon Shin		sata: sata@181000 {
31719e88101SJaedon Shin			compatible = "brcm,bcm7425-ahci", "brcm,sata3-ahci";
31819e88101SJaedon Shin			reg-names = "ahci", "top-ctrl";
31919e88101SJaedon Shin			reg = <0x181000 0xa9c>, <0x180020 0x1c>;
32019e88101SJaedon Shin			interrupt-parent = <&periph_intc>;
32119e88101SJaedon Shin			interrupts = <40>;
32219e88101SJaedon Shin			#address-cells = <1>;
32319e88101SJaedon Shin			#size-cells = <0>;
32419e88101SJaedon Shin			status = "disabled";
32519e88101SJaedon Shin
32619e88101SJaedon Shin			sata0: sata-port@0 {
32719e88101SJaedon Shin				reg = <0>;
32819e88101SJaedon Shin				phys = <&sata_phy0>;
32919e88101SJaedon Shin			};
33019e88101SJaedon Shin
33119e88101SJaedon Shin			sata1: sata-port@1 {
33219e88101SJaedon Shin				reg = <1>;
33319e88101SJaedon Shin				phys = <&sata_phy1>;
33419e88101SJaedon Shin			};
33519e88101SJaedon Shin		};
33619e88101SJaedon Shin
337*69ca2b81SJaedon Shin		sata_phy: sata-phy@180100 {
33819e88101SJaedon Shin			compatible = "brcm,bcm7425-sata-phy", "brcm,phy-sata3";
33919e88101SJaedon Shin			reg = <0x180100 0x0eff>;
34019e88101SJaedon Shin			reg-names = "phy";
34119e88101SJaedon Shin			#address-cells = <1>;
34219e88101SJaedon Shin			#size-cells = <0>;
34319e88101SJaedon Shin			status = "disabled";
34419e88101SJaedon Shin
34519e88101SJaedon Shin			sata_phy0: sata-phy@0 {
34619e88101SJaedon Shin				reg = <0>;
34719e88101SJaedon Shin				#phy-cells = <0>;
34819e88101SJaedon Shin			};
34919e88101SJaedon Shin
35019e88101SJaedon Shin			sata_phy1: sata-phy@1 {
35119e88101SJaedon Shin				reg = <1>;
35219e88101SJaedon Shin				#phy-cells = <0>;
35319e88101SJaedon Shin			};
35419e88101SJaedon Shin		};
3558945e37eSKevin Cernekee	};
3568945e37eSKevin Cernekee};
357