1*4726dd60SMichal Simek /* SPDX-License-Identifier: GPL-2.0 */ 2406107daSMichal Simek /* 3406107daSMichal Simek * Generic support for queying CPU info 4406107daSMichal Simek * 5406107daSMichal Simek * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu> 6406107daSMichal Simek * Copyright (C) 2007-2009 PetaLogix 7406107daSMichal Simek * Copyright (C) 2007 John Williams <jwilliams@itee.uq.edu.au> 8406107daSMichal Simek */ 9406107daSMichal Simek 10406107daSMichal Simek #ifndef _ASM_MICROBLAZE_CPUINFO_H 11406107daSMichal Simek #define _ASM_MICROBLAZE_CPUINFO_H 12406107daSMichal Simek 13f71044c9SRob Herring #include <linux/of.h> 14406107daSMichal Simek 15406107daSMichal Simek /* CPU Version and FPGA Family code conversion table type */ 16406107daSMichal Simek struct cpu_ver_key { 17406107daSMichal Simek const char *s; 18406107daSMichal Simek const unsigned k; 19406107daSMichal Simek }; 20406107daSMichal Simek 21406107daSMichal Simek extern const struct cpu_ver_key cpu_ver_lookup[]; 22406107daSMichal Simek 23406107daSMichal Simek struct family_string_key { 24406107daSMichal Simek const char *s; 25406107daSMichal Simek const unsigned k; 26406107daSMichal Simek }; 27406107daSMichal Simek 28406107daSMichal Simek extern const struct family_string_key family_string_lookup[]; 29406107daSMichal Simek 30406107daSMichal Simek struct cpuinfo { 31406107daSMichal Simek /* Core CPU configuration */ 32406107daSMichal Simek u32 use_instr; 33406107daSMichal Simek u32 use_mult; 34406107daSMichal Simek u32 use_fpu; 35406107daSMichal Simek u32 use_exc; 36406107daSMichal Simek u32 ver_code; 37406107daSMichal Simek u32 mmu; 388904976eSJohn A. Williams u32 mmu_privins; 398e2ad016SMichal Simek u32 endian; 40406107daSMichal Simek 41406107daSMichal Simek /* CPU caches */ 42406107daSMichal Simek u32 use_icache; 43406107daSMichal Simek u32 icache_tagbits; 44406107daSMichal Simek u32 icache_write; 4544e4e196SMichal Simek u32 icache_line_length; 46406107daSMichal Simek u32 icache_size; 47406107daSMichal Simek unsigned long icache_base; 48406107daSMichal Simek unsigned long icache_high; 49406107daSMichal Simek 50406107daSMichal Simek u32 use_dcache; 51406107daSMichal Simek u32 dcache_tagbits; 52406107daSMichal Simek u32 dcache_write; 5344e4e196SMichal Simek u32 dcache_line_length; 54406107daSMichal Simek u32 dcache_size; 55e051af57SMichal Simek u32 dcache_wb; 56406107daSMichal Simek unsigned long dcache_base; 57406107daSMichal Simek unsigned long dcache_high; 58406107daSMichal Simek 59406107daSMichal Simek /* Bus connections */ 60406107daSMichal Simek u32 use_dopb; 61406107daSMichal Simek u32 use_iopb; 62406107daSMichal Simek u32 use_dlmb; 63406107daSMichal Simek u32 use_ilmb; 64406107daSMichal Simek u32 num_fsl; 65406107daSMichal Simek 66406107daSMichal Simek /* CPU interrupt line info */ 67406107daSMichal Simek u32 irq_edge; 68406107daSMichal Simek u32 irq_positive; 69406107daSMichal Simek 70406107daSMichal Simek u32 area_optimised; 71406107daSMichal Simek 72406107daSMichal Simek /* HW debug support */ 73406107daSMichal Simek u32 hw_debug; 74406107daSMichal Simek u32 num_pc_brk; 75406107daSMichal Simek u32 num_rd_brk; 76406107daSMichal Simek u32 num_wr_brk; 77406107daSMichal Simek u32 cpu_clock_freq; /* store real freq of cpu */ 78406107daSMichal Simek 79406107daSMichal Simek /* FPGA family */ 80406107daSMichal Simek u32 fpga_family_code; 81406107daSMichal Simek 82406107daSMichal Simek /* User define */ 83406107daSMichal Simek u32 pvr_user1; 84406107daSMichal Simek u32 pvr_user2; 85406107daSMichal Simek }; 86406107daSMichal Simek 87406107daSMichal Simek extern struct cpuinfo cpuinfo; 88406107daSMichal Simek 89406107daSMichal Simek /* fwd declarations of the various CPUinfo populators */ 90406107daSMichal Simek void setup_cpuinfo(void); 91c1120542SMichal Simek void setup_cpuinfo_clk(void); 92406107daSMichal Simek 93406107daSMichal Simek void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu); 94406107daSMichal Simek void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu); 95406107daSMichal Simek 96406107daSMichal Simek static inline unsigned int fcpu(struct device_node *cpu, char *n) 97406107daSMichal Simek { 9821ecc1f1SMichal Simek u32 val = 0; 9921ecc1f1SMichal Simek 10021ecc1f1SMichal Simek of_property_read_u32(cpu, n, &val); 10121ecc1f1SMichal Simek 10221ecc1f1SMichal Simek return val; 103406107daSMichal Simek } 104406107daSMichal Simek 105406107daSMichal Simek #endif /* _ASM_MICROBLAZE_CPUINFO_H */ 106