19143a935SGuo Ren/* SPDX-License-Identifier: GPL-2.0 */ 29143a935SGuo Ren 39143a935SGuo Ren#include <linux/linkage.h> 49143a935SGuo Ren#include <linux/init.h> 59143a935SGuo Ren#include <asm/page.h> 69143a935SGuo Ren#include <abi/entry.h> 79143a935SGuo Ren 89143a935SGuo Ren__HEAD 99143a935SGuo RenENTRY(_start) 10205353faSGuo Ren SETUP_MMU 119143a935SGuo Ren 129143a935SGuo Ren /* set stack point */ 13205353faSGuo Ren lrw r6, init_thread_union + THREAD_SIZE 14205353faSGuo Ren mov sp, r6 159143a935SGuo Ren 169143a935SGuo Ren jmpi csky_start 179143a935SGuo RenEND(_start) 189143a935SGuo Ren 199143a935SGuo Ren#ifdef CONFIG_SMP 209143a935SGuo Ren.align 10 219143a935SGuo RenENTRY(_start_smp_secondary) 22205353faSGuo Ren SETUP_MMU 239143a935SGuo Ren 24*0c8a32eeSGuo Ren#ifdef CONFIG_PAGE_OFFSET_80000000 25aefd9461SGuo Ren lrw r6, secondary_msa1 26aefd9461SGuo Ren ld.w r6, (r6, 0) 27aefd9461SGuo Ren mtcr r6, cr<31, 15> 28*0c8a32eeSGuo Ren#endif 29*0c8a32eeSGuo Ren 30*0c8a32eeSGuo Ren lrw r6, secondary_pgd 31*0c8a32eeSGuo Ren ld.w r6, (r6, 0) 32*0c8a32eeSGuo Ren mtcr r6, cr<28, 15> 33*0c8a32eeSGuo Ren mtcr r6, cr<29, 15> 34aefd9461SGuo Ren 359143a935SGuo Ren /* set stack point */ 36205353faSGuo Ren lrw r6, secondary_stack 37205353faSGuo Ren ld.w r6, (r6, 0) 38205353faSGuo Ren mov sp, r6 399143a935SGuo Ren 409143a935SGuo Ren jmpi csky_start_secondary 419143a935SGuo RenEND(_start_smp_secondary) 429143a935SGuo Ren#endif 43