189bd4c37SNishanth Menon// SPDX-License-Identifier: GPL-2.0-only OR MIT 238c4a08cSVignesh Raghavendra/* 338c4a08cSVignesh Raghavendra * AM62A SK: https://www.ti.com/lit/zip/sprr459 438c4a08cSVignesh Raghavendra * 589bd4c37SNishanth Menon * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 638c4a08cSVignesh Raghavendra */ 738c4a08cSVignesh Raghavendra 838c4a08cSVignesh Raghavendra/dts-v1/; 938c4a08cSVignesh Raghavendra 1038c4a08cSVignesh Raghavendra#include <dt-bindings/leds/common.h> 1138c4a08cSVignesh Raghavendra#include <dt-bindings/gpio/gpio.h> 12a9da45c0SVignesh Raghavendra#include <dt-bindings/net/ti-dp83867.h> 1338c4a08cSVignesh Raghavendra#include "k3-am62a7.dtsi" 1438c4a08cSVignesh Raghavendra 1538c4a08cSVignesh Raghavendra/ { 1638c4a08cSVignesh Raghavendra compatible = "ti,am62a7-sk", "ti,am62a7"; 1738c4a08cSVignesh Raghavendra model = "Texas Instruments AM62A7 SK"; 1838c4a08cSVignesh Raghavendra 1938c4a08cSVignesh Raghavendra aliases { 20cf39ff15SNishanth Menon serial0 = &wkup_uart0; 215a74aef8SMarkus Schneider-Pargmann serial1 = &mcu_uart0; 2238c4a08cSVignesh Raghavendra serial2 = &main_uart0; 23cf39ff15SNishanth Menon serial3 = &main_uart1; 24e041ec6eSNitin Yadav mmc0 = &sdhci0; 2538c4a08cSVignesh Raghavendra mmc1 = &sdhci1; 2634887f2dSVibhore Vardhan rtc0 = &wkup_rtc0; 2734887f2dSVibhore Vardhan rtc1 = &tps659312; 2838c4a08cSVignesh Raghavendra }; 2938c4a08cSVignesh Raghavendra 3038c4a08cSVignesh Raghavendra chosen { 3138c4a08cSVignesh Raghavendra stdout-path = "serial2:115200n8"; 3238c4a08cSVignesh Raghavendra }; 3338c4a08cSVignesh Raghavendra 3438c4a08cSVignesh Raghavendra memory@80000000 { 3538c4a08cSVignesh Raghavendra device_type = "memory"; 36a1bc0d60SDevarsh Thakkar /* 4G RAM */ 37a1bc0d60SDevarsh Thakkar reg = <0x00000000 0x80000000 0x00000000 0x80000000>, 38a1bc0d60SDevarsh Thakkar <0x00000008 0x80000000 0x00000000 0x80000000>; 3938c4a08cSVignesh Raghavendra bootph-all; 4038c4a08cSVignesh Raghavendra }; 4138c4a08cSVignesh Raghavendra 4238c4a08cSVignesh Raghavendra reserved-memory { 4338c4a08cSVignesh Raghavendra #address-cells = <2>; 4438c4a08cSVignesh Raghavendra #size-cells = <2>; 4538c4a08cSVignesh Raghavendra ranges; 466406c5d5SDevarsh Thakkar 476406c5d5SDevarsh Thakkar /* global cma region */ 486406c5d5SDevarsh Thakkar linux,cma { 496406c5d5SDevarsh Thakkar compatible = "shared-dma-pool"; 506406c5d5SDevarsh Thakkar reusable; 516406c5d5SDevarsh Thakkar size = <0x00 0x24000000>; 526406c5d5SDevarsh Thakkar alloc-ranges = <0x00 0xc0000000 0x00 0x24000000>; 536406c5d5SDevarsh Thakkar linux,cma-default; 546406c5d5SDevarsh Thakkar }; 5577c29ebeSDevarsh Thakkar 5677c29ebeSDevarsh Thakkar c7x_0_dma_memory_region: c7x-dma-memory@99800000 { 5777c29ebeSDevarsh Thakkar compatible = "shared-dma-pool"; 5877c29ebeSDevarsh Thakkar reg = <0x00 0x99800000 0x00 0x100000>; 5977c29ebeSDevarsh Thakkar no-map; 6077c29ebeSDevarsh Thakkar }; 6177c29ebeSDevarsh Thakkar 6277c29ebeSDevarsh Thakkar c7x_0_memory_region: c7x-memory@99900000 { 6377c29ebeSDevarsh Thakkar compatible = "shared-dma-pool"; 6477c29ebeSDevarsh Thakkar reg = <0x00 0x99900000 0x00 0xf00000>; 6577c29ebeSDevarsh Thakkar no-map; 6677c29ebeSDevarsh Thakkar }; 6777c29ebeSDevarsh Thakkar 6877c29ebeSDevarsh Thakkar mcu_r5fss0_core0_dma_memory_region: r5f-dma-memory@9b800000 { 6977c29ebeSDevarsh Thakkar compatible = "shared-dma-pool"; 7077c29ebeSDevarsh Thakkar reg = <0x00 0x9b800000 0x00 0x100000>; 7177c29ebeSDevarsh Thakkar no-map; 7277c29ebeSDevarsh Thakkar }; 7377c29ebeSDevarsh Thakkar 7477c29ebeSDevarsh Thakkar mcu_r5fss0_core0_memory_region: r5f-dma-memory@9b900000 { 7577c29ebeSDevarsh Thakkar compatible = "shared-dma-pool"; 7677c29ebeSDevarsh Thakkar reg = <0x00 0x9b900000 0x00 0xf00000>; 7777c29ebeSDevarsh Thakkar no-map; 7877c29ebeSDevarsh Thakkar }; 7977c29ebeSDevarsh Thakkar 8077c29ebeSDevarsh Thakkar wkup_r5fss0_core0_dma_memory_region: r5f-dma-memory@9c800000 { 8177c29ebeSDevarsh Thakkar compatible = "shared-dma-pool"; 8277c29ebeSDevarsh Thakkar reg = <0x00 0x9c800000 0x00 0x100000>; 8377c29ebeSDevarsh Thakkar no-map; 8477c29ebeSDevarsh Thakkar }; 8577c29ebeSDevarsh Thakkar 8677c29ebeSDevarsh Thakkar wkup_r5fss0_core0_memory_region: r5f-dma-memory@9c900000 { 8777c29ebeSDevarsh Thakkar compatible = "shared-dma-pool"; 8877c29ebeSDevarsh Thakkar reg = <0x00 0x9c900000 0x00 0xf00000>; 8977c29ebeSDevarsh Thakkar no-map; 9077c29ebeSDevarsh Thakkar }; 9138c4a08cSVignesh Raghavendra 9238c4a08cSVignesh Raghavendra secure_tfa_ddr: tfa@9e780000 { 9338c4a08cSVignesh Raghavendra reg = <0x00 0x9e780000 0x00 0x80000>; 9438c4a08cSVignesh Raghavendra alignment = <0x1000>; 9538c4a08cSVignesh Raghavendra no-map; 9638c4a08cSVignesh Raghavendra }; 9738c4a08cSVignesh Raghavendra 9838c4a08cSVignesh Raghavendra secure_ddr: optee@9e800000 { 9938c4a08cSVignesh Raghavendra reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */ 10038c4a08cSVignesh Raghavendra alignment = <0x1000>; 10138c4a08cSVignesh Raghavendra no-map; 10238c4a08cSVignesh Raghavendra }; 10338c4a08cSVignesh Raghavendra }; 1045dae00dfSBryan Brattlof 1055dae00dfSBryan Brattlof opp-table { 1065dae00dfSBryan Brattlof /* Requires VDD_CORE at 0v85 */ 1075dae00dfSBryan Brattlof opp-1400000000 { 1085dae00dfSBryan Brattlof opp-hz = /bits/ 64 <1400000000>; 1095dae00dfSBryan Brattlof opp-supported-hw = <0x01 0x0004>; 1105dae00dfSBryan Brattlof clock-latency-ns = <6000000>; 1115dae00dfSBryan Brattlof }; 1125dae00dfSBryan Brattlof }; 11338c4a08cSVignesh Raghavendra 11438c4a08cSVignesh Raghavendra vmain_pd: regulator-0 { 11538c4a08cSVignesh Raghavendra /* TPS25750 PD CONTROLLER OUTPUT */ 11638c4a08cSVignesh Raghavendra compatible = "regulator-fixed"; 11738c4a08cSVignesh Raghavendra regulator-name = "vmain_pd"; 11838c4a08cSVignesh Raghavendra regulator-min-microvolt = <5000000>; 11938c4a08cSVignesh Raghavendra regulator-max-microvolt = <5000000>; 12038c4a08cSVignesh Raghavendra regulator-always-on; 12138c4a08cSVignesh Raghavendra regulator-boot-on; 12238c4a08cSVignesh Raghavendra }; 12338c4a08cSVignesh Raghavendra 12438c4a08cSVignesh Raghavendra vcc_5v0: regulator-1 { 12538c4a08cSVignesh Raghavendra /* Output of TPS63070 */ 12638c4a08cSVignesh Raghavendra compatible = "regulator-fixed"; 12738c4a08cSVignesh Raghavendra regulator-name = "vcc_5v0"; 12838c4a08cSVignesh Raghavendra regulator-min-microvolt = <5000000>; 12938c4a08cSVignesh Raghavendra regulator-max-microvolt = <5000000>; 13038c4a08cSVignesh Raghavendra vin-supply = <&vmain_pd>; 13138c4a08cSVignesh Raghavendra regulator-always-on; 13238c4a08cSVignesh Raghavendra regulator-boot-on; 13338c4a08cSVignesh Raghavendra }; 134770480e7SJai Luthra 13538c4a08cSVignesh Raghavendra vcc_3v3_main: regulator-2 { 13638c4a08cSVignesh Raghavendra /* output of LM5141-Q1 */ 137770480e7SJai Luthra compatible = "regulator-fixed"; 13838c4a08cSVignesh Raghavendra regulator-name = "vcc_3v3_main"; 13938c4a08cSVignesh Raghavendra regulator-min-microvolt = <3300000>; 14038c4a08cSVignesh Raghavendra regulator-max-microvolt = <3300000>; 14138c4a08cSVignesh Raghavendra vin-supply = <&vmain_pd>; 14238c4a08cSVignesh Raghavendra regulator-always-on; 14338c4a08cSVignesh Raghavendra regulator-boot-on; 14438c4a08cSVignesh Raghavendra }; 14538c4a08cSVignesh Raghavendra 14638c4a08cSVignesh Raghavendra vdd_mmc1: regulator-3 { 14738c4a08cSVignesh Raghavendra /* TPS22918DBVR */ 14838c4a08cSVignesh Raghavendra compatible = "regulator-fixed"; 14938c4a08cSVignesh Raghavendra regulator-name = "vdd_mmc1"; 15038c4a08cSVignesh Raghavendra regulator-min-microvolt = <3300000>; 15138c4a08cSVignesh Raghavendra regulator-max-microvolt = <3300000>; 15238c4a08cSVignesh Raghavendra regulator-boot-on; 15338c4a08cSVignesh Raghavendra enable-active-high; 15438c4a08cSVignesh Raghavendra gpio = <&exp1 3 GPIO_ACTIVE_HIGH>; 15538c4a08cSVignesh Raghavendra bootph-all; 156770480e7SJai Luthra }; 157770480e7SJai Luthra 158770480e7SJai Luthra vcc_3v3_sys: regulator-4 { 159770480e7SJai Luthra /* output of TPS222965DSGT */ 160770480e7SJai Luthra compatible = "regulator-fixed"; 161770480e7SJai Luthra regulator-name = "vcc_3v3_sys"; 162770480e7SJai Luthra regulator-min-microvolt = <3300000>; 163770480e7SJai Luthra regulator-max-microvolt = <3300000>; 164770480e7SJai Luthra vin-supply = <&vcc_3v3_main>; 165770480e7SJai Luthra regulator-always-on; 166770480e7SJai Luthra regulator-boot-on; 1678f023012SVignesh Raghavendra }; 1688f023012SVignesh Raghavendra 1698f023012SVignesh Raghavendra vddshv_sdio: regulator-5 { 1708f023012SVignesh Raghavendra compatible = "regulator-gpio"; 1718f023012SVignesh Raghavendra regulator-name = "vddshv_sdio"; 1728f023012SVignesh Raghavendra pinctrl-names = "default"; 1738f023012SVignesh Raghavendra pinctrl-0 = <&vddshv_sdio_pins_default>; 1748f023012SVignesh Raghavendra regulator-min-microvolt = <1800000>; 1758f023012SVignesh Raghavendra regulator-max-microvolt = <3300000>; 1768f023012SVignesh Raghavendra regulator-boot-on; 1778f023012SVignesh Raghavendra vin-supply = <&ldo1>; 1788f023012SVignesh Raghavendra gpios = <&main_gpio0 31 GPIO_ACTIVE_HIGH>; 1798f023012SVignesh Raghavendra states = <1800000 0x0>, 1808f023012SVignesh Raghavendra <3300000 0x1>; 18138c4a08cSVignesh Raghavendra }; 18238c4a08cSVignesh Raghavendra 18338c4a08cSVignesh Raghavendra leds { 18438c4a08cSVignesh Raghavendra compatible = "gpio-leds"; 18538c4a08cSVignesh Raghavendra pinctrl-names = "default"; 18638c4a08cSVignesh Raghavendra pinctrl-0 = <&usr_led_pins_default>; 18738c4a08cSVignesh Raghavendra 18838c4a08cSVignesh Raghavendra led-0 { 18938c4a08cSVignesh Raghavendra label = "am62a-sk:green:heartbeat"; 19038c4a08cSVignesh Raghavendra gpios = <&main_gpio1 49 GPIO_ACTIVE_HIGH>; 19138c4a08cSVignesh Raghavendra linux,default-trigger = "heartbeat"; 19238c4a08cSVignesh Raghavendra function = LED_FUNCTION_HEARTBEAT; 19338c4a08cSVignesh Raghavendra default-state = "off"; 1944a2c5dddSJai Luthra }; 1954a2c5dddSJai Luthra }; 1964a2c5dddSJai Luthra 1974a2c5dddSJai Luthra tlv320_mclk: clk-0 { 1984a2c5dddSJai Luthra #clock-cells = <0>; 1994a2c5dddSJai Luthra compatible = "fixed-clock"; 2004a2c5dddSJai Luthra clock-frequency = <12288000>; 201396ca2fcSAradhya Bhatia }; 202396ca2fcSAradhya Bhatia 203396ca2fcSAradhya Bhatia hdmi0: connector-hdmi { 204396ca2fcSAradhya Bhatia compatible = "hdmi-connector"; 205396ca2fcSAradhya Bhatia label = "hdmi"; 206396ca2fcSAradhya Bhatia type = "a"; 207396ca2fcSAradhya Bhatia 208396ca2fcSAradhya Bhatia port { 209396ca2fcSAradhya Bhatia hdmi_connector_in: endpoint { 210396ca2fcSAradhya Bhatia remote-endpoint = <&sii9022_out>; 211396ca2fcSAradhya Bhatia }; 212396ca2fcSAradhya Bhatia }; 2134a2c5dddSJai Luthra }; 2144a2c5dddSJai Luthra 2154a2c5dddSJai Luthra codec_audio: sound { 2164a2c5dddSJai Luthra compatible = "simple-audio-card"; 2174a2c5dddSJai Luthra simple-audio-card,name = "AM62Ax-SKEVM"; 2184a2c5dddSJai Luthra simple-audio-card,widgets = 2194a2c5dddSJai Luthra "Headphone", "Headphone Jack", 2204a2c5dddSJai Luthra "Line", "Line In", 2214a2c5dddSJai Luthra "Microphone", "Microphone Jack"; 2224a2c5dddSJai Luthra simple-audio-card,routing = 2234a2c5dddSJai Luthra "Headphone Jack", "HPLOUT", 2244a2c5dddSJai Luthra "Headphone Jack", "HPROUT", 2254a2c5dddSJai Luthra "LINE1L", "Line In", 2264a2c5dddSJai Luthra "LINE1R", "Line In", 2274a2c5dddSJai Luthra "MIC3R", "Microphone Jack", 2284a2c5dddSJai Luthra "Microphone Jack", "Mic Bias"; 2294a2c5dddSJai Luthra simple-audio-card,format = "dsp_b"; 2304a2c5dddSJai Luthra simple-audio-card,bitclock-master = <&sound_master>; 2314a2c5dddSJai Luthra simple-audio-card,frame-master = <&sound_master>; 2324a2c5dddSJai Luthra simple-audio-card,bitclock-inversion; 2334a2c5dddSJai Luthra 2344a2c5dddSJai Luthra simple-audio-card,cpu { 2354a2c5dddSJai Luthra sound-dai = <&mcasp1>; 2364a2c5dddSJai Luthra }; 2374a2c5dddSJai Luthra 2384a2c5dddSJai Luthra sound_master: simple-audio-card,codec { 2394a2c5dddSJai Luthra sound-dai = <&tlv320aic3106>; 2404a2c5dddSJai Luthra clocks = <&tlv320_mclk>; 24138c4a08cSVignesh Raghavendra }; 24238c4a08cSVignesh Raghavendra }; 243cf39ff15SNishanth Menon}; 244a4956811STony Lindgren 245cf39ff15SNishanth Menon&mcu_pmx0 { 246cf39ff15SNishanth Menon wkup_uart0_pins_default: wkup-uart0-default-pins { 247cf39ff15SNishanth Menon pinctrl-single,pins = < 248cf39ff15SNishanth Menon AM62AX_MCU_IOPAD(0x0024, PIN_INPUT, 0) /* (C9) WKUP_UART0_RXD */ 249cf39ff15SNishanth Menon AM62AX_MCU_IOPAD(0x0028, PIN_OUTPUT, 0) /* (E9) WKUP_UART0_TXD */ 250cf39ff15SNishanth Menon AM62AX_MCU_IOPAD(0x002c, PIN_INPUT, 0) /* (C10) WKUP_UART0_CTSn */ 251cf39ff15SNishanth Menon AM62AX_MCU_IOPAD(0x0030, PIN_OUTPUT, 0) /* (C8) WKUP_UART0_RTSn */ 252cf39ff15SNishanth Menon >; 253cf39ff15SNishanth Menon }; 254cf39ff15SNishanth Menon}; 255cf39ff15SNishanth Menon 256cf39ff15SNishanth Menon/* WKUP UART0 is used for DM firmware logs */ 257cf39ff15SNishanth Menon&wkup_uart0 { 258cf39ff15SNishanth Menon pinctrl-names = "default"; 259cf39ff15SNishanth Menon pinctrl-0 = <&wkup_uart0_pins_default>; 260cf39ff15SNishanth Menon status = "reserved"; 26138c4a08cSVignesh Raghavendra}; 262396ca2fcSAradhya Bhatia 263396ca2fcSAradhya Bhatia&main_pmx0 { 264396ca2fcSAradhya Bhatia main_dss0_pins_default: main-dss0-default-pins { 265396ca2fcSAradhya Bhatia pinctrl-single,pins = < 266396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x100, PIN_OUTPUT, 0) /* (V17) VOUT0_VSYNC */ 267396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0f8, PIN_OUTPUT, 0) /* (T18) VOUT0_HSYNC */ 268396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x104, PIN_OUTPUT, 0) /* (AA22) VOUT0_PCLK */ 269396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0fc, PIN_OUTPUT, 0) /* (U17) VOUT0_DE */ 270396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0b8, PIN_OUTPUT, 0) /* (U22) VOUT0_DATA0 */ 271396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0bc, PIN_OUTPUT, 0) /* (U21) VOUT0_DATA1 */ 272396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0c0, PIN_OUTPUT, 0) /* (U20) VOUT0_DATA2 */ 273396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0c4, PIN_OUTPUT, 0) /* (U19) VOUT0_DATA3 */ 274396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0c8, PIN_OUTPUT, 0) /* (T19) VOUT0_DATA4 */ 275396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0cc, PIN_OUTPUT, 0) /* (U18) VOUT0_DATA5 */ 276396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0d0, PIN_OUTPUT, 0) /* (V22) VOUT0_DATA6 */ 277396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0d4, PIN_OUTPUT, 0) /* (V21) VOUT0_DATA7 */ 278396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0d8, PIN_OUTPUT, 0) /* (V19) VOUT0_DATA8 */ 279396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0dc, PIN_OUTPUT, 0) /* (V18) VOUT0_DATA9 */ 280396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0e0, PIN_OUTPUT, 0) /* (W22) VOUT0_DATA10 */ 281396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0e4, PIN_OUTPUT, 0) /* (W21) VOUT0_DATA11 */ 282396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0e8, PIN_OUTPUT, 0) /* (W20) VOUT0_DATA12 */ 283396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0ec, PIN_OUTPUT, 0) /* (W19) VOUT0_DATA13 */ 284396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0f0, PIN_OUTPUT, 0) /* (Y21) VOUT0_DATA14 */ 285396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x0f4, PIN_OUTPUT, 0) /* (Y22) VOUT0_DATA15 */ 286396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x05c, PIN_OUTPUT, 1) /* (P22) GPMC0_AD8.VOUT0_DATA16 */ 287396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x060, PIN_OUTPUT, 1) /* (R19) GPMC0_AD9.VOUT0_DATA17 */ 288396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x064, PIN_OUTPUT, 1) /* (R20) GPMC0_AD10.VOUT0_DATA18 */ 289396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x068, PIN_OUTPUT, 1) /* (R22) GPMC0_AD11.VOUT0_DATA19 */ 290396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x06c, PIN_OUTPUT, 1) /* (T22) GPMC0_AD12.VOUT0_DATA20 */ 291396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x070, PIN_OUTPUT, 1) /* (R21) GPMC0_AD13.VOUT0_DATA21 */ 292396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x074, PIN_OUTPUT, 1) /* (T20) GPMC0_AD14.VOUT0_DATA22 */ 293396ca2fcSAradhya Bhatia AM62AX_IOPAD(0x078, PIN_OUTPUT, 1) /* (T21) GPMC0_AD15.VOUT0_DATA23 */ 294396ca2fcSAradhya Bhatia >; 295a4956811STony Lindgren }; 29638c4a08cSVignesh Raghavendra 297cf39ff15SNishanth Menon main_uart0_pins_default: main-uart0-default-pins { 298cf39ff15SNishanth Menon pinctrl-single,pins = < 299cf39ff15SNishanth Menon AM62AX_IOPAD(0x1c8, PIN_INPUT, 0) /* (E14) UART0_RXD */ 300cf39ff15SNishanth Menon AM62AX_IOPAD(0x1cc, PIN_OUTPUT, 0) /* (D15) UART0_TXD */ 301cf39ff15SNishanth Menon >; 302a4956811STony Lindgren bootph-all; 303cf39ff15SNishanth Menon }; 304cf39ff15SNishanth Menon 305cf39ff15SNishanth Menon main_uart1_pins_default: main-uart1-default-pins { 306cf39ff15SNishanth Menon pinctrl-single,pins = < 307cf39ff15SNishanth Menon AM62AX_IOPAD(0x01ac, PIN_INPUT, 2) /* (B21) MCASP0_AFSR.UART1_RXD */ 30838c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x01b0, PIN_OUTPUT, 2) /* (A21) MCASP0_ACLKR.UART1_TXD */ 30938c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x0194, PIN_INPUT, 2) /* (C19) MCASP0_AXR3.UART1_CTSn */ 31038c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x0198, PIN_OUTPUT, 2) /* (B19) MCASP0_AXR2.UART1_RTSn */ 311a4956811STony Lindgren >; 31238c4a08cSVignesh Raghavendra }; 31338c4a08cSVignesh Raghavendra 31438c4a08cSVignesh Raghavendra main_i2c0_pins_default: main-i2c0-default-pins { 31538c4a08cSVignesh Raghavendra pinctrl-single,pins = < 31638c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x1e0, PIN_INPUT_PULLUP, 0) /* (B16) I2C0_SCL */ 31738c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x1e4, PIN_INPUT_PULLUP, 0) /* (A16) I2C0_SDA */ 318a4956811STony Lindgren >; 31938c4a08cSVignesh Raghavendra }; 32038c4a08cSVignesh Raghavendra 32138c4a08cSVignesh Raghavendra main_i2c1_pins_default: main-i2c1-default-pins { 32238c4a08cSVignesh Raghavendra pinctrl-single,pins = < 32338c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x1e8, PIN_INPUT_PULLUP, 0) /* (B17) I2C1_SCL */ 32438c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x1ec, PIN_INPUT_PULLUP, 0) /* (A17) I2C1_SDA */ 325a4956811STony Lindgren >; 32638c4a08cSVignesh Raghavendra bootph-all; 32738c4a08cSVignesh Raghavendra }; 32838c4a08cSVignesh Raghavendra 32938c4a08cSVignesh Raghavendra main_i2c2_pins_default: main-i2c2-default-pins { 33038c4a08cSVignesh Raghavendra pinctrl-single,pins = < 33138c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x0b0, PIN_INPUT_PULLUP, 1) /* (K22) GPMC0_CSn2.I2C2_SCL */ 332e041ec6eSNitin Yadav AM62AX_IOPAD(0x0b4, PIN_INPUT_PULLUP, 1) /* (K24) GPMC0_CSn3.I2C2_SDA */ 333e041ec6eSNitin Yadav >; 334e041ec6eSNitin Yadav }; 335e041ec6eSNitin Yadav 336e041ec6eSNitin Yadav main_mmc0_pins_default: main-mmc0-default-pins { 337e041ec6eSNitin Yadav pinctrl-single,pins = < 338e041ec6eSNitin Yadav AM62AX_IOPAD(0x220, PIN_INPUT, 0) /* (Y3) MMC0_CMD */ 339e041ec6eSNitin Yadav AM62AX_IOPAD(0x218, PIN_INPUT, 0) /* (AB1) MMC0_CLKLB */ 340e041ec6eSNitin Yadav AM62AX_IOPAD(0x21c, PIN_INPUT, 0) /* (AB1) MMC0_CLK */ 341e041ec6eSNitin Yadav AM62AX_IOPAD(0x214, PIN_INPUT, 0) /* (AA2) MMC0_DAT0 */ 342e041ec6eSNitin Yadav AM62AX_IOPAD(0x210, PIN_INPUT_PULLUP, 0) /* (AA1) MMC0_DAT1 */ 343e041ec6eSNitin Yadav AM62AX_IOPAD(0x20c, PIN_INPUT_PULLUP, 0) /* (AA3) MMC0_DAT2 */ 344e041ec6eSNitin Yadav AM62AX_IOPAD(0x208, PIN_INPUT_PULLUP, 0) /* (Y4) MMC0_DAT3 */ 345e041ec6eSNitin Yadav AM62AX_IOPAD(0x204, PIN_INPUT_PULLUP, 0) /* (AB2) MMC0_DAT4 */ 346db3cd905SJudith Mendez AM62AX_IOPAD(0x200, PIN_INPUT_PULLUP, 0) /* (AC1) MMC0_DAT5 */ 347e041ec6eSNitin Yadav AM62AX_IOPAD(0x1fc, PIN_INPUT_PULLUP, 0) /* (AD2) MMC0_DAT6 */ 348e041ec6eSNitin Yadav AM62AX_IOPAD(0x1f8, PIN_INPUT_PULLUP, 0) /* (AC2) MMC0_DAT7 */ 349a4956811STony Lindgren >; 35038c4a08cSVignesh Raghavendra bootph-all; 35138c4a08cSVignesh Raghavendra }; 35238c4a08cSVignesh Raghavendra 35338c4a08cSVignesh Raghavendra main_mmc1_pins_default: main-mmc1-default-pins { 35438c4a08cSVignesh Raghavendra pinctrl-single,pins = < 35538c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x23c, PIN_INPUT, 0) /* (A21) MMC1_CMD */ 35638c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x234, PIN_INPUT, 0) /* (B22) MMC1_CLK */ 35738c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x230, PIN_INPUT, 0) /* (A22) MMC1_DAT0 */ 35838c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x22c, PIN_INPUT, 0) /* (B21) MMC1_DAT1 */ 35938c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x228, PIN_INPUT, 0) /* (C21) MMC1_DAT2 */ 36038c4a08cSVignesh Raghavendra AM62AX_IOPAD(0x224, PIN_INPUT, 0) /* (D22) MMC1_DAT3 */ 361a4956811STony Lindgren AM62AX_IOPAD(0x240, PIN_INPUT, 0) /* (D17) MMC1_SDCD */ 36238c4a08cSVignesh Raghavendra >; 36338c4a08cSVignesh Raghavendra bootph-all; 36438c4a08cSVignesh Raghavendra }; 36538c4a08cSVignesh Raghavendra 366a9da45c0SVignesh Raghavendra usr_led_pins_default: usr-led-default-pins { 367a4956811STony Lindgren pinctrl-single,pins = < 36842057a6bSVignesh Raghavendra AM62AX_IOPAD(0x244, PIN_OUTPUT, 7) /* (D18) MMC1_SDWP.GPIO1_49 */ 36942057a6bSVignesh Raghavendra >; 37042057a6bSVignesh Raghavendra }; 37142057a6bSVignesh Raghavendra 37242057a6bSVignesh Raghavendra main_usb1_pins_default: main-usb1-default-pins { 373a4956811STony Lindgren pinctrl-single,pins = < 374a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x0258, PIN_OUTPUT, 0) /* (F18) USB1_DRVVBUS */ 375a9da45c0SVignesh Raghavendra >; 376a9da45c0SVignesh Raghavendra }; 377a9da45c0SVignesh Raghavendra 378a9da45c0SVignesh Raghavendra main_mdio1_pins_default: main-mdio1-default-pins { 379a9da45c0SVignesh Raghavendra pinctrl-single,pins = < 380a4956811STony Lindgren AM62AX_IOPAD(0x160, PIN_OUTPUT, 0) /* (V12) MDIO0_MDC */ 381a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x15c, PIN_INPUT, 0) /* (V13) MDIO0_MDIO */ 382a9da45c0SVignesh Raghavendra >; 383a9da45c0SVignesh Raghavendra bootph-all; 384a9da45c0SVignesh Raghavendra }; 385a9da45c0SVignesh Raghavendra 386a9da45c0SVignesh Raghavendra main_rgmii1_pins_default: main-rgmii1-default-pins { 387a9da45c0SVignesh Raghavendra pinctrl-single,pins = < 388a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x14c, PIN_INPUT, 0) /* (AB16) RGMII1_RD0 */ 389a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x150, PIN_INPUT, 0) /* (V15) RGMII1_RD1 */ 390a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x154, PIN_INPUT, 0) /* (W15) RGMII1_RD2 */ 391a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x158, PIN_INPUT, 0) /* (V14) RGMII1_RD3 */ 392a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x148, PIN_INPUT, 0) /* (AA16) RGMII1_RXC */ 393a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x144, PIN_INPUT, 0) /* (AA15) RGMII1_RX_CTL */ 394a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x134, PIN_INPUT, 0) /* (Y17) RGMII1_TD0 */ 395a9da45c0SVignesh Raghavendra AM62AX_IOPAD(0x138, PIN_INPUT, 0) /* (V16) RGMII1_TD1 */ 3964a2c5dddSJai Luthra AM62AX_IOPAD(0x13c, PIN_INPUT, 0) /* (Y16) RGMII1_TD2 */ 3974a2c5dddSJai Luthra AM62AX_IOPAD(0x140, PIN_INPUT, 0) /* (AA17) RGMII1_TD3 */ 3984a2c5dddSJai Luthra AM62AX_IOPAD(0x130, PIN_INPUT, 0) /* (AB17) RGMII1_TXC */ 3994a2c5dddSJai Luthra AM62AX_IOPAD(0x12c, PIN_INPUT, 0) /* (W16) RGMII1_TX_CTL */ 4004a2c5dddSJai Luthra >; 4014a2c5dddSJai Luthra bootph-all; 4024a2c5dddSJai Luthra }; 4034a2c5dddSJai Luthra 4044a2c5dddSJai Luthra main_mcasp1_pins_default: main-mcasp1-default-pins { 405e57ba268SAradhya Bhatia pinctrl-single,pins = < 406e57ba268SAradhya Bhatia AM62AX_IOPAD(0x090, PIN_INPUT, 2) /* (L19) GPMC0_BE0n_CLE.MCASP1_ACLKX */ 407e57ba268SAradhya Bhatia AM62AX_IOPAD(0x098, PIN_INPUT, 2) /* (R18) GPMC0_WAIT0.MCASP1_AFSX */ 408e57ba268SAradhya Bhatia AM62AX_IOPAD(0x08c, PIN_OUTPUT, 2) /* (K19) GPMC0_WEn.MCASP1_AXR0 */ 409e57ba268SAradhya Bhatia AM62AX_IOPAD(0x084, PIN_INPUT, 2) /* (L18) GPMC0_ADVn_ALE.MCASP1_AXR2 */ 410e57ba268SAradhya Bhatia >; 4118f023012SVignesh Raghavendra }; 4128f023012SVignesh Raghavendra 4138f023012SVignesh Raghavendra main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins { 4148f023012SVignesh Raghavendra pinctrl-single,pins = < 4158f023012SVignesh Raghavendra AM62AX_IOPAD(0x01d4, PIN_INPUT, 7) /* (C15) UART0_RTSn.GPIO1_23 */ 4168f023012SVignesh Raghavendra >; 4175aec1169SJudith Mendez }; 4185aec1169SJudith Mendez 4195aec1169SJudith Mendez vddshv_sdio_pins_default: vddshv-sdio-default-pins { 4205aec1169SJudith Mendez pinctrl-single,pins = < 4215aec1169SJudith Mendez AM62AX_IOPAD(0x07c, PIN_OUTPUT, 7) /* (M19) GPMC0_CLK.GPIO0_31 */ 4225aec1169SJudith Mendez >; 4235aec1169SJudith Mendez }; 4245aec1169SJudith Mendez 4255aec1169SJudith Mendez main_ecap0_pins_default: main-ecap0-default-pins { 4265aec1169SJudith Mendez pinctrl-single,pins = < 4275aec1169SJudith Mendez AM62AX_IOPAD(0x01b8, PIN_OUTPUT, 3) /* (C16) SPI0_CS1.ECAP0_IN_APWM_OUT */ 4285aec1169SJudith Mendez >; 4295aec1169SJudith Mendez }; 4305aec1169SJudith Mendez 4315aec1169SJudith Mendez main_ecap2_pins_default: main-ecap2-default-pins { 4325aec1169SJudith Mendez pinctrl-single,pins = < 4335aec1169SJudith Mendez AM62AX_IOPAD(0x01a4, PIN_OUTPUT, 2) /* (A19) MCASP0_ACLKX.ECAP2_IN_APWM_OUT */ 4345aec1169SJudith Mendez >; 4355aec1169SJudith Mendez }; 43638c4a08cSVignesh Raghavendra 43738c4a08cSVignesh Raghavendra main_epwm1_pins_default: main-epwm1-default-pins { 4383a822208SJulien Panis pinctrl-single,pins = < 4393a822208SJulien Panis AM62AX_IOPAD(0x019c, PIN_OUTPUT, 6) /* (B18) MCASP0_AXR1.EHRPWM1_A */ 4403a822208SJulien Panis AM62AX_IOPAD(0x01a0, PIN_OUTPUT, 6) /* (B20) MCASP0_AXR0.EHRPWM1_B */ 4413a822208SJulien Panis >; 4423a822208SJulien Panis }; 4433a822208SJulien Panis}; 4443a822208SJulien Panis 4453a822208SJulien Panis&mcu_pmx0 { 4463a822208SJulien Panis status = "okay"; 4473a822208SJulien Panis 4483a822208SJulien Panis pmic_irq_pins_default: pmic-irq-default-pins { 4493a822208SJulien Panis pinctrl-single,pins = < 4503a822208SJulien Panis AM62AX_MCU_IOPAD(0x000, PIN_INPUT, 7) /* (E11) MCU_GPIO0_0 */ 4513a822208SJulien Panis >; 45238c4a08cSVignesh Raghavendra }; 45338c4a08cSVignesh Raghavendra}; 45438c4a08cSVignesh Raghavendra 45538c4a08cSVignesh Raghavendra&mcu_gpio0 { 45638c4a08cSVignesh Raghavendra status = "okay"; 4575a5cf3bdSRavi Gunasekaran}; 4585a5cf3bdSRavi Gunasekaran 4595a5cf3bdSRavi Gunasekaran&main_i2c0 { 4605a5cf3bdSRavi Gunasekaran status = "okay"; 4615a5cf3bdSRavi Gunasekaran pinctrl-names = "default"; 4625a5cf3bdSRavi Gunasekaran pinctrl-0 = <&main_i2c0_pins_default>; 4635a5cf3bdSRavi Gunasekaran clock-frequency = <400000>; 4645a5cf3bdSRavi Gunasekaran 4655a5cf3bdSRavi Gunasekaran typec_pd0: usb-power-controller@3f { 4665a5cf3bdSRavi Gunasekaran compatible = "ti,tps6598x"; 4675a5cf3bdSRavi Gunasekaran reg = <0x3f>; 4685a5cf3bdSRavi Gunasekaran 4695a5cf3bdSRavi Gunasekaran connector { 4705a5cf3bdSRavi Gunasekaran compatible = "usb-c-connector"; 4715a5cf3bdSRavi Gunasekaran label = "USB-C"; 4725a5cf3bdSRavi Gunasekaran self-powered; 4735a5cf3bdSRavi Gunasekaran data-role = "dual"; 4745a5cf3bdSRavi Gunasekaran power-role = "sink"; 4753a822208SJulien Panis port { 4763a822208SJulien Panis usb_con_hs: endpoint { 4773a822208SJulien Panis remote-endpoint = <&usb0_hs_ep>; 4783a822208SJulien Panis }; 4793a822208SJulien Panis }; 4803a822208SJulien Panis }; 4813a822208SJulien Panis }; 4823a822208SJulien Panis 4833a822208SJulien Panis tps659312: pmic@48 { 4843a822208SJulien Panis compatible = "ti,tps6593-q1"; 4853a822208SJulien Panis reg = <0x48>; 4863a822208SJulien Panis ti,primary-pmic; 4873a822208SJulien Panis system-power-controller; 4883a822208SJulien Panis 4893a822208SJulien Panis gpio-controller; 4903a822208SJulien Panis #gpio-cells = <2>; 4913a822208SJulien Panis 4923a822208SJulien Panis pinctrl-names = "default"; 4933a822208SJulien Panis pinctrl-0 = <&pmic_irq_pins_default>; 4943a822208SJulien Panis interrupt-parent = <&mcu_gpio0>; 4953a822208SJulien Panis interrupts = <0 IRQ_TYPE_EDGE_FALLING>; 4963a822208SJulien Panis 4973a822208SJulien Panis buck123-supply = <&vcc_3v3_sys>; 4983a822208SJulien Panis buck4-supply = <&vcc_3v3_sys>; 4993a822208SJulien Panis buck5-supply = <&vcc_3v3_sys>; 5003a822208SJulien Panis ldo1-supply = <&vcc_3v3_sys>; 5013a822208SJulien Panis ldo2-supply = <&vcc_3v3_sys>; 5023a822208SJulien Panis ldo3-supply = <&buck5>; 5033a822208SJulien Panis ldo4-supply = <&vcc_3v3_sys>; 5043a822208SJulien Panis 5053a822208SJulien Panis regulators { 5063a822208SJulien Panis buck123: buck123 { 5073a822208SJulien Panis regulator-name = "vcc_core"; 5083a822208SJulien Panis regulator-min-microvolt = <715000>; 5093a822208SJulien Panis regulator-max-microvolt = <895000>; 5103a822208SJulien Panis regulator-boot-on; 5113a822208SJulien Panis regulator-always-on; 5123a822208SJulien Panis }; 5133a822208SJulien Panis 5143a822208SJulien Panis buck4: buck4 { 5153a822208SJulien Panis regulator-name = "vcc_1v1"; 5163a822208SJulien Panis regulator-min-microvolt = <1100000>; 5173a822208SJulien Panis regulator-max-microvolt = <1100000>; 5183a822208SJulien Panis regulator-boot-on; 5193a822208SJulien Panis regulator-always-on; 5203a822208SJulien Panis }; 5213a822208SJulien Panis 5223a822208SJulien Panis buck5: buck5 { 5233a822208SJulien Panis regulator-name = "vcc_1v8_sys"; 5243a822208SJulien Panis regulator-min-microvolt = <1800000>; 5253a822208SJulien Panis regulator-max-microvolt = <1800000>; 5263a822208SJulien Panis regulator-boot-on; 5273a822208SJulien Panis regulator-always-on; 5283a822208SJulien Panis }; 5293a822208SJulien Panis 5303a822208SJulien Panis ldo1: ldo1 { 5313a822208SJulien Panis regulator-name = "vddshv5_sdio"; 5323a822208SJulien Panis regulator-min-microvolt = <3300000>; 5333a822208SJulien Panis regulator-max-microvolt = <3300000>; 5343a822208SJulien Panis regulator-boot-on; 5353a822208SJulien Panis regulator-always-on; 5363a822208SJulien Panis }; 5373a822208SJulien Panis 5383a822208SJulien Panis ldo2: ldo2 { 5393a822208SJulien Panis regulator-name = "vpp_1v8"; 5403a822208SJulien Panis regulator-min-microvolt = <1800000>; 5413a822208SJulien Panis regulator-max-microvolt = <1800000>; 5423a822208SJulien Panis regulator-boot-on; 5433a822208SJulien Panis regulator-always-on; 5443a822208SJulien Panis }; 5453a822208SJulien Panis 5463a822208SJulien Panis ldo3: ldo3 { 5473a822208SJulien Panis regulator-name = "vcc_0v85"; 5483a822208SJulien Panis regulator-min-microvolt = <850000>; 5493a822208SJulien Panis regulator-max-microvolt = <850000>; 5503a822208SJulien Panis regulator-boot-on; 5513a822208SJulien Panis regulator-always-on; 5523a822208SJulien Panis }; 5533a822208SJulien Panis 5543a822208SJulien Panis ldo4: ldo4 { 5553a822208SJulien Panis regulator-name = "vdda_1v8"; 55638c4a08cSVignesh Raghavendra regulator-min-microvolt = <1800000>; 55738c4a08cSVignesh Raghavendra regulator-max-microvolt = <1800000>; 55838c4a08cSVignesh Raghavendra regulator-boot-on; 55938c4a08cSVignesh Raghavendra regulator-always-on; 56038c4a08cSVignesh Raghavendra }; 56138c4a08cSVignesh Raghavendra }; 56263e5aa69SJai Luthra }; 56338c4a08cSVignesh Raghavendra}; 56438c4a08cSVignesh Raghavendra 56538c4a08cSVignesh Raghavendra&main_i2c1 { 56638c4a08cSVignesh Raghavendra status = "okay"; 56738c4a08cSVignesh Raghavendra pinctrl-names = "default"; 56838c4a08cSVignesh Raghavendra pinctrl-0 = <&main_i2c1_pins_default>; 569e57ba268SAradhya Bhatia clock-frequency = <100000>; 570e57ba268SAradhya Bhatia 571e57ba268SAradhya Bhatia exp1: gpio@22 { 572e57ba268SAradhya Bhatia compatible = "ti,tca6424"; 573e57ba268SAradhya Bhatia reg = <0x22>; 574e57ba268SAradhya Bhatia gpio-controller; 57538c4a08cSVignesh Raghavendra #gpio-cells = <2>; 57638c4a08cSVignesh Raghavendra interrupt-parent = <&main_gpio1>; 57738c4a08cSVignesh Raghavendra interrupts = <23 IRQ_TYPE_EDGE_FALLING>; 57838c4a08cSVignesh Raghavendra interrupt-controller; 57938c4a08cSVignesh Raghavendra #interrupt-cells = <2>; 58038c4a08cSVignesh Raghavendra pinctrl-names = "default"; 58138c4a08cSVignesh Raghavendra pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>; 58238c4a08cSVignesh Raghavendra bootph-all; 58338c4a08cSVignesh Raghavendra 58438c4a08cSVignesh Raghavendra gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST", 58538c4a08cSVignesh Raghavendra "BT_EN_SOC", "MMC1_SD_EN", 58638c4a08cSVignesh Raghavendra "VPP_EN", "EXP_PS_3V3_En", 58738c4a08cSVignesh Raghavendra "EXP_PS_5V0_En", "EXP_HAT_DETECT", 58838c4a08cSVignesh Raghavendra "GPIO_AUD_RSTn", "GPIO_eMMC_RSTn", 5894a2c5dddSJai Luthra "UART1_FET_BUF_EN", "BT_UART_WAKE_SOC", 5904a2c5dddSJai Luthra "GPIO_HDMI_RSTn", "CSI_GPIO0", 5914a2c5dddSJai Luthra "CSI_GPIO1", "WLAN_ALERTn", 5924a2c5dddSJai Luthra "HDMI_INTn", "TEST_GPIO2", 5934a2c5dddSJai Luthra "MCASP1_FET_EN", "MCASP1_BUF_BT_EN", 5944a2c5dddSJai Luthra "MCASP1_FET_SEL", "UART1_FET_SEL", 5954a2c5dddSJai Luthra "PD_I2C_IRQ", "IO_EXP_TEST_LED"; 5964a2c5dddSJai Luthra }; 5974a2c5dddSJai Luthra 5984a2c5dddSJai Luthra tlv320aic3106: audio-codec@1b { 5994a2c5dddSJai Luthra #sound-dai-cells = <0>; 6004a2c5dddSJai Luthra compatible = "ti,tlv320aic3106"; 6014a2c5dddSJai Luthra reg = <0x1b>; 60200d7f8f9SJai Luthra ai3x-micbias-vg = <1>; /* 2.0V */ 60300d7f8f9SJai Luthra 60400d7f8f9SJai Luthra /* Regulators */ 60500d7f8f9SJai Luthra AVDD-supply = <&vcc_3v3_sys>; 60600d7f8f9SJai Luthra IOVDD-supply = <&vcc_3v3_sys>; 60700d7f8f9SJai Luthra DRVDD-supply = <&vcc_3v3_sys>; 60800d7f8f9SJai Luthra DVDD-supply = <&buck5>; 60900d7f8f9SJai Luthra }; 61000d7f8f9SJai Luthra 61100d7f8f9SJai Luthra exp2: gpio@23 { 61200d7f8f9SJai Luthra compatible = "ti,tca6424"; 61300d7f8f9SJai Luthra reg = <0x23>; 61400d7f8f9SJai Luthra gpio-controller; 61500d7f8f9SJai Luthra #gpio-cells = <2>; 61600d7f8f9SJai Luthra 61700d7f8f9SJai Luthra gpio-line-names = "", "", 61800d7f8f9SJai Luthra "", "", 61900d7f8f9SJai Luthra "", "", 62000d7f8f9SJai Luthra "", "", 62100d7f8f9SJai Luthra "WL_LT_EN", "CSI_RSTz", 622396ca2fcSAradhya Bhatia "", "", 623396ca2fcSAradhya Bhatia "", "", 624396ca2fcSAradhya Bhatia "", "", 625396ca2fcSAradhya Bhatia "SPI0_FET_SEL", "SPI0_FET_OE", 626396ca2fcSAradhya Bhatia "RGMII2_BRD_CONN_DET", "CSI_SEL2", 627396ca2fcSAradhya Bhatia "CSI_EN", "AUTO_100M_1000M_CONFIG", 628396ca2fcSAradhya Bhatia "CSI_VLDO_SEL", "SoC_WLAN_SDIO_RST"; 629396ca2fcSAradhya Bhatia }; 630396ca2fcSAradhya Bhatia 631396ca2fcSAradhya Bhatia sii9022: bridge-hdmi@3b { 632396ca2fcSAradhya Bhatia compatible = "sil,sii9022"; 633396ca2fcSAradhya Bhatia reg = <0x3b>; 634396ca2fcSAradhya Bhatia interrupt-parent = <&exp1>; 635396ca2fcSAradhya Bhatia interrupts = <16 IRQ_TYPE_EDGE_FALLING>; 636396ca2fcSAradhya Bhatia #sound-dai-cells = <0>; 637396ca2fcSAradhya Bhatia sil,i2s-data-lanes = < 0 >; 638396ca2fcSAradhya Bhatia 639396ca2fcSAradhya Bhatia ports { 640396ca2fcSAradhya Bhatia #address-cells = <1>; 641396ca2fcSAradhya Bhatia #size-cells = <0>; 642396ca2fcSAradhya Bhatia 643396ca2fcSAradhya Bhatia port@0 { 644396ca2fcSAradhya Bhatia reg = <0>; 645396ca2fcSAradhya Bhatia 646396ca2fcSAradhya Bhatia sii9022_in: endpoint { 647396ca2fcSAradhya Bhatia remote-endpoint = <&dpi1_out>; 648396ca2fcSAradhya Bhatia }; 649396ca2fcSAradhya Bhatia }; 650396ca2fcSAradhya Bhatia 651396ca2fcSAradhya Bhatia port@1 { 65200d7f8f9SJai Luthra reg = <1>; 65300d7f8f9SJai Luthra 65400d7f8f9SJai Luthra sii9022_out: endpoint { 65500d7f8f9SJai Luthra remote-endpoint = <&hdmi_connector_in>; 65600d7f8f9SJai Luthra }; 65700d7f8f9SJai Luthra }; 65800d7f8f9SJai Luthra }; 65938c4a08cSVignesh Raghavendra }; 66038c4a08cSVignesh Raghavendra}; 661e041ec6eSNitin Yadav 662e041ec6eSNitin Yadav&main_i2c2 { 663e041ec6eSNitin Yadav status = "okay"; 664e041ec6eSNitin Yadav pinctrl-names = "default"; 665e041ec6eSNitin Yadav pinctrl-0 = <&main_i2c2_pins_default>; 666e041ec6eSNitin Yadav clock-frequency = <400000>; 667db3cd905SJudith Mendez}; 668e041ec6eSNitin Yadav 669e041ec6eSNitin Yadav&sdhci0 { 67038c4a08cSVignesh Raghavendra /* eMMC */ 67138c4a08cSVignesh Raghavendra status = "okay"; 67238c4a08cSVignesh Raghavendra non-removable; 67338c4a08cSVignesh Raghavendra pinctrl-names = "default"; 6748f023012SVignesh Raghavendra pinctrl-0 = <&main_mmc0_pins_default>; 67538c4a08cSVignesh Raghavendra bootph-all; 67638c4a08cSVignesh Raghavendra}; 67738c4a08cSVignesh Raghavendra 67838c4a08cSVignesh Raghavendra&sdhci1 { 67938c4a08cSVignesh Raghavendra /* SD/MMC */ 68038c4a08cSVignesh Raghavendra status = "okay"; 68138c4a08cSVignesh Raghavendra vmmc-supply = <&vdd_mmc1>; 68238c4a08cSVignesh Raghavendra vqmmc-supply = <&vddshv_sdio>; 68338c4a08cSVignesh Raghavendra pinctrl-names = "default"; 68438c4a08cSVignesh Raghavendra pinctrl-0 = <&main_mmc1_pins_default>; 68538c4a08cSVignesh Raghavendra disable-wp; 68638c4a08cSVignesh Raghavendra bootph-all; 68738c4a08cSVignesh Raghavendra}; 68838c4a08cSVignesh Raghavendra 68938c4a08cSVignesh Raghavendra&main_gpio0 { 69038c4a08cSVignesh Raghavendra status = "okay"; 69138c4a08cSVignesh Raghavendra bootph-all; 69238c4a08cSVignesh Raghavendra}; 69338c4a08cSVignesh Raghavendra 69438c4a08cSVignesh Raghavendra&main_gpio1 { 69538c4a08cSVignesh Raghavendra status = "okay"; 69638c4a08cSVignesh Raghavendra}; 697a9da45c0SVignesh Raghavendra 698cf39ff15SNishanth Menon&main_gpio_intr { 699cf39ff15SNishanth Menon status = "okay"; 700cf39ff15SNishanth Menon}; 701cf39ff15SNishanth Menon 702cf39ff15SNishanth Menon&main_uart0 { 703cf39ff15SNishanth Menon status = "okay"; 704cf39ff15SNishanth Menon pinctrl-names = "default"; 7052a473854SHari Nagalla pinctrl-0 = <&main_uart0_pins_default>; 7062a473854SHari Nagalla bootph-all; 7072a473854SHari Nagalla}; 7082a473854SHari Nagalla 7092a473854SHari Nagalla/* Main UART1 is used for TIFS firmware logs */ 7105a5cf3bdSRavi Gunasekaran&main_uart1 { 7115a5cf3bdSRavi Gunasekaran pinctrl-names = "default"; 7125a5cf3bdSRavi Gunasekaran pinctrl-0 = <&main_uart1_pins_default>; 7135a5cf3bdSRavi Gunasekaran status = "reserved"; 7145a5cf3bdSRavi Gunasekaran}; 7155a5cf3bdSRavi Gunasekaran 716e7ee00e3SSiddharth Vadapalli/* main_timer2 is used by C7x DSP */ 7175a5cf3bdSRavi Gunasekaran&main_timer2 { 7185a5cf3bdSRavi Gunasekaran status = "reserved"; 7195a5cf3bdSRavi Gunasekaran}; 7205a5cf3bdSRavi Gunasekaran 7215a5cf3bdSRavi Gunasekaran&usbss0 { 7225a5cf3bdSRavi Gunasekaran status = "okay"; 7235a5cf3bdSRavi Gunasekaran ti,vbus-divider; 7245a5cf3bdSRavi Gunasekaran}; 7255a5cf3bdSRavi Gunasekaran 72642057a6bSVignesh Raghavendra&usb0 { 72742057a6bSVignesh Raghavendra bootph-all; 72842057a6bSVignesh Raghavendra usb-role-switch; 72942057a6bSVignesh Raghavendra 73042057a6bSVignesh Raghavendra port { 73142057a6bSVignesh Raghavendra usb0_hs_ep: endpoint { 73242057a6bSVignesh Raghavendra remote-endpoint = <&usb_con_hs>; 73342057a6bSVignesh Raghavendra }; 73442057a6bSVignesh Raghavendra }; 73542057a6bSVignesh Raghavendra}; 736a9da45c0SVignesh Raghavendra 737a9da45c0SVignesh Raghavendra&usbss1 { 738a9da45c0SVignesh Raghavendra status = "okay"; 739a9da45c0SVignesh Raghavendra}; 740a9da45c0SVignesh Raghavendra 741a9da45c0SVignesh Raghavendra&usb1 { 742a9da45c0SVignesh Raghavendra dr_mode = "host"; 743a9da45c0SVignesh Raghavendra pinctrl-names = "default"; 744a9da45c0SVignesh Raghavendra pinctrl-0 = <&main_usb1_pins_default>; 745a9da45c0SVignesh Raghavendra}; 746a9da45c0SVignesh Raghavendra 747a9da45c0SVignesh Raghavendra&cpsw3g { 748a9da45c0SVignesh Raghavendra status = "okay"; 749a9da45c0SVignesh Raghavendra pinctrl-names = "default"; 750a9da45c0SVignesh Raghavendra pinctrl-0 = <&main_rgmii1_pins_default>; 751a9da45c0SVignesh Raghavendra}; 752a9da45c0SVignesh Raghavendra 753a9da45c0SVignesh Raghavendra&phy_gmii_sel { 754a9da45c0SVignesh Raghavendra bootph-all; 755a9da45c0SVignesh Raghavendra}; 756a9da45c0SVignesh Raghavendra 757a9da45c0SVignesh Raghavendra&cpsw_port1 { 758a9da45c0SVignesh Raghavendra status = "okay"; 759a9da45c0SVignesh Raghavendra phy-mode = "rgmii-rxid"; 760a9da45c0SVignesh Raghavendra phy-handle = <&cpsw3g_phy0>; 761a9da45c0SVignesh Raghavendra bootph-all; 762a9da45c0SVignesh Raghavendra}; 763a9da45c0SVignesh Raghavendra 7644a2c5dddSJai Luthra&cpsw_port2 { 7654a2c5dddSJai Luthra status = "disabled"; 7664a2c5dddSJai Luthra}; 7674a2c5dddSJai Luthra 7684a2c5dddSJai Luthra&cpsw3g_mdio { 7694a2c5dddSJai Luthra status = "okay"; 7704a2c5dddSJai Luthra pinctrl-names = "default"; 7714a2c5dddSJai Luthra pinctrl-0 = <&main_mdio1_pins_default>; 7724a2c5dddSJai Luthra 7734a2c5dddSJai Luthra cpsw3g_phy0: ethernet-phy@0 { 7744a2c5dddSJai Luthra reg = <0>; 7754a2c5dddSJai Luthra ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>; 7764a2c5dddSJai Luthra ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>; 7774a2c5dddSJai Luthra ti,min-output-impedance; 7784a2c5dddSJai Luthra bootph-all; 7794a2c5dddSJai Luthra }; 7804a2c5dddSJai Luthra}; 7814a2c5dddSJai Luthra 782396ca2fcSAradhya Bhatia&mcasp1 { 783396ca2fcSAradhya Bhatia status = "okay"; 784396ca2fcSAradhya Bhatia #sound-dai-cells = <0>; 785396ca2fcSAradhya Bhatia 786396ca2fcSAradhya Bhatia pinctrl-names = "default"; 787396ca2fcSAradhya Bhatia pinctrl-0 = <&main_mcasp1_pins_default>; 788396ca2fcSAradhya Bhatia 789396ca2fcSAradhya Bhatia op-mode = <0>; /* MCASP_IIS_MODE */ 790396ca2fcSAradhya Bhatia tdm-slots = <2>; 791396ca2fcSAradhya Bhatia 792396ca2fcSAradhya Bhatia serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */ 793396ca2fcSAradhya Bhatia 1 0 2 0 794396ca2fcSAradhya Bhatia 0 0 0 0 795396ca2fcSAradhya Bhatia 0 0 0 0 796396ca2fcSAradhya Bhatia 0 0 0 0 797396ca2fcSAradhya Bhatia >; 798396ca2fcSAradhya Bhatia}; 7995aec1169SJudith Mendez 8005aec1169SJudith Mendez&dss { 8015aec1169SJudith Mendez status = "okay"; 8025aec1169SJudith Mendez pinctrl-names = "default"; 8035aec1169SJudith Mendez pinctrl-0 = <&main_dss0_pins_default>; 8045aec1169SJudith Mendez}; 8055aec1169SJudith Mendez 8065aec1169SJudith Mendez&dss_ports { 8075aec1169SJudith Mendez /* VP2: DPI Output */ 8085aec1169SJudith Mendez port@1 { 8095aec1169SJudith Mendez reg = <1>; 8105aec1169SJudith Mendez 8115aec1169SJudith Mendez dpi1_out: endpoint { 8125aec1169SJudith Mendez remote-endpoint = <&sii9022_in>; 8135aec1169SJudith Mendez }; 8145aec1169SJudith Mendez }; 8155aec1169SJudith Mendez}; 8165aec1169SJudith Mendez 8175aec1169SJudith Mendez&ecap0 { 8185aec1169SJudith Mendez /* P26 of J3 */ 8195aec1169SJudith Mendez pinctrl-names = "default"; 82077c29ebeSDevarsh Thakkar pinctrl-0 = <&main_ecap0_pins_default>; 82177c29ebeSDevarsh Thakkar status = "okay"; 82277c29ebeSDevarsh Thakkar}; 82377c29ebeSDevarsh Thakkar 82477c29ebeSDevarsh Thakkar&ecap2 { 82577c29ebeSDevarsh Thakkar /* P11 of J3 */ 82677c29ebeSDevarsh Thakkar pinctrl-names = "default"; 82777c29ebeSDevarsh Thakkar pinctrl-0 = <&main_ecap2_pins_default>; 82877c29ebeSDevarsh Thakkar status = "okay"; 82977c29ebeSDevarsh Thakkar}; 83077c29ebeSDevarsh Thakkar 83177c29ebeSDevarsh Thakkar&epwm1 { 83277c29ebeSDevarsh Thakkar /* P36/P33 of J3 */ 83377c29ebeSDevarsh Thakkar pinctrl-names = "default"; 83477c29ebeSDevarsh Thakkar pinctrl-0 = <&main_epwm1_pins_default>; 83577c29ebeSDevarsh Thakkar status = "okay"; 83677c29ebeSDevarsh Thakkar}; 83777c29ebeSDevarsh Thakkar 83877c29ebeSDevarsh Thakkar&mailbox0_cluster0 { 83977c29ebeSDevarsh Thakkar status = "okay"; 84077c29ebeSDevarsh Thakkar 84177c29ebeSDevarsh Thakkar mbox_r5_0: mbox-r5-0 { 84277c29ebeSDevarsh Thakkar ti,mbox-rx = <0 0 0>; 84377c29ebeSDevarsh Thakkar ti,mbox-tx = <1 0 0>; 84477c29ebeSDevarsh Thakkar }; 84577c29ebeSDevarsh Thakkar}; 84677c29ebeSDevarsh Thakkar 84777c29ebeSDevarsh Thakkar&mailbox0_cluster1 { 84877c29ebeSDevarsh Thakkar status = "okay"; 84977c29ebeSDevarsh Thakkar 85077c29ebeSDevarsh Thakkar mbox_c7x_0: mbox-c7x-0 { 85177c29ebeSDevarsh Thakkar ti,mbox-rx = <0 0 0>; 85277c29ebeSDevarsh Thakkar ti,mbox-tx = <1 0 0>; 85377c29ebeSDevarsh Thakkar }; 85477c29ebeSDevarsh Thakkar}; 85577c29ebeSDevarsh Thakkar 85677c29ebeSDevarsh Thakkar&mailbox0_cluster2 { 85777c29ebeSDevarsh Thakkar status = "okay"; 85877c29ebeSDevarsh Thakkar 85977c29ebeSDevarsh Thakkar mbox_mcu_r5_0: mbox-mcu-r5-0 { 86077c29ebeSDevarsh Thakkar ti,mbox-rx = <0 0 0>; 86177c29ebeSDevarsh Thakkar ti,mbox-tx = <1 0 0>; 86277c29ebeSDevarsh Thakkar }; 86377c29ebeSDevarsh Thakkar}; 86477c29ebeSDevarsh Thakkar 86577c29ebeSDevarsh Thakkar&wkup_r5fss0 { 86677c29ebeSDevarsh Thakkar status = "okay"; 86777c29ebeSDevarsh Thakkar}; 86877c29ebeSDevarsh Thakkar 86977c29ebeSDevarsh Thakkar&wkup_r5fss0_core0 { 87077c29ebeSDevarsh Thakkar mboxes = <&mailbox0_cluster0>, <&mbox_r5_0>; 87177c29ebeSDevarsh Thakkar memory-region = <&wkup_r5fss0_core0_dma_memory_region>, 87277c29ebeSDevarsh Thakkar <&wkup_r5fss0_core0_memory_region>; 87377c29ebeSDevarsh Thakkar}; 874*b4ec7730SHari Nagalla 875*b4ec7730SHari Nagalla&mcu_r5fss0 { 876*b4ec7730SHari Nagalla status = "okay"; 877*b4ec7730SHari Nagalla}; 878*b4ec7730SHari Nagalla 879&mcu_r5fss0_core0 { 880 mboxes = <&mailbox0_cluster2>, <&mbox_mcu_r5_0>; 881 memory-region = <&mcu_r5fss0_core0_dma_memory_region>, 882 <&mcu_r5fss0_core0_memory_region>; 883}; 884 885&c7x_0 { 886 mboxes = <&mailbox0_cluster1>, <&mbox_c7x_0>; 887 memory-region = <&c7x_0_dma_memory_region>, 888 <&c7x_0_memory_region>; 889 status = "okay"; 890}; 891 892/* main_rti4 is used by C7x DSP */ 893&main_rti4 { 894 status = "reserved"; 895}; 896 897&fss { 898 status = "okay"; 899}; 900 901&ospi0 { 902 pinctrl-names = "default"; 903 pinctrl-0 = <&ospi0_pins_default>; 904 905 flash@0 { 906 compatible = "spi-nand"; 907 reg = <0>; 908 spi-tx-bus-width = <8>; 909 spi-rx-bus-width = <8>; 910 spi-max-frequency = <25000000>; 911 cdns,tshsl-ns = <60>; 912 cdns,tsd2d-ns = <60>; 913 cdns,tchsh-ns = <60>; 914 cdns,tslch-ns = <60>; 915 cdns,read-delay = <2>; 916 bootph-all; 917 }; 918}; 919 920&main_pmx0 { 921 ospi0_pins_default: ospi0-default-pins { 922 bootph-all; 923 pinctrl-single,pins = < 924 AM62AX_IOPAD(0x000, PIN_OUTPUT, 0) /* (H24) OSPI0_CLK */ 925 AM62AX_IOPAD(0x02c, PIN_OUTPUT, 0) /* (F23) OSPI0_CSn0 */ 926 AM62AX_IOPAD(0x00c, PIN_INPUT, 0) /* (E25) OSPI0_D0 */ 927 AM62AX_IOPAD(0x010, PIN_INPUT, 0) /* (G24) OSPI0_D1 */ 928 AM62AX_IOPAD(0x014, PIN_INPUT, 0) /* (F25) OSPI0_D2 */ 929 AM62AX_IOPAD(0x018, PIN_INPUT, 0) /* (F24) OSPI0_D3 */ 930 AM62AX_IOPAD(0x01c, PIN_INPUT, 0) /* (J23) OSPI0_D4 */ 931 AM62AX_IOPAD(0x020, PIN_INPUT, 0) /* (J25) OSPI0_D5 */ 932 AM62AX_IOPAD(0x024, PIN_INPUT, 0) /* (H25) OSPI0_D6 */ 933 AM62AX_IOPAD(0x028, PIN_INPUT, 0) /* (J22) OSPI0_D7 */ 934 AM62AX_IOPAD(0x008, PIN_INPUT, 0) /* (J24) OSPI0_DQS */ 935 >; 936 }; 937}; 938