xref: /linux/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi (revision 6315d93541f8a5f77c5ef5c4f25233e66d189603)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
4 *
5 */
6
7/dts-v1/;
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/pwm/pwm.h>
11#include <dt-bindings/pinctrl/rockchip.h>
12#include "rk3588.dtsi"
13
14/ {
15	compatible = "coolpi,pi-cm5", "rockchip,rk3588";
16
17	aliases {
18		mmc0 = &sdhci;
19		mmc1 = &sdmmc;
20		mmc2 = &sdio;
21		serial2 = &uart2;
22	};
23
24	analog-sound {
25		compatible = "audio-graph-card";
26		dais = <&i2s0_8ch_p0>;
27		label = "rk3588-es8316";
28		routing = "MIC2", "Mic Jack",
29			  "Headphones", "HPOL",
30			  "Headphones", "HPOR";
31		widgets = "Microphone", "Mic Jack",
32			  "Headphone", "Headphones";
33	};
34
35	chosen {
36		stdout-path = "serial2:1500000n8";
37	};
38
39	avdd0v85_pcie20: regulator-avdd0v85-pcie20 {
40		compatible = "regulator-fixed";
41		regulator-name = "avdd0v85_pcie20";
42		regulator-boot-on;
43		regulator-always-on;
44		regulator-min-microvolt = <850000>;
45		regulator-max-microvolt = <850000>;
46		vin-supply = <&vdd_0v85_s0>;
47	};
48
49	avdd1v8_pcie20: regulator-avdd1v8-pcie20 {
50		compatible = "regulator-fixed";
51		regulator-name = "avdd1v8_pcie20";
52		regulator-boot-on;
53		regulator-always-on;
54		regulator-min-microvolt = <1800000>;
55		regulator-max-microvolt = <1800000>;
56		vin-supply = <&avcc_1v8_s0>;
57	};
58
59	avdd0v75_pcie30: regulator-avdd0v75-pcie30 {
60		compatible = "regulator-fixed";
61		regulator-name = "avdd0v75_pcie30";
62		regulator-boot-on;
63		regulator-always-on;
64		regulator-min-microvolt = <750000>;
65		regulator-max-microvolt = <750000>;
66		vin-supply = <&avdd_0v75_s0>;
67	};
68
69	pcie30_avdd1v8: regulator-avdd1v8-pcie30 {
70		compatible = "regulator-fixed";
71		regulator-name = "pcie30_avdd1v8";
72		regulator-boot-on;
73		regulator-always-on;
74		regulator-min-microvolt = <1800000>;
75		regulator-max-microvolt = <1800000>;
76		vin-supply = <&avcc_1v8_s0>;
77	};
78};
79
80&combphy0_ps {
81	status = "okay";
82};
83
84&combphy1_ps {
85	status = "okay";
86};
87
88&combphy2_psu {
89	status = "okay";
90};
91
92&cpu_b0 {
93	cpu-supply = <&vdd_cpu_big0_s0>;
94};
95
96&cpu_b1 {
97	cpu-supply = <&vdd_cpu_big0_s0>;
98};
99
100&cpu_b2 {
101	cpu-supply = <&vdd_cpu_big1_s0>;
102};
103
104&cpu_b3 {
105	cpu-supply = <&vdd_cpu_big1_s0>;
106};
107
108&cpu_l0 {
109	cpu-supply = <&vdd_cpu_lit_s0>;
110};
111
112&cpu_l1 {
113	cpu-supply = <&vdd_cpu_lit_s0>;
114};
115
116&cpu_l2 {
117	cpu-supply = <&vdd_cpu_lit_s0>;
118};
119
120&cpu_l3 {
121	cpu-supply = <&vdd_cpu_lit_s0>;
122};
123
124&gmac0 {
125	clock_in_out = "output";
126	phy-handle = <&rgmii_phy>;
127	phy-mode = "rgmii-rxid";
128	pinctrl-0 = <&gmac0_miim
129		     &gmac0_tx_bus2
130		     &gmac0_rx_bus2
131		     &gmac0_rgmii_clk
132		     &gmac0_rgmii_bus>;
133	pinctrl-names = "default";
134	rx_delay = <0x00>;
135	tx_delay = <0x43>;
136	status = "okay";
137};
138
139&gpu {
140	mali-supply = <&vdd_gpu_s0>;
141	status = "okay";
142};
143
144&i2c0 {
145	pinctrl-0 = <&i2c0m2_xfer>;
146	status = "okay";
147
148	vdd_cpu_big0_s0: regulator@42 {
149		compatible = "rockchip,rk8602";
150		reg = <0x42>;
151		fcs,suspend-voltage-selector = <1>;
152		regulator-name = "vdd_cpu_big0_s0";
153		regulator-always-on;
154		regulator-boot-on;
155		regulator-min-microvolt = <550000>;
156		regulator-max-microvolt = <1050000>;
157		regulator-ramp-delay = <2300>;
158		vin-supply = <&vcc5v0_sys>;
159
160		regulator-state-mem {
161			regulator-off-in-suspend;
162		};
163	};
164
165	vdd_cpu_big1_s0: regulator@43 {
166		compatible = "rockchip,rk8603", "rockchip,rk8602";
167		reg = <0x43>;
168		fcs,suspend-voltage-selector = <1>;
169		regulator-name = "vdd_cpu_big1_s0";
170		regulator-always-on;
171		regulator-boot-on;
172		regulator-min-microvolt = <550000>;
173		regulator-max-microvolt = <1050000>;
174		regulator-ramp-delay = <2300>;
175		vin-supply = <&vcc5v0_sys>;
176
177		regulator-state-mem {
178			regulator-off-in-suspend;
179		};
180	};
181};
182
183&i2c2 {
184	status = "okay";
185
186	vdd_npu_s0: regulator@42 {
187		compatible = "rockchip,rk8602";
188		reg = <0x42>;
189		fcs,suspend-voltage-selector = <1>;
190		regulator-name = "vdd_npu_s0";
191		regulator-always-on;
192		regulator-boot-on;
193		regulator-min-microvolt = <550000>;
194		regulator-max-microvolt = <950000>;
195		regulator-ramp-delay = <2300>;
196		vin-supply = <&vcc5v0_sys>;
197
198		regulator-state-mem {
199			regulator-off-in-suspend;
200		};
201	};
202};
203
204&i2c6 {
205	status = "okay";
206
207	hym8563: rtc@51 {
208		compatible = "haoyu,hym8563";
209		reg = <0x51>;
210		interrupt-parent = <&gpio0>;
211		interrupts = <RK_PD4 IRQ_TYPE_LEVEL_LOW>;
212		#clock-cells = <0>;
213		clock-output-names = "hym8563";
214		pinctrl-names = "default";
215		pinctrl-0 = <&hym8563_int>;
216		wakeup-source;
217	};
218};
219
220&i2c7 {
221	pinctrl-0 = <&i2c7m0_xfer>;
222	status = "okay";
223
224	es8316: audio-codec@10 {
225		compatible = "everest,es8316";
226		reg = <0x10>;
227		assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
228		assigned-clock-rates = <12288000>;
229		clocks = <&cru I2S0_8CH_MCLKOUT>;
230		clock-names = "mclk";
231		#sound-dai-cells = <0>;
232
233		port {
234			es8316_p0_0: endpoint {
235				remote-endpoint = <&i2s0_8ch_p0_0>;
236			};
237		};
238	};
239};
240
241&i2s0_8ch {
242	pinctrl-0 = <&i2s0_lrck
243		     &i2s0_mclk
244		     &i2s0_sclk
245		     &i2s0_sdi0
246		     &i2s0_sdo0>;
247	status = "okay";
248
249	i2s0_8ch_p0: port {
250		i2s0_8ch_p0_0: endpoint {
251			dai-format = "i2s";
252			mclk-fs = <256>;
253			remote-endpoint = <&es8316_p0_0>;
254		};
255	};
256};
257
258&mdio0 {
259	rgmii_phy: ethernet-phy@1 {
260		/* YT8531C/H */
261		compatible = "ethernet-phy-ieee802.3-c22";
262		reg = <0x1>;
263		pinctrl-names = "default";
264		pinctrl-0 = <&yt8531_rst>;
265		reset-assert-us = <20000>;
266		reset-deassert-us = <100000>;
267		reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_LOW>;
268	};
269};
270
271/* ethernet */
272&pcie2x1l2 {
273	reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>;
274	vpcie3v3-supply = <&vcc3v3_sys>;
275	pinctrl-names = "default";
276	pinctrl-0 = <&yt6801_isolate>;
277	status = "okay";
278};
279
280&pd_gpu {
281	domain-supply = <&vdd_gpu_s0>;
282};
283
284&pinctrl {
285	hym8563 {
286		hym8563_int: hym8563-int {
287			rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
288		};
289	};
290
291	yt6801 {
292		yt6801_isolate: yt6801-isolate {
293			rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
294		};
295	};
296
297	yt8531 {
298		yt8531_rst: yt8531-rst {
299			rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
300		};
301	};
302};
303
304&saradc {
305	vref-supply = <&vcc_1v8_s0>;
306	status = "okay";
307};
308
309&sdhci {
310	bus-width = <8>;
311	max-frequency = <200000000>;
312	mmc-hs400-1_8v;
313	mmc-hs400-enhanced-strobe;
314	no-sdio;
315	no-sd;
316	non-removable;
317	status = "okay";
318};
319
320&sdmmc {
321	bus-width = <4>;
322	cap-mmc-highspeed;
323	cap-sd-highspeed;
324	disable-wp;
325	max-frequency = <150000000>;
326	no-sdio;
327	no-mmc;
328	sd-uhs-sdr104;
329	vqmmc-supply = <&vccio_sd_s0>;
330	status = "okay";
331};
332
333&spi2 {
334	assigned-clocks = <&cru CLK_SPI2>;
335	assigned-clock-rates = <200000000>;
336	num-cs = <1>;
337	pinctrl-names = "default";
338	pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
339	status = "okay";
340
341	pmic@0 {
342		compatible = "rockchip,rk806";
343		reg = <0x0>;
344		interrupt-parent = <&gpio0>;
345		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
346		gpio-controller;
347		#gpio-cells = <2>;
348		pinctrl-names = "default";
349		pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
350			    <&rk806_dvs2_null>, <&rk806_dvs3_null>;
351		spi-max-frequency = <1000000>;
352		vcc1-supply = <&vcc5v0_sys>;
353		vcc2-supply = <&vcc5v0_sys>;
354		vcc3-supply = <&vcc5v0_sys>;
355		vcc4-supply = <&vcc5v0_sys>;
356		vcc5-supply = <&vcc5v0_sys>;
357		vcc6-supply = <&vcc5v0_sys>;
358		vcc7-supply = <&vcc5v0_sys>;
359		vcc8-supply = <&vcc5v0_sys>;
360		vcc9-supply = <&vcc5v0_sys>;
361		vcc10-supply = <&vcc5v0_sys>;
362		vcc11-supply = <&vcc_2v0_pldo_s3>;
363		vcc12-supply = <&vcc5v0_sys>;
364		vcc13-supply = <&vcc_2v0_pldo_s3>;
365		vcc14-supply = <&vcc_2v0_pldo_s3>;
366		vcca-supply = <&vcc5v0_sys>;
367
368		rk806_dvs1_null: dvs1-null-pins {
369			pins = "gpio_pwrctrl1";
370			function = "pin_fun0";
371		};
372
373		rk806_dvs2_null: dvs2-null-pins {
374			pins = "gpio_pwrctrl2";
375			function = "pin_fun0";
376		};
377
378		rk806_dvs3_null: dvs3-null-pins {
379			pins = "gpio_pwrctrl3";
380			function = "pin_fun0";
381		};
382
383		regulators {
384			vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
385				regulator-boot-on;
386				regulator-min-microvolt = <550000>;
387				regulator-max-microvolt = <950000>;
388				regulator-ramp-delay = <12500>;
389				regulator-name = "vdd_gpu_s0";
390				regulator-enable-ramp-delay = <400>;
391
392				regulator-state-mem {
393					regulator-off-in-suspend;
394				};
395			};
396
397			vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
398				regulator-always-on;
399				regulator-boot-on;
400				regulator-min-microvolt = <550000>;
401				regulator-max-microvolt = <950000>;
402				regulator-ramp-delay = <12500>;
403				regulator-name = "vdd_cpu_lit_s0";
404
405				regulator-state-mem {
406					regulator-off-in-suspend;
407				};
408			};
409
410			vdd_log_s0: dcdc-reg3 {
411				regulator-always-on;
412				regulator-boot-on;
413				regulator-min-microvolt = <675000>;
414				regulator-max-microvolt = <750000>;
415				regulator-ramp-delay = <12500>;
416				regulator-name = "vdd_log_s0";
417
418				regulator-state-mem {
419					regulator-off-in-suspend;
420					regulator-suspend-microvolt = <750000>;
421				};
422			};
423
424			vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
425				regulator-always-on;
426				regulator-boot-on;
427				regulator-min-microvolt = <550000>;
428				regulator-max-microvolt = <950000>;
429				regulator-ramp-delay = <12500>;
430				regulator-name = "vdd_vdenc_s0";
431
432				regulator-state-mem {
433					regulator-off-in-suspend;
434				};
435			};
436
437			vdd_ddr_s0: dcdc-reg5 {
438				regulator-always-on;
439				regulator-boot-on;
440				regulator-min-microvolt = <675000>;
441				regulator-max-microvolt = <900000>;
442				regulator-ramp-delay = <12500>;
443				regulator-name = "vdd_ddr_s0";
444
445				regulator-state-mem {
446					regulator-off-in-suspend;
447					regulator-suspend-microvolt = <850000>;
448				};
449			};
450
451			vdd2_ddr_s3: dcdc-reg6 {
452				regulator-always-on;
453				regulator-boot-on;
454				regulator-name = "vdd2_ddr_s3";
455
456				regulator-state-mem {
457					regulator-on-in-suspend;
458				};
459			};
460
461			vcc_2v0_pldo_s3: dcdc-reg7 {
462				regulator-always-on;
463				regulator-boot-on;
464				regulator-min-microvolt = <2000000>;
465				regulator-max-microvolt = <2000000>;
466				regulator-ramp-delay = <12500>;
467				regulator-name = "vdd_2v0_pldo_s3";
468
469				regulator-state-mem {
470					regulator-on-in-suspend;
471					regulator-suspend-microvolt = <2000000>;
472				};
473			};
474
475			vcc_3v3_s3: dcdc-reg8 {
476				regulator-always-on;
477				regulator-boot-on;
478				regulator-min-microvolt = <3300000>;
479				regulator-max-microvolt = <3300000>;
480				regulator-name = "vcc_3v3_s3";
481
482				regulator-state-mem {
483					regulator-on-in-suspend;
484					regulator-suspend-microvolt = <3300000>;
485				};
486			};
487
488			vddq_ddr_s0: dcdc-reg9 {
489				regulator-always-on;
490				regulator-boot-on;
491				regulator-name = "vddq_ddr_s0";
492
493				regulator-state-mem {
494					regulator-off-in-suspend;
495				};
496			};
497
498			vcc_1v8_s3: dcdc-reg10 {
499				regulator-always-on;
500				regulator-boot-on;
501				regulator-min-microvolt = <1800000>;
502				regulator-max-microvolt = <1800000>;
503				regulator-name = "vcc_1v8_s3";
504
505				regulator-state-mem {
506					regulator-on-in-suspend;
507					regulator-suspend-microvolt = <1800000>;
508				};
509			};
510
511			avcc_1v8_s0: pldo-reg1 {
512				regulator-always-on;
513				regulator-boot-on;
514				regulator-min-microvolt = <1800000>;
515				regulator-max-microvolt = <1800000>;
516				regulator-name = "avcc_1v8_s0";
517
518				regulator-state-mem {
519					regulator-off-in-suspend;
520				};
521			};
522
523			vcc_1v8_s0: pldo-reg2 {
524				regulator-always-on;
525				regulator-boot-on;
526				regulator-min-microvolt = <1800000>;
527				regulator-max-microvolt = <1800000>;
528				regulator-name = "vcc_1v8_s0";
529
530				regulator-state-mem {
531					regulator-off-in-suspend;
532					regulator-suspend-microvolt = <1800000>;
533				};
534			};
535
536			avdd_1v2_s0: pldo-reg3 {
537				regulator-always-on;
538				regulator-boot-on;
539				regulator-min-microvolt = <1200000>;
540				regulator-max-microvolt = <1200000>;
541				regulator-name = "avdd_1v2_s0";
542
543				regulator-state-mem {
544					regulator-off-in-suspend;
545				};
546			};
547
548			vcc_3v3_s0: pldo-reg4 {
549				regulator-always-on;
550				regulator-boot-on;
551				regulator-min-microvolt = <3300000>;
552				regulator-max-microvolt = <3300000>;
553				regulator-ramp-delay = <12500>;
554				regulator-name = "vcc_3v3_s0";
555
556				regulator-state-mem {
557					regulator-off-in-suspend;
558				};
559			};
560
561			vccio_sd_s0: pldo-reg5 {
562				regulator-always-on;
563				regulator-boot-on;
564				regulator-min-microvolt = <1800000>;
565				regulator-max-microvolt = <3300000>;
566				regulator-ramp-delay = <12500>;
567				regulator-name = "vccio_sd_s0";
568
569				regulator-state-mem {
570					regulator-off-in-suspend;
571				};
572			};
573
574			pldo6_s3: pldo-reg6 {
575				regulator-always-on;
576				regulator-boot-on;
577				regulator-min-microvolt = <1800000>;
578				regulator-max-microvolt = <1800000>;
579				regulator-name = "pldo6_s3";
580
581				regulator-state-mem {
582					regulator-on-in-suspend;
583					regulator-suspend-microvolt = <1800000>;
584				};
585			};
586
587			vdd_0v75_s3: nldo-reg1 {
588				regulator-always-on;
589				regulator-boot-on;
590				regulator-min-microvolt = <750000>;
591				regulator-max-microvolt = <750000>;
592				regulator-name = "vdd_0v75_s3";
593
594				regulator-state-mem {
595					regulator-on-in-suspend;
596					regulator-suspend-microvolt = <750000>;
597				};
598			};
599
600			vdd_ddr_pll_s0: nldo-reg2 {
601				regulator-always-on;
602				regulator-boot-on;
603				regulator-min-microvolt = <850000>;
604				regulator-max-microvolt = <850000>;
605				regulator-name = "vdd_ddr_pll_s0";
606
607				regulator-state-mem {
608					regulator-off-in-suspend;
609					regulator-suspend-microvolt = <850000>;
610				};
611			};
612
613			avdd_0v75_s0: nldo-reg3 {
614				regulator-always-on;
615				regulator-boot-on;
616				regulator-min-microvolt = <750000>;
617				regulator-max-microvolt = <750000>;
618				regulator-name = "avdd_0v75_s0";
619
620				regulator-state-mem {
621					regulator-off-in-suspend;
622				};
623			};
624
625			vdd_0v85_s0: nldo-reg4 {
626				regulator-always-on;
627				regulator-boot-on;
628				regulator-min-microvolt = <850000>;
629				regulator-max-microvolt = <850000>;
630				regulator-name = "vdd_0v85_s0";
631
632				regulator-state-mem {
633					regulator-off-in-suspend;
634				};
635			};
636
637			vdd_0v75_s0: nldo-reg5 {
638				regulator-always-on;
639				regulator-boot-on;
640				regulator-min-microvolt = <750000>;
641				regulator-max-microvolt = <750000>;
642				regulator-name = "vdd_0v75_s0";
643
644				regulator-state-mem {
645					regulator-off-in-suspend;
646				};
647			};
648		};
649	};
650};
651
652&tsadc {
653	status = "okay";
654};
655
656&uart2 {
657	pinctrl-0 = <&uart2m0_xfer>;
658	status = "okay";
659};
660