1// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2/* 3 * Device Tree Source for the RZ/V2L SMARC EVK board 4 * 5 * Copyright (C) 2021 Renesas Electronics Corp. 6 */ 7 8/dts-v1/; 9 10/* Enable SCIF2 (SER0) on PMOD1 (CN7) */ 11#define PMOD1_SER0 1 12 13/* 14 * To enable MTU3a PWM on PMOD0, 15 * Disable PMOD1_SER0 by setting "#define PMOD1_SER0 0" above and 16 * enable PMOD_MTU3 by setting "#define PMOD_MTU3 1" below. 17 */ 18#define PMOD_MTU3 0 19 20#if (PMOD_MTU3 && PMOD1_SER0) 21#error "Cannot set as PMOD_MTU3 and PMOD1_SER0 are mutually exclusive " 22#endif 23 24#define MTU3_COUNTER_Z_PHASE_SIGNAL 0 25#if (!PMOD_MTU3 && MTU3_COUNTER_Z_PHASE_SIGNAL) 26#error "Cannot set 1 to MTU3_COUNTER_Z_PHASE_SIGNAL as PMOD_MTU3=0" 27#endif 28 29/* 30 * To enable the GPT pins GTIOC4A(PMOD0_PIN7) and GTIOC4B(PMOD0_PIN10) on the 31 * PMOD0 connector (J1), enable PMOD0_GPT by setting "#define PMOD0_GPT 1" 32 * below. 33 */ 34#define PMOD0_GPT 0 35 36#include "r9a07g054l2.dtsi" 37#include "rzg2l-smarc-som.dtsi" 38#include "rzg2l-smarc-pinfunction.dtsi" 39#include "rz-smarc-common.dtsi" 40#include "rzg2l-smarc.dtsi" 41 42/ { 43 model = "Renesas SMARC EVK based on r9a07g054l2"; 44 compatible = "renesas,smarc-evk", "renesas,r9a07g054l2", "renesas,r9a07g054"; 45}; 46