1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the r8a774b1 SoC 4 * 5 * Copyright (C) 2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/interrupt-controller/irq.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/clock/r8a774b1-cpg-mssr.h> 11#include <dt-bindings/power/r8a774b1-sysc.h> 12 13/ { 14 compatible = "renesas,r8a774b1"; 15 #address-cells = <2>; 16 #size-cells = <2>; 17 18 /* 19 * The external audio clocks are configured as 0 Hz fixed frequency 20 * clocks by default. 21 * Boards that provide audio clocks should override them. 22 */ 23 audio_clk_a: audio_clk_a { 24 compatible = "fixed-clock"; 25 #clock-cells = <0>; 26 clock-frequency = <0>; 27 }; 28 29 audio_clk_b: audio_clk_b { 30 compatible = "fixed-clock"; 31 #clock-cells = <0>; 32 clock-frequency = <0>; 33 }; 34 35 audio_clk_c: audio_clk_c { 36 compatible = "fixed-clock"; 37 #clock-cells = <0>; 38 clock-frequency = <0>; 39 }; 40 41 /* External CAN clock - to be overridden by boards that provide it */ 42 can_clk: can { 43 compatible = "fixed-clock"; 44 #clock-cells = <0>; 45 clock-frequency = <0>; 46 }; 47 48 cluster0_opp: opp-table-0 { 49 compatible = "operating-points-v2"; 50 opp-shared; 51 52 opp-500000000 { 53 opp-hz = /bits/ 64 <500000000>; 54 opp-microvolt = <830000>; 55 clock-latency-ns = <300000>; 56 }; 57 opp-1000000000 { 58 opp-hz = /bits/ 64 <1000000000>; 59 opp-microvolt = <830000>; 60 clock-latency-ns = <300000>; 61 }; 62 opp-1500000000 { 63 opp-hz = /bits/ 64 <1500000000>; 64 opp-microvolt = <830000>; 65 clock-latency-ns = <300000>; 66 opp-suspend; 67 }; 68 }; 69 70 cpus { 71 #address-cells = <1>; 72 #size-cells = <0>; 73 74 a57_0: cpu@0 { 75 compatible = "arm,cortex-a57"; 76 reg = <0x0>; 77 device_type = "cpu"; 78 power-domains = <&sysc R8A774B1_PD_CA57_CPU0>; 79 next-level-cache = <&L2_CA57>; 80 enable-method = "psci"; 81 #cooling-cells = <2>; 82 dynamic-power-coefficient = <854>; 83 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 84 operating-points-v2 = <&cluster0_opp>; 85 }; 86 87 a57_1: cpu@1 { 88 compatible = "arm,cortex-a57"; 89 reg = <0x1>; 90 device_type = "cpu"; 91 power-domains = <&sysc R8A774B1_PD_CA57_CPU1>; 92 next-level-cache = <&L2_CA57>; 93 enable-method = "psci"; 94 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>; 95 operating-points-v2 = <&cluster0_opp>; 96 }; 97 98 L2_CA57: cache-controller-0 { 99 compatible = "cache"; 100 power-domains = <&sysc R8A774B1_PD_CA57_SCU>; 101 cache-unified; 102 cache-level = <2>; 103 }; 104 }; 105 106 extal_clk: extal { 107 compatible = "fixed-clock"; 108 #clock-cells = <0>; 109 /* This value must be overridden by the board */ 110 clock-frequency = <0>; 111 bootph-all; 112 }; 113 114 extalr_clk: extalr { 115 compatible = "fixed-clock"; 116 #clock-cells = <0>; 117 /* This value must be overridden by the board */ 118 clock-frequency = <0>; 119 bootph-all; 120 }; 121 122 /* External PCIe clock - can be overridden by the board */ 123 pcie_bus_clk: pcie_bus { 124 compatible = "fixed-clock"; 125 #clock-cells = <0>; 126 clock-frequency = <0>; 127 }; 128 129 pmu_a57 { 130 compatible = "arm,cortex-a57-pmu"; 131 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 132 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 133 interrupt-affinity = <&a57_0>, <&a57_1>; 134 }; 135 136 psci { 137 compatible = "arm,psci-1.0", "arm,psci-0.2"; 138 method = "smc"; 139 }; 140 141 /* External SCIF clock - to be overridden by boards that provide it */ 142 scif_clk: scif { 143 compatible = "fixed-clock"; 144 #clock-cells = <0>; 145 clock-frequency = <0>; 146 }; 147 148 soc { 149 compatible = "simple-bus"; 150 interrupt-parent = <&gic>; 151 bootph-all; 152 153 #address-cells = <2>; 154 #size-cells = <2>; 155 ranges; 156 157 rwdt: watchdog@e6020000 { 158 compatible = "renesas,r8a774b1-wdt", 159 "renesas,rcar-gen3-wdt"; 160 reg = <0 0xe6020000 0 0x0c>; 161 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 162 clocks = <&cpg CPG_MOD 402>; 163 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 164 resets = <&cpg 402>; 165 status = "disabled"; 166 }; 167 168 gpio0: gpio@e6050000 { 169 compatible = "renesas,gpio-r8a774b1", 170 "renesas,rcar-gen3-gpio"; 171 reg = <0 0xe6050000 0 0x50>; 172 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 173 #gpio-cells = <2>; 174 gpio-controller; 175 gpio-ranges = <&pfc 0 0 16>; 176 #interrupt-cells = <2>; 177 interrupt-controller; 178 clocks = <&cpg CPG_MOD 912>; 179 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 180 resets = <&cpg 912>; 181 }; 182 183 gpio1: gpio@e6051000 { 184 compatible = "renesas,gpio-r8a774b1", 185 "renesas,rcar-gen3-gpio"; 186 reg = <0 0xe6051000 0 0x50>; 187 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 188 #gpio-cells = <2>; 189 gpio-controller; 190 gpio-ranges = <&pfc 0 32 29>; 191 #interrupt-cells = <2>; 192 interrupt-controller; 193 clocks = <&cpg CPG_MOD 911>; 194 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 195 resets = <&cpg 911>; 196 }; 197 198 gpio2: gpio@e6052000 { 199 compatible = "renesas,gpio-r8a774b1", 200 "renesas,rcar-gen3-gpio"; 201 reg = <0 0xe6052000 0 0x50>; 202 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 203 #gpio-cells = <2>; 204 gpio-controller; 205 gpio-ranges = <&pfc 0 64 15>; 206 #interrupt-cells = <2>; 207 interrupt-controller; 208 clocks = <&cpg CPG_MOD 910>; 209 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 210 resets = <&cpg 910>; 211 }; 212 213 gpio3: gpio@e6053000 { 214 compatible = "renesas,gpio-r8a774b1", 215 "renesas,rcar-gen3-gpio"; 216 reg = <0 0xe6053000 0 0x50>; 217 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 218 #gpio-cells = <2>; 219 gpio-controller; 220 gpio-ranges = <&pfc 0 96 16>; 221 #interrupt-cells = <2>; 222 interrupt-controller; 223 clocks = <&cpg CPG_MOD 909>; 224 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 225 resets = <&cpg 909>; 226 }; 227 228 gpio4: gpio@e6054000 { 229 compatible = "renesas,gpio-r8a774b1", 230 "renesas,rcar-gen3-gpio"; 231 reg = <0 0xe6054000 0 0x50>; 232 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 233 #gpio-cells = <2>; 234 gpio-controller; 235 gpio-ranges = <&pfc 0 128 18>; 236 #interrupt-cells = <2>; 237 interrupt-controller; 238 clocks = <&cpg CPG_MOD 908>; 239 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 240 resets = <&cpg 908>; 241 }; 242 243 gpio5: gpio@e6055000 { 244 compatible = "renesas,gpio-r8a774b1", 245 "renesas,rcar-gen3-gpio"; 246 reg = <0 0xe6055000 0 0x50>; 247 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 248 #gpio-cells = <2>; 249 gpio-controller; 250 gpio-ranges = <&pfc 0 160 26>; 251 #interrupt-cells = <2>; 252 interrupt-controller; 253 clocks = <&cpg CPG_MOD 907>; 254 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 255 resets = <&cpg 907>; 256 }; 257 258 gpio6: gpio@e6055400 { 259 compatible = "renesas,gpio-r8a774b1", 260 "renesas,rcar-gen3-gpio"; 261 reg = <0 0xe6055400 0 0x50>; 262 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 263 #gpio-cells = <2>; 264 gpio-controller; 265 gpio-ranges = <&pfc 0 192 32>; 266 #interrupt-cells = <2>; 267 interrupt-controller; 268 clocks = <&cpg CPG_MOD 906>; 269 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 270 resets = <&cpg 906>; 271 }; 272 273 gpio7: gpio@e6055800 { 274 compatible = "renesas,gpio-r8a774b1", 275 "renesas,rcar-gen3-gpio"; 276 reg = <0 0xe6055800 0 0x50>; 277 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 278 #gpio-cells = <2>; 279 gpio-controller; 280 gpio-ranges = <&pfc 0 224 4>; 281 #interrupt-cells = <2>; 282 interrupt-controller; 283 clocks = <&cpg CPG_MOD 905>; 284 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 285 resets = <&cpg 905>; 286 }; 287 288 pfc: pinctrl@e6060000 { 289 compatible = "renesas,pfc-r8a774b1"; 290 reg = <0 0xe6060000 0 0x50c>; 291 bootph-all; 292 }; 293 294 cmt0: timer@e60f0000 { 295 compatible = "renesas,r8a774b1-cmt0", 296 "renesas,rcar-gen3-cmt0"; 297 reg = <0 0xe60f0000 0 0x1004>; 298 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 299 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 300 clocks = <&cpg CPG_MOD 303>; 301 clock-names = "fck"; 302 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 303 resets = <&cpg 303>; 304 status = "disabled"; 305 }; 306 307 cmt1: timer@e6130000 { 308 compatible = "renesas,r8a774b1-cmt1", 309 "renesas,rcar-gen3-cmt1"; 310 reg = <0 0xe6130000 0 0x1004>; 311 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 312 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 313 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 314 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 315 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 316 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 317 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 318 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 319 clocks = <&cpg CPG_MOD 302>; 320 clock-names = "fck"; 321 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 322 resets = <&cpg 302>; 323 status = "disabled"; 324 }; 325 326 cmt2: timer@e6140000 { 327 compatible = "renesas,r8a774b1-cmt1", 328 "renesas,rcar-gen3-cmt1"; 329 reg = <0 0xe6140000 0 0x1004>; 330 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 331 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 332 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 333 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 334 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 335 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 336 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 337 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 338 clocks = <&cpg CPG_MOD 301>; 339 clock-names = "fck"; 340 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 341 resets = <&cpg 301>; 342 status = "disabled"; 343 }; 344 345 cmt3: timer@e6148000 { 346 compatible = "renesas,r8a774b1-cmt1", 347 "renesas,rcar-gen3-cmt1"; 348 reg = <0 0xe6148000 0 0x1004>; 349 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 350 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 351 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 352 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 353 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 354 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 355 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 356 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 357 clocks = <&cpg CPG_MOD 300>; 358 clock-names = "fck"; 359 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 360 resets = <&cpg 300>; 361 status = "disabled"; 362 }; 363 364 cpg: clock-controller@e6150000 { 365 compatible = "renesas,r8a774b1-cpg-mssr"; 366 reg = <0 0xe6150000 0 0x1000>; 367 clocks = <&extal_clk>, <&extalr_clk>; 368 clock-names = "extal", "extalr"; 369 #clock-cells = <2>; 370 #power-domain-cells = <0>; 371 #reset-cells = <1>; 372 bootph-all; 373 }; 374 375 rst: reset-controller@e6160000 { 376 compatible = "renesas,r8a774b1-rst"; 377 reg = <0 0xe6160000 0 0x0200>; 378 bootph-all; 379 }; 380 381 sysc: system-controller@e6180000 { 382 compatible = "renesas,r8a774b1-sysc"; 383 reg = <0 0xe6180000 0 0x0400>; 384 #power-domain-cells = <1>; 385 }; 386 387 tsc: thermal@e6198000 { 388 compatible = "renesas,r8a774b1-thermal"; 389 reg = <0 0xe6198000 0 0x100>, 390 <0 0xe61a0000 0 0x100>, 391 <0 0xe61a8000 0 0x100>; 392 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 393 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 394 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 395 clocks = <&cpg CPG_MOD 522>; 396 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 397 resets = <&cpg 522>; 398 #thermal-sensor-cells = <1>; 399 }; 400 401 intc_ex: interrupt-controller@e61c0000 { 402 compatible = "renesas,intc-ex-r8a774b1", "renesas,irqc"; 403 #interrupt-cells = <2>; 404 interrupt-controller; 405 reg = <0 0xe61c0000 0 0x200>; 406 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 407 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 408 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 409 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 410 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 411 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 412 clocks = <&cpg CPG_MOD 407>; 413 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 414 resets = <&cpg 407>; 415 }; 416 417 tmu0: timer@e61e0000 { 418 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 419 reg = <0 0xe61e0000 0 0x30>; 420 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 421 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 422 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 423 interrupt-names = "tuni0", "tuni1", "tuni2"; 424 clocks = <&cpg CPG_MOD 125>; 425 clock-names = "fck"; 426 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 427 resets = <&cpg 125>; 428 status = "disabled"; 429 }; 430 431 tmu1: timer@e6fc0000 { 432 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 433 reg = <0 0xe6fc0000 0 0x30>; 434 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 435 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 436 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 437 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 438 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 439 clocks = <&cpg CPG_MOD 124>; 440 clock-names = "fck"; 441 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 442 resets = <&cpg 124>; 443 status = "disabled"; 444 }; 445 446 tmu2: timer@e6fd0000 { 447 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 448 reg = <0 0xe6fd0000 0 0x30>; 449 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 450 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 451 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 452 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 453 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 454 clocks = <&cpg CPG_MOD 123>; 455 clock-names = "fck"; 456 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 457 resets = <&cpg 123>; 458 status = "disabled"; 459 }; 460 461 tmu3: timer@e6fe0000 { 462 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 463 reg = <0 0xe6fe0000 0 0x30>; 464 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 465 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 466 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 467 interrupt-names = "tuni0", "tuni1", "tuni2"; 468 clocks = <&cpg CPG_MOD 122>; 469 clock-names = "fck"; 470 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 471 resets = <&cpg 122>; 472 status = "disabled"; 473 }; 474 475 tmu4: timer@ffc00000 { 476 compatible = "renesas,tmu-r8a774b1", "renesas,tmu"; 477 reg = <0 0xffc00000 0 0x30>; 478 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 481 interrupt-names = "tuni0", "tuni1", "tuni2"; 482 clocks = <&cpg CPG_MOD 121>; 483 clock-names = "fck"; 484 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 485 resets = <&cpg 121>; 486 status = "disabled"; 487 }; 488 489 i2c0: i2c@e6500000 { 490 #address-cells = <1>; 491 #size-cells = <0>; 492 compatible = "renesas,i2c-r8a774b1", 493 "renesas,rcar-gen3-i2c"; 494 reg = <0 0xe6500000 0 0x40>; 495 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 496 clocks = <&cpg CPG_MOD 931>; 497 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 498 resets = <&cpg 931>; 499 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 500 <&dmac2 0x91>, <&dmac2 0x90>; 501 dma-names = "tx", "rx", "tx", "rx"; 502 i2c-scl-internal-delay-ns = <110>; 503 status = "disabled"; 504 }; 505 506 i2c1: i2c@e6508000 { 507 #address-cells = <1>; 508 #size-cells = <0>; 509 compatible = "renesas,i2c-r8a774b1", 510 "renesas,rcar-gen3-i2c"; 511 reg = <0 0xe6508000 0 0x40>; 512 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 513 clocks = <&cpg CPG_MOD 930>; 514 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 515 resets = <&cpg 930>; 516 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 517 <&dmac2 0x93>, <&dmac2 0x92>; 518 dma-names = "tx", "rx", "tx", "rx"; 519 i2c-scl-internal-delay-ns = <6>; 520 status = "disabled"; 521 }; 522 523 i2c2: i2c@e6510000 { 524 #address-cells = <1>; 525 #size-cells = <0>; 526 compatible = "renesas,i2c-r8a774b1", 527 "renesas,rcar-gen3-i2c"; 528 reg = <0 0xe6510000 0 0x40>; 529 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 530 clocks = <&cpg CPG_MOD 929>; 531 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 532 resets = <&cpg 929>; 533 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 534 <&dmac2 0x95>, <&dmac2 0x94>; 535 dma-names = "tx", "rx", "tx", "rx"; 536 i2c-scl-internal-delay-ns = <6>; 537 status = "disabled"; 538 }; 539 540 i2c3: i2c@e66d0000 { 541 #address-cells = <1>; 542 #size-cells = <0>; 543 compatible = "renesas,i2c-r8a774b1", 544 "renesas,rcar-gen3-i2c"; 545 reg = <0 0xe66d0000 0 0x40>; 546 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 547 clocks = <&cpg CPG_MOD 928>; 548 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 549 resets = <&cpg 928>; 550 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 551 dma-names = "tx", "rx"; 552 i2c-scl-internal-delay-ns = <110>; 553 status = "disabled"; 554 }; 555 556 i2c4: i2c@e66d8000 { 557 #address-cells = <1>; 558 #size-cells = <0>; 559 compatible = "renesas,i2c-r8a774b1", 560 "renesas,rcar-gen3-i2c"; 561 reg = <0 0xe66d8000 0 0x40>; 562 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 563 clocks = <&cpg CPG_MOD 927>; 564 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 565 resets = <&cpg 927>; 566 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 567 dma-names = "tx", "rx"; 568 i2c-scl-internal-delay-ns = <110>; 569 status = "disabled"; 570 }; 571 572 i2c5: i2c@e66e0000 { 573 #address-cells = <1>; 574 #size-cells = <0>; 575 compatible = "renesas,i2c-r8a774b1", 576 "renesas,rcar-gen3-i2c"; 577 reg = <0 0xe66e0000 0 0x40>; 578 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 579 clocks = <&cpg CPG_MOD 919>; 580 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 581 resets = <&cpg 919>; 582 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 583 dma-names = "tx", "rx"; 584 i2c-scl-internal-delay-ns = <110>; 585 status = "disabled"; 586 }; 587 588 i2c6: i2c@e66e8000 { 589 #address-cells = <1>; 590 #size-cells = <0>; 591 compatible = "renesas,i2c-r8a774b1", 592 "renesas,rcar-gen3-i2c"; 593 reg = <0 0xe66e8000 0 0x40>; 594 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 595 clocks = <&cpg CPG_MOD 918>; 596 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 597 resets = <&cpg 918>; 598 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 599 dma-names = "tx", "rx"; 600 i2c-scl-internal-delay-ns = <6>; 601 status = "disabled"; 602 }; 603 604 iic_pmic: i2c@e60b0000 { 605 #address-cells = <1>; 606 #size-cells = <0>; 607 compatible = "renesas,iic-r8a774b1", 608 "renesas,rcar-gen3-iic", 609 "renesas,rmobile-iic"; 610 reg = <0 0xe60b0000 0 0x425>; 611 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 612 clocks = <&cpg CPG_MOD 926>; 613 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 614 resets = <&cpg 926>; 615 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 616 dma-names = "tx", "rx"; 617 status = "disabled"; 618 }; 619 620 hscif0: serial@e6540000 { 621 compatible = "renesas,hscif-r8a774b1", 622 "renesas,rcar-gen3-hscif", 623 "renesas,hscif"; 624 reg = <0 0xe6540000 0 0x60>; 625 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 626 clocks = <&cpg CPG_MOD 520>, 627 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 628 <&scif_clk>; 629 clock-names = "fck", "brg_int", "scif_clk"; 630 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 631 <&dmac2 0x31>, <&dmac2 0x30>; 632 dma-names = "tx", "rx", "tx", "rx"; 633 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 634 resets = <&cpg 520>; 635 status = "disabled"; 636 }; 637 638 hscif1: serial@e6550000 { 639 compatible = "renesas,hscif-r8a774b1", 640 "renesas,rcar-gen3-hscif", 641 "renesas,hscif"; 642 reg = <0 0xe6550000 0 0x60>; 643 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 644 clocks = <&cpg CPG_MOD 519>, 645 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 646 <&scif_clk>; 647 clock-names = "fck", "brg_int", "scif_clk"; 648 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 649 <&dmac2 0x33>, <&dmac2 0x32>; 650 dma-names = "tx", "rx", "tx", "rx"; 651 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 652 resets = <&cpg 519>; 653 status = "disabled"; 654 }; 655 656 hscif2: serial@e6560000 { 657 compatible = "renesas,hscif-r8a774b1", 658 "renesas,rcar-gen3-hscif", 659 "renesas,hscif"; 660 reg = <0 0xe6560000 0 0x60>; 661 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 662 clocks = <&cpg CPG_MOD 518>, 663 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 664 <&scif_clk>; 665 clock-names = "fck", "brg_int", "scif_clk"; 666 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 667 <&dmac2 0x35>, <&dmac2 0x34>; 668 dma-names = "tx", "rx", "tx", "rx"; 669 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 670 resets = <&cpg 518>; 671 status = "disabled"; 672 }; 673 674 hscif3: serial@e66a0000 { 675 compatible = "renesas,hscif-r8a774b1", 676 "renesas,rcar-gen3-hscif", 677 "renesas,hscif"; 678 reg = <0 0xe66a0000 0 0x60>; 679 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 680 clocks = <&cpg CPG_MOD 517>, 681 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 682 <&scif_clk>; 683 clock-names = "fck", "brg_int", "scif_clk"; 684 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 685 dma-names = "tx", "rx"; 686 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 687 resets = <&cpg 517>; 688 status = "disabled"; 689 }; 690 691 hscif4: serial@e66b0000 { 692 compatible = "renesas,hscif-r8a774b1", 693 "renesas,rcar-gen3-hscif", 694 "renesas,hscif"; 695 reg = <0 0xe66b0000 0 0x60>; 696 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 697 clocks = <&cpg CPG_MOD 516>, 698 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 699 <&scif_clk>; 700 clock-names = "fck", "brg_int", "scif_clk"; 701 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 702 dma-names = "tx", "rx"; 703 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 704 resets = <&cpg 516>; 705 status = "disabled"; 706 }; 707 708 hsusb: usb@e6590000 { 709 compatible = "renesas,usbhs-r8a774b1", 710 "renesas,rcar-gen3-usbhs"; 711 reg = <0 0xe6590000 0 0x200>; 712 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 713 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 714 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 715 <&usb_dmac1 0>, <&usb_dmac1 1>; 716 dma-names = "ch0", "ch1", "ch2", "ch3"; 717 renesas,buswait = <11>; 718 phys = <&usb2_phy0 3>; 719 phy-names = "usb"; 720 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 721 resets = <&cpg 704>, <&cpg 703>; 722 status = "disabled"; 723 }; 724 725 usb2_clksel: clock-controller@e6590630 { 726 compatible = "renesas,r8a774b1-rcar-usb2-clock-sel", 727 "renesas,rcar-gen3-usb2-clock-sel"; 728 reg = <0 0xe6590630 0 0x02>; 729 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, 730 <&usb_extal_clk>, <&usb3s0_clk>; 731 clock-names = "ehci_ohci", "hs-usb-if", 732 "usb_extal", "usb_xtal"; 733 #clock-cells = <0>; 734 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 735 resets = <&cpg 703>, <&cpg 704>; 736 reset-names = "ehci_ohci", "hs-usb-if"; 737 status = "disabled"; 738 }; 739 740 usb_dmac0: dma-controller@e65a0000 { 741 compatible = "renesas,r8a774b1-usb-dmac", 742 "renesas,usb-dmac"; 743 reg = <0 0xe65a0000 0 0x100>; 744 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 745 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 746 interrupt-names = "ch0", "ch1"; 747 clocks = <&cpg CPG_MOD 330>; 748 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 749 resets = <&cpg 330>; 750 #dma-cells = <1>; 751 dma-channels = <2>; 752 }; 753 754 usb_dmac1: dma-controller@e65b0000 { 755 compatible = "renesas,r8a774b1-usb-dmac", 756 "renesas,usb-dmac"; 757 reg = <0 0xe65b0000 0 0x100>; 758 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 759 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 760 interrupt-names = "ch0", "ch1"; 761 clocks = <&cpg CPG_MOD 331>; 762 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 763 resets = <&cpg 331>; 764 #dma-cells = <1>; 765 dma-channels = <2>; 766 }; 767 768 usb3_phy0: usb-phy@e65ee000 { 769 compatible = "renesas,r8a774b1-usb3-phy", 770 "renesas,rcar-gen3-usb3-phy"; 771 reg = <0 0xe65ee000 0 0x90>; 772 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 773 <&usb_extal_clk>; 774 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 775 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 776 resets = <&cpg 328>; 777 #phy-cells = <0>; 778 status = "disabled"; 779 }; 780 781 dmac0: dma-controller@e6700000 { 782 compatible = "renesas,dmac-r8a774b1", 783 "renesas,rcar-dmac"; 784 reg = <0 0xe6700000 0 0x10000>; 785 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 796 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 797 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 798 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 799 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 800 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 801 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 802 interrupt-names = "error", 803 "ch0", "ch1", "ch2", "ch3", 804 "ch4", "ch5", "ch6", "ch7", 805 "ch8", "ch9", "ch10", "ch11", 806 "ch12", "ch13", "ch14", "ch15"; 807 clocks = <&cpg CPG_MOD 219>; 808 clock-names = "fck"; 809 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 810 resets = <&cpg 219>; 811 #dma-cells = <1>; 812 dma-channels = <16>; 813 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 814 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 815 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 816 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 817 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 818 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 819 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 820 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 821 }; 822 823 dmac1: dma-controller@e7300000 { 824 compatible = "renesas,dmac-r8a774b1", 825 "renesas,rcar-dmac"; 826 reg = <0 0xe7300000 0 0x10000>; 827 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 828 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 829 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 830 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 831 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 832 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 833 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 834 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 835 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 836 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 837 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 838 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 839 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 840 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 841 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 842 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 843 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 844 interrupt-names = "error", 845 "ch0", "ch1", "ch2", "ch3", 846 "ch4", "ch5", "ch6", "ch7", 847 "ch8", "ch9", "ch10", "ch11", 848 "ch12", "ch13", "ch14", "ch15"; 849 clocks = <&cpg CPG_MOD 218>; 850 clock-names = "fck"; 851 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 852 resets = <&cpg 218>; 853 #dma-cells = <1>; 854 dma-channels = <16>; 855 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 856 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 857 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 858 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 859 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 860 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 861 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 862 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 863 }; 864 865 dmac2: dma-controller@e7310000 { 866 compatible = "renesas,dmac-r8a774b1", 867 "renesas,rcar-dmac"; 868 reg = <0 0xe7310000 0 0x10000>; 869 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 870 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 871 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 872 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 873 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 874 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 875 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 876 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 877 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 878 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 879 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 880 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 881 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 882 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 883 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 884 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 885 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 886 interrupt-names = "error", 887 "ch0", "ch1", "ch2", "ch3", 888 "ch4", "ch5", "ch6", "ch7", 889 "ch8", "ch9", "ch10", "ch11", 890 "ch12", "ch13", "ch14", "ch15"; 891 clocks = <&cpg CPG_MOD 217>; 892 clock-names = "fck"; 893 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 894 resets = <&cpg 217>; 895 #dma-cells = <1>; 896 dma-channels = <16>; 897 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 898 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 899 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 900 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 901 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 902 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 903 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 904 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 905 }; 906 907 ipmmu_ds0: iommu@e6740000 { 908 compatible = "renesas,ipmmu-r8a774b1"; 909 reg = <0 0xe6740000 0 0x1000>; 910 renesas,ipmmu-main = <&ipmmu_mm 0>; 911 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 912 #iommu-cells = <1>; 913 }; 914 915 ipmmu_ds1: iommu@e7740000 { 916 compatible = "renesas,ipmmu-r8a774b1"; 917 reg = <0 0xe7740000 0 0x1000>; 918 renesas,ipmmu-main = <&ipmmu_mm 1>; 919 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 920 #iommu-cells = <1>; 921 }; 922 923 ipmmu_hc: iommu@e6570000 { 924 compatible = "renesas,ipmmu-r8a774b1"; 925 reg = <0 0xe6570000 0 0x1000>; 926 renesas,ipmmu-main = <&ipmmu_mm 2>; 927 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 928 #iommu-cells = <1>; 929 }; 930 931 ipmmu_mm: iommu@e67b0000 { 932 compatible = "renesas,ipmmu-r8a774b1"; 933 reg = <0 0xe67b0000 0 0x1000>; 934 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 935 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 936 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 937 #iommu-cells = <1>; 938 }; 939 940 ipmmu_mp: iommu@ec670000 { 941 compatible = "renesas,ipmmu-r8a774b1"; 942 reg = <0 0xec670000 0 0x1000>; 943 renesas,ipmmu-main = <&ipmmu_mm 4>; 944 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 945 #iommu-cells = <1>; 946 }; 947 948 ipmmu_pv0: iommu@fd800000 { 949 compatible = "renesas,ipmmu-r8a774b1"; 950 reg = <0 0xfd800000 0 0x1000>; 951 renesas,ipmmu-main = <&ipmmu_mm 6>; 952 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 953 #iommu-cells = <1>; 954 }; 955 956 ipmmu_vc0: iommu@fe6b0000 { 957 compatible = "renesas,ipmmu-r8a774b1"; 958 reg = <0 0xfe6b0000 0 0x1000>; 959 renesas,ipmmu-main = <&ipmmu_mm 12>; 960 power-domains = <&sysc R8A774B1_PD_A3VC>; 961 #iommu-cells = <1>; 962 }; 963 964 ipmmu_vi0: iommu@febd0000 { 965 compatible = "renesas,ipmmu-r8a774b1"; 966 reg = <0 0xfebd0000 0 0x1000>; 967 renesas,ipmmu-main = <&ipmmu_mm 14>; 968 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 969 #iommu-cells = <1>; 970 }; 971 972 ipmmu_vp0: iommu@fe990000 { 973 compatible = "renesas,ipmmu-r8a774b1"; 974 reg = <0 0xfe990000 0 0x1000>; 975 renesas,ipmmu-main = <&ipmmu_mm 16>; 976 power-domains = <&sysc R8A774B1_PD_A3VP>; 977 #iommu-cells = <1>; 978 }; 979 980 avb: ethernet@e6800000 { 981 compatible = "renesas,etheravb-r8a774b1", 982 "renesas,etheravb-rcar-gen3"; 983 reg = <0 0xe6800000 0 0x800>; 984 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 985 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 986 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1003 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1004 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1005 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1006 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1007 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1008 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1009 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1010 "ch4", "ch5", "ch6", "ch7", 1011 "ch8", "ch9", "ch10", "ch11", 1012 "ch12", "ch13", "ch14", "ch15", 1013 "ch16", "ch17", "ch18", "ch19", 1014 "ch20", "ch21", "ch22", "ch23", 1015 "ch24"; 1016 clocks = <&cpg CPG_MOD 812>; 1017 clock-names = "fck"; 1018 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1019 resets = <&cpg 812>; 1020 phy-mode = "rgmii"; 1021 rx-internal-delay-ps = <0>; 1022 tx-internal-delay-ps = <0>; 1023 iommus = <&ipmmu_ds0 16>; 1024 #address-cells = <1>; 1025 #size-cells = <0>; 1026 status = "disabled"; 1027 }; 1028 1029 can0: can@e6c30000 { 1030 compatible = "renesas,can-r8a774b1", 1031 "renesas,rcar-gen3-can"; 1032 reg = <0 0xe6c30000 0 0x1000>; 1033 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1034 clocks = <&cpg CPG_MOD 916>, 1035 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1036 <&can_clk>; 1037 clock-names = "clkp1", "clkp2", "can_clk"; 1038 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1039 assigned-clock-rates = <40000000>; 1040 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1041 resets = <&cpg 916>; 1042 status = "disabled"; 1043 }; 1044 1045 can1: can@e6c38000 { 1046 compatible = "renesas,can-r8a774b1", 1047 "renesas,rcar-gen3-can"; 1048 reg = <0 0xe6c38000 0 0x1000>; 1049 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1050 clocks = <&cpg CPG_MOD 915>, 1051 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1052 <&can_clk>; 1053 clock-names = "clkp1", "clkp2", "can_clk"; 1054 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1055 assigned-clock-rates = <40000000>; 1056 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1057 resets = <&cpg 915>; 1058 status = "disabled"; 1059 }; 1060 1061 canfd: can@e66c0000 { 1062 compatible = "renesas,r8a774b1-canfd", 1063 "renesas,rcar-gen3-canfd"; 1064 reg = <0 0xe66c0000 0 0x8000>; 1065 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1066 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1067 interrupt-names = "ch_int", "g_int"; 1068 clocks = <&cpg CPG_MOD 914>, 1069 <&cpg CPG_CORE R8A774B1_CLK_CANFD>, 1070 <&can_clk>; 1071 clock-names = "fck", "canfd", "can_clk"; 1072 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>; 1073 assigned-clock-rates = <40000000>; 1074 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1075 resets = <&cpg 914>; 1076 status = "disabled"; 1077 1078 channel0 { 1079 status = "disabled"; 1080 }; 1081 1082 channel1 { 1083 status = "disabled"; 1084 }; 1085 }; 1086 1087 pwm0: pwm@e6e30000 { 1088 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1089 reg = <0 0xe6e30000 0 0x8>; 1090 #pwm-cells = <2>; 1091 clocks = <&cpg CPG_MOD 523>; 1092 resets = <&cpg 523>; 1093 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1094 status = "disabled"; 1095 }; 1096 1097 pwm1: pwm@e6e31000 { 1098 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1099 reg = <0 0xe6e31000 0 0x8>; 1100 #pwm-cells = <2>; 1101 clocks = <&cpg CPG_MOD 523>; 1102 resets = <&cpg 523>; 1103 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1104 status = "disabled"; 1105 }; 1106 1107 pwm2: pwm@e6e32000 { 1108 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1109 reg = <0 0xe6e32000 0 0x8>; 1110 #pwm-cells = <2>; 1111 clocks = <&cpg CPG_MOD 523>; 1112 resets = <&cpg 523>; 1113 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1114 status = "disabled"; 1115 }; 1116 1117 pwm3: pwm@e6e33000 { 1118 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1119 reg = <0 0xe6e33000 0 0x8>; 1120 #pwm-cells = <2>; 1121 clocks = <&cpg CPG_MOD 523>; 1122 resets = <&cpg 523>; 1123 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1124 status = "disabled"; 1125 }; 1126 1127 pwm4: pwm@e6e34000 { 1128 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1129 reg = <0 0xe6e34000 0 0x8>; 1130 #pwm-cells = <2>; 1131 clocks = <&cpg CPG_MOD 523>; 1132 resets = <&cpg 523>; 1133 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1134 status = "disabled"; 1135 }; 1136 1137 pwm5: pwm@e6e35000 { 1138 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1139 reg = <0 0xe6e35000 0 0x8>; 1140 #pwm-cells = <2>; 1141 clocks = <&cpg CPG_MOD 523>; 1142 resets = <&cpg 523>; 1143 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1144 status = "disabled"; 1145 }; 1146 1147 pwm6: pwm@e6e36000 { 1148 compatible = "renesas,pwm-r8a774b1", "renesas,pwm-rcar"; 1149 reg = <0 0xe6e36000 0 0x8>; 1150 #pwm-cells = <2>; 1151 clocks = <&cpg CPG_MOD 523>; 1152 resets = <&cpg 523>; 1153 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1154 status = "disabled"; 1155 }; 1156 1157 scif0: serial@e6e60000 { 1158 compatible = "renesas,scif-r8a774b1", 1159 "renesas,rcar-gen3-scif", "renesas,scif"; 1160 reg = <0 0xe6e60000 0 0x40>; 1161 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1162 clocks = <&cpg CPG_MOD 207>, 1163 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1164 <&scif_clk>; 1165 clock-names = "fck", "brg_int", "scif_clk"; 1166 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1167 <&dmac2 0x51>, <&dmac2 0x50>; 1168 dma-names = "tx", "rx", "tx", "rx"; 1169 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1170 resets = <&cpg 207>; 1171 status = "disabled"; 1172 }; 1173 1174 scif1: serial@e6e68000 { 1175 compatible = "renesas,scif-r8a774b1", 1176 "renesas,rcar-gen3-scif", "renesas,scif"; 1177 reg = <0 0xe6e68000 0 0x40>; 1178 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1179 clocks = <&cpg CPG_MOD 206>, 1180 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1181 <&scif_clk>; 1182 clock-names = "fck", "brg_int", "scif_clk"; 1183 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1184 <&dmac2 0x53>, <&dmac2 0x52>; 1185 dma-names = "tx", "rx", "tx", "rx"; 1186 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1187 resets = <&cpg 206>; 1188 status = "disabled"; 1189 }; 1190 1191 scif2: serial@e6e88000 { 1192 compatible = "renesas,scif-r8a774b1", 1193 "renesas,rcar-gen3-scif", "renesas,scif"; 1194 reg = <0 0xe6e88000 0 0x40>; 1195 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1196 clocks = <&cpg CPG_MOD 310>, 1197 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1198 <&scif_clk>; 1199 clock-names = "fck", "brg_int", "scif_clk"; 1200 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1201 <&dmac2 0x13>, <&dmac2 0x12>; 1202 dma-names = "tx", "rx", "tx", "rx"; 1203 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1204 resets = <&cpg 310>; 1205 status = "disabled"; 1206 }; 1207 1208 scif3: serial@e6c50000 { 1209 compatible = "renesas,scif-r8a774b1", 1210 "renesas,rcar-gen3-scif", "renesas,scif"; 1211 reg = <0 0xe6c50000 0 0x40>; 1212 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1213 clocks = <&cpg CPG_MOD 204>, 1214 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1215 <&scif_clk>; 1216 clock-names = "fck", "brg_int", "scif_clk"; 1217 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1218 dma-names = "tx", "rx"; 1219 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1220 resets = <&cpg 204>; 1221 status = "disabled"; 1222 }; 1223 1224 scif4: serial@e6c40000 { 1225 compatible = "renesas,scif-r8a774b1", 1226 "renesas,rcar-gen3-scif", "renesas,scif"; 1227 reg = <0 0xe6c40000 0 0x40>; 1228 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1229 clocks = <&cpg CPG_MOD 203>, 1230 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1231 <&scif_clk>; 1232 clock-names = "fck", "brg_int", "scif_clk"; 1233 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1234 dma-names = "tx", "rx"; 1235 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1236 resets = <&cpg 203>; 1237 status = "disabled"; 1238 }; 1239 1240 scif5: serial@e6f30000 { 1241 compatible = "renesas,scif-r8a774b1", 1242 "renesas,rcar-gen3-scif", "renesas,scif"; 1243 reg = <0 0xe6f30000 0 0x40>; 1244 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1245 clocks = <&cpg CPG_MOD 202>, 1246 <&cpg CPG_CORE R8A774B1_CLK_S3D1>, 1247 <&scif_clk>; 1248 clock-names = "fck", "brg_int", "scif_clk"; 1249 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1250 <&dmac2 0x5b>, <&dmac2 0x5a>; 1251 dma-names = "tx", "rx", "tx", "rx"; 1252 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1253 resets = <&cpg 202>; 1254 status = "disabled"; 1255 }; 1256 1257 msiof0: spi@e6e90000 { 1258 compatible = "renesas,msiof-r8a774b1", 1259 "renesas,rcar-gen3-msiof"; 1260 reg = <0 0xe6e90000 0 0x0064>; 1261 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1262 clocks = <&cpg CPG_MOD 211>; 1263 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1264 <&dmac2 0x41>, <&dmac2 0x40>; 1265 dma-names = "tx", "rx", "tx", "rx"; 1266 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1267 resets = <&cpg 211>; 1268 #address-cells = <1>; 1269 #size-cells = <0>; 1270 status = "disabled"; 1271 }; 1272 1273 msiof1: spi@e6ea0000 { 1274 compatible = "renesas,msiof-r8a774b1", 1275 "renesas,rcar-gen3-msiof"; 1276 reg = <0 0xe6ea0000 0 0x0064>; 1277 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1278 clocks = <&cpg CPG_MOD 210>; 1279 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1280 <&dmac2 0x43>, <&dmac2 0x42>; 1281 dma-names = "tx", "rx", "tx", "rx"; 1282 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1283 resets = <&cpg 210>; 1284 #address-cells = <1>; 1285 #size-cells = <0>; 1286 status = "disabled"; 1287 }; 1288 1289 msiof2: spi@e6c00000 { 1290 compatible = "renesas,msiof-r8a774b1", 1291 "renesas,rcar-gen3-msiof"; 1292 reg = <0 0xe6c00000 0 0x0064>; 1293 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1294 clocks = <&cpg CPG_MOD 209>; 1295 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1296 dma-names = "tx", "rx"; 1297 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1298 resets = <&cpg 209>; 1299 #address-cells = <1>; 1300 #size-cells = <0>; 1301 status = "disabled"; 1302 }; 1303 1304 msiof3: spi@e6c10000 { 1305 compatible = "renesas,msiof-r8a774b1", 1306 "renesas,rcar-gen3-msiof"; 1307 reg = <0 0xe6c10000 0 0x0064>; 1308 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1309 clocks = <&cpg CPG_MOD 208>; 1310 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1311 dma-names = "tx", "rx"; 1312 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1313 resets = <&cpg 208>; 1314 #address-cells = <1>; 1315 #size-cells = <0>; 1316 status = "disabled"; 1317 }; 1318 1319 vin0: video@e6ef0000 { 1320 compatible = "renesas,vin-r8a774b1"; 1321 reg = <0 0xe6ef0000 0 0x1000>; 1322 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1323 clocks = <&cpg CPG_MOD 811>; 1324 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1325 resets = <&cpg 811>; 1326 renesas,id = <0>; 1327 status = "disabled"; 1328 1329 ports { 1330 #address-cells = <1>; 1331 #size-cells = <0>; 1332 1333 port@1 { 1334 #address-cells = <1>; 1335 #size-cells = <0>; 1336 1337 reg = <1>; 1338 1339 vin0csi20: endpoint@0 { 1340 reg = <0>; 1341 remote-endpoint = <&csi20vin0>; 1342 }; 1343 vin0csi40: endpoint@2 { 1344 reg = <2>; 1345 remote-endpoint = <&csi40vin0>; 1346 }; 1347 }; 1348 }; 1349 }; 1350 1351 vin1: video@e6ef1000 { 1352 compatible = "renesas,vin-r8a774b1"; 1353 reg = <0 0xe6ef1000 0 0x1000>; 1354 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1355 clocks = <&cpg CPG_MOD 810>; 1356 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1357 resets = <&cpg 810>; 1358 renesas,id = <1>; 1359 status = "disabled"; 1360 1361 ports { 1362 #address-cells = <1>; 1363 #size-cells = <0>; 1364 1365 port@1 { 1366 #address-cells = <1>; 1367 #size-cells = <0>; 1368 1369 reg = <1>; 1370 1371 vin1csi20: endpoint@0 { 1372 reg = <0>; 1373 remote-endpoint = <&csi20vin1>; 1374 }; 1375 vin1csi40: endpoint@2 { 1376 reg = <2>; 1377 remote-endpoint = <&csi40vin1>; 1378 }; 1379 }; 1380 }; 1381 }; 1382 1383 vin2: video@e6ef2000 { 1384 compatible = "renesas,vin-r8a774b1"; 1385 reg = <0 0xe6ef2000 0 0x1000>; 1386 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1387 clocks = <&cpg CPG_MOD 809>; 1388 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1389 resets = <&cpg 809>; 1390 renesas,id = <2>; 1391 status = "disabled"; 1392 1393 ports { 1394 #address-cells = <1>; 1395 #size-cells = <0>; 1396 1397 port@1 { 1398 #address-cells = <1>; 1399 #size-cells = <0>; 1400 1401 reg = <1>; 1402 1403 vin2csi20: endpoint@0 { 1404 reg = <0>; 1405 remote-endpoint = <&csi20vin2>; 1406 }; 1407 vin2csi40: endpoint@2 { 1408 reg = <2>; 1409 remote-endpoint = <&csi40vin2>; 1410 }; 1411 }; 1412 }; 1413 }; 1414 1415 vin3: video@e6ef3000 { 1416 compatible = "renesas,vin-r8a774b1"; 1417 reg = <0 0xe6ef3000 0 0x1000>; 1418 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1419 clocks = <&cpg CPG_MOD 808>; 1420 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1421 resets = <&cpg 808>; 1422 renesas,id = <3>; 1423 status = "disabled"; 1424 1425 ports { 1426 #address-cells = <1>; 1427 #size-cells = <0>; 1428 1429 port@1 { 1430 #address-cells = <1>; 1431 #size-cells = <0>; 1432 1433 reg = <1>; 1434 1435 vin3csi20: endpoint@0 { 1436 reg = <0>; 1437 remote-endpoint = <&csi20vin3>; 1438 }; 1439 vin3csi40: endpoint@2 { 1440 reg = <2>; 1441 remote-endpoint = <&csi40vin3>; 1442 }; 1443 }; 1444 }; 1445 }; 1446 1447 vin4: video@e6ef4000 { 1448 compatible = "renesas,vin-r8a774b1"; 1449 reg = <0 0xe6ef4000 0 0x1000>; 1450 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1451 clocks = <&cpg CPG_MOD 807>; 1452 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1453 resets = <&cpg 807>; 1454 renesas,id = <4>; 1455 status = "disabled"; 1456 1457 ports { 1458 #address-cells = <1>; 1459 #size-cells = <0>; 1460 1461 port@1 { 1462 #address-cells = <1>; 1463 #size-cells = <0>; 1464 1465 reg = <1>; 1466 1467 vin4csi20: endpoint@0 { 1468 reg = <0>; 1469 remote-endpoint = <&csi20vin4>; 1470 }; 1471 vin4csi40: endpoint@2 { 1472 reg = <2>; 1473 remote-endpoint = <&csi40vin4>; 1474 }; 1475 }; 1476 }; 1477 }; 1478 1479 vin5: video@e6ef5000 { 1480 compatible = "renesas,vin-r8a774b1"; 1481 reg = <0 0xe6ef5000 0 0x1000>; 1482 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1483 clocks = <&cpg CPG_MOD 806>; 1484 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1485 resets = <&cpg 806>; 1486 renesas,id = <5>; 1487 status = "disabled"; 1488 1489 ports { 1490 #address-cells = <1>; 1491 #size-cells = <0>; 1492 1493 port@1 { 1494 #address-cells = <1>; 1495 #size-cells = <0>; 1496 1497 reg = <1>; 1498 1499 vin5csi20: endpoint@0 { 1500 reg = <0>; 1501 remote-endpoint = <&csi20vin5>; 1502 }; 1503 vin5csi40: endpoint@2 { 1504 reg = <2>; 1505 remote-endpoint = <&csi40vin5>; 1506 }; 1507 }; 1508 }; 1509 }; 1510 1511 vin6: video@e6ef6000 { 1512 compatible = "renesas,vin-r8a774b1"; 1513 reg = <0 0xe6ef6000 0 0x1000>; 1514 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1515 clocks = <&cpg CPG_MOD 805>; 1516 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1517 resets = <&cpg 805>; 1518 renesas,id = <6>; 1519 status = "disabled"; 1520 1521 ports { 1522 #address-cells = <1>; 1523 #size-cells = <0>; 1524 1525 port@1 { 1526 #address-cells = <1>; 1527 #size-cells = <0>; 1528 1529 reg = <1>; 1530 1531 vin6csi20: endpoint@0 { 1532 reg = <0>; 1533 remote-endpoint = <&csi20vin6>; 1534 }; 1535 vin6csi40: endpoint@2 { 1536 reg = <2>; 1537 remote-endpoint = <&csi40vin6>; 1538 }; 1539 }; 1540 }; 1541 }; 1542 1543 vin7: video@e6ef7000 { 1544 compatible = "renesas,vin-r8a774b1"; 1545 reg = <0 0xe6ef7000 0 0x1000>; 1546 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1547 clocks = <&cpg CPG_MOD 804>; 1548 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1549 resets = <&cpg 804>; 1550 renesas,id = <7>; 1551 status = "disabled"; 1552 1553 ports { 1554 #address-cells = <1>; 1555 #size-cells = <0>; 1556 1557 port@1 { 1558 #address-cells = <1>; 1559 #size-cells = <0>; 1560 1561 reg = <1>; 1562 1563 vin7csi20: endpoint@0 { 1564 reg = <0>; 1565 remote-endpoint = <&csi20vin7>; 1566 }; 1567 vin7csi40: endpoint@2 { 1568 reg = <2>; 1569 remote-endpoint = <&csi40vin7>; 1570 }; 1571 }; 1572 }; 1573 }; 1574 1575 rcar_sound: sound@ec500000 { 1576 /* 1577 * #sound-dai-cells is required if simple-card 1578 * 1579 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1580 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1581 */ 1582 /* 1583 * #clock-cells is required for audio_clkout0/1/2/3 1584 * 1585 * clkout : #clock-cells = <0>; <&rcar_sound>; 1586 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1587 */ 1588 compatible = "renesas,rcar_sound-r8a774b1", "renesas,rcar_sound-gen3"; 1589 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1590 <0 0xec5a0000 0 0x100>, /* ADG */ 1591 <0 0xec540000 0 0x1000>, /* SSIU */ 1592 <0 0xec541000 0 0x280>, /* SSI */ 1593 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1594 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1595 1596 clocks = <&cpg CPG_MOD 1005>, 1597 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1598 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1599 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1600 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1601 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1602 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1603 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1604 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1605 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1606 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1607 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1608 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1609 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1610 <&audio_clk_a>, <&audio_clk_b>, 1611 <&audio_clk_c>, 1612 <&cpg CPG_MOD 922>; 1613 clock-names = "ssi-all", 1614 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1615 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1616 "ssi.1", "ssi.0", 1617 "src.9", "src.8", "src.7", "src.6", 1618 "src.5", "src.4", "src.3", "src.2", 1619 "src.1", "src.0", 1620 "mix.1", "mix.0", 1621 "ctu.1", "ctu.0", 1622 "dvc.0", "dvc.1", 1623 "clk_a", "clk_b", "clk_c", "clk_i"; 1624 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 1625 resets = <&cpg 1005>, 1626 <&cpg 1006>, <&cpg 1007>, 1627 <&cpg 1008>, <&cpg 1009>, 1628 <&cpg 1010>, <&cpg 1011>, 1629 <&cpg 1012>, <&cpg 1013>, 1630 <&cpg 1014>, <&cpg 1015>; 1631 reset-names = "ssi-all", 1632 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1633 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1634 "ssi.1", "ssi.0"; 1635 status = "disabled"; 1636 1637 rcar_sound,ctu { 1638 ctu00: ctu-0 { }; 1639 ctu01: ctu-1 { }; 1640 ctu02: ctu-2 { }; 1641 ctu03: ctu-3 { }; 1642 ctu10: ctu-4 { }; 1643 ctu11: ctu-5 { }; 1644 ctu12: ctu-6 { }; 1645 ctu13: ctu-7 { }; 1646 }; 1647 1648 rcar_sound,dvc { 1649 dvc0: dvc-0 { 1650 dmas = <&audma1 0xbc>; 1651 dma-names = "tx"; 1652 }; 1653 dvc1: dvc-1 { 1654 dmas = <&audma1 0xbe>; 1655 dma-names = "tx"; 1656 }; 1657 }; 1658 1659 rcar_sound,mix { 1660 mix0: mix-0 { }; 1661 mix1: mix-1 { }; 1662 }; 1663 1664 rcar_sound,src { 1665 src0: src-0 { 1666 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1667 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1668 dma-names = "rx", "tx"; 1669 }; 1670 src1: src-1 { 1671 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1672 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1673 dma-names = "rx", "tx"; 1674 }; 1675 src2: src-2 { 1676 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1677 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1678 dma-names = "rx", "tx"; 1679 }; 1680 src3: src-3 { 1681 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1682 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1683 dma-names = "rx", "tx"; 1684 }; 1685 src4: src-4 { 1686 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1687 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1688 dma-names = "rx", "tx"; 1689 }; 1690 src5: src-5 { 1691 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1692 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1693 dma-names = "rx", "tx"; 1694 }; 1695 src6: src-6 { 1696 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1697 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1698 dma-names = "rx", "tx"; 1699 }; 1700 src7: src-7 { 1701 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1702 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1703 dma-names = "rx", "tx"; 1704 }; 1705 src8: src-8 { 1706 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1707 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1708 dma-names = "rx", "tx"; 1709 }; 1710 src9: src-9 { 1711 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1712 dmas = <&audma0 0x97>, <&audma1 0xba>; 1713 dma-names = "rx", "tx"; 1714 }; 1715 }; 1716 1717 rcar_sound,ssi { 1718 ssi0: ssi-0 { 1719 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1720 dmas = <&audma0 0x01>, <&audma1 0x02>; 1721 dma-names = "rx", "tx"; 1722 }; 1723 ssi1: ssi-1 { 1724 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1725 dmas = <&audma0 0x03>, <&audma1 0x04>; 1726 dma-names = "rx", "tx"; 1727 }; 1728 ssi2: ssi-2 { 1729 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1730 dmas = <&audma0 0x05>, <&audma1 0x06>; 1731 dma-names = "rx", "tx"; 1732 }; 1733 ssi3: ssi-3 { 1734 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1735 dmas = <&audma0 0x07>, <&audma1 0x08>; 1736 dma-names = "rx", "tx"; 1737 }; 1738 ssi4: ssi-4 { 1739 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1740 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1741 dma-names = "rx", "tx"; 1742 }; 1743 ssi5: ssi-5 { 1744 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1745 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1746 dma-names = "rx", "tx"; 1747 }; 1748 ssi6: ssi-6 { 1749 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1750 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1751 dma-names = "rx", "tx"; 1752 }; 1753 ssi7: ssi-7 { 1754 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1755 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1756 dma-names = "rx", "tx"; 1757 }; 1758 ssi8: ssi-8 { 1759 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1760 dmas = <&audma0 0x11>, <&audma1 0x12>; 1761 dma-names = "rx", "tx"; 1762 }; 1763 ssi9: ssi-9 { 1764 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1765 dmas = <&audma0 0x13>, <&audma1 0x14>; 1766 dma-names = "rx", "tx"; 1767 }; 1768 }; 1769 1770 rcar_sound,ssiu { 1771 ssiu00: ssiu-0 { 1772 dmas = <&audma0 0x15>, <&audma1 0x16>; 1773 dma-names = "rx", "tx"; 1774 }; 1775 ssiu01: ssiu-1 { 1776 dmas = <&audma0 0x35>, <&audma1 0x36>; 1777 dma-names = "rx", "tx"; 1778 }; 1779 ssiu02: ssiu-2 { 1780 dmas = <&audma0 0x37>, <&audma1 0x38>; 1781 dma-names = "rx", "tx"; 1782 }; 1783 ssiu03: ssiu-3 { 1784 dmas = <&audma0 0x47>, <&audma1 0x48>; 1785 dma-names = "rx", "tx"; 1786 }; 1787 ssiu04: ssiu-4 { 1788 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1789 dma-names = "rx", "tx"; 1790 }; 1791 ssiu05: ssiu-5 { 1792 dmas = <&audma0 0x43>, <&audma1 0x44>; 1793 dma-names = "rx", "tx"; 1794 }; 1795 ssiu06: ssiu-6 { 1796 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1797 dma-names = "rx", "tx"; 1798 }; 1799 ssiu07: ssiu-7 { 1800 dmas = <&audma0 0x53>, <&audma1 0x54>; 1801 dma-names = "rx", "tx"; 1802 }; 1803 ssiu10: ssiu-8 { 1804 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1805 dma-names = "rx", "tx"; 1806 }; 1807 ssiu11: ssiu-9 { 1808 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1809 dma-names = "rx", "tx"; 1810 }; 1811 ssiu12: ssiu-10 { 1812 dmas = <&audma0 0x57>, <&audma1 0x58>; 1813 dma-names = "rx", "tx"; 1814 }; 1815 ssiu13: ssiu-11 { 1816 dmas = <&audma0 0x59>, <&audma1 0x5A>; 1817 dma-names = "rx", "tx"; 1818 }; 1819 ssiu14: ssiu-12 { 1820 dmas = <&audma0 0x5F>, <&audma1 0x60>; 1821 dma-names = "rx", "tx"; 1822 }; 1823 ssiu15: ssiu-13 { 1824 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 1825 dma-names = "rx", "tx"; 1826 }; 1827 ssiu16: ssiu-14 { 1828 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 1829 dma-names = "rx", "tx"; 1830 }; 1831 ssiu17: ssiu-15 { 1832 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 1833 dma-names = "rx", "tx"; 1834 }; 1835 ssiu20: ssiu-16 { 1836 dmas = <&audma0 0x63>, <&audma1 0x64>; 1837 dma-names = "rx", "tx"; 1838 }; 1839 ssiu21: ssiu-17 { 1840 dmas = <&audma0 0x67>, <&audma1 0x68>; 1841 dma-names = "rx", "tx"; 1842 }; 1843 ssiu22: ssiu-18 { 1844 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 1845 dma-names = "rx", "tx"; 1846 }; 1847 ssiu23: ssiu-19 { 1848 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 1849 dma-names = "rx", "tx"; 1850 }; 1851 ssiu24: ssiu-20 { 1852 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 1853 dma-names = "rx", "tx"; 1854 }; 1855 ssiu25: ssiu-21 { 1856 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 1857 dma-names = "rx", "tx"; 1858 }; 1859 ssiu26: ssiu-22 { 1860 dmas = <&audma0 0xED>, <&audma1 0xEE>; 1861 dma-names = "rx", "tx"; 1862 }; 1863 ssiu27: ssiu-23 { 1864 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 1865 dma-names = "rx", "tx"; 1866 }; 1867 ssiu30: ssiu-24 { 1868 dmas = <&audma0 0x6f>, <&audma1 0x70>; 1869 dma-names = "rx", "tx"; 1870 }; 1871 ssiu31: ssiu-25 { 1872 dmas = <&audma0 0x21>, <&audma1 0x22>; 1873 dma-names = "rx", "tx"; 1874 }; 1875 ssiu32: ssiu-26 { 1876 dmas = <&audma0 0x23>, <&audma1 0x24>; 1877 dma-names = "rx", "tx"; 1878 }; 1879 ssiu33: ssiu-27 { 1880 dmas = <&audma0 0x25>, <&audma1 0x26>; 1881 dma-names = "rx", "tx"; 1882 }; 1883 ssiu34: ssiu-28 { 1884 dmas = <&audma0 0x27>, <&audma1 0x28>; 1885 dma-names = "rx", "tx"; 1886 }; 1887 ssiu35: ssiu-29 { 1888 dmas = <&audma0 0x29>, <&audma1 0x2A>; 1889 dma-names = "rx", "tx"; 1890 }; 1891 ssiu36: ssiu-30 { 1892 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 1893 dma-names = "rx", "tx"; 1894 }; 1895 ssiu37: ssiu-31 { 1896 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 1897 dma-names = "rx", "tx"; 1898 }; 1899 ssiu40: ssiu-32 { 1900 dmas = <&audma0 0x71>, <&audma1 0x72>; 1901 dma-names = "rx", "tx"; 1902 }; 1903 ssiu41: ssiu-33 { 1904 dmas = <&audma0 0x17>, <&audma1 0x18>; 1905 dma-names = "rx", "tx"; 1906 }; 1907 ssiu42: ssiu-34 { 1908 dmas = <&audma0 0x19>, <&audma1 0x1A>; 1909 dma-names = "rx", "tx"; 1910 }; 1911 ssiu43: ssiu-35 { 1912 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 1913 dma-names = "rx", "tx"; 1914 }; 1915 ssiu44: ssiu-36 { 1916 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 1917 dma-names = "rx", "tx"; 1918 }; 1919 ssiu45: ssiu-37 { 1920 dmas = <&audma0 0x1F>, <&audma1 0x20>; 1921 dma-names = "rx", "tx"; 1922 }; 1923 ssiu46: ssiu-38 { 1924 dmas = <&audma0 0x31>, <&audma1 0x32>; 1925 dma-names = "rx", "tx"; 1926 }; 1927 ssiu47: ssiu-39 { 1928 dmas = <&audma0 0x33>, <&audma1 0x34>; 1929 dma-names = "rx", "tx"; 1930 }; 1931 ssiu50: ssiu-40 { 1932 dmas = <&audma0 0x73>, <&audma1 0x74>; 1933 dma-names = "rx", "tx"; 1934 }; 1935 ssiu60: ssiu-41 { 1936 dmas = <&audma0 0x75>, <&audma1 0x76>; 1937 dma-names = "rx", "tx"; 1938 }; 1939 ssiu70: ssiu-42 { 1940 dmas = <&audma0 0x79>, <&audma1 0x7a>; 1941 dma-names = "rx", "tx"; 1942 }; 1943 ssiu80: ssiu-43 { 1944 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 1945 dma-names = "rx", "tx"; 1946 }; 1947 ssiu90: ssiu-44 { 1948 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 1949 dma-names = "rx", "tx"; 1950 }; 1951 ssiu91: ssiu-45 { 1952 dmas = <&audma0 0x7F>, <&audma1 0x80>; 1953 dma-names = "rx", "tx"; 1954 }; 1955 ssiu92: ssiu-46 { 1956 dmas = <&audma0 0x81>, <&audma1 0x82>; 1957 dma-names = "rx", "tx"; 1958 }; 1959 ssiu93: ssiu-47 { 1960 dmas = <&audma0 0x83>, <&audma1 0x84>; 1961 dma-names = "rx", "tx"; 1962 }; 1963 ssiu94: ssiu-48 { 1964 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 1965 dma-names = "rx", "tx"; 1966 }; 1967 ssiu95: ssiu-49 { 1968 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 1969 dma-names = "rx", "tx"; 1970 }; 1971 ssiu96: ssiu-50 { 1972 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 1973 dma-names = "rx", "tx"; 1974 }; 1975 ssiu97: ssiu-51 { 1976 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 1977 dma-names = "rx", "tx"; 1978 }; 1979 }; 1980 }; 1981 1982 audma0: dma-controller@ec700000 { 1983 compatible = "renesas,dmac-r8a774b1", 1984 "renesas,rcar-dmac"; 1985 reg = <0 0xec700000 0 0x10000>; 1986 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1987 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1988 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1989 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1990 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1991 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1992 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1993 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1994 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1995 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1996 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1997 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1998 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1999 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2000 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2001 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2002 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2003 interrupt-names = "error", 2004 "ch0", "ch1", "ch2", "ch3", 2005 "ch4", "ch5", "ch6", "ch7", 2006 "ch8", "ch9", "ch10", "ch11", 2007 "ch12", "ch13", "ch14", "ch15"; 2008 clocks = <&cpg CPG_MOD 502>; 2009 clock-names = "fck"; 2010 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2011 resets = <&cpg 502>; 2012 #dma-cells = <1>; 2013 dma-channels = <16>; 2014 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2015 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2016 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2017 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2018 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2019 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2020 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2021 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2022 }; 2023 2024 audma1: dma-controller@ec720000 { 2025 compatible = "renesas,dmac-r8a774b1", 2026 "renesas,rcar-dmac"; 2027 reg = <0 0xec720000 0 0x10000>; 2028 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2029 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2030 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2031 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2032 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2033 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2034 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2035 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2036 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2037 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2038 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2039 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2040 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2041 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2042 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2043 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2044 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2045 interrupt-names = "error", 2046 "ch0", "ch1", "ch2", "ch3", 2047 "ch4", "ch5", "ch6", "ch7", 2048 "ch8", "ch9", "ch10", "ch11", 2049 "ch12", "ch13", "ch14", "ch15"; 2050 clocks = <&cpg CPG_MOD 501>; 2051 clock-names = "fck"; 2052 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2053 resets = <&cpg 501>; 2054 #dma-cells = <1>; 2055 dma-channels = <16>; 2056 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2057 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2058 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2059 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2060 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2061 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2062 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2063 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2064 }; 2065 2066 xhci0: usb@ee000000 { 2067 compatible = "renesas,xhci-r8a774b1", 2068 "renesas,rcar-gen3-xhci"; 2069 reg = <0 0xee000000 0 0xc00>; 2070 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2071 clocks = <&cpg CPG_MOD 328>; 2072 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2073 resets = <&cpg 328>; 2074 status = "disabled"; 2075 }; 2076 2077 usb3_peri0: usb@ee020000 { 2078 compatible = "renesas,r8a774b1-usb3-peri", 2079 "renesas,rcar-gen3-usb3-peri"; 2080 reg = <0 0xee020000 0 0x400>; 2081 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2082 clocks = <&cpg CPG_MOD 328>; 2083 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2084 resets = <&cpg 328>; 2085 status = "disabled"; 2086 }; 2087 2088 ohci0: usb@ee080000 { 2089 compatible = "generic-ohci"; 2090 reg = <0 0xee080000 0 0x100>; 2091 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2092 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2093 phys = <&usb2_phy0 1>; 2094 phy-names = "usb"; 2095 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2096 resets = <&cpg 703>, <&cpg 704>; 2097 status = "disabled"; 2098 }; 2099 2100 ohci1: usb@ee0a0000 { 2101 compatible = "generic-ohci"; 2102 reg = <0 0xee0a0000 0 0x100>; 2103 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2104 clocks = <&cpg CPG_MOD 702>; 2105 phys = <&usb2_phy1 1>; 2106 phy-names = "usb"; 2107 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2108 resets = <&cpg 702>; 2109 status = "disabled"; 2110 }; 2111 2112 ehci0: usb@ee080100 { 2113 compatible = "generic-ehci"; 2114 reg = <0 0xee080100 0 0x100>; 2115 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2116 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2117 phys = <&usb2_phy0 2>; 2118 phy-names = "usb"; 2119 companion = <&ohci0>; 2120 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2121 resets = <&cpg 703>, <&cpg 704>; 2122 status = "disabled"; 2123 }; 2124 2125 ehci1: usb@ee0a0100 { 2126 compatible = "generic-ehci"; 2127 reg = <0 0xee0a0100 0 0x100>; 2128 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2129 clocks = <&cpg CPG_MOD 702>; 2130 phys = <&usb2_phy1 2>; 2131 phy-names = "usb"; 2132 companion = <&ohci1>; 2133 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2134 resets = <&cpg 702>; 2135 status = "disabled"; 2136 }; 2137 2138 usb2_phy0: usb-phy@ee080200 { 2139 compatible = "renesas,usb2-phy-r8a774b1", 2140 "renesas,rcar-gen3-usb2-phy"; 2141 reg = <0 0xee080200 0 0x700>; 2142 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2143 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2144 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2145 resets = <&cpg 703>, <&cpg 704>; 2146 #phy-cells = <1>; 2147 status = "disabled"; 2148 }; 2149 2150 usb2_phy1: usb-phy@ee0a0200 { 2151 compatible = "renesas,usb2-phy-r8a774b1", 2152 "renesas,rcar-gen3-usb2-phy"; 2153 reg = <0 0xee0a0200 0 0x700>; 2154 clocks = <&cpg CPG_MOD 702>; 2155 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2156 resets = <&cpg 702>; 2157 #phy-cells = <1>; 2158 status = "disabled"; 2159 }; 2160 2161 sdhi0: mmc@ee100000 { 2162 compatible = "renesas,sdhi-r8a774b1", 2163 "renesas,rcar-gen3-sdhi"; 2164 reg = <0 0xee100000 0 0x2000>; 2165 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2166 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774B1_CLK_SD0H>; 2167 clock-names = "core", "clkh"; 2168 max-frequency = <200000000>; 2169 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2170 resets = <&cpg 314>; 2171 iommus = <&ipmmu_ds1 32>; 2172 status = "disabled"; 2173 }; 2174 2175 sdhi1: mmc@ee120000 { 2176 compatible = "renesas,sdhi-r8a774b1", 2177 "renesas,rcar-gen3-sdhi"; 2178 reg = <0 0xee120000 0 0x2000>; 2179 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2180 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774B1_CLK_SD1H>; 2181 clock-names = "core", "clkh"; 2182 max-frequency = <200000000>; 2183 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2184 resets = <&cpg 313>; 2185 iommus = <&ipmmu_ds1 33>; 2186 status = "disabled"; 2187 }; 2188 2189 sdhi2: mmc@ee140000 { 2190 compatible = "renesas,sdhi-r8a774b1", 2191 "renesas,rcar-gen3-sdhi"; 2192 reg = <0 0xee140000 0 0x2000>; 2193 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2194 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A774B1_CLK_SD2H>; 2195 clock-names = "core", "clkh"; 2196 max-frequency = <200000000>; 2197 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2198 resets = <&cpg 312>; 2199 iommus = <&ipmmu_ds1 34>; 2200 status = "disabled"; 2201 }; 2202 2203 sdhi3: mmc@ee160000 { 2204 compatible = "renesas,sdhi-r8a774b1", 2205 "renesas,rcar-gen3-sdhi"; 2206 reg = <0 0xee160000 0 0x2000>; 2207 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2208 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774B1_CLK_SD3H>; 2209 clock-names = "core", "clkh"; 2210 max-frequency = <200000000>; 2211 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2212 resets = <&cpg 311>; 2213 iommus = <&ipmmu_ds1 35>; 2214 status = "disabled"; 2215 }; 2216 2217 rpc: spi@ee200000 { 2218 compatible = "renesas,r8a774b1-rpc-if", 2219 "renesas,rcar-gen3-rpc-if"; 2220 reg = <0 0xee200000 0 0x200>, 2221 <0 0x08000000 0 0x4000000>, 2222 <0 0xee208000 0 0x100>; 2223 reg-names = "regs", "dirmap", "wbuf"; 2224 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2225 clocks = <&cpg CPG_MOD 917>; 2226 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2227 resets = <&cpg 917>; 2228 #address-cells = <1>; 2229 #size-cells = <0>; 2230 status = "disabled"; 2231 }; 2232 2233 sata: sata@ee300000 { 2234 compatible = "renesas,sata-r8a774b1", 2235 "renesas,rcar-gen3-sata"; 2236 reg = <0 0xee300000 0 0x200000>; 2237 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 2238 clocks = <&cpg CPG_MOD 815>; 2239 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2240 resets = <&cpg 815>; 2241 iommus = <&ipmmu_hc 2>; 2242 status = "disabled"; 2243 }; 2244 2245 gic: interrupt-controller@f1010000 { 2246 compatible = "arm,gic-400"; 2247 #interrupt-cells = <3>; 2248 #address-cells = <0>; 2249 interrupt-controller; 2250 reg = <0x0 0xf1010000 0 0x1000>, 2251 <0x0 0xf1020000 0 0x20000>, 2252 <0x0 0xf1040000 0 0x20000>, 2253 <0x0 0xf1060000 0 0x20000>; 2254 interrupts = <GIC_PPI 9 2255 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 2256 clocks = <&cpg CPG_MOD 408>; 2257 clock-names = "clk"; 2258 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2259 resets = <&cpg 408>; 2260 }; 2261 2262 pciec0: pcie@fe000000 { 2263 compatible = "renesas,pcie-r8a774b1", 2264 "renesas,pcie-rcar-gen3"; 2265 reg = <0 0xfe000000 0 0x80000>; 2266 #address-cells = <3>; 2267 #size-cells = <2>; 2268 bus-range = <0x00 0xff>; 2269 device_type = "pci"; 2270 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2271 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2272 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2273 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2274 /* Map all possible DDR/IOMMU as inbound ranges */ 2275 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2276 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2277 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2278 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2279 #interrupt-cells = <1>; 2280 interrupt-map-mask = <0 0 0 0>; 2281 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2282 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2283 clock-names = "pcie", "pcie_bus"; 2284 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2285 resets = <&cpg 319>; 2286 iommu-map = <0 &ipmmu_hc 0 1>; 2287 iommu-map-mask = <0>; 2288 status = "disabled"; 2289 }; 2290 2291 pciec1: pcie@ee800000 { 2292 compatible = "renesas,pcie-r8a774b1", 2293 "renesas,pcie-rcar-gen3"; 2294 reg = <0 0xee800000 0 0x80000>; 2295 #address-cells = <3>; 2296 #size-cells = <2>; 2297 bus-range = <0x00 0xff>; 2298 device_type = "pci"; 2299 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2300 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2301 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2302 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2303 /* Map all possible DDR/IOMMU as inbound ranges */ 2304 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2305 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2306 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2307 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2308 #interrupt-cells = <1>; 2309 interrupt-map-mask = <0 0 0 0>; 2310 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2311 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2312 clock-names = "pcie", "pcie_bus"; 2313 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2314 resets = <&cpg 318>; 2315 iommu-map = <0 &ipmmu_hc 1 1>; 2316 iommu-map-mask = <0>; 2317 status = "disabled"; 2318 }; 2319 2320 pciec0_ep: pcie-ep@fe000000 { 2321 compatible = "renesas,r8a774b1-pcie-ep", 2322 "renesas,rcar-gen3-pcie-ep"; 2323 reg = <0x0 0xfe000000 0 0x80000>, 2324 <0x0 0xfe100000 0 0x100000>, 2325 <0x0 0xfe200000 0 0x200000>, 2326 <0x0 0x30000000 0 0x8000000>, 2327 <0x0 0x38000000 0 0x8000000>; 2328 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2329 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2330 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2331 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2332 clocks = <&cpg CPG_MOD 319>; 2333 clock-names = "pcie"; 2334 resets = <&cpg 319>; 2335 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2336 status = "disabled"; 2337 }; 2338 2339 pciec1_ep: pcie-ep@ee800000 { 2340 compatible = "renesas,r8a774b1-pcie-ep", 2341 "renesas,rcar-gen3-pcie-ep"; 2342 reg = <0x0 0xee800000 0 0x80000>, 2343 <0x0 0xee900000 0 0x100000>, 2344 <0x0 0xeea00000 0 0x200000>, 2345 <0x0 0xc0000000 0 0x8000000>, 2346 <0x0 0xc8000000 0 0x8000000>; 2347 reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; 2348 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2349 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2350 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2351 clocks = <&cpg CPG_MOD 318>; 2352 clock-names = "pcie"; 2353 resets = <&cpg 318>; 2354 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2355 status = "disabled"; 2356 }; 2357 2358 fdp1@fe940000 { 2359 compatible = "renesas,fdp1"; 2360 reg = <0 0xfe940000 0 0x2400>; 2361 interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; 2362 clocks = <&cpg CPG_MOD 119>; 2363 power-domains = <&sysc R8A774B1_PD_A3VP>; 2364 resets = <&cpg 119>; 2365 renesas,fcp = <&fcpf0>; 2366 }; 2367 2368 fcpf0: fcp@fe950000 { 2369 compatible = "renesas,fcpf"; 2370 reg = <0 0xfe950000 0 0x200>; 2371 clocks = <&cpg CPG_MOD 615>; 2372 power-domains = <&sysc R8A774B1_PD_A3VP>; 2373 resets = <&cpg 615>; 2374 iommus = <&ipmmu_vp0 0>; 2375 }; 2376 2377 vspb: vsp@fe960000 { 2378 compatible = "renesas,vsp2"; 2379 reg = <0 0xfe960000 0 0x8000>; 2380 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2381 clocks = <&cpg CPG_MOD 626>; 2382 power-domains = <&sysc R8A774B1_PD_A3VP>; 2383 resets = <&cpg 626>; 2384 2385 renesas,fcp = <&fcpvb0>; 2386 }; 2387 2388 vspi0: vsp@fe9a0000 { 2389 compatible = "renesas,vsp2"; 2390 reg = <0 0xfe9a0000 0 0x8000>; 2391 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2392 clocks = <&cpg CPG_MOD 631>; 2393 power-domains = <&sysc R8A774B1_PD_A3VP>; 2394 resets = <&cpg 631>; 2395 2396 renesas,fcp = <&fcpvi0>; 2397 }; 2398 2399 vspd0: vsp@fea20000 { 2400 compatible = "renesas,vsp2"; 2401 reg = <0 0xfea20000 0 0x5000>; 2402 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2403 clocks = <&cpg CPG_MOD 623>; 2404 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2405 resets = <&cpg 623>; 2406 2407 renesas,fcp = <&fcpvd0>; 2408 }; 2409 2410 vspd1: vsp@fea28000 { 2411 compatible = "renesas,vsp2"; 2412 reg = <0 0xfea28000 0 0x5000>; 2413 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2414 clocks = <&cpg CPG_MOD 622>; 2415 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2416 resets = <&cpg 622>; 2417 2418 renesas,fcp = <&fcpvd1>; 2419 }; 2420 2421 fcpvb0: fcp@fe96f000 { 2422 compatible = "renesas,fcpv"; 2423 reg = <0 0xfe96f000 0 0x200>; 2424 clocks = <&cpg CPG_MOD 607>; 2425 power-domains = <&sysc R8A774B1_PD_A3VP>; 2426 resets = <&cpg 607>; 2427 iommus = <&ipmmu_vp0 5>; 2428 }; 2429 2430 fcpvd0: fcp@fea27000 { 2431 compatible = "renesas,fcpv"; 2432 reg = <0 0xfea27000 0 0x200>; 2433 clocks = <&cpg CPG_MOD 603>; 2434 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2435 resets = <&cpg 603>; 2436 iommus = <&ipmmu_vi0 8>; 2437 }; 2438 2439 fcpvd1: fcp@fea2f000 { 2440 compatible = "renesas,fcpv"; 2441 reg = <0 0xfea2f000 0 0x200>; 2442 clocks = <&cpg CPG_MOD 602>; 2443 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2444 resets = <&cpg 602>; 2445 iommus = <&ipmmu_vi0 9>; 2446 }; 2447 2448 fcpvi0: fcp@fe9af000 { 2449 compatible = "renesas,fcpv"; 2450 reg = <0 0xfe9af000 0 0x200>; 2451 clocks = <&cpg CPG_MOD 611>; 2452 power-domains = <&sysc R8A774B1_PD_A3VP>; 2453 resets = <&cpg 611>; 2454 iommus = <&ipmmu_vp0 8>; 2455 }; 2456 2457 csi20: csi2@fea80000 { 2458 compatible = "renesas,r8a774b1-csi2"; 2459 reg = <0 0xfea80000 0 0x10000>; 2460 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2461 clocks = <&cpg CPG_MOD 714>; 2462 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2463 resets = <&cpg 714>; 2464 status = "disabled"; 2465 2466 ports { 2467 #address-cells = <1>; 2468 #size-cells = <0>; 2469 2470 port@0 { 2471 reg = <0>; 2472 }; 2473 2474 port@1 { 2475 #address-cells = <1>; 2476 #size-cells = <0>; 2477 2478 reg = <1>; 2479 2480 csi20vin0: endpoint@0 { 2481 reg = <0>; 2482 remote-endpoint = <&vin0csi20>; 2483 }; 2484 csi20vin1: endpoint@1 { 2485 reg = <1>; 2486 remote-endpoint = <&vin1csi20>; 2487 }; 2488 csi20vin2: endpoint@2 { 2489 reg = <2>; 2490 remote-endpoint = <&vin2csi20>; 2491 }; 2492 csi20vin3: endpoint@3 { 2493 reg = <3>; 2494 remote-endpoint = <&vin3csi20>; 2495 }; 2496 csi20vin4: endpoint@4 { 2497 reg = <4>; 2498 remote-endpoint = <&vin4csi20>; 2499 }; 2500 csi20vin5: endpoint@5 { 2501 reg = <5>; 2502 remote-endpoint = <&vin5csi20>; 2503 }; 2504 csi20vin6: endpoint@6 { 2505 reg = <6>; 2506 remote-endpoint = <&vin6csi20>; 2507 }; 2508 csi20vin7: endpoint@7 { 2509 reg = <7>; 2510 remote-endpoint = <&vin7csi20>; 2511 }; 2512 }; 2513 }; 2514 }; 2515 2516 csi40: csi2@feaa0000 { 2517 compatible = "renesas,r8a774b1-csi2"; 2518 reg = <0 0xfeaa0000 0 0x10000>; 2519 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2520 clocks = <&cpg CPG_MOD 716>; 2521 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2522 resets = <&cpg 716>; 2523 status = "disabled"; 2524 2525 ports { 2526 #address-cells = <1>; 2527 #size-cells = <0>; 2528 2529 port@0 { 2530 reg = <0>; 2531 }; 2532 2533 port@1 { 2534 #address-cells = <1>; 2535 #size-cells = <0>; 2536 2537 reg = <1>; 2538 2539 csi40vin0: endpoint@0 { 2540 reg = <0>; 2541 remote-endpoint = <&vin0csi40>; 2542 }; 2543 csi40vin1: endpoint@1 { 2544 reg = <1>; 2545 remote-endpoint = <&vin1csi40>; 2546 }; 2547 csi40vin2: endpoint@2 { 2548 reg = <2>; 2549 remote-endpoint = <&vin2csi40>; 2550 }; 2551 csi40vin3: endpoint@3 { 2552 reg = <3>; 2553 remote-endpoint = <&vin3csi40>; 2554 }; 2555 csi40vin4: endpoint@4 { 2556 reg = <4>; 2557 remote-endpoint = <&vin4csi40>; 2558 }; 2559 csi40vin5: endpoint@5 { 2560 reg = <5>; 2561 remote-endpoint = <&vin5csi40>; 2562 }; 2563 csi40vin6: endpoint@6 { 2564 reg = <6>; 2565 remote-endpoint = <&vin6csi40>; 2566 }; 2567 csi40vin7: endpoint@7 { 2568 reg = <7>; 2569 remote-endpoint = <&vin7csi40>; 2570 }; 2571 }; 2572 }; 2573 }; 2574 2575 hdmi0: hdmi@fead0000 { 2576 compatible = "renesas,r8a774b1-hdmi", 2577 "renesas,rcar-gen3-hdmi"; 2578 reg = <0 0xfead0000 0 0x10000>; 2579 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2580 clocks = <&cpg CPG_MOD 729>, 2581 <&cpg CPG_CORE R8A774B1_CLK_HDMI>; 2582 clock-names = "iahb", "isfr"; 2583 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2584 resets = <&cpg 729>; 2585 status = "disabled"; 2586 2587 ports { 2588 #address-cells = <1>; 2589 #size-cells = <0>; 2590 2591 port@0 { 2592 reg = <0>; 2593 dw_hdmi0_in: endpoint { 2594 remote-endpoint = <&du_out_hdmi0>; 2595 }; 2596 }; 2597 port@1 { 2598 reg = <1>; 2599 }; 2600 port@2 { 2601 /* HDMI sound */ 2602 reg = <2>; 2603 }; 2604 }; 2605 }; 2606 2607 du: display@feb00000 { 2608 compatible = "renesas,du-r8a774b1"; 2609 reg = <0 0xfeb00000 0 0x80000>; 2610 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2611 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2612 <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>; 2613 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2614 <&cpg CPG_MOD 721>; 2615 clock-names = "du.0", "du.1", "du.3"; 2616 resets = <&cpg 724>, <&cpg 722>; 2617 reset-names = "du.0", "du.3"; 2618 status = "disabled"; 2619 2620 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd0 1>; 2621 2622 ports { 2623 #address-cells = <1>; 2624 #size-cells = <0>; 2625 2626 port@0 { 2627 reg = <0>; 2628 }; 2629 port@1 { 2630 reg = <1>; 2631 du_out_hdmi0: endpoint { 2632 remote-endpoint = <&dw_hdmi0_in>; 2633 }; 2634 }; 2635 port@2 { 2636 reg = <2>; 2637 du_out_lvds0: endpoint { 2638 remote-endpoint = <&lvds0_in>; 2639 }; 2640 }; 2641 }; 2642 }; 2643 2644 lvds0: lvds@feb90000 { 2645 compatible = "renesas,r8a774b1-lvds"; 2646 reg = <0 0xfeb90000 0 0x14>; 2647 clocks = <&cpg CPG_MOD 727>; 2648 power-domains = <&sysc R8A774B1_PD_ALWAYS_ON>; 2649 resets = <&cpg 727>; 2650 status = "disabled"; 2651 2652 ports { 2653 #address-cells = <1>; 2654 #size-cells = <0>; 2655 2656 port@0 { 2657 reg = <0>; 2658 lvds0_in: endpoint { 2659 remote-endpoint = <&du_out_lvds0>; 2660 }; 2661 }; 2662 port@1 { 2663 reg = <1>; 2664 }; 2665 }; 2666 }; 2667 2668 prr: chipid@fff00044 { 2669 compatible = "renesas,prr"; 2670 reg = <0 0xfff00044 0 4>; 2671 bootph-all; 2672 }; 2673 }; 2674 2675 thermal-zones { 2676 sensor1_thermal: sensor1-thermal { 2677 polling-delay-passive = <250>; 2678 polling-delay = <1000>; 2679 thermal-sensors = <&tsc 0>; 2680 sustainable-power = <2439>; 2681 2682 trips { 2683 sensor1_crit: sensor1-crit { 2684 temperature = <120000>; 2685 hysteresis = <1000>; 2686 type = "critical"; 2687 }; 2688 }; 2689 }; 2690 2691 sensor2_thermal: sensor2-thermal { 2692 polling-delay-passive = <250>; 2693 polling-delay = <1000>; 2694 thermal-sensors = <&tsc 1>; 2695 sustainable-power = <2439>; 2696 2697 trips { 2698 sensor2_crit: sensor2-crit { 2699 temperature = <120000>; 2700 hysteresis = <1000>; 2701 type = "critical"; 2702 }; 2703 }; 2704 }; 2705 2706 sensor3_thermal: sensor3-thermal { 2707 polling-delay-passive = <250>; 2708 polling-delay = <1000>; 2709 thermal-sensors = <&tsc 2>; 2710 sustainable-power = <2439>; 2711 2712 cooling-maps { 2713 map0 { 2714 trip = <&target>; 2715 cooling-device = <&a57_0 0 2>; 2716 contribution = <1024>; 2717 }; 2718 }; 2719 trips { 2720 target: trip-point1 { 2721 temperature = <100000>; 2722 hysteresis = <1000>; 2723 type = "passive"; 2724 }; 2725 2726 sensor3_crit: sensor3-crit { 2727 temperature = <120000>; 2728 hysteresis = <1000>; 2729 type = "critical"; 2730 }; 2731 }; 2732 }; 2733 }; 2734 2735 timer { 2736 compatible = "arm,armv8-timer"; 2737 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2738 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2739 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2740 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2741 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2742 }; 2743 2744 /* External USB clocks - can be overridden by the board */ 2745 usb3s0_clk: usb3s0 { 2746 compatible = "fixed-clock"; 2747 #clock-cells = <0>; 2748 clock-frequency = <0>; 2749 }; 2750 2751 usb_extal_clk: usb_extal { 2752 compatible = "fixed-clock"; 2753 #clock-cells = <0>; 2754 clock-frequency = <0>; 2755 }; 2756}; 2757