xref: /linux/arch/arm64/boot/dts/freescale/tqmls1088a-mbls10xxa-mc.dtsi (revision ced92af976f037443e8649c5b0617542b04d7914) 
1// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
2/*
3 * Copyright (c) 2018-2023 TQ-Systems GmbH <linux@ew.tq-group.com>,
4 * D-82229 Seefeld, Germany.
5 * Author: Gregor Herburger, Timo Herbrecher
6 *
7 * Device Tree Include file for MBLS10xxA from TQ (MC related sections)
8 */
9
10#include <dt-bindings/net/ti-dp83867.h>
11
12/ {
13
14};
15
16&dpmac1 {
17	pcs-handle = <&pcs1>;
18};
19
20&dpmac2 {
21	pcs-handle = <&pcs2>;
22};
23
24&dpmac3 {
25	pcs-handle = <&pcs3_0>;
26};
27
28&dpmac4 {
29	pcs-handle = <&pcs3_1>;
30};
31
32&dpmac5 {
33	pcs-handle = <&pcs3_2>;
34};
35
36&dpmac6 {
37	pcs-handle = <&pcs3_3>;
38};
39
40&dpmac7 {
41	pcs-handle = <&pcs7_0>;
42};
43
44&dpmac8 {
45	pcs-handle = <&pcs7_1>;
46};
47
48&dpmac9 {
49	pcs-handle = <&pcs7_2>;
50};
51
52&dpmac10 {
53	pcs-handle = <&pcs7_3>;
54};
55
56&emdio1 {
57	status = "okay";
58
59	qsgmii2_phy1: ethernet-phy@0 {
60		compatible = "ethernet-phy-ieee802.3-c22";
61		reg = <0x00>;
62	};
63
64	qsgmii2_phy2: ethernet-phy@1 {
65		compatible = "ethernet-phy-ieee802.3-c22";
66		reg = <0x01>;
67	};
68
69	qsgmii2_phy3: ethernet-phy@2 {
70		compatible = "ethernet-phy-ieee802.3-c22";
71		reg = <0x02>;
72	};
73
74	qsgmii2_phy4: ethernet-phy@3 {
75		compatible = "ethernet-phy-ieee802.3-c22";
76		reg = <0x03>;
77	};
78
79	rgmii_phy2: ethernet-phy@c {
80		compatible = "ethernet-phy-ieee802.3-c22";
81		reg = <0x0c>;
82		ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
83		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
84		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
85	};
86
87	rgmii_phy1: ethernet-phy@e {
88		compatible = "ethernet-phy-ieee802.3-c22";
89		reg = <0x0e>;
90		ti,rx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
91		ti,tx-internal-delay = <DP83867_RGMIIDCTL_1_50_NS>;
92		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
93	};
94
95	qsgmii1_phy1: ethernet-phy@1c {
96		compatible = "ethernet-phy-ieee802.3-c22";
97		reg = <0x1c>;
98	};
99
100	qsgmii1_phy2: ethernet-phy@1d {
101		compatible = "ethernet-phy-ieee802.3-c22";
102		reg = <0x1d>;
103	};
104
105	qsgmii1_phy3: ethernet-phy@1e {
106		compatible = "ethernet-phy-ieee802.3-c22";
107		reg = <0x1e>;
108	};
109
110	qsgmii1_phy4: ethernet-phy@1f {
111		compatible = "ethernet-phy-ieee802.3-c22";
112		reg = <0x1f>;
113	};
114};
115
116&pcs_mdio1 {
117	status = "okay";
118};
119
120&pcs_mdio2 {
121	status = "okay";
122};
123
124&pcs_mdio3 {
125	status = "okay";
126};
127
128&pcs_mdio7 {
129	status = "okay";
130};
131