1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2024 NXP 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/usb/pd.h> 10#include "imx95.dtsi" 11 12#define FALLING_EDGE 1 13#define RISING_EDGE 2 14 15#define BRD_SM_CTRL_SD3_WAKE 0x8000 /* PCAL6408A-0 */ 16#define BRD_SM_CTRL_PCIE1_WAKE 0x8001 /* PCAL6408A-4 */ 17#define BRD_SM_CTRL_BT_WAKE 0x8002 /* PCAL6408A-5 */ 18#define BRD_SM_CTRL_PCIE2_WAKE 0x8003 /* PCAL6408A-6 */ 19#define BRD_SM_CTRL_BUTTON 0x8004 /* PCAL6408A-7 */ 20 21/ { 22 model = "NXP i.MX95 19X19 board"; 23 compatible = "fsl,imx95-19x19-evk", "fsl,imx95"; 24 25 aliases { 26 ethernet0 = &enetc_port0; 27 gpio0 = &gpio1; 28 gpio1 = &gpio2; 29 gpio2 = &gpio3; 30 gpio3 = &gpio4; 31 gpio4 = &gpio5; 32 i2c0 = &lpi2c1; 33 i2c1 = &lpi2c2; 34 i2c2 = &lpi2c3; 35 i2c3 = &lpi2c4; 36 i2c4 = &lpi2c5; 37 i2c5 = &lpi2c6; 38 i2c6 = &lpi2c7; 39 i2c7 = &lpi2c8; 40 mmc0 = &usdhc1; 41 mmc1 = &usdhc2; 42 serial0 = &lpuart1; 43 }; 44 45 bt_sco_codec: audio-codec-bt-sco { 46 #sound-dai-cells = <1>; 47 compatible = "linux,bt-sco"; 48 }; 49 50 chosen { 51 stdout-path = &lpuart1; 52 }; 53 54 memory@80000000 { 55 device_type = "memory"; 56 reg = <0x0 0x80000000 0 0x80000000>; 57 }; 58 59 fan0: pwm-fan { 60 compatible = "pwm-fan"; 61 #cooling-cells = <2>; 62 pwms = <&tpm6 2 4000000 PWM_POLARITY_INVERTED>; 63 cooling-levels = <64 128 192 255>; 64 }; 65 66 reserved-memory { 67 #address-cells = <2>; 68 #size-cells = <2>; 69 ranges; 70 71 linux_cma: linux,cma { 72 compatible = "shared-dma-pool"; 73 alloc-ranges = <0 0x80000000 0 0x7f000000>; 74 size = <0 0x3c000000>; 75 linux,cma-default; 76 reusable; 77 }; 78 }; 79 80 reg_3p3v: regulator-3p3v { 81 compatible = "regulator-fixed"; 82 regulator-max-microvolt = <3300000>; 83 regulator-min-microvolt = <3300000>; 84 regulator-name = "+V3.3_SW"; 85 }; 86 87 reg_audio_pwr: regulator-audio-pwr { 88 compatible = "regulator-fixed"; 89 regulator-name = "audio-pwr"; 90 regulator-min-microvolt = <3300000>; 91 regulator-max-microvolt = <3300000>; 92 gpio = <&i2c4_gpio_expander_21 1 GPIO_ACTIVE_HIGH>; 93 enable-active-high; 94 regulator-always-on; 95 }; 96 97 reg_audio_slot: regulator-audio-slot { 98 compatible = "regulator-fixed"; 99 regulator-name = "audio-wm8962"; 100 regulator-min-microvolt = <3300000>; 101 regulator-max-microvolt = <3300000>; 102 gpio = <&i2c4_gpio_expander_21 7 GPIO_ACTIVE_HIGH>; 103 enable-active-high; 104 regulator-always-on; 105 status = "disabled"; 106 }; 107 108 reg_m2_pwr: regulator-m2-pwr { 109 compatible = "regulator-fixed"; 110 regulator-name = "M.2-power"; 111 regulator-min-microvolt = <3300000>; 112 regulator-max-microvolt = <3300000>; 113 gpio = <&i2c7_pcal6524 20 GPIO_ACTIVE_HIGH>; 114 enable-active-high; 115 }; 116 117 reg_pcie0: regulator-pcie { 118 compatible = "regulator-fixed"; 119 regulator-name = "PCIE_WLAN_EN"; 120 regulator-min-microvolt = <3300000>; 121 regulator-max-microvolt = <3300000>; 122 vin-supply = <®_m2_pwr>; 123 gpio = <&i2c7_pcal6524 6 GPIO_ACTIVE_HIGH>; 124 enable-active-high; 125 }; 126 127 reg_slot_pwr: regulator-slot-pwr { 128 compatible = "regulator-fixed"; 129 regulator-name = "PCIe slot-power"; 130 regulator-min-microvolt = <3300000>; 131 regulator-max-microvolt = <3300000>; 132 gpio = <&i2c7_pcal6524 14 GPIO_ACTIVE_HIGH>; 133 enable-active-high; 134 }; 135 136 reg_usdhc2_vmmc: regulator-usdhc2 { 137 compatible = "regulator-fixed"; 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>; 140 regulator-name = "VDD_SD2_3V3"; 141 regulator-min-microvolt = <3300000>; 142 regulator-max-microvolt = <3300000>; 143 gpio = <&gpio3 7 GPIO_ACTIVE_HIGH>; 144 enable-active-high; 145 off-on-delay-us = <12000>; 146 }; 147 148 reg_usb_vbus: regulator-vbus { 149 compatible = "regulator-fixed"; 150 regulator-name = "USB_VBUS"; 151 regulator-min-microvolt = <5000000>; 152 regulator-max-microvolt = <5000000>; 153 gpio = <&i2c7_pcal6524 3 GPIO_ACTIVE_HIGH>; 154 enable-active-high; 155 }; 156 157 sound-bt-sco { 158 compatible = "simple-audio-card"; 159 simple-audio-card,name = "bt-sco-audio"; 160 simple-audio-card,format = "dsp_a"; 161 simple-audio-card,bitclock-inversion; 162 simple-audio-card,frame-master = <&btcpu>; 163 simple-audio-card,bitclock-master = <&btcpu>; 164 165 btcpu: simple-audio-card,cpu { 166 sound-dai = <&sai1>; 167 dai-tdm-slot-num = <2>; 168 dai-tdm-slot-width = <16>; 169 }; 170 171 simple-audio-card,codec { 172 sound-dai = <&bt_sco_codec 1>; 173 }; 174 }; 175 176 sound-micfil { 177 compatible = "fsl,imx-audio-card"; 178 model = "micfil-audio"; 179 180 pri-dai-link { 181 link-name = "micfil hifi"; 182 format = "i2s"; 183 cpu { 184 sound-dai = <&micfil>; 185 }; 186 }; 187 }; 188 189 sound-wm8962 { 190 compatible = "fsl,imx-audio-wm8962"; 191 pinctrl-names = "default"; 192 pinctrl-0 = <&pinctrl_hp>; 193 model = "wm8962-audio"; 194 audio-cpu = <&sai3>; 195 audio-codec = <&wm8962>; 196 hp-det-gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>; 197 audio-routing = "Headphone Jack", "HPOUTL", 198 "Headphone Jack", "HPOUTR", 199 "Ext Spk", "SPKOUTL", 200 "Ext Spk", "SPKOUTR", 201 "AMIC", "MICBIAS", 202 "IN3R", "AMIC", 203 "IN1R", "AMIC"; 204 }; 205}; 206 207&enetc_port0 { 208 pinctrl-names = "default"; 209 pinctrl-0 = <&pinctrl_enetc0>; 210 phy-handle = <ðphy0>; 211 phy-mode = "rgmii-id"; 212 status = "okay"; 213}; 214 215&flexspi1 { 216 pinctrl-names = "default"; 217 pinctrl-0 = <&pinctrl_flexspi1>; 218 status = "okay"; 219 220 flash@0 { 221 compatible = "jedec,spi-nor"; 222 reg = <0>; 223 pinctrl-names = "default"; 224 pinctrl-0 = <&pinctrl_flexspi1_reset>; 225 reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; 226 #address-cells = <1>; 227 #size-cells = <1>; 228 spi-max-frequency = <200000000>; 229 spi-tx-bus-width = <8>; 230 spi-rx-bus-width = <8>; 231 }; 232}; 233 234&lpi2c4 { 235 clock-frequency = <400000>; 236 pinctrl-names = "default"; 237 pinctrl-0 = <&pinctrl_lpi2c4>; 238 status = "okay"; 239 240 wm8962: audio-codec@1a { 241 compatible = "wlf,wm8962"; 242 reg = <0x1a>; 243 clocks = <&scmi_clk IMX95_CLK_SAI3>; 244 DCVDD-supply = <®_audio_pwr>; 245 DBVDD-supply = <®_audio_pwr>; 246 AVDD-supply = <®_audio_pwr>; 247 CPVDD-supply = <®_audio_pwr>; 248 MICVDD-supply = <®_audio_pwr>; 249 PLLVDD-supply = <®_audio_pwr>; 250 SPKVDD1-supply = <®_audio_pwr>; 251 SPKVDD2-supply = <®_audio_pwr>; 252 gpio-cfg = < 0x0000 /* 0:Default */ 253 0x0000 /* 1:Default */ 254 0x0000 /* 2:FN_DMICCLK */ 255 0x0000 /* 3:Default */ 256 0x0000 /* 4:FN_DMICCDAT */ 257 0x0000 /* 5:Default */ 258 >; 259 }; 260 261 i2c4_gpio_expander_21: gpio@21 { 262 compatible = "nxp,pcal6408"; 263 reg = <0x21>; 264 #gpio-cells = <2>; 265 gpio-controller; 266 interrupt-controller; 267 #interrupt-cells = <2>; 268 interrupt-parent = <&gpio2>; 269 interrupts = <18 IRQ_TYPE_LEVEL_LOW>; 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pinctrl_i2c4_pcal6408>; 272 vcc-supply = <®_3p3v>; 273 }; 274}; 275 276&lpi2c5 { 277 clock-frequency = <100000>; 278 pinctrl-names = "default"; 279 pinctrl-0 = <&pinctrl_lpi2c5>; 280 status = "okay"; 281 282 i2c5_pcal6408: gpio@21 { 283 compatible = "nxp,pcal6408"; 284 reg = <0x21>; 285 gpio-controller; 286 #gpio-cells = <2>; 287 vcc-supply = <®_3p3v>; 288 }; 289}; 290 291&lpi2c6 { 292 clock-frequency = <100000>; 293 pinctrl-names = "default"; 294 pinctrl-0 = <&pinctrl_lpi2c6>; 295 status = "okay"; 296 297 i2c6_pcal6416: gpio@21 { 298 compatible = "nxp,pcal6416"; 299 reg = <0x21>; 300 gpio-controller; 301 #gpio-cells = <2>; 302 interrupt-controller; 303 #interrupt-cells = <2>; 304 interrupt-parent = <&gpio4>; 305 interrupts = <28 IRQ_TYPE_LEVEL_LOW>; 306 pinctrl-names = "default"; 307 pinctrl-0 = <&pinctrl_pcal6416>; 308 vcc-supply = <®_3p3v>; 309 }; 310}; 311 312&lpi2c7 { 313 clock-frequency = <1000000>; 314 pinctrl-names = "default"; 315 pinctrl-0 = <&pinctrl_lpi2c7>; 316 status = "okay"; 317 318 i2c7_pcal6524: i2c7-gpio@22 { 319 compatible = "nxp,pcal6524"; 320 reg = <0x22>; 321 pinctrl-names = "default"; 322 pinctrl-0 = <&pinctrl_i2c7_pcal6524>; 323 gpio-controller; 324 #gpio-cells = <2>; 325 interrupt-controller; 326 #interrupt-cells = <2>; 327 interrupt-parent = <&gpio5>; 328 interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 329 }; 330 331 ptn5110: tcpc@50 { 332 compatible = "nxp,ptn5110", "tcpci"; 333 reg = <0x50>; 334 pinctrl-names = "default"; 335 pinctrl-0 = <&pinctrl_typec>; 336 interrupt-parent = <&gpio5>; 337 interrupts = <14 IRQ_TYPE_LEVEL_LOW>; 338 339 typec_con: connector { 340 compatible = "usb-c-connector"; 341 label = "USB-C"; 342 power-role = "dual"; 343 data-role = "dual"; 344 try-power-role = "sink"; 345 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 346 sink-pdos = <PDO_FIXED(5000, 0, PDO_FIXED_USB_COMM)>; 347 op-sink-microwatt = <0>; 348 self-powered; 349 350 ports { 351 #address-cells = <1>; 352 #size-cells = <0>; 353 354 port@0 { 355 reg = <0>; 356 357 typec_con_hs: endpoint { 358 remote-endpoint = <&usb3_data_hs>; 359 }; 360 }; 361 362 port@1 { 363 reg = <1>; 364 365 typec_con_ss: endpoint { 366 remote-endpoint = <&usb3_data_ss>; 367 }; 368 }; 369 }; 370 }; 371 }; 372}; 373 374&lpuart1 { 375 /* console */ 376 pinctrl-names = "default"; 377 pinctrl-0 = <&pinctrl_uart1>; 378 status = "okay"; 379}; 380 381&micfil { 382 #sound-dai-cells = <0>; 383 pinctrl-names = "default"; 384 pinctrl-0 = <&pinctrl_pdm>; 385 assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, 386 <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, 387 <&scmi_clk IMX95_CLK_AUDIOPLL1>, 388 <&scmi_clk IMX95_CLK_AUDIOPLL2>, 389 <&scmi_clk IMX95_CLK_PDM>; 390 assigned-clock-parents = <0>, <0>, <0>, <0>, 391 <&scmi_clk IMX95_CLK_AUDIOPLL1>; 392 assigned-clock-rates = <3932160000>, 393 <3612672000>, <393216000>, 394 <361267200>, <49152000>; 395 status = "okay"; 396}; 397 398&mu7 { 399 status = "okay"; 400}; 401 402&netcmix_blk_ctrl { 403 status = "okay"; 404}; 405 406&netc_blk_ctrl { 407 status = "okay"; 408}; 409 410&netc_emdio { 411 pinctrl-names = "default"; 412 pinctrl-0 = <&pinctrl_emdio>; 413 status = "okay"; 414 415 ethphy0: ethernet-phy@1 { 416 reg = <1>; 417 realtek,clkout-disable; 418 }; 419}; 420 421&pcie0 { 422 pinctrl-0 = <&pinctrl_pcie0>; 423 pinctrl-names = "default"; 424 reset-gpio = <&i2c7_pcal6524 5 GPIO_ACTIVE_LOW>; 425 vpcie-supply = <®_pcie0>; 426 status = "okay"; 427}; 428 429&pcie0_ep { 430 pinctrl-0 = <&pinctrl_pcie0>; 431 pinctrl-names = "default"; 432 vpcie-supply = <®_pcie0>; 433 status = "disabled"; 434}; 435 436&pcie1 { 437 pinctrl-0 = <&pinctrl_pcie1>; 438 pinctrl-names = "default"; 439 reset-gpio = <&i2c7_pcal6524 16 GPIO_ACTIVE_LOW>; 440 vpcie-supply = <®_slot_pwr>; 441 status = "okay"; 442}; 443 444&pcie1_ep { 445 pinctrl-0 = <&pinctrl_pcie1>; 446 pinctrl-names = "default"; 447 vpcie-supply = <®_slot_pwr>; 448 status = "disabled"; 449}; 450 451&sai1 { 452 #sound-dai-cells = <0>; 453 pinctrl-names = "default"; 454 pinctrl-0 = <&pinctrl_sai1>; 455 assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, 456 <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, 457 <&scmi_clk IMX95_CLK_AUDIOPLL1>, 458 <&scmi_clk IMX95_CLK_AUDIOPLL2>, 459 <&scmi_clk IMX95_CLK_SAI1>; 460 assigned-clock-parents = <0>, <0>, <0>, <0>, 461 <&scmi_clk IMX95_CLK_AUDIOPLL1>; 462 assigned-clock-rates = <3932160000>, 463 <3612672000>, <393216000>, 464 <361267200>, <12288000>; 465 fsl,sai-mclk-direction-output; 466 status = "okay"; 467}; 468 469&sai3 { 470 #sound-dai-cells = <0>; 471 pinctrl-names = "default"; 472 pinctrl-0 = <&pinctrl_sai3>; 473 assigned-clocks = <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, 474 <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, 475 <&scmi_clk IMX95_CLK_AUDIOPLL1>, 476 <&scmi_clk IMX95_CLK_AUDIOPLL2>, 477 <&scmi_clk IMX95_CLK_SAI3>; 478 assigned-clock-parents = <0>, <0>, <0>, <0>, 479 <&scmi_clk IMX95_CLK_AUDIOPLL1>; 480 assigned-clock-rates = <3932160000>, 481 <3612672000>, <393216000>, 482 <361267200>, <12288000>; 483 fsl,sai-mclk-direction-output; 484 status = "okay"; 485}; 486 487&usb2 { 488 dr_mode = "host"; 489 disable-over-current; 490 vbus-supply = <®_usb_vbus>; 491 status = "okay"; 492}; 493 494&usb3 { 495 status = "okay"; 496}; 497 498&usb3_dwc3 { 499 dr_mode = "otg"; 500 hnp-disable; 501 srp-disable; 502 adp-disable; 503 usb-role-switch; 504 role-switch-default-mode = "peripheral"; 505 snps,dis-u1-entry-quirk; 506 snps,dis-u2-entry-quirk; 507 status = "okay"; 508 509 port { 510 usb3_data_hs: endpoint { 511 remote-endpoint = <&typec_con_hs>; 512 }; 513 }; 514}; 515 516&usb3_phy { 517 fsl,phy-tx-preemp-amp-tune-microamp = <600>; 518 orientation-switch; 519 status = "okay"; 520 521 port { 522 usb3_data_ss: endpoint { 523 remote-endpoint = <&typec_con_ss>; 524 }; 525 }; 526}; 527 528&usdhc1 { 529 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 530 pinctrl-0 = <&pinctrl_usdhc1>; 531 pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 532 pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 533 pinctrl-3 = <&pinctrl_usdhc1>; 534 bus-width = <8>; 535 non-removable; 536 no-sdio; 537 no-sd; 538 status = "okay"; 539}; 540 541&usdhc2 { 542 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep"; 543 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 544 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 545 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 546 pinctrl-3 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 547 cd-gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; 548 vmmc-supply = <®_usdhc2_vmmc>; 549 bus-width = <4>; 550 status = "okay"; 551}; 552 553&scmi_misc { 554 nxp,ctrl-ids = <BRD_SM_CTRL_SD3_WAKE FALLING_EDGE 555 BRD_SM_CTRL_PCIE1_WAKE FALLING_EDGE 556 BRD_SM_CTRL_BT_WAKE FALLING_EDGE 557 BRD_SM_CTRL_PCIE2_WAKE FALLING_EDGE 558 BRD_SM_CTRL_BUTTON FALLING_EDGE>; 559}; 560 561&wdog3 { 562 fsl,ext-reset-output; 563 status = "okay"; 564}; 565 566&scmi_iomuxc { 567 pinctrl_emdio: emdiogrp{ 568 fsl,pins = < 569 IMX95_PAD_ENET1_MDC__NETCMIX_TOP_NETC_MDC 0x50e 570 IMX95_PAD_ENET1_MDIO__NETCMIX_TOP_NETC_MDIO 0x90e 571 >; 572 }; 573 574 pinctrl_enetc0: enetc0grp { 575 fsl,pins = < 576 IMX95_PAD_ENET1_TD3__NETCMIX_TOP_ETH0_RGMII_TD3 0x50e 577 IMX95_PAD_ENET1_TD2__NETCMIX_TOP_ETH0_RGMII_TD2 0x50e 578 IMX95_PAD_ENET1_TD1__NETCMIX_TOP_ETH0_RGMII_TD1 0x50e 579 IMX95_PAD_ENET1_TD0__NETCMIX_TOP_ETH0_RGMII_TD0 0x50e 580 IMX95_PAD_ENET1_TX_CTL__NETCMIX_TOP_ETH0_RGMII_TX_CTL 0x57e 581 IMX95_PAD_ENET1_TXC__NETCMIX_TOP_ETH0_RGMII_TX_CLK 0x58e 582 IMX95_PAD_ENET1_RX_CTL__NETCMIX_TOP_ETH0_RGMII_RX_CTL 0x57e 583 IMX95_PAD_ENET1_RXC__NETCMIX_TOP_ETH0_RGMII_RX_CLK 0x58e 584 IMX95_PAD_ENET1_RD0__NETCMIX_TOP_ETH0_RGMII_RD0 0x57e 585 IMX95_PAD_ENET1_RD1__NETCMIX_TOP_ETH0_RGMII_RD1 0x57e 586 IMX95_PAD_ENET1_RD2__NETCMIX_TOP_ETH0_RGMII_RD2 0x57e 587 IMX95_PAD_ENET1_RD3__NETCMIX_TOP_ETH0_RGMII_RD3 0x57e 588 >; 589 }; 590 591 pinctrl_flexspi1: flexspi1grp { 592 fsl,pins = < 593 IMX95_PAD_XSPI1_SS0_B__FLEXSPI1_A_SS0_B 0x3fe 594 IMX95_PAD_XSPI1_SCLK__FLEXSPI1_A_SCLK 0x3fe 595 IMX95_PAD_XSPI1_DQS__FLEXSPI1_A_DQS 0x3fe 596 IMX95_PAD_XSPI1_DATA0__FLEXSPI1_A_DATA_BIT0 0x3fe 597 IMX95_PAD_XSPI1_DATA1__FLEXSPI1_A_DATA_BIT1 0x3fe 598 IMX95_PAD_XSPI1_DATA2__FLEXSPI1_A_DATA_BIT2 0x3fe 599 IMX95_PAD_XSPI1_DATA3__FLEXSPI1_A_DATA_BIT3 0x3fe 600 IMX95_PAD_XSPI1_DATA4__FLEXSPI1_A_DATA_BIT4 0x3fe 601 IMX95_PAD_XSPI1_DATA5__FLEXSPI1_A_DATA_BIT5 0x3fe 602 IMX95_PAD_XSPI1_DATA6__FLEXSPI1_A_DATA_BIT6 0x3fe 603 IMX95_PAD_XSPI1_DATA7__FLEXSPI1_A_DATA_BIT7 0x3fe 604 >; 605 }; 606 607 pinctrl_flexspi1_reset: flexspi1-reset-grp { 608 fsl,pins = < 609 IMX95_PAD_XSPI1_SS1_B__GPIO5_IO_BIT11 0x3fe 610 >; 611 }; 612 613 pinctrl_hp: hpgrp { 614 fsl,pins = < 615 IMX95_PAD_GPIO_IO11__GPIO2_IO_BIT11 0x31e 616 >; 617 }; 618 619 pinctrl_i2c4_pcal6408: i2c4pcal6498grp { 620 fsl,pins = < 621 IMX95_PAD_GPIO_IO18__GPIO2_IO_BIT18 0x31e 622 >; 623 }; 624 625 pinctrl_i2c7_pcal6524: i2c7pcal6524grp { 626 fsl,pins = < 627 IMX95_PAD_GPIO_IO36__GPIO5_IO_BIT16 0x31e 628 >; 629 }; 630 631 pinctrl_lpi2c4: lpi2c4grp { 632 fsl,pins = < 633 IMX95_PAD_GPIO_IO30__LPI2C4_SDA 0x40000b9e 634 IMX95_PAD_GPIO_IO31__LPI2C4_SCL 0x40000b9e 635 >; 636 }; 637 638 pinctrl_lpi2c5: lpi2c5grp { 639 fsl,pins = < 640 IMX95_PAD_GPIO_IO22__LPI2C5_SDA 0x40000b9e 641 IMX95_PAD_GPIO_IO23__LPI2C5_SCL 0x40000b9e 642 >; 643 }; 644 645 pinctrl_lpi2c6: lpi2c6grp { 646 fsl,pins = < 647 IMX95_PAD_GPIO_IO02__LPI2C6_SDA 0x40000b9e 648 IMX95_PAD_GPIO_IO03__LPI2C6_SCL 0x40000b9e 649 >; 650 }; 651 652 pinctrl_lpi2c7: lpi2c7grp { 653 fsl,pins = < 654 IMX95_PAD_GPIO_IO08__LPI2C7_SDA 0x40000b9e 655 IMX95_PAD_GPIO_IO09__LPI2C7_SCL 0x40000b9e 656 >; 657 }; 658 659 pinctrl_pcie0: pcie0grp { 660 fsl,pins = < 661 IMX95_PAD_GPIO_IO32__HSIOMIX_TOP_PCIE1_CLKREQ_B 0x4000031e 662 >; 663 }; 664 665 pinctrl_pcie1: pcie1grp { 666 fsl,pins = < 667 IMX95_PAD_GPIO_IO35__HSIOMIX_TOP_PCIE2_CLKREQ_B 0x4000031e 668 >; 669 }; 670 671 pinctrl_pcal6416: pcal6416grp { 672 fsl,pins = < 673 IMX95_PAD_CCM_CLKO3__GPIO4_IO_BIT28 0x31e 674 >; 675 }; 676 677 pinctrl_pdm: pdmgrp { 678 fsl,pins = < 679 IMX95_PAD_PDM_CLK__AONMIX_TOP_PDM_CLK 0x31e 680 IMX95_PAD_PDM_BIT_STREAM0__AONMIX_TOP_PDM_BIT_STREAM_BIT0 0x31e 681 >; 682 }; 683 684 pinctrl_sai1: sai1grp { 685 fsl,pins = < 686 IMX95_PAD_SAI1_RXD0__AONMIX_TOP_SAI1_RX_DATA_BIT0 0x31e 687 IMX95_PAD_SAI1_TXC__AONMIX_TOP_SAI1_TX_BCLK 0x31e 688 IMX95_PAD_SAI1_TXFS__AONMIX_TOP_SAI1_TX_SYNC 0x31e 689 IMX95_PAD_SAI1_TXD0__AONMIX_TOP_SAI1_TX_DATA_BIT0 0x31e 690 >; 691 }; 692 693 pinctrl_sai2: sai2grp { 694 fsl,pins = < 695 IMX95_PAD_ENET2_MDIO__NETCMIX_TOP_SAI2_RX_BCLK 0x31e 696 IMX95_PAD_ENET2_MDC__NETCMIX_TOP_SAI2_RX_SYNC 0x31e 697 IMX95_PAD_ENET2_TD3__NETCMIX_TOP_SAI2_RX_DATA_BIT0 0x31e 698 IMX95_PAD_ENET2_TD2__NETCMIX_TOP_SAI2_RX_DATA_BIT1 0x31e 699 IMX95_PAD_ENET2_TXC__NETCMIX_TOP_SAI2_TX_BCLK 0x31e 700 IMX95_PAD_ENET2_TX_CTL__NETCMIX_TOP_SAI2_TX_SYNC 0x31e 701 IMX95_PAD_ENET2_RX_CTL__NETCMIX_TOP_SAI2_TX_DATA_BIT0 0x31e 702 IMX95_PAD_ENET2_RXC__NETCMIX_TOP_SAI2_TX_DATA_BIT1 0x31e 703 IMX95_PAD_ENET2_RD0__NETCMIX_TOP_SAI2_TX_DATA_BIT2 0x31e 704 IMX95_PAD_ENET2_RD1__NETCMIX_TOP_SAI2_TX_DATA_BIT3 0x31e 705 IMX95_PAD_ENET2_RD2__NETCMIX_TOP_SAI2_MCLK 0x31e 706 >; 707 }; 708 709 pinctrl_sai3: sai3grp { 710 fsl,pins = < 711 IMX95_PAD_GPIO_IO17__SAI3_MCLK 0x31e 712 IMX95_PAD_GPIO_IO16__SAI3_TX_BCLK 0x31e 713 IMX95_PAD_GPIO_IO26__SAI3_TX_SYNC 0x31e 714 IMX95_PAD_GPIO_IO20__SAI3_RX_DATA_BIT0 0x31e 715 IMX95_PAD_GPIO_IO21__SAI3_TX_DATA_BIT0 0x31e 716 >; 717 }; 718 719 pinctrl_tpm6: tpm6grp { 720 fsl,pins = < 721 IMX95_PAD_GPIO_IO19__TPM6_CH2 0x51e 722 >; 723 }; 724 725 pinctrl_uart1: uart1grp { 726 fsl,pins = < 727 IMX95_PAD_UART1_RXD__AONMIX_TOP_LPUART1_RX 0x31e 728 IMX95_PAD_UART1_TXD__AONMIX_TOP_LPUART1_TX 0x31e 729 >; 730 }; 731 732 pinctrl_usdhc1: usdhc1grp { 733 fsl,pins = < 734 IMX95_PAD_SD1_CLK__USDHC1_CLK 0x158e 735 IMX95_PAD_SD1_CMD__USDHC1_CMD 0x138e 736 IMX95_PAD_SD1_DATA0__USDHC1_DATA0 0x138e 737 IMX95_PAD_SD1_DATA1__USDHC1_DATA1 0x138e 738 IMX95_PAD_SD1_DATA2__USDHC1_DATA2 0x138e 739 IMX95_PAD_SD1_DATA3__USDHC1_DATA3 0x138e 740 IMX95_PAD_SD1_DATA4__USDHC1_DATA4 0x138e 741 IMX95_PAD_SD1_DATA5__USDHC1_DATA5 0x138e 742 IMX95_PAD_SD1_DATA6__USDHC1_DATA6 0x138e 743 IMX95_PAD_SD1_DATA7__USDHC1_DATA7 0x138e 744 IMX95_PAD_SD1_STROBE__USDHC1_STROBE 0x158e 745 >; 746 }; 747 748 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 749 fsl,pins = < 750 IMX95_PAD_SD1_CLK__USDHC1_CLK 0x158e 751 IMX95_PAD_SD1_CMD__USDHC1_CMD 0x138e 752 IMX95_PAD_SD1_DATA0__USDHC1_DATA0 0x138e 753 IMX95_PAD_SD1_DATA1__USDHC1_DATA1 0x138e 754 IMX95_PAD_SD1_DATA2__USDHC1_DATA2 0x138e 755 IMX95_PAD_SD1_DATA3__USDHC1_DATA3 0x138e 756 IMX95_PAD_SD1_DATA4__USDHC1_DATA4 0x138e 757 IMX95_PAD_SD1_DATA5__USDHC1_DATA5 0x138e 758 IMX95_PAD_SD1_DATA6__USDHC1_DATA6 0x138e 759 IMX95_PAD_SD1_DATA7__USDHC1_DATA7 0x138e 760 IMX95_PAD_SD1_STROBE__USDHC1_STROBE 0x158e 761 >; 762 }; 763 764 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 765 fsl,pins = < 766 IMX95_PAD_SD1_CLK__USDHC1_CLK 0x15fe 767 IMX95_PAD_SD1_CMD__USDHC1_CMD 0x13fe 768 IMX95_PAD_SD1_DATA0__USDHC1_DATA0 0x13fe 769 IMX95_PAD_SD1_DATA1__USDHC1_DATA1 0x13fe 770 IMX95_PAD_SD1_DATA2__USDHC1_DATA2 0x13fe 771 IMX95_PAD_SD1_DATA3__USDHC1_DATA3 0x13fe 772 IMX95_PAD_SD1_DATA4__USDHC1_DATA4 0x13fe 773 IMX95_PAD_SD1_DATA5__USDHC1_DATA5 0x13fe 774 IMX95_PAD_SD1_DATA6__USDHC1_DATA6 0x13fe 775 IMX95_PAD_SD1_DATA7__USDHC1_DATA7 0x13fe 776 IMX95_PAD_SD1_STROBE__USDHC1_STROBE 0x15fe 777 >; 778 }; 779 780 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { 781 fsl,pins = < 782 IMX95_PAD_SD2_RESET_B__GPIO3_IO_BIT7 0x31e 783 >; 784 }; 785 786 pinctrl_typec: typecgrp { 787 fsl,pins = < 788 IMX95_PAD_GPIO_IO34__GPIO5_IO_BIT14 0x31e 789 >; 790 }; 791 792 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 793 fsl,pins = < 794 IMX95_PAD_SD2_CD_B__GPIO3_IO_BIT0 0x31e 795 >; 796 }; 797 798 pinctrl_usdhc2: usdhc2grp { 799 fsl,pins = < 800 IMX95_PAD_SD2_CLK__USDHC2_CLK 0x158e 801 IMX95_PAD_SD2_CMD__USDHC2_CMD 0x138e 802 IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x138e 803 IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x138e 804 IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x138e 805 IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x138e 806 IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e 807 >; 808 }; 809 810 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 811 fsl,pins = < 812 IMX95_PAD_SD2_CLK__USDHC2_CLK 0x158e 813 IMX95_PAD_SD2_CMD__USDHC2_CMD 0x138e 814 IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x138e 815 IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x138e 816 IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x138e 817 IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x138e 818 IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e 819 >; 820 }; 821 822 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 823 fsl,pins = < 824 IMX95_PAD_SD2_CLK__USDHC2_CLK 0x15fe 825 IMX95_PAD_SD2_CMD__USDHC2_CMD 0x13fe 826 IMX95_PAD_SD2_DATA0__USDHC2_DATA0 0x13fe 827 IMX95_PAD_SD2_DATA1__USDHC2_DATA1 0x13fe 828 IMX95_PAD_SD2_DATA2__USDHC2_DATA2 0x13fe 829 IMX95_PAD_SD2_DATA3__USDHC2_DATA3 0x13fe 830 IMX95_PAD_SD2_VSELECT__USDHC2_VSELECT 0x51e 831 >; 832 }; 833}; 834 835&thermal_zones { 836 a55-thermal { 837 trips { 838 atrip2: trip2 { 839 temperature = <55000>; 840 hysteresis = <2000>; 841 type = "active"; 842 }; 843 844 atrip3: trip3 { 845 temperature = <65000>; 846 hysteresis = <2000>; 847 type = "active"; 848 }; 849 850 atrip4: trip4 { 851 temperature = <75000>; 852 hysteresis = <2000>; 853 type = "active"; 854 }; 855 }; 856 857 cooling-maps { 858 map1 { 859 trip = <&atrip2>; 860 cooling-device = <&fan0 0 1>; 861 }; 862 863 map2 { 864 trip = <&atrip3>; 865 cooling-device = <&fan0 1 2>; 866 }; 867 868 map3 { 869 trip = <&atrip4>; 870 cooling-device = <&fan0 2 3>; 871 }; 872 }; 873 }; 874}; 875 876&tpm6 { 877 pinctrl-names = "default"; 878 pinctrl-0 = <&pinctrl_tpm6>; 879 status = "okay"; 880}; 881