1e426d63eSAlex Marginean// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2e426d63eSAlex Marginean/* 3e426d63eSAlex Marginean * Device Tree fragment for LS1028A QDS board, serdes 85xx 4e426d63eSAlex Marginean * 5e426d63eSAlex Marginean * Copyright 2019-2021 NXP 6e426d63eSAlex Marginean * 7e426d63eSAlex Marginean * Requires a LS1028A QDS board without lane B rework. 8e426d63eSAlex Marginean * Requires a SCH-24801 card in slot 1. 9e426d63eSAlex Marginean */ 10e426d63eSAlex Marginean 11e426d63eSAlex Marginean/dts-v1/; 12e426d63eSAlex Marginean/plugin/; 13e426d63eSAlex Marginean 14*d7a38566SShawn Guo&mdio_slot1 { 15e426d63eSAlex Marginean #address-cells = <1>; 16e426d63eSAlex Marginean #size-cells = <0>; 17e426d63eSAlex Marginean 18e426d63eSAlex Marginean /* VSC8234 */ 19e426d63eSAlex Marginean slot1_sgmii0: ethernet-phy@1c { 20e426d63eSAlex Marginean reg = <0x1c>; 21e426d63eSAlex Marginean }; 22e426d63eSAlex Marginean 23e426d63eSAlex Marginean slot1_sgmii1: ethernet-phy@1d { 24e426d63eSAlex Marginean reg = <0x1d>; 25e426d63eSAlex Marginean }; 26e426d63eSAlex Marginean 27e426d63eSAlex Marginean slot1_sgmii2: ethernet-phy@1e { 28e426d63eSAlex Marginean reg = <0x1e>; 29e426d63eSAlex Marginean }; 30e426d63eSAlex Marginean 31e426d63eSAlex Marginean slot1_sgmii3: ethernet-phy@1f { 32e426d63eSAlex Marginean reg = <0x1f>; 33e426d63eSAlex Marginean }; 34e426d63eSAlex Marginean}; 35e426d63eSAlex Marginean 36*d7a38566SShawn Guo&enetc_port0 { 37e426d63eSAlex Marginean phy-handle = <&slot1_sgmii0>; 38e426d63eSAlex Marginean phy-mode = "sgmii"; 39e426d63eSAlex Marginean managed = "in-band-status"; 40e426d63eSAlex Marginean status = "okay"; 41e426d63eSAlex Marginean}; 42e426d63eSAlex Marginean 43*d7a38566SShawn Guo&mscc_felix_ports { 44e426d63eSAlex Marginean port@1 { 45e426d63eSAlex Marginean status = "okay"; 46e426d63eSAlex Marginean phy-handle = <&slot1_sgmii1>; 47e426d63eSAlex Marginean phy-mode = "sgmii"; 48e426d63eSAlex Marginean managed = "in-band-status"; 49e426d63eSAlex Marginean }; 50e426d63eSAlex Marginean 51e426d63eSAlex Marginean port@2 { 52e426d63eSAlex Marginean status = "okay"; 53e426d63eSAlex Marginean phy-handle = <&slot1_sgmii2>; 54e426d63eSAlex Marginean phy-mode = "sgmii"; 55e426d63eSAlex Marginean managed = "in-band-status"; 56e426d63eSAlex Marginean }; 57e426d63eSAlex Marginean}; 58e426d63eSAlex Marginean 59*d7a38566SShawn Guo&mscc_felix { 60e426d63eSAlex Marginean status = "okay"; 61e426d63eSAlex Marginean}; 62